CN115440603A - Preparation method of Micro-LED device - Google Patents

Preparation method of Micro-LED device Download PDF

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CN115440603A
CN115440603A CN202210909023.9A CN202210909023A CN115440603A CN 115440603 A CN115440603 A CN 115440603A CN 202210909023 A CN202210909023 A CN 202210909023A CN 115440603 A CN115440603 A CN 115440603A
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layer
array
epitaxial
micro
growing
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王幸福
李文凤
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South China Normal University
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South China Normal University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

Abstract

The invention discloses a preparation method of a Micro-LED device, which comprises the steps of growing an epitaxial structure by adopting an epitaxial growth method, preparing a Micro-LED array after growing a first target layer by adopting lateral epitaxial growth, preparing an HEMT array after growing a second target layer, causing side wall damage to the device, not introducing a large number of dangling bonds, and reducing dislocation density; the Micro-LED array and the HEMT array are aligned and bonded, so that the flip bonding effect is realized, and the problem of signal delay caused by lead bonding is solved; the damage to the epitaxial structure in the stripping process is reduced through electrochemical wet etching, and the surface smoothness and uniformity of the stripped device are improved; the invention also realizes the mass transfer of the Micro-LED and provides a foundation for the mass production of the Micro-LED devices.

Description

Preparation method of Micro-LED device
Technical Field
The invention relates to the field of semiconductor technology, in particular to a preparation method of a Micro-LED device.
Background
Group III-V compounds such as gallium nitride (GaN), aluminum nitride (AlN), indium gallium nitride (InGaN), etc., are representative of the third generation semiconductor materials, having excellent physical and chemical properties. The gallium nitride is the most widely studied III-V nitride at present, and has the characteristics of wide forbidden band, high temperature resistance, high saturated electron rate, high breakdown field strength, high chemical stability and the like. By virtue of the excellent characteristics, the III-V group nitride can be used for manufacturing ultraviolet visible light emitting devices, ultraviolet detectors and high-temperature high-frequency high-power electronic devices with excellent performance, and can be widely applied to the fields of LED illumination and display, ultraviolet detection, radio frequency microwave and the like.
At present, dry etching is the mainstream means for preparing the gallium nitride-based Micro-LED. A plasma is generated during the dry etching process, including a large amount of charged particles and a small amount of non-charged particles. The plasmas are jointly LED to the surface of the unblocked gallium nitride to carry out physical bombardment and chemical etching, so that uncertain side wall damage is inevitably generated at the edge of the device, and a large number of dangling bonds are LED into the surface of the side wall, thereby affecting the performance (duying) of the Micro-LED device; in addition, the gallium nitride-based Micro-LED preparation process generally adopts a wire bonding electrical interconnection mode. In the wire bonding with a high I/O number of 100-500, the center-to-center distance of the bonding pads of the IC chip is 35 μm at the minimum, and the wire bonding increases the signal delay. Therefore, the electrical interconnection mode of wire bonding limits the preparation of Micro-LED devices with high resolution; in the preparation process of the Micro-LED device, due to the problems of relatively serious lattice mismatch, thermal mismatch and the like existing between the substrate and the epitaxial thin film, high-density defects and large stress can be introduced in the epitaxial growth process, and the improvement of the performance of the III-V nitride device is severely limited. Therefore, after growing a nitride epitaxial array thin film on a sapphire substrate, it is generally necessary to remove the growth substrate. At present, the mainstream method for removing the growth substrate is to peel off the epitaxial film from the growth substrate by using laser, but the laser peeling can damage the epitaxial structure, and the flatness and uniformity of the peeled surface are poor, so that the performance of a device manufactured on the epitaxial structure is seriously influenced; in addition, the existing preparation method of the Micro-LED device is difficult to realize the mass production of the Micro-LED device.
Disclosure of Invention
In order to solve the technical problem, the embodiment of the invention provides a preparation method of a Micro-LED device.
The technical scheme adopted by the embodiment of the invention is as follows:
a preparation method of a Micro-LED device comprises the following steps:
cleaning the first substrate and the second substrate;
growing a first epitaxial layer on the first substrate by adopting an epitaxial growth method, and growing a second epitaxial layer on the second substrate by adopting the epitaxial growth method, wherein the epitaxial growth method comprises any one of metal organic chemical vapor deposition, molecular beam epitaxy and hydride vapor phase epitaxy;
growing a first sacrificial layer of a preset graphic array on one side of the first epitaxial layer far away from the first substrate, growing a second sacrificial layer of the preset graphic array on one side of the second epitaxial layer far away from the second substrate, wherein the first sacrificial layer and the second sacrificial layer are heavily doped N-type GaN layers;
growing a first target layer on one side, far away from the first epitaxial layer, of the first sacrificial layer by adopting lateral epitaxial growth, and growing a second target layer on one side, far away from the second epitaxial layer, of the second sacrificial layer by adopting lateral epitaxial growth, wherein the first target layer and the second target layer are in arrayed umbrella-shaped structures, and the umbrella-shaped structures are isolated from each other;
preparing a Micro-LED array on the first target layer, and preparing an HEMT array on the second target layer;
aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array;
and carrying out electrochemical wet etching on the integrated device array, and removing the first substrate, the first epitaxial layer and the first sacrificial layer to finish the preparation of the Micro-LED device.
As an optional implementation manner, the first epitaxial layer includes a first nucleation layer, a current spreading layer, a barrier layer, and a third sacrificial layer, the first nucleation layer adopts an undoped GaN layer, the current spreading layer adopts an N-type doped GaN layer, the barrier layer adopts an undoped GaN layer, and the third sacrificial layer adopts a low-doped N-type GaN layer;
the method for growing the first epitaxial layer on the first substrate by adopting the epitaxial growth method comprises the following steps:
growing the first nucleation layer on the first substrate;
growing the current expanding layer on one side of the first nucleation layer, which is far away from the first substrate;
growing the barrier layer on one side of the current spreading layer away from the first nucleation layer;
growing the third sacrificial layer on one side of the barrier layer away from the current spreading layer;
the second epitaxial layer comprises a second nucleation layer and a fourth sacrificial layer, the second nucleation layer is an undoped GaN layer, and the fourth sacrificial layer is a low-doped N-type GaN layer;
the growing of the second epitaxial layer on the second substrate by adopting an epitaxial growth method comprises the following steps:
growing the second nucleation layer on the second substrate;
and growing the fourth sacrificial layer on the side of the second nucleation layer away from the second substrate.
As an optional implementation manner, the growing a first sacrificial layer of a preset pattern array on the side of the first epitaxial layer far away from the first substrate includes:
depositing a first dielectric layer on one side of the first epitaxial layer far away from the first substrate;
carrying out graphical processing on the first dielectric layer according to the preset graphical array to generate a first growth window, wherein the first growth window exposes the surface of the first epitaxial layer;
growing the first sacrificial layer in the first growth window by adopting a metal organic chemical vapor deposition system, wherein the thickness of the first sacrificial layer is smaller than that of the first dielectric layer;
the growing of the second sacrificial layer of the preset graphic array on the side, far away from the second substrate, of the second epitaxial layer comprises:
depositing a second dielectric layer on one side of the second epitaxial layer far away from the second substrate;
carrying out patterning treatment on the second dielectric layer according to the preset pattern array to generate a second growth window, wherein the second growth window exposes the surface of the second epitaxial layer;
and growing the second sacrificial layer in the second growth window by adopting a metal organic chemical vapor deposition system, wherein the thickness of the second sacrificial layer is less than that of the second dielectric layer.
As an optional implementation manner, the performing a patterning process on the first dielectric layer according to the preset pattern array to generate a first growth window includes:
spin-coating a first photoresist on one side of the first dielectric layer, which is far away from the first epitaxial layer;
forming the preset graphic array on the first photoresist through an exposure and development process;
and after etching the exposure area of the first photoresist by adopting dry etching, removing the residual first photoresist by adopting acetone and cleaning to generate the first growth window.
As an optional implementation manner, the performing a patterning process on the second dielectric layer according to the preset graphic array to generate a second growth window includes:
spin-coating a second photoresist on one side of the second dielectric layer, which is far away from the second epitaxial layer;
forming the preset graphic array on the second photoresist through an exposure and development process;
and after etching the exposure area of the second photoresist by adopting dry etching, removing the residual second photoresist by adopting acetone and cleaning to generate the second growth window.
As an alternative embodiment, the growing a first target layer on the side of the first sacrificial layer far from the first epitaxial layer by using lateral epitaxial growth includes:
growing a first nitride epitaxial structure on one side of the first sacrificial layer far away from the first epitaxial layer, and performing lateral epitaxial growth on the first nitride epitaxial structure higher than the first growth window part;
stopping growing before the first nitride epitaxial structures touch and are connected with each other, and corroding the first dielectric layer to obtain the first target layer;
adopt lateral epitaxial growth to be in the second sacrificial layer is kept away from one side growth second target layer of second epitaxial layer includes:
growing a second nitride epitaxial structure on one side of the second sacrificial layer far away from the second epitaxial layer, and performing lateral epitaxial growth on the part, higher than the second growth window, of the second nitride epitaxial structure;
and stopping growing before the second nitride epitaxial structures touch and are connected with each other, and corroding the second dielectric layer to obtain the second target layer.
As an alternative embodiment, the preparing the Micro-LED array on the first target layer includes:
forming N-region steps and P regions on each array unit of the first target layer through photoetching and etching processes;
preparing an ITO film on the P area;
depositing a nickel/gold layer on the ITO film and the N area step;
preparing a passivation layer on the nickel/gold layer to finish the preparation of the Micro-LED array;
the preparing of the HEMT array on the second target layer comprises:
and forming a source electrode, a drain electrode and a grid electrode on each array unit of the second target layer to finish the preparation of the HEMT array.
As an optional implementation, the aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array includes:
depositing a bonding metal layer on the Micro-LED array and the source and drain of each array unit of the HEMT array;
and carrying out alignment bonding on the Micro-LED array and the HEMT array through the bonding metal layer to generate the integrated device array.
As an optional embodiment, before the step of depositing the bonding metal layer on the Micro-LED array and the source and the drain of each array unit of the HEMT array, the method for manufacturing a Micro-LED device further includes:
arranging a shielding layer at the surface edge of the first target layer;
and covering a protective layer on the surface of the shielding layer not contacting the first target layer, wherein the protective layer comprises any one of photoresist and raw material tape.
As an optional implementation, the performing an electrochemical wet etching on the integrated device array to remove the first substrate, the first epitaxial layer, and the first sacrificial layer to complete the preparation of the Micro-LED device includes:
removing the protective layer, and etching the shielding layer by adopting an etching process until the first sacrificial layer is exposed;
depositing an electrode layer on the first sacrificial layer exposed by the shielding layer, wherein the electrode layer adopts silver;
arranging the integrated device array deposited with the electrode layer on an anode of an electrochemical wet etching device, contacting the anode with the electrode layer, and soaking the integrated device array outside the electrode layer and a cathode of the electrochemical wet etching device in an etching electrolyte, wherein the cathode adopts a platinum sheet electrode;
and electrifying the electrochemical wet etching device, carrying out electrochemical wet etching on the integrated device array, and automatically releasing the first substrate and the first epitaxial layer after etching the first sacrificial layer to finish the preparation of the Micro-LED device.
According to the preparation method of the Micro-LED device, the first epitaxial layer is grown on the first substrate by adopting an epitaxial growth method, the second epitaxial layer is grown on the second substrate, the first sacrificial layer is further grown on the first epitaxial layer, the second sacrificial layer is grown on the second epitaxial layer, the Micro-LED array is prepared after the first target layer is grown on the first sacrificial layer by adopting lateral epitaxial growth, the HEMT array is prepared after the second target layer is grown on the second sacrificial layer, the side wall of the device cannot be damaged in the preparation process, a large number of dangling bonds cannot be introduced, and the dislocation density is reduced; the Micro-LED array and the HEMT array are aligned and bonded, so that the flip bonding effect is realized, and the problem of signal delay caused by electrical interconnection realized by adopting lead bonding in the traditional method is solved; the first substrate, the first epitaxial layer and the first sacrificial layer are removed through electrochemical wet etching, so that damage to the epitaxial structure in the stripping process is reduced, and the surface smoothness and uniformity of the stripped device are improved; the Micro-LED array and the HEMT array are aligned and bonded, and the electrochemical wet etching process realizes the mass transfer of the Micro-LED, and provides a foundation for the mass production of Micro-LED devices.
Drawings
FIG. 1 is a flow chart of a preparation method of a Micro-LED device according to an embodiment of the invention
FIG. 2 is a schematic structural diagram of a first epitaxial layer and a first dielectric layer of a Micro-LED device according to an embodiment of the invention;
FIG. 3 is a schematic view of a first growth window of a Micro-LED device in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of an etching area on a first dielectric layer in the method for manufacturing a Micro-LED device according to the embodiment of the invention;
FIG. 5 is a schematic structural diagram of a first sacrificial layer of a Micro-LED device according to an embodiment of the invention;
FIG. 6 is a schematic view of the growth of a first target layer of the method for fabricating a Micro-LED device according to an embodiment of the invention;
FIG. 7 is a schematic structural diagram of a Micro-LED array and a HEMT array of the Micro-LED device according to the embodiment of the invention;
FIG. 8 is a schematic structural diagram of a bonding metal layer of a Micro-LED device according to an embodiment of the present invention;
FIG. 9 is a schematic structural diagram of an integrated device array of Micro-LED devices according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of an electrochemical wet etching apparatus for a method of fabricating a Micro-LED device according to an embodiment of the present invention;
FIG. 11 is a schematic structural view of a Micro-LED device according to an embodiment of the present invention.
Reference numerals: 201. a first substrate; 202. a first nucleation layer; 203. a current spreading layer; 204 a barrier layer; 205. a third sacrificial layer; 206. a first dielectric layer; 501. a first sacrificial layer; 601. a first target layer; 701. a Micro-LED array; 702. an HEMT array; 801. and bonding the metal layer.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
At present, dry etching is the mainstream means for preparing the gallium nitride based Micro-LED. A plasma is generated during the dry etching process, including a large amount of charged particles and a small amount of non-charged particles. The plasmas are jointly LED to the surface of the unblocked gallium nitride to carry out physical bombardment and chemical etching, so that uncertain side wall damage is inevitably generated at the edge of the device, and a large number of dangling bonds are LED into the surface of the side wall, thereby affecting the performance (duying) of the Micro-LED device; in addition, the gallium nitride-based Micro-LED preparation process generally adopts a wire bonding electrical interconnection mode. In the wire bonding with a high I/O number of 100-500, the center-to-center distance of the bonding pads of the IC chip is 35 μm at the minimum, and the wire bonding increases the signal delay. Therefore, the preparation of the Micro-LED device with high resolution is limited by the electrical interconnection mode of wire bonding; in the preparation process of the Micro-LED device, due to the problems of relatively serious lattice mismatch, thermal mismatch and the like existing between the substrate and the epitaxial thin film, high-density defects and large stress can be introduced in the epitaxial growth process, and the improvement of the performance of the III-V nitride device is severely limited. Therefore, after growing a nitride epitaxial array thin film on a sapphire substrate, it is usually necessary to remove the growth substrate. At present, the mainstream method for removing the growth substrate is to peel off the epitaxial film from the growth substrate by using laser, but the laser peeling can damage the epitaxial structure, and the flatness and uniformity of the peeled surface are poor, so that the performance of a device manufactured on the epitaxial structure is seriously influenced; in addition, the existing preparation method of the Micro-LED device is difficult to realize the mass production of the Micro-LED device. The embodiment of the invention provides a preparation method of a Micro-LED device, which comprises the steps of growing a first epitaxial layer on a first substrate by adopting an epitaxial growth method, growing a second epitaxial layer on a second substrate, further growing a first sacrificial layer on the first epitaxial layer, growing a second sacrificial layer on the second epitaxial layer, preparing a Micro-LED array after growing a first target layer on the first sacrificial layer by adopting lateral epitaxial growth, and preparing an HEMT array after growing a second target layer on the second sacrificial layer, wherein the side wall of the device cannot be damaged in the preparation process, a large number of dangling bonds cannot be introduced, and the dislocation density is reduced; the Micro-LED array and the HEMT array are aligned and bonded, so that the flip bonding effect is realized, and the problem of signal delay caused by electrical interconnection realized by adopting lead bonding in the traditional method is solved; the first substrate, the first epitaxial layer and the first sacrificial layer are removed through electrochemical wet etching, so that damage to the epitaxial structure in the stripping process is reduced, and the surface smoothness and uniformity of the stripped device are improved; the Micro-LED array and the HEMT array are aligned and bonded, and the electrochemical wet etching process realizes the mass transfer of the Micro-LED, and provides a foundation for the mass production of Micro-LED devices.
As shown in fig. 1, an embodiment of the present invention provides a method for manufacturing a Micro-LED device, where the method includes the following steps S101 to S107:
s101, cleaning a first substrate 201 and a second substrate;
in the embodiment of the present invention, the first substrate 201 and the second substrate include any one of a sapphire substrate, a GaN substrate, a Si substrate, and a SiC substrate.
Alternatively, in one embodiment of the present invention, the first substrate 201 and the second substrate are sapphire substrates.
S102, growing a first epitaxial layer on the first substrate 201 by adopting an epitaxial growth method, and growing a second epitaxial layer on the second substrate by adopting an epitaxial growth method;
wherein the epitaxial growth method includes any one of Metal Organic Chemical Vapor Deposition (MOCVD), molecular Beam Epitaxy (MBE), and Hydride Vapor Phase Epitaxy (HVPE).
Alternatively, in one embodiment of the present invention, the sapphire substrates (first and second substrates) that have undergone standard cleaning processes are placed in a MOCVD (metal organic chemical vapor deposition) system reaction chamber, a first epitaxial layer is grown on the first substrate, and a second epitaxial layer is grown on the second substrate using MOCVD.
Specifically, referring to fig. 2, in an embodiment of the present invention, the first epitaxial layer includes a first nucleation layer 202, a current spreading layer 203, a barrier layer 204, and a third sacrificial layer 205, where the first nucleation layer 202 is an undoped GaN layer, the current spreading layer 203 is an N-type doped GaN layer, the barrier layer 204 is an undoped GaN layer, and the third sacrificial layer 205 is a low-doped N-type GaN layer. The method for growing the first epitaxial layer on the first substrate by adopting the epitaxial growth method specifically comprises the following steps of:
1) Growing a first nucleation layer 202 on a first substrate 201;
optionally, the thickness of the first nucleation layer 202 is 0.3 μm to 2 μm.
2) Growing a current expanding layer 203 on the side of the first nucleation layer 202 away from the first substrate 201;
optionally, the thickness of the current spreading layer 203 is 0.2 μm to 4.5 μm, wherein the doping concentration of the N-type doped GaN layer is 3 × 10 18 cm -3 ～7×10 18 cm -3 And the doping atoms are Si.
3) Growing a barrier layer 204 on the side of the current spreading layer 203 far away from the first nucleation layer 202;
optionally, the barrier layer 204 has a thickness of 0.24 μm to 0.5 μm.
4) A third sacrificial layer 205 is grown on the side of the barrier layer 204 remote from the current spreading layer 203.
Alternatively, the thickness of the third sacrificial layer 205 is 500nm, wherein the doping concentration of the low-doped N-type GaN layer is 1 × 10 19 cm -3 。
Specifically, in the embodiment of the present invention, the second epitaxial layer includes a second nucleation layer and a fourth sacrificial layer, the second nucleation layer uses an undoped GaN layer, and the fourth sacrificial layer uses a low-doped N-type GaN layer. Growing a second epitaxial layer on a second substrate by an epitaxial growth method specifically comprises the following steps:
1) Growing a second nucleation layer on a second substrate;
optionally, the second nucleation layer has a thickness of 0.3 μm to 2 μm.
2) And growing a fourth sacrificial layer on the side of the second nucleation layer away from the second substrate.
Optionally, the thickness of the fourth sacrificial layer is 500nm, wherein the doping concentration of the low-doped N-type GaN layer is 1 × 10 19 cm -3 。
S103, growing a first sacrificial layer 501 of a preset graphic array on one side of the first epitaxial layer far away from the first substrate 201, and growing a second sacrificial layer of the preset graphic array on one side of the second epitaxial layer far away from the second substrate;
the first sacrificial layer 501 and the second sacrificial layer are heavily doped N-type GaN layers.
In the embodiment of the present invention, by providing the first sacrificial layer 501 and the second sacrificial layer of the predetermined pattern array, the rate of the electrochemical wet etching in the subsequent step is increased, which is beneficial to preferentially etching the first sacrificial layer 501 (and the second sacrificial layer) by current.
Optionally, the doping concentration of the heavily doped N-type GaN layer used for the first sacrificial layer 501 and the second sacrificial layer is 2 × 10 19 cm -3 And the doping atoms are Si.
Specifically, in the embodiment of the present invention, growing the first sacrificial layer 501 of the preset pattern array on the side of the first epitaxial layer away from the first substrate specifically includes the following steps:
1) Depositing a first dielectric layer on one side of the first epitaxial layer far away from the first substrate;
in particular, referring to fig. 2, a first dielectric layer 206 is deposited on the side of the first epitaxial layer remote from the first substrate. Optionally, the material of the first dielectric layer 206 is SiO 2 And SiN x Any one of them.
Optionally, the first dielectric layer 206 is deposited by any one of Plasma Enhanced Chemical Vapor Deposition (PECVD), low Pressure Chemical Vapor Deposition (LPCVD), and magnetron sputtering deposition, and the thickness of the first dielectric layer 206 is 0.2 μm to 2 μm.
Alternatively, in one embodiment of the present invention, 1.2 μm of SiO is deposited on the side of the first epitaxial layer away from the first substrate 201 using PECVD 2 As the first dielectric layer 206.
2) Performing graphical processing on the first dielectric layer 206 according to a preset graphical array to generate a first growth window;
specifically, referring to fig. 3, the first dielectric layer is patterned according to the predetermined pattern array, and a portion of the first dielectric layer is removed, so that the first growth window exposes the surface of the first epitaxial layer, and the first growth window of the predetermined pattern array is formed on the first dielectric layer.
Optionally, the preset pattern array adopts circles which are periodically arranged, the diameter of each circle is 5 μm to 100 μm, and the distance between the circles is 5 μm to 50 μm.
In an embodiment of the invention, the generating of the first growth window comprises the steps of:
a. spin-coating a first photoresist on the side of the first dielectric layer 206 away from the first epitaxial layer;
specifically, a spin coating machine is used for spin coating first photoresist on one side, far away from the first epitaxial layer, of the first dielectric layer.
b. Forming a preset pattern array on the first photoresist through an exposure and development process;
alternatively, in one embodiment of the present invention, the diameter of the circles in the predetermined pattern array is 50 μm, and the pitch between the circles is 10 μm. And after the photoetching is finished, processing by adopting a developing solution to expose the exposure area of the first photoresist.
c. And after etching the exposure area of the first photoresist by adopting dry etching, removing the residual first photoresist by adopting acetone and cleaning to generate a first growth window.
Optionally, in the embodiment of the present invention, an Inductively Coupled Plasma (ICP) etching system is used to etch the exposure region of the first photoresist, where the etching depth is 1.2 μm, so that the first growth window exposes the surface of the first epitaxial layer. Fig. 4 shows an etched region 401 of an embodiment of the present invention.
Specifically, after the etching is completed, acetone is used to remove the remaining first photoresist, and diluted HCl is used to clean the first photoresist, so as to generate a first growth window, as shown in fig. 3.
3) A first sacrificial layer 501 is grown in the first growth window using a metal organic chemical vapor deposition system.
Referring to fig. 5, the thickness of the first sacrificial layer 501 is smaller than that of the first dielectric layer 206. Optionally, the thickness of the first sacrificial layer 501 is 10nm.
It can be understood that by making the thickness of the first sacrificial layer 501 smaller than that of the first dielectric layer 206, the first sacrificial layer 501 is a periodically arranged cylinder, while the first dielectric layer 206 still maintains a periodically arranged patterned growth window, so as to facilitate the subsequent growth of the first target layer 601 of the arrayed umbrella-shaped structure.
Specifically, in the embodiment of the present invention, growing the second sacrificial layer of the preset pattern array on the side of the second epitaxial layer away from the second substrate specifically includes the following steps:
1) Depositing a second dielectric layer on one side of the second epitaxial layer far away from the second substrate;
specifically, a second dielectric layer is deposited on a side of the second epitaxial layer remote from the second substrate. Optionally, the second dielectric layer is made of SiO 2 And SiN x Any one of them.
Optionally, the deposition method of the second dielectric layer adopts any one of Plasma Enhanced Chemical Vapor Deposition (PECVD), low Pressure Chemical Vapor Deposition (LPCVD) and magnetron sputtering deposition, and the thickness of the second dielectric layer is 0.2 μm to 2 μm.
Optionally, in an embodiment of the present invention, PECVD is used to deposit 1.2 μm of SiO on the side of the second epitaxial layer remote from the second substrate 2 As a second dielectric layer.
2) Performing graphical processing on the second medium layer according to a preset graphic array to generate a second growth window;
specifically, the second dielectric layer is subjected to patterning processing according to the preset pattern array, a part of the second dielectric layer is removed, the second growth window is exposed on the surface of the second epitaxial layer, and the second growth window of the preset pattern array is formed on the second dielectric layer.
Optionally, the preset pattern array adopts circles which are periodically arranged, the diameter of each circle is 5 μm to 100 μm, and the distance between the circles is 5 μm to 50 μm.
In an embodiment of the invention, the generating of the second growth window comprises the steps of:
a. spin-coating a second photoresist on one side of the second dielectric layer, which is far away from the second epitaxial layer;
specifically, spin coating a second photoresist on one side of the second dielectric layer, which is far away from the second epitaxial layer, through a spin coater.
b. Forming a preset pattern array on the second photoresist through an exposure and development process;
alternatively, in one embodiment of the present invention, the diameter of the circles in the predetermined pattern array is 50 μm, and the pitch between the circles is 10 μm. And after the photoetching is finished, processing by adopting a developing solution to expose the exposure area of the second photoresist.
c. And after etching the exposure area of the second photoresist by adopting dry etching, removing the residual second photoresist by adopting acetone and cleaning to generate a second growth window.
Optionally, in the embodiment of the present invention, an Inductively Coupled Plasma (ICP) etching system is used to etch the exposed region of the second photoresist, where the etching depth is 1.2 μm, so that the second growth window exposes the surface of the second epitaxial layer.
Specifically, after the etching is completed, acetone is used for removing the residual second photoresist, and diluted HCl is used for cleaning, so that a second growth window is generated.
3) A second sacrificial layer is grown in the second growth window using a metal organic chemical vapor deposition system.
And the thickness of the second sacrificial layer is smaller than that of the second dielectric layer. Optionally, the thickness of the second sacrificial layer is 10nm.
It can be understood that the thickness of the second sacrificial layer is smaller than that of the second dielectric layer, so that the second sacrificial layer is a periodically arranged cylinder, and meanwhile, a periodically arranged patterned growth window is still kept in the second dielectric layer, so as to facilitate the subsequent growth of the second target layer of the arrayed umbrella-shaped structure.
S104, growing a first target layer 601 on one side, far away from the first epitaxial layer, of the first sacrificial layer 501 by adopting lateral epitaxial growth, and growing a second target layer on one side, far away from the second epitaxial layer, of the second sacrificial layer by adopting lateral epitaxial growth;
the first target layer 601 and the second target layer are arrayed umbrella structures, and the umbrella structures are isolated from each other.
Optionally, MOCVD is used to grow the first target layer 601 on the side of the first sacrificial layer 501 far away from the first epitaxial layer, and MOCVD is used to grow the second target layer on the side of the second sacrificial layer far away from the second epitaxial layer.
Specifically, in the growth process of the first target layer 601 and the second target layer, the anisotropy of crystal growth is utilized, the first target layer 601 is only grown on the first sacrificial layer 501 by controlling the process parameters, the second target layer is only grown on the second sacrificial layer, the nucleation of the first target layer 601 on the surface of the first dielectric layer 206 is inhibited, and the nucleation of the second target layer on the surface of the second dielectric layer is inhibited; by controlling the growth conditions, the first target layer 601 and the second target layer are laterally extended to form arrayed umbrella structures isolated from each other, that is, each umbrella structure is an island.
Referring to fig. 6, in the embodiment of the present invention, growing the first target layer 601 on the side of the first sacrificial layer 501 far from the first epitaxial layer by using the lateral epitaxial growth specifically includes the following steps:
1) Growing a first nitride epitaxial structure on one side of the first sacrificial layer 501, which is far away from the first epitaxial layer, and performing lateral epitaxial growth on the first nitride epitaxial structure, which is higher than the first growth window part;
2) The growth is stopped before the first nitride epitaxial structures touch each other and are connected, and the first dielectric layer 206 is etched to obtain the first target layer 601.
In an embodiment of the present invention, growing the second target layer on the side of the second sacrificial layer away from the second epitaxial layer by using lateral epitaxial growth specifically includes the following steps:
1) Growing a second nitride epitaxial structure on one side, far away from the second epitaxial layer, of the second sacrificial layer, and performing lateral epitaxial growth on the part, higher than the second growth window, of the second nitride epitaxial structure;
2) And stopping growing before the second nitride epitaxial structures touch and are connected with each other, and corroding the second dielectric layer to obtain a second target layer.
Optionally, in an embodiment of the present invention, the thickness of the first target layer and the second target layer is 2.2 μm.
It can be understood that the lower portions (e.g., the portions grown to a thickness of less than 1.1 μm in one embodiment of the present invention) of the first and second target layers are periodically arranged cylinders, and the upper portions (e.g., the portions grown to a thickness of more than 1.1 μm in one embodiment of the present invention) are arrays of holes having a diameter larger than the diameters of the first and second growth windows, as shown in fig. 6.
In an embodiment of the invention, a hydrofluoric acid (HF) solution or a Buffered Oxide Etch (BOE) solution is used to etch the first dielectric layer and the second dielectric layer.
S105, preparing a Micro-LED array 701 on the first target layer 601, and preparing an HEMT array 702 on the second target layer;
in particular, in an embodiment of the present invention, the preparation of the Micro-LED array 701 on the first target layer 601 specifically comprises the following steps:
1) Forming an N-region step and a P-region on each array unit of the first target layer 601 through photolithography and etching processes;
2) Preparing an ITO film on the P area;
specifically, an ITO film is prepared on the P area through electron beam evaporation or magnetron sputtering, and annealing treatment is carried out.
3) Depositing a nickel/gold layer on the ITO film and the N area step;
specifically, ni (10 nm)/Au (30 nm) is deposited as ohmic contacts on the P region and the N region using electron beam evaporation or thermal evaporation.
4) And preparing a passivation layer on the nickel/gold layer to finish the preparation of the Micro-LED array 701.
Optionally, the SiO is prepared by PECVD 2 As a passivation layer.
Specifically, in an embodiment of the present invention, the step of preparing the HEMT array 702 on the second target layer specifically includes the following steps:
a source electrode, a drain electrode, and a gate electrode are formed on each array element of the second target layer, completing the fabrication of the HEMT array 702.
Fig. 7 shows a Micro-LED array 701 and a HEMT array 702 prepared according to an embodiment of the present invention.
S106, carrying out alignment bonding on the Micro-LED array and the HEMT array to generate an integrated device array;
specifically, in the embodiment of the invention, the metal eutectic bonding (bonding metal layer 801) of the Micro-LED array and the HEMT array is completed by using the AuSn alloy as the bonding metal.
The method specifically comprises the following steps:
1) Depositing a bonding metal layer 801 on the Micro-LED array and the source and drain of each array unit of the HEMT array;
specifically, referring to fig. 8, ti having a thickness of 50nm (ranging from 10nm to 100 nm) and AuSn alloy having a thickness of 2 μm (ranging from 2 μm to 15 μm) are deposited on the Micro-LED array 701 (N region and P region of each array unit) and the source and drain electrodes of each array unit of the HEMT array 702, respectively, using a vacuum thermal evaporation apparatus. The deposited metal is used as a bonding metal layer 801 in a bonding process, the light reflection effect of the bonding metal layer 801 on light can improve the light extraction efficiency of the Micro-LED after transfer bonding, and the high heat conductivity of the bonding metal can also improve the heat dissipation efficiency of the Micro-LED and the HEMT.
2) The Micro-LED array 701 and the HEMT array 702 are aligned and bonded through the bonding metal layer 801, and an integrated device array is generated.
Fig. 9 shows an integrated device array produced by an embodiment of the present invention. It is understood that in one embodiment of the present invention, the addressing modes of active addressing or passive addressing can be realized by designing the masks of the Micro-LED epitaxial structure and the HEMT epitaxial structure.
Specifically, the Micro-LED array 701 and the HEMT array 702 are aligned and bonded at the temperature of 400 ℃ for 30 minutes by using the pressure of 0.98Mpa, and an integrated device array is generated.
In an embodiment of the present invention, the following steps are further included before depositing the bonding metal layer 801:
1) Disposing a shielding layer at the surface edge of the first target layer 601, wherein the shielding layer is used for achieving shielding effect in the subsequent electrochemical wet etching (step S107);
2) A protective layer is covered on the surface of the shielding layer not contacting the first target layer 601, wherein the protective layer includes any one of a photoresist and a raw material tape.
S107, carrying out electrochemical wet etching on the integrated device array, removing the first substrate 201, the first epitaxial layer and the first sacrificial layer 501, and completing the preparation of the Micro-LED device.
Specifically, the integrated device array is subjected to electrochemical wet etching, and the first sacrificial layer 501 is etched, so that the structures of the first target layer 701 and above are released from the first substrate 201, the first epitaxial layer and the first sacrificial layer 501, and the Micro-LED array epitaxial film is peeled.
In an embodiment of the present invention, step S107 specifically includes the following steps:
1) Removing the protective layer, and etching the shielding layer by using an etching process until the first sacrificial layer 501 is exposed;
2) Depositing an electrode layer on the first sacrificial layer 501 exposed by the shielding layer, wherein the electrode layer is made of silver;
3) Referring to fig. 10, the integrated device array with the deposited electrode layer is arranged at an anode of the electrochemical wet etching apparatus, the anode is in contact with the electrode layer, the integrated device array outside the electrode layer and a cathode of the electrochemical wet etching apparatus are immersed in an etching electrolyte, and the cathode adopts a platinum sheet electrode to improve the stability of the electrochemical wet etching process;
4) And electrifying the electrochemical wet etching device, carrying out electrochemical wet etching on the integrated device array, and automatically releasing the first substrate 201 and the first epitaxial layer after the first sacrificial layer 501 is etched to finish the preparation of the Micro-LED device.
Wherein the corrosive electrolyte adopts H 2 C 2 O 4 Solution, EDTA-4Na solution, HNO 3 Solutions and K 2 SO 4 And selecting corresponding electrolyte according to the alignment bonding process from any one of the solutions. The corrosion voltage adopted in the corrosion process is 10-30V, and the corrosion time is 0.5-9 h.
Alternatively, in one embodiment of the invention, the electrolyte is 0.3M H 2 C 2 O 4 The solution is etched at 16V for 0.5h.
FIG. 11 shows a Micro-LED device prepared according to an embodiment of the present invention.
It is understood that the second substrate of the Micro-LED device can also be stripped off by electrochemical wet etching and the Micro-LED device after stripping off the second substrate can be bonded to other foreign substrates.
In summary, in the preparation method of the Micro-LED device according to the embodiment of the invention, the first epitaxial layer is grown on the first substrate by using the epitaxial growth method, the second epitaxial layer is grown on the second substrate, the first sacrificial layer is further grown on the first epitaxial layer, the second sacrificial layer is grown on the second epitaxial layer, the Micro-LED array is prepared after the first target layer is grown on the first sacrificial layer by using the lateral epitaxial growth, and the HEMT array is prepared after the second target layer is grown on the second sacrificial layer, so that the side wall of the device is not damaged in the preparation process, a large number of dangling bonds are not introduced, and the dislocation density is reduced; the Micro-LED array and the HEMT array are aligned and bonded, so that the flip bonding effect is realized, and the problem of signal delay caused by the fact that electrical interconnection is realized by adopting lead bonding in the traditional method is solved; the first substrate, the first epitaxial layer and the first sacrificial layer are removed through electrochemical wet etching, so that damage to the epitaxial structure in the stripping process is reduced, and the surface smoothness and uniformity of the stripped device are improved; the Micro-LED array and the HEMT array are aligned and bonded, and the electrochemical wet etching process realizes the mass transfer of the Micro-LED, and provides a foundation for the mass production of Micro-LED devices.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A preparation method of a Micro-LED device is characterized by comprising the following steps:
cleaning the first substrate and the second substrate;
growing a first epitaxial layer on the first substrate by adopting an epitaxial growth method, and growing a second epitaxial layer on the second substrate by adopting the epitaxial growth method, wherein the epitaxial growth method comprises any one of metal organic chemical vapor deposition, molecular beam epitaxy and hydride vapor phase epitaxy;
growing a first sacrificial layer of a preset graphic array on one side of the first epitaxial layer far away from the first substrate, growing a second sacrificial layer of the preset graphic array on one side of the second epitaxial layer far away from the second substrate, wherein the first sacrificial layer and the second sacrificial layer are heavily doped N-type GaN layers;
growing a first target layer on one side, far away from the first epitaxial layer, of the first sacrificial layer by adopting lateral epitaxial growth, and growing a second target layer on one side, far away from the second epitaxial layer, of the second sacrificial layer by adopting lateral epitaxial growth, wherein the first target layer and the second target layer are in arrayed umbrella-shaped structures, and the umbrella-shaped structures are isolated from each other;
preparing a Micro-LED array on the first target layer, and preparing an HEMT array on the second target layer;
aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array;
and carrying out electrochemical wet etching on the integrated device array, removing the first substrate, the first epitaxial layer and the first sacrificial layer, and completing the preparation of the Micro-LED device.
2. A method for fabricating a Micro-LED device according to claim 1, wherein the first epitaxial layer includes a first nucleation layer, a current spreading layer, a barrier layer and a third sacrificial layer, the first nucleation layer is an undoped GaN layer, the current spreading layer is an N-type doped GaN layer, the barrier layer is an undoped GaN layer, and the third sacrificial layer is a low-doped N-type GaN layer;
the growing of the first epitaxial layer on the first substrate by using an epitaxial growth method comprises the following steps:
growing the first nucleation layer on the first substrate;
growing the current expanding layer on one side of the first nucleation layer, which is far away from the first substrate;
growing the barrier layer on one side of the current spreading layer away from the first nucleation layer;
growing the third sacrificial layer on one side of the barrier layer away from the current spreading layer;
the second epitaxial layer comprises a second nucleation layer and a fourth sacrificial layer, the second nucleation layer is an undoped GaN layer, and the fourth sacrificial layer is a low-doped N-type GaN layer;
the growing a second epitaxial layer on the second substrate by using an epitaxial growth method comprises the following steps:
growing the second nucleation layer on the second substrate;
and growing the fourth sacrificial layer on the side of the second nucleation layer away from the second substrate.
3. A method of fabricating a Micro-LED device according to claim 1, wherein growing the first sacrificial layer of the predetermined patterned array on a side of the first epitaxial layer remote from the first substrate comprises:
depositing a first dielectric layer on one side of the first epitaxial layer far away from the first substrate;
carrying out patterning processing on the first dielectric layer according to the preset graphic array to generate a first growth window, wherein the first growth window exposes the surface of the first epitaxial layer;
growing the first sacrificial layer in the first growth window by adopting a metal organic chemical vapor deposition system, wherein the thickness of the first sacrificial layer is smaller than that of the first dielectric layer;
the growing of the second sacrificial layer of the preset graphic array on the side, far away from the second substrate, of the second epitaxial layer comprises:
depositing a second dielectric layer on one side of the second epitaxial layer far away from the second substrate;
carrying out patterning treatment on the second dielectric layer according to the preset pattern array to generate a second growth window, wherein the second growth window exposes the surface of the second epitaxial layer;
and growing the second sacrificial layer in the second growth window by adopting a metal organic chemical vapor deposition system, wherein the thickness of the second sacrificial layer is less than that of the second dielectric layer.
4. A method of fabricating a Micro-LED device according to claim 3, wherein the patterning the first dielectric layer according to the predetermined pattern array to create a first growth window comprises:
spin-coating a first photoresist on one side of the first dielectric layer, which is far away from the first epitaxial layer;
forming the preset graphic array on the first photoresist through an exposure and development process;
and after etching the exposure area of the first photoresist by adopting dry etching, removing the residual first photoresist by adopting acetone and cleaning to generate the first growth window.
5. A method of fabricating a Micro-LED device according to claim 3, wherein the patterning the second dielectric layer according to the predetermined pattern array to generate a second growth window comprises:
spin-coating a second photoresist on one side of the second dielectric layer, which is far away from the second epitaxial layer;
forming the preset graphic array on the second photoresist through an exposure and development process;
and after etching the exposure area of the second photoresist by adopting dry etching, removing the residual second photoresist by adopting acetone and cleaning to generate the second growth window.
6. A method of fabricating a Micro-LED device according to claim 3, wherein the growing a first target layer on the first sacrificial layer side away from the first epitaxial layer using lateral epitaxial growth comprises:
growing a first nitride epitaxial structure on one side of the first sacrificial layer far away from the first epitaxial layer, and performing lateral epitaxial growth on the first nitride epitaxial structure higher than the first growth window part;
stopping growing before the first nitride epitaxial structures touch and are connected with each other, and corroding the first medium layer to obtain the first target layer;
adopt lateral epitaxial growth to be in the second sacrificial layer is kept away from one side growth second target layer of second epitaxial layer includes:
growing a second nitride epitaxial structure on one side, far away from the second epitaxial layer, of the second sacrificial layer, and performing lateral epitaxial growth on the part, higher than the second growth window, of the second nitride epitaxial structure;
and stopping growing before the second nitride epitaxial structures touch and are connected with each other, and corroding the second dielectric layer to obtain the second target layer.
7. The method for fabricating a Micro-LED device according to claim 1, wherein fabricating an array of Micro-LEDs on the first target layer comprises:
forming N-area steps and P areas on each array unit of the first target layer through photoetching and etching processes;
preparing an ITO film on the P area;
depositing a nickel/gold layer on the ITO film and the N area step;
preparing a passivation layer on the nickel/gold layer to finish the preparation of the Micro-LED array;
the preparing of the HEMT array on the second target layer comprises:
and forming a source electrode, a drain electrode and a grid electrode on each array unit of the second target layer to finish the preparation of the HEMT array.
8. A method for preparing a Micro-LED device according to claim 7, wherein the aligning and bonding the Micro-LED array and the HEMT array to generate an integrated device array comprises:
depositing a bonding metal layer on the Micro-LED array and the source and drain of each array unit of the HEMT array;
and carrying out alignment bonding on the Micro-LED array and the HEMT array through the bonding metal layer to generate the integrated device array.
9. A method of fabricating a Micro-LED device according to claim 8, wherein prior to said step of depositing bonding metal layers on said array of Micro-LEDs and on the source and drain of each array element of said array of HEMTs, said method further comprises:
arranging a shielding layer at the surface edge of the first target layer;
and covering a protective layer on the surface of the shielding layer not contacting the first target layer, wherein the protective layer comprises any one of photoresist and raw material tape.
10. A method for fabricating a Micro-LED device according to claim 9, wherein said performing an electrochemical wet etching process on said integrated device array to remove said first substrate, said first epitaxial layer and said first sacrificial layer, thereby completing fabrication of the Micro-LED device, comprises:
removing the protective layer, and etching the shielding layer by adopting an etching process until the first sacrificial layer is exposed;
depositing an electrode layer on the first sacrificial layer exposed by the shielding layer, wherein the electrode layer adopts silver;
arranging the integrated device array deposited with the electrode layer on an anode of an electrochemical wet etching device, contacting the anode with the electrode layer, and soaking the integrated device array outside the electrode layer and a cathode of the electrochemical wet etching device in an etching electrolyte, wherein the cathode adopts a platinum sheet electrode;
and electrifying the electrochemical wet etching device, carrying out electrochemical wet etching on the integrated device array, and automatically releasing the first substrate and the first epitaxial layer after the first sacrificial layer is etched to finish the preparation of the Micro-LED device.
CN202210909023.9A 2022-07-29 2022-07-29 Preparation method of Micro-LED device Pending CN115440603A (en)

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