CN115435897B - Optical module double closed loop verification data processing method and related equipment - Google Patents

Optical module double closed loop verification data processing method and related equipment Download PDF

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Publication number
CN115435897B
CN115435897B CN202210826335.3A CN202210826335A CN115435897B CN 115435897 B CN115435897 B CN 115435897B CN 202210826335 A CN202210826335 A CN 202210826335A CN 115435897 B CN115435897 B CN 115435897B
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extinction ratio
optical module
closed loop
optical
double closed
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CN115435897A (en
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郑海江
陈哲
高泉川
黄秋伟
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Xiamen Youxun Chip Co ltd
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Xiamen UX High Speed IC Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00Photometry, e.g. photographic exposure meter
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01MTESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
    • G01M11/00Testing of optical apparatus; Testing structures by optical methods not otherwise provided for
    • G01M11/02Testing optical properties

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  • General Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Optical Communication System (AREA)

Abstract

The invention discloses an optical module double closed loop verification data processing method and related equipment, wherein the method comprises the following steps: a temperature data processing step of respectively acquiring data of optical power and extinction ratio under temperature change and performing stability calculation to obtain a first calculation result; a double closed loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power in a preset adjustable range and adjusting stepping data to obtain a second calculation result; an out-of-lock data processing step, namely acquiring out-of-lock data of the optical module under various code patterns and various duty ratios; and an evaluation step, namely judging a double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data. The method can comprehensively cover the working condition of the double closed loops, verify the performance of the double closed loops and check whether the double closed loops lose lock, thereby achieving the technical effect of reliable double closed loop verification.

Description

Optical module double closed loop verification data processing method and related equipment
Technical Field
The invention relates to an optical module testing technology, in particular to an optical module double closed loop verification data processing method and related equipment.
Background
An optical module (optical module) is composed of an optoelectronic device, a functional circuit, an optical interface and the like, and the optoelectronic device comprises an emitting part and a receiving part. In short, the optical module is used for converting an electrical signal into an optical signal by the transmitting end, and converting the optical signal into an electrical signal by the receiving end after the optical signal is transmitted through the optical fiber.
At present, the optical power and extinction ratio of an optical module are controlled in a closed loop mode. The extinction ratio closed-loop control is that the modulation current loaded at different temperatures is controlled by the driving chip, a modulation current temperature compensation table does not need to be manufactured, and the requirement on consistency of the optical device is low. Thus double closed loop, i.e.: the optical power and extinction ratio are controlled in a closed loop mode, and the optical fiber extinction ratio control device has the advantages of being small in workload, high in extinction ratio stability, simple in production and debugging and the like. Currently, double closed loops are widely used in various types of optical modules.
However, there is a risk in the application of double closed loops that uncontrolled situations of optical power, extinction ratio (referred to as loss of lock) need to be prevented. Once the lock is lost, serious conditions can lead to packet loss, even serious consequences such as disconnection. Therefore, how to comprehensively verify the double closed loops and process the data is a problem to be solved.
Disclosure of Invention
The invention aims to comprehensively cover various verification conditions of double closed loops by the optical module double closed loop verification data processing method, accurately verify the performance of the optical module double closed loops and check the double closed loop unlocking condition, thereby achieving a reliable double closed loop verification effect.
A method for processing double closed loop verification data of an optical module comprises the following steps:
a temperature data processing step of respectively acquiring data of optical power and extinction ratio under temperature change and performing stability calculation to obtain a first calculation result;
a double closed loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power in a preset adjustable range and adjusting stepping data to obtain a second calculation result;
an out-of-lock data processing step, namely acquiring out-of-lock data of the optical module under various code patterns and various duty ratios;
and an evaluation step, namely judging a double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
Preferably, the step of processing the dual closed loop debug data is specifically implemented as:
performing an adjustable range test of extinction ratio under double closed loops to verify the adjustable range of extinction ratio under target optical power;
the optical power is adjusted to a lower limit and an upper limit to verify the adjustable range of extinction ratio.
Preferably, in the step of processing the out-of-lock data, a code pattern instruction is obtained through a code error meter so as to verify whether the out-of-lock condition of the optical module occurs.
Preferably, in the step of processing the out-of-lock data, an error code meter or a function signal generator is adopted to control the enabling time of the burst enabling signal so as to control the light emitting period and the light emitting duty ratio, so as to verify whether the out-of-lock condition of the optical module occurs.
Preferably, when the reflected light appears on the light path, the working data of the double closed loops of the optical module under the reflected light with different sizes are determined when the adjustable light attenuation is added into the reflected light.
Preferably, an adjustable range test of extinction ratio under double closed loops is performed to verify that the adjustable range of extinction ratio under the target optical power is specifically implemented as:
when the optical module is in a double-closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the double-closed-loop extinction ratio gear comprises the following steps:
coarse adjustment maximum gear and fine adjustment maximum gear correspond to maximum extinction ratio;
the minimum extinction ratio of the coarse adjustment minimum gear corresponds to the minimum extinction ratio of the fine adjustment minimum gear, and the adjustable range of the extinction ratio is recorded;
preferably, the optical power is adjusted to a lower limit and an upper limit, and an adjustable range test of the extinction ratio under the double closed loops is performed to verify the adjustable range of the extinction ratio under the target optical power, which is specifically implemented as follows:
adjusting the light power to reach the lower limit of the gaze power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach the upper limit of the eye light power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
the optical power is regulated to reach a target value, coarse adjustment gears of the extinction ratio are regulated, each change of 1 gear is taken as a step, and the extinction ratio and the optical power corresponding to different coarse adjustment gears are tested;
adjusting the optical power to reach a target value, adjusting the coarse extinction ratio gear to a set position of the target extinction ratio, adjusting the fine extinction ratio gear, taking each 1 gear as a step, and testing the corresponding extinction ratio and optical power under different fine extinction ratios;
adjusting the optical power to reach a target value, adjusting the extinction gear to the target value, keeping the extinction ratio gear fixed, taking each change of 0.5dbm as a step, and testing the corresponding extinction ratio under different optical powers;
the method comprises the steps of determining coarse adjustment steps and fine adjustment steps of extinction ratio, determining the influence of dimming power on the extinction ratio during double closed loop debugging, and adjusting the influence of the extinction ratio on the optical power.
Preferably, the method further comprises:
when the test condition of repeated power-on is carried out, the working waveform of the optical module is obtained;
judging whether the double closed loops of the optical module are started normally or not through the working waveform.
A computing device, at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of the preceding claims.
A readable medium storing computer executable instructions for performing the above-described optical module dual closed loop verification data processing method.
According to the optical module double closed loop verification data processing method, stability calculation is carried out through temperature data processing steps; a double closed loop debugging data processing step of performing bidirectional verification calculation aiming at the extinction ratio and the optical power; an unlocking data processing step, namely acquiring unlocking data of the optical module; and an evaluation step, namely judging a double closed loop verification result of the optical module. The method can comprehensively cover the working condition of the double closed loops, verify the performance of the double closed loops and check whether the double closed loops lose lock, thereby achieving the technical effect of reliable double closed loop verification.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1a is a block diagram of an optical module dual closed loop verification data processing system according to an embodiment of the present invention;
FIG. 1b is a flowchart illustrating a method for processing optical module dual closed loop verification data according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating another embodiment of a method for processing dual closed loop verification data of an optical module according to the present invention;
FIG. 3 is a flowchart illustrating another embodiment of a method for processing dual closed loop verification data of an optical module according to the present invention;
FIG. 4a is a flowchart illustrating another embodiment of a method for processing dual closed loop verification data of an optical module according to the present invention;
FIG. 4b is a flowchart illustrating another embodiment of a method for processing dual closed loop verification data of an optical module according to the present invention;
FIG. 5 is a schematic diagram of a computing device in an embodiment of the invention;
fig. 6 is a schematic structural diagram of a readable medium in an embodiment of the present application.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear and obvious, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Before the description of the embodiments, it is necessary to make explicit: the extinction ratio is controlled in two modes, one is to achieve the purpose that the extinction ratio is kept stable along with the temperature change through a modulation current temperature lookup table (namely, different modulation currents are indexed at different temperatures); the other is to sample by the driving chip and adjust the modulation current of the driving chip to achieve the purpose of stabilizing the extinction ratio (extinction ratio closed loop for short).
If a modulation current temperature lookup table is adopted to realize the control of extinction ratio, an accurate temperature compensation table needs to be manufactured, so that great workload is increased, and the consistency requirement on an optical device is high, so that the consistency of extinction ratio at high and low temperatures is ensured; meanwhile, a temperature compensation table is required to be called in the production process, so that the yield of the whole production is affected.
FIG. 1a shows that the optical module dual closed loop verification data processing method can be implemented by the data processing system of FIG. 1 a. The error code instrument provides different code pattern signals for the optical module, and the error code instrument controls the enabling time and period of the burst enabling signal; the direct current power supply supplies power to the test module; the I2C communication board and the computer are used for realizing the reading and writing of the register of the optical module and the state monitoring; the optical splitter splits the TX output light, and one path of light received by the optical power meter reads the optical power of the TX output light; one path of the optical splitter is connected to an eye diagram instrument, and the extinction ratio is read under the long-term light of the module (connected to a real-time oscilloscope under a burst mode to test an optical signal output in real time); the other two paths of the optical divider are connected to the adjustable optical attenuator to make reflection and reflect the TX output light back to the tested optical module. The above structures and examples are not limited to the devices and signal conditions in this implementation.
The embodiment of the invention provides a processing method and related equipment for dual closed-loop verification data of an optical module, and by the processing method, various verification conditions of dual closed-loop can be comprehensively covered, dual closed-loop performance of the optical module can be accurately verified, and dual closed-loop unlocking conditions can be checked, so that a reliable dual closed-loop verification effect can be achieved.
Fig. 1b shows a method for processing dual closed loop verification data of an optical module, which comprises the following steps:
s11, temperature data processing, namely respectively acquiring data of optical power and extinction ratio under temperature change and performing stability calculation to obtain a first calculation result;
alternatively, the temperature data processing may be implemented by the following hardware settings and steps:
(1) the optical module is set to emit light in a long time (BEN signal is fixedly connected high or low so that BEN is in an enabling state), the error code meter is set to provide PRBS23 code pattern, and the optical module is set to be in a double-closed-loop working mode; (2) calibrating the optical power and extinction ratio at normal temperature; (3) placing the materials into an incubator, and testing the optical power and extinction ratio at different temperatures; (4) and obtaining the variation of the optical power along with the temperature under the double closed loops, and obtaining the variation of the extinction ratio along with the temperature under the double closed loops. Thereby verifying the stability of the double closed loop with temperature change. However, the device and signal conditions in this implementation are not limited.
S12, double closed loop debugging data processing, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power in a preset adjustable range and adjusting stepping data to obtain a second calculation result;
referring to fig. 2, the steps of processing the dual closed loop debug data are specifically implemented as:
s21, testing the adjustable range of extinction ratio under double closed loops to verify the adjustable range of extinction ratio under the target optical power;
the aim of this step is: verifying the adjustable range of extinction ratio, and judging whether the extinction ratio is adjusted to a target value;
referring to fig. 3, the specific implementation steps are:
s31, when the optical module is in a double-closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the double-closed-loop extinction ratio gear comprises the following steps:
s32, coarse adjustment maximum gear and fine adjustment maximum gear correspond to the maximum extinction ratio;
s33, recording an adjustable range of the extinction ratio by the minimum extinction ratio corresponding to the coarse adjustment minimum gear and the fine adjustment minimum gear;
and S22, adjusting the optical power to the lower limit and the upper limit so as to verify the adjustable range of the extinction ratio.
The aim of this step is: and under the double closed loops, the coarse tuning step and the fine tuning step of the extinction ratio are verified, whether the optical power debugging and the extinction ratio debugging are mutually influenced or not is determined, and then the debugging step during the production debugging is cured, and the operability and the convenience degree of the double closed loops are verified.
Referring to fig. 4, adjusting the optical power to the lower limit and the upper limit to verify that the adjustable range of extinction ratio is embodied as:
s41, adjusting the light power to reach the lower limit of the eye light power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
s42, adjusting the light power to reach the upper limit of the eye light power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
s43, adjusting the optical power to reach a target value, adjusting the extinction ratio coarse-adjustment gear, taking each 1 gear as a step, and testing the extinction ratio and the optical power corresponding to different coarse-adjustment gears;
s44, adjusting the optical power to reach a target value, adjusting the coarse extinction ratio gear to a set position of the target extinction ratio, adjusting the fine extinction ratio gear, taking each 1 gear as a step, and testing the corresponding extinction ratio and optical power under different fine extinction ratios;
and S45, adjusting the optical power to reach a target value, adjusting the extinction gear to the target value, keeping the extinction ratio gear fixed, taking each change of 0.5dbm as a step, and testing the corresponding extinction ratio under different optical powers.
S13, performing out-of-lock data processing, namely acquiring out-of-lock data of the optical module under various code patterns and various duty ratios;
the double closed loop lock loss refers to the condition that one or both of the optical power and the extinction ratio are out of control. The judgment can be carried out by observing the eye diagram reading light power and the extinction ratio, and can also be carried out according to the magnitudes of the modulation current and the bias resistor current. The condition of losing lock appears, and the more common phenomenon is that bias current is 0, and extinction ratio is very big.
In the step of processing the unlocking data in step S13, a code pattern instruction is obtained through a code error meter to verify whether the unlocking condition of the optical module occurs.
The adaptability of the double closed loops to different code types is verified, the long-lighting and burst lighting states of the optical module are required to be tested, and the optical module under the long-lighting can be realized through the following hardware settings and steps:
(1) the optical module is arranged to emit light; the error code instrument provides a PRBS23 code pattern; setting the optical module to be in a double-closed-loop working mode; (2) adjusting the optical power and the extinction ratio to target values, and recording the optical power, the extinction ratio and the corresponding code pattern; (3) the code pattern of the error code instrument is changed, and the optical power, extinction ratio and corresponding code pattern are recorded.
Under the condition of burst light emission of the optical module, an error code meter or a function signal generator is adopted to control the enabling time of a burst enabling signal so as to control the light emission period and the light emission duty ratio; the code pattern of the input signal is controlled by a code error meter. To verify whether the out-of-lock condition of the optical module occurs in the burst mode.
Optionally, when the reflected light appears on the light path, when the adjustable attenuation is added in the reflected light, the working data of the double closed loops of the optical module under the reflected light with different sizes are determined.
And S14, an evaluation step, namely judging a double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
According to the calculation results of S11-S13, the working efficiency of the double closed loops of the optical module can be clearly and comprehensively obtained, and the real quality of the optical module can be evaluated.
Referring to fig. 4b, further comprising:
s46, when the test condition of repeated power-on is carried out, the working waveform of the optical module is obtained;
and S47, judging whether the double closed loops of the optical module are started normally or not according to the working waveform.
It is preferably realized by the following steps:
the TX output light is connected to a real-time oscilloscope to test the waveform change of an optical signal, specifically, the waveform of the first light emission of the optical measurement module or the optical network unit ONU is required, when the dual closed loop is started, the time from the optical power or the extinction to the target optical power is longer, for example, the bias current is enabled to start the function quickly due to the long stable time of the bias current; for longer settling times of extinction ratios, such as due to longer settling times of the modulation current, the problem is solved by indexing the modulation current temperature look-up table into a set of normal index values. After actual steady operation, the modulation current is controlled by the double closed loop.
For the optical module test, the test system shown in fig. 1a is powered down and powered up repeatedly, the waveform of the output optical signal in the real-time oscilloscope is checked, whether the waveform is abnormal or not is checked, and the magnitudes of the bias current and the modulation current are checked through a computer. If the ONU is applied, the ONU is connected to the OLT, the ONU only registers unallocated bandwidth, and is powered down and powered up repeatedly, and whether the double closed loop startup is normal is judged by inquiring whether the ONU can register to be on line or not. Repeating the power-on and power-off tests, reading the state of the optical module through a corresponding program, and controlling the power-on and power-off to acquire the relevant data of the stability of the optical module.
To sum up:
according to the optical module double closed loop verification data processing method, stability calculation is carried out through temperature data processing steps; a double closed loop debugging data processing step of performing bidirectional verification calculation aiming at the extinction ratio and the optical power; an unlocking data processing step, namely acquiring unlocking data of the optical module; and an evaluation step, namely judging a double closed loop verification result of the optical module. The method can comprehensively cover the working condition of the double closed loops, verify the performance of the double closed loops and check whether the double closed loops lose lock, thereby achieving the technical effect of reliable double closed loop verification.
Fig. 5 illustrates a computing device 50 matching the method of fig. 1-4b, comprising:
it should be noted that the computing device 50 shown in fig. 5 is only an example, and should not be construed as limiting the functionality and scope of use of the embodiments herein.
As shown in fig. 5, the server is in the form of a general purpose computing device 50. Components of computing device 50 may include, but are not limited to: the at least one processor 51, the at least one memory 52, a bus 53 connecting the different system components, including the memory 52 and the processor 51.
Bus 53 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a processor, and a local bus using any of a variety of bus architectures.
Memory 52 may include readable media in the form of volatile memory, such as Random Access Memory (RAM) 521 and/or cache memory 522, and may further include Read Only Memory (ROM) 523.
Memory 52 may also include a program/utility 525 having a set (at least one) of program modules 524, such program modules 524 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment.
Computing device 50 may also communicate with one or more external devices 54 (e.g., keyboard, pointing device, etc.), one or more devices that enable a user to interact with computing device 50, and/or any devices (e.g., routers, modems, etc.) that enable computing device 50 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 55. Moreover, computing device 50 may also communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN) and/or a public network, such as the Internet, via network adapter 56. As shown, network adapter 56 communicates with other modules for computing device 50 over bus 53. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in connection with computing device 50, including, but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
In some possible implementations, a computing device according to the present application may include at least one processor, and at least one memory (e.g., a first server). The memory stores therein program code that, when executed by the processor, causes the processor to perform the steps in the system authority opening method according to various exemplary embodiments of the present application described above in this specification.
Referring to fig. 6, the stereo sorting method of the illustrated and corresponding embodiments of fig. 1-4b may also be implemented by a computer readable medium 61, referring to fig. 6, storing computer executable instructions, i.e. program instructions to be executed by the method of the present invention, for performing the verification data processing method described in the above embodiments.
The readable signal medium may include a data signal propagated in baseband or as part of a carrier wave with readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, control device, or apparatus, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: an electrical connection having one or more wires, a portable disk, a hard disk, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for system rights opening of embodiments of the present application may employ a portable compact disc read only memory (CD-ROM) and include program code and may run on a computing device. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, control device, or apparatus.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims and the equivalents thereof, the present application is intended to cover such modifications and variations.

Claims (10)

1. The optical module double closed loop verification data processing method is characterized by comprising the following steps of:
a temperature data processing step of respectively acquiring data of optical power and extinction ratio under temperature change and performing stability calculation to obtain a first calculation result;
a double closed loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power in a preset adjustable range and adjusting stepping data to obtain a second calculation result;
an out-of-lock data processing step, namely acquiring out-of-lock data of the optical module under various code patterns and various duty ratios;
and an evaluation step, namely judging a double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
2. The method for processing dual closed loop verification data of an optical module according to claim 1, wherein the dual closed loop debugging data processing step is specifically implemented as:
performing an adjustable range test of extinction ratio under double closed loops to verify the adjustable range of extinction ratio under target optical power;
the optical power is adjusted to a lower limit and an upper limit to verify the adjustable range of extinction ratio.
3. The method for processing optical module dual closed-loop verification data according to claim 1, wherein in the step of processing the out-of-lock data, a code pattern instruction is obtained by a code error meter to verify whether the out-of-lock condition of the optical module occurs.
4. The method for processing the double closed loop verification data of the optical module according to claim 1 or 3, wherein in the step of processing the lock-out data, an error code meter or a function signal generator is adopted to control the enabling time of the burst enabling signal so as to control the light-emitting period and the light-emitting duty ratio, so as to verify whether the lock-out condition of the optical module occurs.
5. The optical module dual closed loop verification data processing method according to claim 1, further comprising: when the light path is reflected, when the adjustable attenuation is added in the reflected light, the working data of the double closed loops of the optical modules under the reflected light with different sizes are determined.
6. The method for processing the dual closed loop verification data of the optical module according to claim 2, wherein the testing of the adjustable range of the extinction ratio under the dual closed loop is performed to verify that the adjustable range of the extinction ratio under the target optical power is specifically implemented as:
when the optical module is in a double-closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the double-closed-loop extinction ratio gear comprises the following steps:
coarse adjustment maximum gear and fine adjustment maximum gear correspond to maximum extinction ratio;
the minimum extinction ratio of the coarse adjustment minimum gear corresponds to the minimum extinction ratio of the fine adjustment minimum gear, and the adjustable range of the extinction ratio is recorded.
7. The method for processing optical module dual closed loop verification data according to claim 2, wherein the adjusting the optical power to the lower limit and the upper limit to verify the adjustable range of the extinction ratio is specifically implemented as:
adjusting the light power to reach the lower limit of the gaze power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach the upper limit of the eye light power, adjusting the gear of the double closed loop extinction ratio, and recording the adjustable range of the extinction ratio;
the optical power is regulated to reach a target value, coarse adjustment gears of the extinction ratio are regulated, each change of 1 gear is taken as a step, and the extinction ratio and the optical power corresponding to different coarse adjustment gears are tested;
adjusting the optical power to reach a target value, adjusting the coarse extinction ratio gear to a set position of the target extinction ratio, adjusting the fine extinction ratio gear, taking each 1 gear as a step, and testing the corresponding extinction ratio and optical power under different fine extinction ratios;
adjusting the optical power to reach a target value, adjusting the extinction gear to the target value, keeping the extinction ratio gear fixed, taking each change of 0.5dbm as a step, and testing the corresponding extinction ratio under different optical powers;
the method comprises the steps of determining coarse adjustment steps and fine adjustment steps of extinction ratio, determining the influence of dimming power on the extinction ratio during double closed loop debugging, and adjusting the influence of the extinction ratio on the optical power.
8. The optical module dual closed loop verification data processing method according to claim 1, further comprising:
when the test condition of repeated power-on is carried out, the working waveform of the optical module is obtained;
judging whether the double closed loops of the optical module are started normally or not through the working waveform.
9. A computing device, characterized by at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-8.
10. A readable medium having stored thereon computer executable instructions for performing the optical module dual closed loop authentication data processing method according to any of the preceding claims 1-8.
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