CN115413107A

CN115413107A - Circuit board and electronic equipment

Info

Publication number: CN115413107A
Application number: CN202110585936.5A
Authority: CN
Inventors: 彭晶晶; 付俊; 张西锋
Original assignee: Jingchen Semiconductor Technology Beijing Co ltd
Current assignee: Jingchen Semiconductor Technology Beijing Co ltd
Priority date: 2021-05-27
Filing date: 2021-05-27
Publication date: 2022-11-29

Abstract

The invention provides a circuit board and electronic equipment, the circuit board includes: a dielectric layer, the dielectric layer including a first side; the first wiring layer is positioned on the first surface of the dielectric layer and comprises a wiring area and an interface area; the differential wiring structure is positioned in the wiring area, the interface area and the connection area, the interface area is positioned between the wiring area and the connection area, the connection area is used for connection, and the line width of the differential wiring structure in the interface area is larger than that of the differential wiring structure in the wiring area. According to the invention, the line width of the differential wiring structure in the interface area is larger than that of the differential wiring structure in the wiring area, so that the line widths of the differential wiring structure in the wiring area and the interface area are differentiated, the impedance of the differential wiring structure in the interface area can be reduced, the impedance mutation of the differential wiring structure in the interface area is not easy to occur, the continuity of differential impedance is favorably maintained, when the connection area is connected with an external port, transmitted signals are more complete, and the certification of a circuit board passing a consistency test solution is favorably improved.

Description

Circuit board and electronic equipment

Technical Field

The embodiment of the invention relates to the technical field of circuits, in particular to a circuit board and electronic equipment.

Background

Impedance control is required in the design of a high-speed PCB (Printed Circuit Board), which generally includes a dielectric layer, TOP-layer (TOP) high-speed traces on the TOP of the dielectric layer, and Bottom-layer (Bottom) high-speed traces on the Bottom of the dielectric layer, because the thickness of the dielectric layer is large, the TOP-layer high-speed traces cannot control impedance with reference to the Bottom-layer high-speed traces, and impedance control is currently performed by using a coplanar line reference mode, that is, with reference to a Ground (GND) on the same layer.

Differential lines are applied in the design of a high-speed PCB, the differential lines adopt a differential transmission technology, the method is different from the traditional method that one signal line corresponds to one ground wire, signals are transmitted on the two signal lines, the amplitudes of the two signals are equal, the phase difference is 180 degrees, and the polarities are opposite. The grounding wires are arranged among different differential wires, so that signals in the differential wires are not easily interfered by other signals. The interval between the signal line close to the package ground line in the differential line and the package ground line is used as the package ground interval, and the interval between two signal lines in the differential line is used as the differential interval.

In the interface area of the PCB, because the packet-ground distance is large and the differential distance is large, impedance discontinuity is easily caused, which causes a signal integrity problem, and further easily causes that the high-speed PCB cannot pass the certification of the Compliance Test Solution (CTS).

Disclosure of Invention

The problem solved by the embodiment of the invention is to provide a circuit board and an electronic device, which are used for solving the problem of signal integrity caused by impedance discontinuity of an interface area.

To solve the above problem, an embodiment of the present invention provides a circuit board, including: a dielectric layer comprising a first side; the first wiring layer is positioned on the first surface of the dielectric layer and comprises a wiring area, an interface area and a connection area, wherein the interface area is positioned between the wiring area and the connection area, and the connection area is used for connection; and the differential routing structure is positioned in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than that of the differential routing structure in the routing area.

Optionally, the first routing layer further includes: the plug-in area is positioned between the wiring area and the interface area and is adjacent to the wiring area and the interface area, and the differential wiring structure is also positioned in the plug-in area; the circuit board further includes: and the pins are positioned in the connecting area and are connected with the differential wiring structure.

Optionally, a product of the length of the differential routing structure in the interface area and the routing characteristic impedance of the differential routing structure in the interface area is equal to a sum of a product of the length of the differential routing structure in the plug-in area and the routing characteristic impedance of the differential routing structure in the plug-in area, and a product of the length of the pin in the connection area and the routing characteristic impedance of the pin in the connection area.

Optionally, the line width of the differential routing structure in the plug-in area is greater than the line width of the differential routing structure in the routing area.

Optionally, the line width of the pin is equal to the line width of the differential routing structure in the interface area.

Optionally, the differential routing structure includes a first differential line and a second differential line that are spaced apart from each other; the first routing layer further comprises: and the grounding wire is positioned between the first differential wire and the second differential wire, and the line width of the grounding wire in the interface area is greater than that of the grounding wire in the plug-in area.

Optionally, the differential routing structure includes first differential lines and second differential lines spaced apart, the first differential lines include first signal lines and second signal lines spaced apart, the second differential lines include third signal lines and fourth signal lines spaced apart, and the first signal lines, the second signal lines, the third signal lines and the fourth signal lines are arranged in sequence in one direction.

Optionally, a line width of the first signal line in the interface area is greater than a line width of the first signal line in the routing area; the line width of the second signal line in the interface area is greater than that of the second signal line in the wiring area; the line width of the third signal line in the interface area is greater than the line width of the third signal line in the wiring area; the line width of the fourth signal line in the interface area is greater than the line width of the fourth signal line in the routing area.

Optionally, a distance between the first signal line and the second signal line in the interface area is smaller than a distance between the first signal line and the second signal line in the routing area; the interval between the third signal line and the fourth signal line in the interface area is smaller than the interval between the third signal line and the fourth signal line in the wiring area.

Optionally, the first routing layer further includes: the grounding wire is positioned between the second signal wire and the third signal wire; the interval between the grounding wire wrapping area of the interface area and the second signal wire is smaller than the interval between the grounding wire wrapping area of the wiring area and the second signal wire; the interval between the grounding wire and the third signal wire in the interface area is smaller than the interval between the grounding wire and the third signal wire in the wiring area.

Optionally, the circuit board further includes: and the grounding ends are positioned in the grounding wire and penetrate through the dielectric layer.

Optionally, the dielectric layer further includes: a second side on a side of the dielectric layer facing away from the first side; the circuit board further includes: a second wiring layer on the second surface; and the signal routing is positioned in the second wiring layer.

Optionally, the circuit board further includes: and the solder resist covers the first wiring layer and the differential wiring structure, and the second wiring layer and the signal wiring.

Correspondingly, the embodiment of the invention also provides electronic equipment which comprises the circuit board.

Optionally, the electronic device includes a set-top box, a television, a projector, or a mobile phone.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:

the embodiment of the invention provides a circuit board, which comprises a first wiring layer, a second wiring layer and a third wiring layer, wherein the first wiring layer is positioned on a first surface of a dielectric layer and comprises a wiring area, an interface area and a connection area, the interface area is positioned between the wiring area and the connection area, and the connection area is used for connection; and the differential routing structure is positioned in the routing area and the interface area, and the line width of the differential routing structure in the interface area is greater than that of the differential routing structure in the routing area. The connecting area is used for connection, specifically is connected with an external port, the interface area is located between the wiring area and the connecting area, the line width of the differential wiring structure of the interface area is larger than that of the differential wiring structure of the wiring area, the line widths of the differential wiring structures of the wiring area and the interface area are differentiated, the impedance of the differential wiring structure of the interface area can be reduced, the differential wiring structure of the interface area is not prone to impedance mutation, the continuity of differential impedance is kept, the integrity of signals is improved, when the connecting area is connected with the external port, transmitted signals are more complete, and the circuit board can pass through the certification of a consistency test solution.

In an alternative scheme, the differential routing structure includes a first differential line and a second differential line that are spaced apart from each other, the first differential line includes a first signal line and a second signal line that are spaced apart from each other, the second differential line includes a third signal line and a fourth signal line that are spaced apart from each other, and the first signal line, the second signal line, the third signal line, and the fourth signal line are sequentially arranged in one direction. Compared with the wiring area, in the interface area, because the line widths of the first signal line, the second signal line, the third signal line and the fourth signal line are wider, the interval between the grounding wire and the second signal line in the interface area is favorably smaller than the interval between the grounding wire and the second signal line in the wiring area; the interval between the grounding wire and the third signal wire in the interface area is smaller than the interval between the grounding wire and the third signal wire in the wiring area. Meanwhile, the interval between the first signal line and the second signal line of the interface area is smaller than the interval between the first signal line and the second signal line of the wiring area; the interval between the third signal line and the fourth signal line in the interface area is smaller than the interval between the third signal line and the fourth signal line in the wiring area, so that the impedance mutation of the first signal line, the second signal line, the third signal line and the fourth signal line in the interface area is favorably reduced, the differential impedance in the four signal lines is kept continuous, and the signal integrity is improved.

Drawings

FIG. 1 is a schematic cross-sectional view of a circuit board;

FIG. 2 is a schematic view of the circuit board of FIG. 1 in the A direction;

FIG. 3 is a schematic cross-sectional view of a circuit board according to an embodiment of the present invention;

fig. 4 is a schematic structural view of the circuit board in the direction B in fig. 3.

Detailed Description

As known from the background art, when the impedance control is performed on the conventional circuit board by using the same-layer reference, the impedance is easily discontinuous in the interface region of the PCB due to the large packet-ground distance and the large differential distance, which causes the signal integrity problem, and further causes the high-speed PCB not to pass the certification of the Compliance Test Solution (CTS). The existing analysis interface area of the circuit board is combined with the reason that impedance discontinuity is easy to occur and signal integrity is poor.

Fig. 1 is a schematic sectional structure view of a circuit board, and fig. 2 is a schematic structural view of the circuit board in the direction a in fig. 1.

A circuit board, comprising: a dielectric layer 1, wherein the dielectric layer 1 comprises a first surface and a second surface which are opposite; a first wiring layer 2 on a first surface of the dielectric layer 1; and a second wiring layer 3 on the second surface.

The first wiring layer 2 includes: the wiring area I, the plug-in area II, the interface area III and the connection area IV are sequentially arranged in the first direction x; the differential routing structure 7 is located in the routing area I, the plug-in area II, the Interface area III and the connection area IV, and the line widths of the differential routing structure 7 in the routing area I, the plug-in area II, the Interface area III and the connection area IV are the same, wherein the differential routing structure 7 in the plug-in area II is used for connecting an electrostatic discharge device (ESD), the connection area IV has a pin 8 (pin) of a High Definition Multimedia Interface (HDMI), and the differential routing structure 7 in the Interface area III is used for connecting the differential routing structure 7 in the plug-in area II with the pin 8 in the connection area IV.

The differential routing structure 7 includes a first differential line 4 and a second differential line 5 which are spaced apart from each other, the first differential line 4 includes a first signal line 41 and a second signal line 42 which are spaced apart from each other, the second differential line 5 includes a third signal line 51 and a fourth signal line 52 which are spaced apart from each other, the first signal line 41, the second signal line 42, the third signal line 51 and the fourth signal line 52 are sequentially arranged in a second direction y, and the second direction y is perpendicular to the first direction x.

The first wiring layer 2 further includes: and the ground wire 6 is located between the second signal wire 42 and the third signal wire 51, the interval between the second signal wire 42 and the ground wire 6 and the interval between the third signal wire 51 and the ground wire 6 are both ground wire wrapping distances d1, and the interval between the first signal wire 41 and the second signal wire 42 and the interval between the third signal wire 51 and the fourth signal wire 52 are both differential distances d2.

In the circuit board, the differential pitch d2 of the interface region III and the packet-to-ground pitch d1 are both optimal parameters subjected to Polar SI9000 software verification and actual production verification, so that the impedance in the differential wiring structure 7 in the circuit board is stabilized at 100 Ω. However, in the working process of the circuit board, the packet-ground distance d1 and the differential distance d2 in the interface area I are large, which easily causes impedance discontinuity, causes a signal integrity problem, and further easily causes that the high-speed PCB cannot pass the certification of a Consistency Test Solution (CTS).

In order to solve the technical problem, an embodiment of the present invention provides a circuit board, including: a dielectric layer comprising a first side; the first wiring layer is positioned on the first surface of the dielectric layer and comprises a wiring area, an interface area and a connection area, wherein the interface area is positioned between the wiring area and the connection area, and the connection area is used for connection; and the differential wiring structure is positioned in the wiring area and the interface area, and the line width of the differential wiring structure in the interface area is greater than that of the differential wiring structure in the wiring area.

The embodiment of the invention provides a circuit board, wherein the connection area is used for connection, specifically is connected with an external port, the interface area is positioned between the wiring area and the connection area, the line widths of the differential wiring structures in the wiring area and the interface area are differentiated by enabling the line width of the differential wiring structure in the interface area to be larger than the line width of the differential wiring structure in the wiring area, the impedance of the differential wiring structure in the interface area can be reduced, the differential wiring structure in the interface area is not prone to impedance mutation, the continuity of differential impedance is kept, the integrity of signals is improved, when the connection area is connected with the external port, transmitted signals are more complete, and the authentication of the circuit board passing a consistency test solution is improved.

Referring to fig. 3 and 4, the structure of an embodiment of the circuit board of the present invention is schematically illustrated, fig. 3 is a cross-sectional structure of an embodiment of the circuit board of the present invention, and fig. 4 is a structural diagram of the circuit board in the direction B in fig. 3.

The circuit board includes: a dielectric layer 10, the dielectric layer 10 comprising a first side; a first wiring layer 11 located on a first surface of the dielectric layer 10, where the first wiring layer 11 includes a routing area II, an interface area I and a connection area IV, the interface area I is located between the routing area II and the connection area IV, and the connection area IV is used for connection; the differential routing structure 100 is located in the routing area II and the interface area I, and the line width of the differential routing structure 100 in the interface area I is greater than the line width of the differential routing structure 100 in the routing area II.

The connection area IV is used for connection, specifically is connected with an external port, when a circuit board is connected with the external port through the connection area IV, the interface area I is located between the wiring area II and the connection area IV, the line width of the differential wiring structure 100 of the interface area I is larger than the line width of the differential wiring structure 100 of the wiring area II, so that the line widths of the differential wiring structure 100 of the wiring area II and the interface area I are differentiated, the impedance of the differential wiring structure 100 of the interface area I can be reduced, the differential wiring structure 100 of the interface area I is not prone to impedance mutation, the continuity of differential impedance can be maintained, and the integrity of signals can be improved.

The dielectric layer 10 is used to provide a wiring base for the first wiring layer 11.

In this embodiment, the dielectric layer 10 includes a core board (not shown) and prepregs (not shown) on upper and lower surfaces of the core board.

The core plate is a hard plate with a specific thickness and two copper-clad surfaces.

The prepreg is a prepreg material, which is a sheet material impregnated with a resin and cured to an intermediate degree. Prepregs may be used as bonding materials and interlayer dielectrics for inner conductive patterns in circuit boards.

The connection area IV in the first wiring layer 11 is used for electrical connection with other ports to transmit signals.

In this embodiment, the circuit board further includes: a plurality of spaced pins (Pin) 105 are located in the connection region IV, the pins 105 are used for connecting with an external port, and the pins 105 are connected with the differential routing structure 100.

In this embodiment, the types of the connection area IV include a High Definition Multimedia Interface (HDMI), a Video Graphics Array Interface (VGA), a Digital Visual Interface (DVI), a High Definition Digital Display Interface (DP), and the like.

In this embodiment, the connection area IV includes an HDMI interface, and correspondingly, the interface area I is an HDMI interface area, and the routing area II is specifically an HDMI differential characteristic routing area.

The first wiring layer 11 further includes: and the plug-in area III is positioned between the wiring area II and the interface area I and is adjacent to the wiring area II and the interface area I, and the differential wiring structure 100 is also positioned in the plug-in area III.

In this embodiment, the differential routing structure 100 in the plug-in area III is used to electrically connect an electrostatic-Static discharge (ESD), and when the circuit board is connected to an external port through the connection area IV, the ESD is used to absorb and dissipate Static electricity, so as to avoid affecting the circuit board. In other embodiments, the differential routing structure in the plug-in area III may also be used to electrically connect a voltage dependent resistor (EMD), which is used for voltage protection.

In other embodiments, when no static electricity discharge device is needed near the connection region to absorb and dissipate static electricity, the circuit board may further not have a plug-in region, and accordingly, the routing region is adjacent to the interface region.

In this embodiment, the differential routing structure 100 includes a first differential line 101 and a second differential line 102 that are spaced apart from each other.

The first wiring layer 11 further includes: and a ground line 103 between the first differential line 101 and the second differential line 102.

In this embodiment, the differential routing structure 100 in the package area III has a differential pad 106, that is, the first differential line 101 and the second differential line 102 both have a differential pad 106 thereon, and the package ground line 103 in the package area III has a package ground pad 107 therein.

The package region III is connected to an electrostatic discharge device (ESD) via a differential pad 106 and a ground pad 107.

Specifically, in the extending direction of the differential routing structure 100, the number of the differential pads 106 in each differential line is two, and the differential pads are spaced apart from each other; in the extending direction of the grounding wire 103, the number of grounding pads in the grounding wire 103 is two and spaced.

The interface area I is used for connecting the plug-in area III and the connection area IV, and when the connection area IV is connected with an external port, static electricity in the connection area IV can be transmitted to the static electricity discharge device in the plug-in area III to absorb and dissipate the static electricity.

In this embodiment, the wiring area II, the plug-in area III, the interface area I, and the connection area IV are sequentially distributed in the first direction x, and correspondingly, the differential wiring structure 100 extends along the first direction x.

It should be noted that, in the first direction x, the differential routing structure 100 penetrates through the routing area II, the plug-in area II and the interface area I to be connected to the pins 105 in the connection area IV.

In this embodiment, a sum of a product of the length of the differential routing structure 100 in the interface area I and the routing characteristic impedance of the differential routing structure 100 in the interface area I, which is equal to a sum of a product of the length of the differential routing structure 100 in the plug-in area III and the routing characteristic impedance of the differential routing structure 100 in the plug-in area III and a product of the length of the pin 105 in the connection area IV and the routing characteristic impedance of the pin 105 in the connection area IV, is as follows:

L1*R1＝L2*R2+L3*R3

wherein L1 (as shown in fig. 4) is a length of the differential routing structure 100 in the interface area I, L2 (as shown in fig. 4) is a length of the differential routing structure 100 in the plug-in area III, L3 (as shown in fig. 4) is a length of the connection area IV pin 105, R1 is a routing characteristic impedance of the differential routing structure 100 in the interface area I, R2 is a routing characteristic impedance of the differential routing structure 100 in the plug-in area III, and R3 is a routing characteristic impedance of the connection area IV pin 105.

In the solution for Consistency Test (CTS), a unit-step signal (unit-step signal) with a rise time of 200 picoseconds (Picosecond) is used to measure the characteristic impedance of the differential wiring structure 100, so that the actual resolution of the characteristic impedance reaches several millimeters (mm), and in the differential wiring structure 100 within this resolution, the differential wiring structure 100 with an opposite impedance change needs to compensate the effect of the impedance increase of the HDMI interface area I, so that the impedance is more continuous.

In this embodiment, the line width of the differential routing structure 100 in the plug-in area III is greater than the line width of the differential routing structure 100 in the routing area II.

Compared with the line width of the differential routing structure 100 in the routing area II, the line width of the differential routing structure 100 in the plug-in area III is wider, so that the characteristic impedance of the differential routing structure 100 in the plug-in area III can be compensated for increasing, and the impedance of the whole differential routing structure 100 is stabilized at 100 Ω.

In this embodiment, the line width of the pin 105 is equal to the line width of the differential routing structure 100 in the interface area I.

In this embodiment, the line width of the pin 105 is equal to the line width of the differential routing structure 100 in the interface area I, which is beneficial to ensuring good weldability and impedance continuity.

In this embodiment, the differential routing structure 100 includes a first differential line 101 and a second differential line 102 that are spaced apart from each other, the first differential line 101 includes a first signal line 1011 and a second signal line 1012 that are spaced apart from each other, the second differential line 102 includes a third signal line 1021 and a fourth signal line 1022 that are spaced apart from each other, and the first signal line 1011, the second signal line 1012, the third signal line 1021, and the fourth signal line 1022 are sequentially arranged in the second direction y.

The differential routing structure 100 utilizes a differential transmission technology, and two signal lines of the same differential line are well coupled and have strong anti-interference capability; and because the polarities in the two signal lines of the same differential line are opposite, the external radiation of the two signal lines can be mutually counteracted, the coupling tightness is improved, and the Electromagnetic Interference (EMI) can be effectively inhibited.

In this embodiment, the second direction y is perpendicular to the first direction x. In other embodiments, according to the distribution requirement of the differential routing structure and the ground wires in the first routing layer, the second direction y may also be not perpendicular to the first direction x.

In this embodiment, the line width of the first signal line 1011 in the interface area I is greater than the line width of the first signal line 1011 in the routing area II; the line width of the second signal line 1012 in the interface area I is greater than the line width of the second signal line 1012 in the routing area II; the line width of the third signal line 1021 in the interface area I is greater than the line width of the third signal line 1021 in the routing area II; the line width of the fourth signal line 1022 in the interface area I is greater than the line width of the fourth signal line 1022 in the routing area II.

In the second direction y, compared with the routing area II, the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021, and the fourth signal line 1022 in the interface area I are wider, which can reduce the impedance of the differential routing structure 100 in the interface area I, so that the impedance of the differential routing structure 100 in the interface area I is not likely to change suddenly, which is beneficial to maintaining continuity of differential impedance and improving integrity of signals.

As an example, in the case that the line width of the differential routing structure in the interface area is greater than the line width of the differential routing structure in the routing area, the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I are all 8mil to 12mil, and the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the routing area II are 6.4mil to 9.6mil.

It should be noted that, because the size of the interface area I in the second direction y is fixed, and because the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 are wider, it is beneficial to make the interval between the first signal line 1011 and the second signal line 1012 of the interface area I smaller than the interval between the first signal line 1011 and the second signal line 1012 of the routing area II; the distance between the third signal line 1021 and the fourth signal line 1022 in the interface area I is smaller than the distance between the third signal line 1021 and the fourth signal line 1022 in the routing area II, which is beneficial to reducing the impedance abrupt change of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 in the interface area I, so that the differential impedance in the four signal lines is kept continuous, and the signal integrity is improved.

As an example, in the interface area I, the distance between the first signal line 1011 and the second signal line 1012 is 3.6mil to 5.4mil, and the distance between the first signal line 1011 and the second signal line 1012 in the routing area II is 4.8mil to 7.2mil. In the interface area I, the distance between the third signal line 1021 and the fourth signal line 1022 is 3.6mil to 5.4mil, and the distance between the first signal line 1011 and the second signal line 1012 in the routing area II is 4.8mil to 7.2mil.

In this embodiment, the ground wire 103 is located between the first differential line 101 and the second differential line 102, so that the signal in the first differential line 101 and the signal in the second differential line 102 are not easily interfered by the ground wire 103.

It should be noted that the line width of the ground covering line 103 in the interface area I is greater than the line width of the ground covering line 103 in the plug-in area III.

The line width of the grounding wire 103 in the interface area I is larger, which is beneficial to further reducing the interval between the grounding wire 103 and the second signal wire 1012 and reducing the interval between the grounding wire 103 and the third signal wire 1021, so that the impedance abrupt change of the first signal wire 1011, the second signal wire 1012, the third signal wire 1021 and the fourth signal wire 1022 in the interface area I is reduced, the differential impedance in the four signal wires is kept continuous, and the integrity of the signal is improved.

It should be noted that, because the size of the interface area I in the second direction y is fixed, and because the line widths of the first signal line 1011, the second signal line 1012, the third signal line 1021 and the fourth signal line 1022 are wider, it is beneficial to make the interval between the ground wire 103 and the second signal line 1012 in the interface area I smaller than the interval between the ground wire 103 and the second signal line 1012 in the routing area II; the distance between the ground wire 103 and the third signal wire 1021 in the interface area I is smaller than the distance between the ground wire 103 and the third signal wire 1021 in the wiring area II, which is beneficial to reducing the impedance abrupt change of the first signal wire 1011, the second signal wire 1012, the third signal wire 1021 and the fourth signal wire 1022 in the interface area I, so that the differential impedance in the four signal wires is kept continuous, and the signal integrity is improved.

As an example, in the interface area I, the distance between the ground wire 103 and the second signal line 1012 is 3.6mil to 5.4mil, the distance between the ground wire 103 and the third signal line 1021 is 3.6mil to 5.4mil, in the routing area II, the distance between the ground wire 103 and the second signal line 1012 is 4.8mil to 7.2mil, and the distance between the ground wire 103 and the third signal line 1021 is 4.8mil to 7.2mil.

The circuit board includes: a plurality of spaced-apart ground terminals 104 (GND) are located in the ground covering line 103 and penetrate through the dielectric layer 10.

In this embodiment, the ground terminal 104 is a copper-clad ground.

The dielectric layer 10 further includes: a second side on a side of the dielectric layer 10 facing away from the first side; the circuit board further includes: a second wiring layer 12 on the second surface; signal traces (not shown) are located in the second wiring layer 12.

The signal traces in the second wiring layer 12 are signal lines for transmitting signals, and the signal traces are stacked on the second wiring layer 12 through via holes (not shown in the figure) in the circuit board.

The circuit board further includes: and the solder resist is covered on the first wiring layer 11 and the differential routing structure 100, and on the second wiring layer 12 and the signal routing.

In the present embodiment, the material of the solder resist includes green oil.

Correspondingly, the embodiment of the invention also provides electronic equipment, and the electronic equipment comprises the circuit board.

The electronic equipment comprises the circuit board, because the line width of the differential wiring structure 100 of the interface area I in the circuit board is larger than the line width of the differential wiring structure 100 of the wiring area II, the line widths of the differential wiring structure 100 of the wiring area II and the interface area I are differentiated, the impedance of the differential wiring structure 100 of the interface area I can be reduced, the impedance mutation of the differential wiring structure 100 of the interface area I is not easy to occur, the continuity of differential impedance is kept, the integrity of signals is improved, when the connection area IV is connected with an external port, transmitted signals are more complete, the certification of the circuit board passing a consistency test solution is improved, and the performance of the corresponding electronic equipment is improved.

In this embodiment, the electronic device is a set top box, a television, a projector, or a mobile phone.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A circuit board, comprising:

a dielectric layer comprising a first face;

the first wiring layer is positioned on the first surface of the dielectric layer and comprises a wiring area, an interface area and a connection area, wherein the interface area is positioned between the wiring area and the connection area, and the connection area is used for connection;

and the differential wiring structure is positioned in the wiring area and the interface area, and the line width of the differential wiring structure in the interface area is greater than that of the differential wiring structure in the wiring area.

2. The circuit board of claim 1, wherein the first routing layer further comprises: the plug-in area is positioned between the wiring area and the interface area and is adjacent to the wiring area and the interface area, and the differential wiring structure is also positioned in the plug-in area;

the circuit board further includes: and the pins are positioned in the connecting area and are connected with the differential wiring structure.

3. The circuit board of claim 2, wherein a product of the length of the differential trace structure at the interface area and a trace characteristic impedance of the differential trace structure at the interface area is equal to a sum of a product of the length of the differential trace structure at the plug-in area and a trace characteristic impedance of the differential trace structure at the plug-in area and a product of the length of the pins at the connection area and a trace characteristic impedance of the pins at the connection area.

4. The circuit board of claim 2, wherein the line width of the differential trace structure of the interposer area is greater than the line width of the differential trace structure of the trace area.

5. The circuit board of claim 2, wherein the line width of the pins is equal to the line width of the differential routing structures of the interface area.

6. The circuit board of claim 2, wherein the differential routing structure includes first and second spaced apart differential lines;

the first routing layer further comprises: and the grounding wire is positioned between the first differential wire and the second differential wire, and the line width of the grounding wire in the interface area is greater than that of the grounding wire in the plug-in area.

7. The circuit board of claim 1, wherein the differential routing structure includes a first differential line and a second differential line that are spaced apart, the first differential line includes a first signal line and a second signal line that are spaced apart, the second differential line includes a third signal line and a fourth signal line that are spaced apart, and the first signal line, the second signal line, the third signal line, and the fourth signal line are sequentially arranged in a direction.

8. The circuit board of claim 7, wherein a line width of the first signal line of the interface region is greater than a line width of the first signal line of the routing region;

the line width of the second signal line in the interface area is greater than that of the second signal line in the wiring area;

the line width of the third signal line in the interface area is greater than the line width of the third signal line in the routing area;

the line width of the fourth signal line in the interface area is greater than the line width of the fourth signal line in the routing area.

9. The circuit board of claim 7, wherein a spacing between the first and second signal lines of the interface region is less than a spacing between the first and second signal lines of the routing region;

the interval between the third signal line and the fourth signal line of the interface area is smaller than the interval between the third signal line and the fourth signal line of the routing area.

10. The circuit board of claim 7, wherein the first routing layer further comprises: the grounding wire is positioned between the second signal wire and the third signal wire;

the interval between the grounding wire wrapping area of the interface area and the second signal wire is smaller than the interval between the grounding wire wrapping area of the wiring area and the second signal wire;

the interval between the grounding wire of the interface area and the third signal wire is smaller than the interval between the grounding wire of the wiring area and the third signal wire.

11. The circuit board of claim 6 or 10, further comprising: and the grounding ends are positioned in the grounding wire and penetrate through the dielectric layer.

12. The circuit board of claim 1, wherein the dielectric layer further comprises: a second side on a side of the dielectric layer facing away from the first side;

the circuit board further includes: a second wiring layer on the second surface; and the signal routing is positioned in the second wiring layer.

13. The circuit board of claim 12, wherein the circuit board further comprises: and the solder resist covers the first wiring layer and the differential wiring structure, and the second wiring layer and the signal wiring.

14. An electronic device characterized by comprising a circuit board according to any one of claims 1 to 13.

15. The electronic device of claim 14, wherein the electronic device comprises a set-top box, a television, a projector, or a cell phone.