CN115408104A - Image loading method and device and image generating method and device - Google Patents

Image loading method and device and image generating method and device Download PDF

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CN115408104A
CN115408104A CN202211024740.XA CN202211024740A CN115408104A CN 115408104 A CN115408104 A CN 115408104A CN 202211024740 A CN202211024740 A CN 202211024740A CN 115408104 A CN115408104 A CN 115408104A
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image
segment
loaded
address
code
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CN115408104B (en
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李燕
殷灿菊
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Kedong Guangzhou Software Technology Co Ltd
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Kedong Guangzhou Software Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G06F9/45529Embedded in an application, e.g. JavaScript in a Web browser
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45575Starting, stopping, suspending or resuming virtual machine instances
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45583Memory management, e.g. access or allocation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides a loading method and a device and a generating method and a device of an image, wherein the image consists of a code segment, a data segment and a check code, and the loading method comprises the following steps: acquiring each image segment to be loaded of the image and a check code thereof from a temporary storage memory for storing the image, wherein the image segment of one image comprises each segment of a code segment and each segment of a data segment of the image; and checking each image segment to be loaded according to the check code, and loading the image segment to be loaded which is successfully checked to the corresponding storage address of the running memory of the image. The mapping file of the invention occupies small space, the loading information and the verification information are both in the mapping file, and the loading mapping is loaded and verified in the memory, thus simplifying the management and access of the loading information and the verification information, and improving the real-time performance of verification and loading and the readability and maintainability of algorithm realization.

Description

Image loading method and device and image generating method and device
Technical Field
The present invention relates to the field of operating systems, and in particular, to a method and an apparatus for loading and generating an image.
Background
In the existing embedded operating system supporting the virtual machine, an image is directly loaded from a peripheral, and after the image is loaded, a running image is not checked, so that the real-time performance of the system cannot be guaranteed in a use scene, and potential safety hazards exist.
Meanwhile, the existing loaded mapping file is in an ELF format, has more contents, occupies more computer resources, and is not suitable for an embedded operating system with relatively less resources.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method and an apparatus for generating an image, and an embodiment of the method and the apparatus for generating an image, where an image file composed of code segments, data segments, and check codes is generated, and when an image is loaded, each image segment is obtained from a temporary storage memory of the image and is checked and loaded. The mapping file of the invention occupies small space, the loading information and the verification information are both in the mapping file, the management and the access of the loading information and the verification information are simplified, the mapping image is checked and loaded in the memory, the real-time performance of the mapping image loading and the verification is improved, and the readability and the maintainability of the algorithm implementation are improved.
In a first aspect, an embodiment of the present invention provides a method for loading an image, where the image is composed of a code segment, a data segment, and a check code, and the method includes: acquiring each mapping section to be loaded of the mapping and a check code thereof from a temporary storage memory for storing the mapping, wherein the mapping section of one mapping comprises each section of a code section and each section of a data section of the mapping; and checking each image segment to be loaded according to the check code, and loading the image segment to be loaded which is successfully checked to the corresponding storage address of the running memory of the image.
The mapping file comprises the code segment, the data segment and the check code, occupies small space, and the loading information and the check information are in the mapping file and are checked and loaded from the memory, so that the management and the access of the loading information and the check information are simplified, the mapping image is checked and loaded in the memory, the real-time performance of the mapping loading and the check is improved, and the readability and the maintainability of the algorithm implementation are improved.
In a possible implementation manner of the first aspect, the obtaining each to-be-loaded image segment of the image from a temporary storage memory storing the image specifically includes: acquiring each image segment to be loaded of the image from the temporary storage memory according to the head information of the image, wherein the head information is stored at a first idle address of the image, and the method at least comprises the following steps: the total number of the image segments and whether each image segment is loaded.
Therefore, by inserting the header information into the free address of the code segment, the structure of the code segment is not influenced, and the mapping segment can be conveniently checked and loaded in the memory according to the address offset of the header information and the check code.
In a possible implementation manner of the first aspect, the header information further includes a storage address of each image segment in the operating memory; the loading the successfully verified image segment to be loaded to the corresponding storage address of the running memory of the image specifically includes: and loading the image segment to be loaded which is successfully checked to the memory pointed by the storage address of the image segment in the running memory in the header information.
Therefore, the image segments which are successfully verified can be conveniently loaded according to the storage addresses of the image segments in the header information in the running memory.
In a possible implementation manner of the first aspect, the obtaining a check code of each to-be-loaded image segment of the image from a temporary storage memory storing the image specifically includes: and acquiring the check code of each to-be-loaded image segment of the image from a temporary storage memory for storing the image according to the address offset of the check code of the image, wherein the address offset of the check code is the address offset of the check code of the first image segment in the image, and the address offset is stored at a second idle address of the image.
Therefore, the check code address offset is stored at the free address of the code segment, and the check code is convenient to acquire quickly.
In a possible implementation manner of the first aspect, the method further includes: and executing the loaded program to obtain the storage address of the image in the temporary storage memory from the configuration data of the loaded program, and temporarily storing the image in the storage address.
Therefore, by adding the storage address of the image in the temporary storage memory in the configuration data of the loaded program, the implementation logic of image access is simplified, and the real-time performance of image loading and verification is improved.
In a possible implementation manner of the first aspect, when the image is an execution file, the header information further includes a running entry address of the image; the method further comprises the following steps: and when the images to be loaded are loaded successfully, the images are operated from the operation entry addresses of the images.
Thus, by adding the running entry address of the image to the header information, the boot of the loaded image is simplified and accelerated.
In a second aspect, an embodiment of the present invention provides a method for generating an image, including: acquiring a code segment and a data segment after the mapping source code is compiled; and calculating a check code of an image section which can be loaded into a memory by the image, and forming the image by the code section, the data section and the check code, wherein the image section comprises each section of the code section and each section of the data section.
The code segment, the data segment and the check code form the mapping file, the mapping file occupies small space, the loading information and the check information are in the mapping file, the management and the access of the loading information and the check information are simplified, and the readability and the maintainability of algorithm implementation are improved.
In a possible implementation manner of the second aspect, the method further includes: inserting header information of the image at a first free address of the image, the header information including at least one of: the number of the mapping segments of the mapping, whether each mapping segment is loaded or not and the storage address of each mapping segment in the running memory.
Therefore, by inserting the header information into the free address of the code segment, the structure of the code segment is not affected, and the mapping segment is convenient to check and load in the memory according to the header information.
In a possible implementation manner of the second aspect, the method further includes: inserting a check code address offset of the image at a second free address of the image, wherein the check code address offset is an address offset of a check code of a first image segment in the image; the calculating the check code of the image segment that can be loaded into the memory by the image specifically includes: and calculating the check code of the image section which can be loaded into the memory by the image according to the header information, and storing the check code at the corresponding address of the image, wherein the corresponding address is obtained according to the address offset of the check code and the length of the check code of each image section.
Therefore, by inserting the check code address offset into the free address of the code segment, the structure of the code segment is not affected, and the image segment is conveniently checked and loaded in the memory according to the check code address offset.
In a possible implementation manner of the second aspect, when the image is an execution file, the header information further includes a running entry address of the image.
Thus, by adding the running entry address of the image to the header information, the boot of the loaded image is simplified and accelerated.
In a possible embodiment of the second aspect, the image storage address in the scratch memory is configured in configuration data of a loader executing the image.
Therefore, by adding the storage address of the image in the temporary storage memory in the configuration data of the loaded program, the implementation logic of image access during loading and verification is simplified, and the real-time performance of image loading and verification is improved.
In a third aspect, an embodiment of the present invention provides an apparatus for loading an image, where the image is composed of a code segment, a data segment, and a check code, and the apparatus includes: the system comprises a data acquisition module and a check loading module; the data acquisition module is used for acquiring each mapping section to be loaded of the mapping and a check code thereof from a temporary storage memory for storing the mapping, wherein the mapping section of one mapping comprises each section of a code section of the mapping and each section of a data section; and the check loading module is used for checking each image segment to be loaded according to the check code and loading the image segment to be loaded which is successfully checked to the corresponding storage address of the running memory of the image.
The mapping file comprises the code segment, the data segment and the check code, occupies small space, the loading information and the check information are in the mapping file, and the check and loading are carried out in the memory, so that the management and the access of the loading information and the check information are simplified, the checking and the loading of the mapping image are realized in the memory, the real-time performance of the loading and the checking of the mapping image is improved, and the readability and the maintainability of the realization of the algorithm are improved.
In a possible implementation manner of the third aspect, when the data obtaining module obtains each to-be-loaded image segment of the image from a temporary storage memory for storing the image, the data obtaining module is specifically configured to include: acquiring each image segment to be loaded of the image from the temporary storage memory according to the head information of the image, wherein the head information is stored at a first idle address of the image, and the method at least comprises the following steps: the total number of the image segments and whether each image segment is loaded.
Therefore, by inserting the header information into the free address of the code segment, the structure of the code segment is not influenced, and the mapping segment can be conveniently checked and loaded in the memory according to the address offset of the header information and the check code.
In a possible implementation manner of the third aspect, the header information further includes a storage address of each image segment in the operating memory; when the verification loading module loads the successfully verified image segment to be loaded to the corresponding storage address of the running memory of the image, the verification loading module is specifically configured to include: and loading the image segment to be loaded which is successfully checked to the memory pointed by the storage address of the image segment in the running memory in the header information.
Therefore, the image segments which are successfully checked can be conveniently loaded according to the storage addresses of the image segments in the header information in the operating memory.
In a possible implementation manner of the third aspect, when the data obtaining module obtains the check code of each to-be-loaded image segment of the image from the temporary storage memory for storing the image, the data obtaining module is specifically configured to include: and acquiring the check code of each to-be-loaded image segment of the image from a temporary storage memory for storing the image according to the address offset of the check code of the image, wherein the address offset of the check code is the address offset of the check code of the first image segment in the image, and the address offset is stored at a second idle address of the image.
Therefore, the check code address offset is stored at the free address of the code segment, and the check code is convenient to acquire quickly.
In a possible implementation manner of the third aspect, the method further includes: and the image temporary storage module is used for executing the loaded program to acquire the storage address of the image in the temporary storage memory from the configuration data of the loaded program and temporarily store the image in the storage address.
Therefore, by adding the storage address of the image in the temporary storage memory in the configuration data of the program executing the loading, the implementation logic of image access is simplified, and the real-time performance of image loading and verification is improved.
In a possible implementation manner of the third aspect, when the image is an execution file, the header information further includes a running entry address of the image; the device further comprises: and the image running module is used for running the images from the running entry addresses of the images after the images to be loaded are loaded successfully.
Thus, by adding the running entry address of the image to the header information, the boot of the loaded image is simplified and accelerated.
In a fourth aspect, an embodiment of the present invention provides an apparatus for generating an image, including: an original image acquisition module and a check code generation module; the original image obtaining module is used for obtaining a code segment and a data segment after the image source code is compiled; the check code generation module is used for calculating the check codes of the image sections of the image which can be loaded to the memory, and the image is formed by the code sections, the data sections and the check codes, wherein the check codes of the image sections are set in length.
The code segment, the data segment and the check code form the mapping file, the mapping file occupies small space, the loading information and the check information are in the mapping file, the management and the access of the loading information and the check information are simplified, and the readability and the maintainability of algorithm implementation are improved.
In a possible implementation manner of the fourth aspect, the check code generation module is further configured to insert header information of the image at the first free address of the image, where the header information includes at least one of: the number of the mapping segments of the mapping, whether each mapping segment is loaded or not and the storage address of each mapping segment in the running memory.
Therefore, by inserting the header information into the free address of the code segment, the structure of the code segment is not affected, and the mapping segment is convenient to check and load in the memory according to the header information.
In a possible implementation manner of the fourth aspect, the check code generating module is further configured to insert a check code address offset of the image at a second free address of the image, where the check code address offset is an address offset of a check code of a first image segment in the image; the calculating the check code of the image segment that can be loaded into the memory by the image specifically includes: and calculating the check code of the mapping section which can be loaded into the memory by the mapping according to the header information, and storing the check code at the corresponding address of the mapping, wherein the corresponding address is obtained according to the address offset of the check code and the length of the check code of each mapping section.
Therefore, by inserting the check code address offset into the idle address of the code segment, the structure of the code segment is not influenced, and the image segment is conveniently checked and loaded in the memory according to the check code address offset.
In a possible implementation manner of the fourth aspect, the check code generating module is further configured to, when the image is an execution file, further include a running entry address of the image in the header information.
Thus, by adding the running entry address of the image to the header information, the boot of the loaded image is simplified and accelerated.
In a possible implementation manner of the fourth aspect, the temporary storage configuration module is configured to configure a storage address of the image in a temporary storage memory in configuration data of a loader executing the image.
Therefore, by adding the storage address of the image in the temporary storage memory in the configuration data of the loaded program, the implementation logic of image access during loading and verification is simplified, and the real-time performance of image loading and verification is improved.
In a fifth aspect, an embodiment of the present invention provides an operating system, which executes the method according to any embodiment of the first aspect and/or the method according to any embodiment of the second aspect.
In a sixth aspect, embodiments of the present invention provide a computing device, comprising,
a bus;
a communication interface connected to the bus;
at least one processor coupled to the bus; and
at least one memory coupled to the bus and storing program instructions that, when executed by the at least one processor, cause the at least one processor to perform any of the embodiments of the first or second aspects of the present invention.
In a seventh aspect, an embodiment of the present invention provides a computer-readable storage medium, on which program instructions are stored, and when the program instructions are executed by a computer, the computer is caused to execute the implementation manner of any one of the first aspect or the second aspect.
Drawings
Fig. 1A is a schematic flowchart of a first embodiment of a method for generating an image according to the present invention;
fig. 1B is a schematic view illustrating a code segment information insertion flow of a first image according to a first embodiment of a method for generating an image according to the present invention;
FIG. 2 is a block diagram illustrating the structure of code segments of an image file according to an embodiment of the present invention;
FIG. 3A is a flowchart illustrating a first embodiment of a method for loading an image according to the present invention;
FIG. 3B is a detailed flowchart illustrating steps of a method for loading an image according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a virtual machine to which a second embodiment of an image generation method and a second embodiment of an image loading method of the present invention are applied;
FIG. 5 is a flowchart illustrating a second embodiment of a method for generating an image according to the present invention;
fig. 6 is a schematic flowchart illustrating a process of loading a microkernel image and a virtual machine image by a target machine proxy image according to a second embodiment of an image loading method of the present invention;
fig. 7 is a schematic flowchart of checksum loading of each image segment according to a second embodiment of the image loading method of the present invention;
FIG. 8A is a schematic structural diagram of an embodiment of an image generating apparatus according to the present invention;
FIG. 8B is a diagram illustrating an embodiment of an image loading apparatus according to the present invention;
fig. 9 is a schematic structural diagram of a computing device according to embodiments of the present invention.
Detailed Description
In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.
In the following description, references to the terms "first \ second \ third, etc." or module a, module B, module C, etc. are used solely to distinguish between similar objects or different embodiments and are not intended to imply a particular ordering with respect to the objects, it being understood that where permissible any particular ordering or sequence may be interchanged to enable embodiments of the invention described herein to be practiced otherwise than as shown or described herein.
In the following description, reference numbers indicating steps, such as S110, S120 … …, etc., do not necessarily indicate that the steps are executed in this order, and the order of the preceding and following steps may be interchanged or executed simultaneously, if permitted.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.
The embodiment of the invention provides a method and a device for generating an image, a method and a device for loading the image. The mapping file of the invention occupies small space, and the loading information and the verification information are both in the mapping file, thereby simplifying the management and access of the loading information and the verification information and improving the readability and maintainability of algorithm realization.
An embodiment of a method for generating an image and an embodiment of a method for loading an image are described below with reference to fig. 1A to 3B.
An embodiment of a method for generating an image includes: the method comprises the steps of obtaining a code segment and a data segment of a mapping after source code compiling, calculating a check code of the mapping segment which can be loaded into a memory by the mapping, and forming a mapping file by the code segment, the data segment and the check code.
Fig. 1A shows a detailed flow of a first embodiment of a method for generating an image, which includes steps S110 to S120.
For convenience of description, the generated image is an example of a first image, and a file corresponding to the first image may be an image file that needs to be loaded.
S110: and acquiring a code segment and a data segment after the first image source code is compiled.
The compiled code segment and the compiled data segment are obtained from a compiled file of the first image source code, the file is in an ELF format and is not subjected to any post-processing. The file in ELF format includes not only code segments and data segments but also segment information and symbolic representation information.
S120: and calculating a check code of the image section of the memory, which can be loaded by the first image, and forming a file of the first image by the code section, the data section and the check code.
The image section of the first image comprises sections of the code section and sections of the data section of the first image.
The method for generating the check code of the image is not limited, and includes a parity check method and a cyclic redundancy check method. In some embodiments, one verification method is used for verification, in other embodiments, two verification methods are used for verification, and the verification code of the image comprises the generated verification codes of the two methods.
In some embodiments, the length of the check code of each image segment is fixed, in some embodiments, the length of the check code of each image segment is not fixed, and the intervals between the check codes are marked to distinguish the check codes. The finally generated first mapping file only comprises code segments, data segments and check codes, and compared with an ELF format file, the mapping file is smaller and occupies smaller memory space.
In some embodiments, header information and a checksum address offset of the first image are further inserted into the code segment of the first image, so as to obtain information of the first image, and this step includes a code segment information insertion process of the first image shown in fig. 1B, which includes steps S1210 to S1230.
S1210: header information of the first image is inserted at a first free address of a code segment of the first image.
Wherein, the header information of the first image is at least one of the following: the number of the image segments of the first image, whether each image segment is loaded or not, the storage address of each image segment in the running memory and the size of each image segment. When the first image is an execution file, in some embodiments, the header information of the first image further includes a running entry address thereof to run the first image.
S1220: a check code address offset is inserted at a second free address of the first mapped code section.
The check code address offset is the address offset of the check code of the first mapping segment of the first mapping in the file of the first mapping.
Illustratively, fig. 2 shows the structure of a code segment in some embodiments of the present invention, where 0x80 address and 0x120 address are free locations in the ELF format code segment, and in the code segment of this embodiment, 0x120 address is a first free address for storing header information of the first image, and 0x80 address is a second free address for storing a check code address offset of the first image.
S1230: and calculating the check code of the image section of the memory, which can be loaded by the first image, and storing the check code in a file of the first image consisting of the code section, the data section and the check code, wherein the check code of each image section is stored in the corresponding position of the first image.
The corresponding position is obtained according to the address offset of the check code of the first image, the number of the image sections which have generated the check code and the length of the check code of each image section.
In summary, in the first method for generating an image, an image file is generated by the code segment, the data segment and the check code, the image file occupies a small space, and the loading information and the check information are both in the image file, so that management and access of the loading information and the check information are simplified, and readability and maintainability of algorithm implementation are improved.
A first embodiment of a method for loading an image, which is a generating method, is described below with reference to fig. 3A and 3B.
In the first embodiment of the image loading method, the image file consists of code segments, data segments and check codes, the image data is small, the loading speed is high, the image segment to be loaded of the image is obtained from the temporary memory and checked, and the implementation logic of image loading and checking is simplified, so that the real-time performance of image loading and checking is guaranteed, and the readability and maintainability of algorithm implementation are improved.
Fig. 3A shows a flow of a first embodiment of a method for loading an image, which includes steps S310 to S330.
For ease of description, the loaded image continues with the first image as an example.
S310: and acquiring each image segment to be loaded of the image and a check code thereof from a temporary memory for storing the first image, wherein the image segment of one image comprises each segment of a code segment and each segment of a data segment of the image.
In some embodiments, before performing this step, the program executing the load obtains the address of the temporary memory from its configuration data, and temporarily stores the image at the address.
S320: and checking each image segment to be loaded according to the check code of the first image, and loading the image segment to be loaded which is checked successfully to the corresponding storage address of the running memory of the first image.
The verification method of this step is the same as the verification code generation method in the first embodiment of the generation method for generating an image.
And when the verification of one image segment to be loaded fails, the loading process is carried out.
In some embodiments, the code segment of the first image includes header information and a checksum address offset as described in the first embodiment of the image generation method, and fig. 3B illustrates a detailed flow included in steps S310 and S320 in these embodiments.
Step S310 includes step S3110 and step S3120.
S3110: and obtaining each image segment to be loaded of the first image from the temporary storage memory of the first image according to the header information of the first image.
Wherein the header information of the first image is at a first free address of a code segment of the first image.
The mapping section of one mapping comprises each section of the code section and each section of the data section of the mapping, and the header information of one mapping comprises the number of the mapping sections of the mapping, whether each mapping section is loaded, the storage address of each mapping section in the running memory and the size of each mapping section.
S3120: and acquiring the check code of each image segment to be loaded from the temporary storage memory of the first image according to the address offset of the check code of the first image.
The check code address offset is the address offset of the check code of the first image segment of the first image in the file of the first image. The checksum address offset of the first image is at a second free address of the code segment of the first image.
And acquiring the address of the check code of each mapping segment to be loaded in the first mapping according to the address offset of the check code of the first mapping, the sequence number of each mapping segment to be loaded and the length of the check code of each mapping segment, thereby acquiring each mapping segment.
Step S320 includes step S3210 and step S3220.
S3210: and checking each image segment to be loaded according to the check code of the first image.
In some embodiments, one verification method is used for verification, and in other embodiments, two verification methods are used for verification.
And judging whether the verification of each image segment is finished according to whether each image segment in the header information is loaded and the number of the image segments.
S3220 loads the successfully verified image segment to be loaded to the corresponding storage address of the operating memory of the image according to the header information.
And obtaining the corresponding storage address according to the storage address of each mapping segment in the header information in the running memory.
When the first image is an execution file, the header information of the first image also comprises the running entry address of the image. After this step is completed, in some embodiments, the first image is run from the run entry address of the first image.
In summary, in the first embodiment of the method for loading an image, the image file is composed of code segments, data segments and check codes, the image data is small, the loading speed is high, each image segment to be loaded of the image and the check code thereof are obtained from a temporary memory for storing the first image, each image segment to be loaded is checked according to the check code of the first image, and the image segment to be loaded which is successfully checked is loaded to the corresponding storage address of the operating memory of the first image, so that the implementation logic of image loading and checking is simplified, the real-time performance of image loading and checking is ensured, and the readability and maintainability of algorithm implementation are improved.
An embodiment of a method for generating an image and an embodiment of a method for loading an image are described below with reference to fig. 4 to 7.
The second embodiment of the image generation method and the second embodiment of the image loading method are respectively an embodiment of the image generation method and an embodiment of the image loading method, and are at least used for generating a microkernel image and a virtual machine image of a virtual machine in a specific real-time mode of a virtual machine scene.
First, a virtual machine corresponding to a second embodiment of an image generation method and a second embodiment of an image loading method is introduced according to fig. 4.
Fig. 4 shows the structures of the virtual machine to which the second embodiment of the image generation method and the second embodiment of the image loading method of the present invention are applied, which includes a target machine proxy image, a microkernel image, a virtual machine image, and a hardware boot loader.
When the virtual machine is started, the hardware starting bootstrap program firstly moves the microkernel image and the virtual machine image to respective temporary memory, then loads the target machine proxy image into the running memory and runs the target machine proxy image; and the target machine proxy image loads and verifies the microkernel image and the virtual machine image in the temporary storage memory. Therefore, the microkernel image and the virtual machine image which are temporarily stored in the memory can be accessed in a memory mode, and the implementation logic of image access is simplified, so that the real-time performance of image loading and verification is guaranteed, and the readability and maintainability of algorithm implementation are improved.
Next, an embodiment of a method for generating an image is described with reference to fig. 5.
Fig. 5 shows a flow of an embodiment of a second image generation method, which includes steps S510 to S540.
The method of this embodiment is used for microkernel images, virtual machine images, and also for target machine proxy image generation, and for convenience of description, the first image is continued as an example, and the differences of the images are introduced in the corresponding steps.
S510: and acquiring a code segment and a data segment after the first image source code is compiled.
The compiled image is in ELF format and includes code segment and data segment.
The method and advantages of this step are the same as in step S110 of the first embodiment of the image generation method.
S520: header information and a checksum address offset of the first image are inserted into the 0x80 address and the 0x120 address of the code section of the first image, respectively, and replace the code section.
In the code segment in the ELF format, the 0x80 address and the 0x120 address are idle locations, in the code segment in this embodiment, the 0x120 address is a first set address used for storing header information of the first image, and the 0x80 address is a second set address used for storing a check code address offset of the first image.
The first mapping header information at least comprises the mapping segment number of the first mapping and the segment information of each mapping segment, the segment information of one mapping segment at least comprises whether the mapping segment is loaded, the storage address of the mapping segment in the running memory and the size of the mapping segment, and the mapping segment of the first mapping comprises each segment of the code segment of the first mapping and each segment of the data segment. When the first image is a microkernel image and a target machine agent image, the first image also comprises respective operation inlets so as to operate the microkernel image and the target machine agent image.
And the storage address of each image segment in the header information of the first image is planned in advance in the running memory and is imported through each data. Other information in the header information of the first image is obtained from the ELF file.
S530: and calculating a check code of the image segment which can be loaded into the memory by the first image, and storing the check code in the corresponding position of the file of the first image, thereby generating the first image consisting of the code segment, the data segment and the check code.
Wherein, the length of the check code of each mapping segment is 8, and the corresponding position is the sum of the following data: the product of the checksum address offset of the first image, the number of image segments for which a checksum has been generated, and 8.
S540: and configuring the storage addresses of the microkernel image and the virtual machine image in the temporary storage memory in the configuration file of the target machine proxy image, and configuring the storage addresses of the target machine proxy image, the microkernel image and the virtual machine image in the temporary storage memory in the script file of the hardware starting bootstrap program.
The hardware starting bootstrap program copies a target machine proxy image, a microkernel image and a virtual machine image configured in a script file of the hardware starting bootstrap program into a temporary storage memory, and the target machine proxy image loads the microkernel image and the virtual machine image into an operating memory from the temporary storage memory.
In summary, the second embodiment of the method for generating an image is a specific implementation manner of the first embodiment of the method for generating an image in a virtual machine scenario, and inherits all advantages of the first embodiment of the method for generating an image, and further adds the storage addresses of the microkernel image and the virtual machine image in the temporary storage in the configuration file of the target machine proxy image, and the storage addresses of the target machine proxy image, the microkernel image and the virtual machine image in the temporary storage in the script file of the hardware boot loader. Therefore, the microkernel image and the virtual machine image which are temporarily stored in the memory can be accessed in a memory mode, and the implementation logic of image access is simplified, so that the real-time performance of image loading and verification is guaranteed, and the readability and maintainability of algorithm implementation are improved.
Next, an embodiment of a method for loading an image is described with reference to fig. 6 and 7.
In a second embodiment of the image loading method, a hardware boot bootstrap program first moves a microkernel image and a virtual machine image to respective temporary memory, then loads a target machine proxy image to a running memory of the target machine proxy image, and runs the target machine proxy image; the target machine proxy image loads and verifies the microkernel image and the virtual machine image in the temporary storage memory; and then the target machine agent maps and runs the microkernel images, and after the microkernels are mapped, each virtual machine image is started.
In this embodiment, a microkernel image and a virtual machine image are loaded in a target image file as an example to describe a method in a second embodiment of an image loading method.
Fig. 6 shows a process of loading the microkernel image and the virtual machine image by the target machine proxy image in the second embodiment of the image loading method, which includes steps S610 to S670.
For convenience of description, variables used in a plurality of steps are defined and described, and other variables are described in the flow.
Local variable i, representing the index of the image being loaded and checked, with an initial value of 1.
imageNumber represents the number of images to be loaded and checked configured in the image configuration data of the target machine proxy image.
imageConfig [ i ] represents the configuration data of the ith image in the image configuration data, and i is 1, 2 … imageNumber. It includes:
Figure BDA0003815095590000161
imageConfig[i]type represents the image type of the ith image in the image configuration data.
Wherein, for the microkernel image, the image TYPE in the image configuration data is TYPE _ MICRO _ KERNEL; for a virtual machine image, the image TYPE in the image configuration data is TYPE _ VM.
Figure BDA0003815095590000162
imageConfig[i]Stopstart indicates a storage address at which the ith image in the image configuration data is temporarily stored on the memory.
imageHeader represents the image header information in the image. It includes:
Figure BDA0003815095590000163
segnum represents the total number of image segments and also represents the number of segment information in the image header information.
Figure BDA0003815095590000164
Entryladdr represents the entry address of an image run of a non-microkernel image.
Figure BDA0003815095590000165
imageHeader.segs[j]Segment information representing the jth segment, j being 1, 2 … imageheader.
Figure BDA0003815095590000166
imageHeader.segs[j]isLoad indicates whether the jth segment is loaded into the memory, and if the code segment and the data segment need to be loaded into the memory, the value is TRUE; BSS segment does not need to be loaded in memoryThis value is FALSE.
Figure BDA0003815095590000167
imageHeader.segs[j]loadAddr represents the physical address where the jth segment is loaded into memory.
Figure BDA0003815095590000168
imageHeader.segs[j]Size denotes the jth segment size.
Segverifycodestrostart represents the current temporary address of the checksum, which varies with the image segment being loaded and checked as the image segment of each image is loaded and checked.
microKernelEntry represents the entry address for microkernel image operation, with an initial value of NULL.
S610: acquiring the header information of the ith image and recording the header information into a local variable imageHeader
Specifically, the header information of the ith image is obtained from the address obtained by adding 0x120 address offset to the storage address imageConfig [ i ] of the ith image in the temporary memory.
S620: and acquiring the current address of the check code of the ith image in the temporary storage memory, and recording the current temporary storage address segverifycodestestestart of the check code.
Specifically, the address offset of the check code of the ith image is obtained from the address of the ith image obtained by adding the address offset of 0x80 to the storage address imageConfig [ i ] of the temporary memory, and the address offset is recorded into the local variable segverifycodefoffset.
Specifically, the address obtained by adding segverifycodedoffset to imageConfig [ i ] to the stored start address of the i-th image in the temporary memory is the start address of the verification code of the i-th image in the temporary memory, the start address is recorded to the current temporary storage address segverifycodedstore start of the verification code, and when the image segment of each image is loaded and verified, the current temporary storage address segverifycodedstore start of the verification code changes along with the loaded and verified image segment.
S630: and checking and loading the ith image according to the header information and the address of the check code of the ith image in the temporary storage memory.
The detailed method in this step refers to a checksum loading method for each image segment in the second embodiment of the image loading method.
S640: and when the image type of the ith image is the microkernel image type, setting the running entry address microKernelEntry of the microkernel image as the image running entry address image header.
Specifically, when the image TYPE imageConfig [ i ] TYPE of the ith image is the microkernel image TYPE _ MICRO _ KERNEL, the running entry address microkernel entry of the microkernel image is set to be the image running entry address imageheader.
S650: and increasing 1 for i, and judging whether the image index i which is being loaded and checked is greater than the image number imageNumber which needs to be loaded and checked.
If i is greater than imageNumber, it indicates that loading and checking of all images have been completed successfully, step S660 is executed, otherwise, step S610 is returned to.
S660: after the microkernel image and the virtual machine image are successfully loaded and verified, the target machine proxy image operates the microkernel image according to the entry address microKernelentry operated by the microkernel image.
S670: and after the microkernel image completes the initialization of the microkernel image, the microkernel runs the virtual machine image according to the virtual machine configuration data.
Fig. 7 shows a flow of checksum loading of each image segment in an embodiment of an image loading method, which includes steps S6310 to S6380.
For convenience of description, the following variables to be used in a plurality of steps are defined, and local variables used for a single step are introduced in the flow.
Defining a local variable j representing the index of the image segment being loaded and checked, with an initial value of 1; defining a local variable storeStart, which indicates an address of the segment data of the image segment currently being checked and loaded in the temporary storage memory, and is abbreviated as a current segment data temporary storage address storeStart, and an initial value is imageConfig [ i ]. StoreStart.
S6310: and judging whether the index j of the image segment which is being loaded and checked is larger than the number of image segments needing to be loaded and checked.
Segnum, if j is greater than image header, indicating that the loading and checking of all image segments of the ith image are completed successfully, ending the loading and checking of all image segments of the ith image, and executing step S640, otherwise, continuing the loading and checking of the image segments of the ith image, and executing step S6320.
S6320: and judging whether the jth image segment needs to be loaded into the memory, namely, image header.
If the jth image segment needs to be loaded to the memory, step S6330 is executed, otherwise, step S6370 is executed.
S6330: and loading the jth image segment into the running memory according to the segment information of the jth image segment.
Specifically, the image header.segs [ j ]. LoadAddr and the segment size image header.segs [ j ]. Size in the segment information of the jth image segment are obtained from the header information of the ith image, and the data in the temporary storage memory which starts from the current segment data temporary storage address storeStart and has the size of the image header.segs [ j ]. Size is loaded into the address of the running memory.
S6340: and acquiring the check code of the jth image segment from the temporary storage memory at the current temporary storage address segverifycordestorrestart of the check code, and recording the check code to a local variable original segverifycode.
Wherein, the check code stored in originalSegVerifycode is the check code stored in the mapping file.
S6350: and generating a current check code of the jth image segment according to the segment data of the jth image segment in the operating memory, and recording the current check code to a local variable dataSegVerifycode.
Specifically, according to the physical address imageheader.segs [ j ]. LoadAddr loaded to the running memory by the jth image segment and the segment size imageheader.segs [ j ]. Size thereof, the current check code of the segment data of the jth image segment loaded to the memory is calculated and recorded to the local variable dataSegVerifyCode.
S6360: and judging whether the current check code dataSegVerifycode of the jth image segment is equal to the corresponding check code originaSegVerifycode in the image file or not.
If the two are equal, the check is passed, the next image segment loading is continued, and step S6370 is executed, otherwise, step S6380 is executed.
S6370: j, the current segment data temporary storage address storeStart and the check code current temporary storage address segverifycodestrostart are respectively incremented.
Specifically, j is incremented by 1, the current segment data temporary storage address storeStart is incremented by the jth segment size imageheader.
The incremented temporary storage address of the current segment data is an address of a next segment data of an image segment that can be loaded into the memory in the temporary storage memory, and the incremented temporary storage address of the check code of the current segment data segverifycodestrostart is an address of a next check code of an image segment that is loaded into the running memory in the temporary storage memory.
S6380 exits the loading and checking operation of the ith image and returns an error code.
The target machine proxy image carries out corresponding error processing according to the error code.
In summary, the second embodiment of the image loading method is a specific implementation manner of the first embodiment of the image loading method in a virtual machine scenario, and inherits all advantages of the first embodiment of the image loading method, and also accesses the microkernel image and the virtual machine image temporarily stored in the memory by configuring the storage addresses of the microkernel image and the virtual machine image in the temporary memory in the configuration file of the target machine proxy image in a memory manner, thereby simplifying implementation logic of image access, ensuring real-time performance of image loading and verification, and improving readability and maintainability of algorithm implementation.
An embodiment of an image generating apparatus and an embodiment of an image loading apparatus are described below with reference to fig. 8A to 8B.
Fig. 8A shows a structure of an embodiment of an image generation apparatus, which includes: a primary image obtaining module 8010 and a check code generating module 8020.
For convenience of description, the apparatus for generating the image file of the present invention is described by taking the first image as an example.
The original image obtaining module 8010 is configured to obtain a code segment and a data segment of the first image source code after compiling. The working principle and advantages of the method refer to step S110 of the first embodiment of the image generation method.
The check code generating module 8020 is configured to calculate a check code of an image segment that can be loaded into the memory by the first image, and store the check code in a corresponding position of a file of the first image, so as to generate a new first image composed of a code segment, a data segment, and the check code. The working principle and advantages refer to step S120 of the first embodiment of the image generation method.
In some embodiments, the second image generation apparatus embodiment further includes a temporary storage address configuration module, configured to configure a storage address of the first image in the temporary storage memory in the configuration data of the program executing the load.
Fig. 8B shows a structure of an embodiment of an image loading apparatus, including: a data acquisition module 8110 and a check loading module 8120.
For convenience of description, the apparatus for loading the image file of the present invention will be described by taking the first image as an example.
The data obtaining module 8110 is configured to obtain, from a temporary memory for storing the first image, each image segment to be loaded of the image and a check code thereof, where an image segment of an image includes each segment of a code segment of the image and each segment of a data segment. The working principle and advantages of the method refer to step S310 of the first embodiment of the image loading method.
The check loading module 8120 is configured to check the image segment of the first image according to the check code of the first image, and load the image segment that is successfully checked to the storage address of the image segment in the operating memory according to the header information of the first image. The working principle and advantages refer to step S320 of the first embodiment of the image loading method.
In some embodiments, an image loading apparatus further includes an image temporary storage module, configured to obtain, by a program executing loading, a storage address of a first image in a temporary storage memory from configuration data of the program, and temporarily store the first image at the storage address.
In some embodiments, an image loading apparatus embodiment further includes an image execution module, configured to obtain, by a program performing loading, a storage address of a first image in a temporary storage memory from configuration data of the program, and temporarily store the first image in the storage address.
The embodiment of the invention also provides an operating system, which executes the method in the embodiment of the generation method of the image, the method in the embodiment of the loading method of the image and the method in the embodiment of the loading method of the image.
An embodiment of the present invention further provides a computing device, which is described in detail below with reference to fig. 9.
The computing device 900 includes a processor 910, a memory 920, a communication interface 930, and a bus 940.
It is to be appreciated that the communication interface 930 in the computing device 900 illustrated in this figure may be used to communicate with other devices.
The processor 910 may be connected to the memory 920. The memory 920 may be used to store the program codes and data. Accordingly, the memory 920 may be a storage unit inside the processor 910, an external storage unit independent of the processor 910, or a component including a storage unit inside the processor 910 and an external storage unit independent of the processor 910.
Optionally, computing device 900 may also include a bus 940. The memory 920 and the communication interface 930 may be connected to the processor 910 through a bus 940. The bus 940 may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus 940 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one line is shown, but this does not represent only one bus or one type of bus.
It should be understood that, in the embodiment of the present invention, the processor 910 may employ a Central Processing Unit (CPU). The processor may also be other general purpose processors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. Or the processor 910 may employ one or more integrated circuits for executing related programs to implement the technical solutions provided by the embodiments of the present invention.
The memory 920 may include a read-only memory and a random access memory, and provides instructions and data to the processor 910. A portion of the processor 910 may also include non-volatile random access memory. For example, the processor 910 may also store information of the device type.
When the computing device 900 is running, the processor 910 executes the computer-executable instructions in the memory 920 to perform the operational steps of the method embodiments.
It should be understood that the computing device 900 according to the embodiment of the present invention may correspond to a corresponding main body executing the method according to the embodiments of the present invention, and the above and other operations and/or functions of each module in the computing device 900 are respectively for implementing the corresponding flow of each method of the embodiment, and are not described herein again for brevity.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the technical solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electric, machine or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. The storage medium includes a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various media capable of storing program codes.
Embodiments of the present invention also provide a computer-readable storage medium having stored thereon a computer program for performing, when executed by a processor, the operational steps of the method embodiments.
Computer storage media for embodiments of the invention may employ any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in more detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention.

Claims (14)

1. A method for loading an image, wherein the image is composed of a code segment, a data segment and a check code, the method comprising:
acquiring each image segment to be loaded of the image and a check code thereof from a temporary storage memory for storing the image, wherein the image segment of one image comprises each segment of a code segment and each segment of a data segment of the image;
and checking each image segment to be loaded according to the check code, and loading the image segment to be loaded which is successfully checked to the corresponding storage address of the running memory of the image.
2. The method of claim 1, wherein obtaining each image segment to be loaded of the image from a temporary memory for storing the image comprises:
acquiring each image segment to be loaded of the image from the temporary storage memory according to the head information of the image, wherein the head information is stored at a first idle address of the image and at least comprises: the total number of the image segments and whether each image segment is loaded.
3. The method of claim 2, wherein the header information further includes a storage address of each image segment in the running memory;
the loading the successfully verified image segment to be loaded to the corresponding storage address of the running memory of the image specifically includes:
and loading the image segment to be loaded which is successfully checked to the memory pointed by the storage address of the image segment in the running memory in the header information.
4. The method of claim 2, wherein when the image is an execution file, the header information further includes a running entry address of the image;
the method further comprises the following steps: and when the images to be loaded are loaded successfully, the images are operated from the operation entry addresses of the images.
5. The method according to claim 1, wherein obtaining the check code of each image segment to be loaded of the image from a temporary memory for storing the image specifically comprises:
and acquiring the check code of each to-be-loaded image segment of the image from a temporary storage memory for storing the image according to the address offset of the check code of the image, wherein the address offset of the check code is the address offset of the check code of the first image segment in the image, and the address offset is stored at a second idle address of the image.
6. The method of claim 1, further comprising:
and executing the loaded program to obtain the address of the temporary storage memory from the configuration data of the loaded program, and temporarily storing the image at the address.
7. A method for generating an image, comprising:
acquiring a code segment and a data segment after the mapping source code is compiled;
and calculating a check code of a mapping section which can be loaded to a memory by the mapping, and forming the mapping by the code section, the data section and the check code, wherein the mapping section comprises each section of the code section and each section of the data section.
8. The method of claim 7, further comprising: inserting header information of the image at a first free address of the image, the header information including at least one of: the number of the mapping segments of the mapping, whether each mapping segment is loaded or not and the storage address of each mapping segment in the running memory.
9. The method of claim 8, further comprising: inserting a check code address offset of the image at a second free address of the image, wherein the check code address offset is the address offset of a check code of a first image segment in the image;
the calculating the check code of the image segment that can be loaded into the memory by the image specifically includes:
and calculating the check code of the image section which can be loaded into the memory by the image according to the header information, and storing the check code at the corresponding address of the image, wherein the corresponding address is obtained according to the address offset of the check code and the length of the check code of each image section.
10. The method of claim 8, wherein the header information further comprises a running entry address of the image.
11. The method of claim 8, further comprising: and configuring the storage address of the image in a temporary storage memory in the configuration data of the loader for executing the image.
12. An apparatus for loading an image, wherein the image is composed of a code segment, a data segment and a check code, the apparatus comprising: the system comprises a data acquisition module and a check loading module;
the data acquisition module is used for acquiring each mapping section to be loaded of the mapping and a check code thereof from a temporary storage memory for storing the mapping, wherein the mapping section of one mapping comprises each section of a code section of the mapping and each section of a data section;
and the check loading module is used for checking each image segment to be loaded according to the check code and loading the image segment to be loaded which is successfully checked to the corresponding storage address of the running memory of the image.
13. An apparatus for generating an image, comprising: an original image acquisition module and a check code generation module;
the original image obtaining module is used for obtaining a code segment and a data segment after the image source code is compiled;
the check code generation module is used for calculating the check codes of the image sections of the image which can be loaded to the memory, and the image is formed by the code sections, the data sections and the check codes, wherein the check codes of the image sections are set in length.
14. An operating system, comprising: performing the method of any one of claims 1 to 6 or the method of any one of claims 7 to 11.
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