CN115407942A - Data processing method suitable for single chip microcomputer chip - Google Patents
Data processing method suitable for single chip microcomputer chip Download PDFInfo
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Abstract
The invention provides a data processing method suitable for a single chip microcomputer chip, which comprises the following steps: step 1: acquiring the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list; and 2, step: and after the single chip receives an operation instruction, obtaining and operating target storage data according to the data storage list, and executing the operation instruction. The invention takes the relevance between the data to be stored of the single chip microcomputer chip, determines the storage position of the data to be stored according to the relevance, reasonably distributes the storage space, reduces the data storage using space and stores more data under the conditions of not expanding the single chip microcomputer chip and not losing the data, generates a data storage list, facilitates data searching and improves the response speed of operation instructions.
Description
Technical Field
The invention relates to the technical field of data storage, in particular to a data processing method suitable for a single chip microcomputer chip.
Background
The single chip microcomputer chip is taken as an integrated circuit chip with super-strong computing capability, has permeated into various fields in daily life, is small to household appliances, instruments and meters, large to medical appliances and aerospace, and has no figure of the single chip microcomputer. The superstrong computing capability and the multifunctional integrated circuit also mean that a larger storage space is needed, and due to the limitation of the storage space, if more data are stored under the condition that the chip is not replaced, only an external storage hard disk can be added, but the addition of the external hard disk can bring about the problem of data incompatibility, and in order to solve the problem, the invention provides a data processing method suitable for a single chip.
Disclosure of Invention
The invention provides a data processing method suitable for a single chip microcomputer chip, which is characterized in that the relevance between data to be stored of the single chip microcomputer chip is obtained, the storage position of the data to be stored is determined according to the relevance, the storage space is reasonably distributed, the storage space used for storing more data is reduced under the conditions that the single chip microcomputer chip is not expanded and the data is not lost, meanwhile, a data storage list is generated, the data searching is convenient, and the response speed of an operation instruction is improved; and after the singlechip chip receives the operation instruction, the target storage data is obtained and operated according to the data storage list, the operation instruction is executed, and the user operation instruction is quickly completed to provide good use feeling for the user.
The invention provides a data processing method suitable for a single chip microcomputer chip, which comprises the following steps:
step 1: acquiring the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list;
and 2, step: and after the single chip receives an operation instruction, obtaining and operating target storage data according to the data storage list, and executing the operation instruction.
Preferably, the step 1: the method comprises the following steps of obtaining the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list, wherein the specific steps comprise:
step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored;
step 102: judging whether the data to be stored have relevance according to the relation tree of the data to be stored;
step 103: when the relevance exists between the data to be stored, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed to the corresponding storage position;
step 104: and generating a data storage list according to the storage result.
Preferably, the step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored, wherein the specific steps comprise:
acquiring all functions of the single chip microcomputer chip and operation data corresponding to all the functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the single chip microcomputer chip, and acquiring a function generation second mapping relation according to all function realization processes;
determining a final component corresponding to each function according to the second mapping relation, classifying all the functions based on the final components to obtain a function classification group, and adding a name label to the function classification group according to the function classification as a corresponding final component name;
taking the single chip microcomputer chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relationship tree;
and establishing a relation tree of the data to be stored according to the first mapping relation and the functional relation tree.
Preferably, the step 102: judging whether the data to be stored have relevance according to the relation tree of the data to be stored, and the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that no correlation exists among the data to be stored.
Preferably, the step 103: when the data to be stored has relevance, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, the data to be processed is compressed and then placed to the corresponding storage position, and the specific steps comprise:
dividing the storage space of the single chip microcomputer chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the plurality of subspaces;
acquiring to-be-stored data corresponding to all leaf nodes under the same child node as to-be-processed data, acquiring data compiling characteristics of the to-be-processed data, determining similar data segments of the to-be-processed data according to the data compiling characteristics, carrying out first marking on the similar data segments, and simultaneously carrying out second marking on the rest data segments;
dividing the data to be processed into a plurality of data segments according to the first marks and the second marks, respectively determining the data attributes of the data segments according to the marks corresponding to the data segments, and classifying the data segments according to the data attributes to obtain a public data group and a non-public data group;
merging the repeated data segments in the public data group and the non-public data group to obtain the quantity of the non-repeated data segments corresponding to the data to be processed;
according to the quantity of the non-repeated data segments, dividing subspaces corresponding to the child nodes to obtain a plurality of physical storage blocks;
and after data compression processing is carried out on the plurality of data segments, storing the data segments in corresponding physical storage blocks, wherein the size of the physical storage blocks is subjected to self-adaptive adjustment according to the size of the data segments.
Preferably, after the data to be processed is divided into a plurality of data segments, the method further includes:
adding identity codes to the data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding updating on the public data to obtain a public code;
updating the first running sequence according to the public code to obtain a second running sequence;
acquiring a coding rule corresponding to the public code, performing coding replacement on the second mark corresponding code based on the coding rule, and updating the second running sequence according to a coding replacement result to acquire a third running sequence;
and generating a data storage list according to the third running sequence and the function corresponding to all the data to be stored and the operation instruction corresponding to the function, and setting the trigger level of the data storage list as the highest priority level.
Preferably, the step 2: after the single chip receives an operation instruction, obtaining and operating target data to be stored according to the data storage list, and executing the operation instruction, wherein the specific steps comprise:
step 201: when the single chip receives an operation instruction, automatically decompressing the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third running sequence corresponding to the operation instruction on the data storage list;
step 203: after the target storage data are decompressed, recombining the target storage data according to the third running sequence to generate calling storage data;
step 204: and operating the calling storage data to complete the operation instruction.
Preferably, after the execution of the operation instruction is completed, the method further includes:
the data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the single chip does not receive a new operation instruction continuously within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggering state is recovered.
Preferably, a data processing method suitable for a single chip microcomputer chip further includes:
and step 3: generating an operation record after the operation instruction is completed, and hiding the infrequently stored data according to the operation record, wherein the method specifically comprises the following steps:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip in a preset time span based on the operation list, and generating a counting list;
when the execution times are greater than the preset times, judging that the operation instruction is a common operation instruction;
when the execution times are less than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third running sequence corresponding to the operation instruction;
determining a private data segment of the uncommon operation instruction according to the third running sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
Preferably, after hiding the target data segment based on the data segment number, the method further includes:
acquiring a storage position of a hidden target data segment in the storage space of the single chip microcomputer chip, and generating a hidden data pointer based on the storage position;
acquiring data codes at positions corresponding to the hidden data pointers, comparing the data codes with a data storage list, determining a data relation between the hidden target data segments, combining the hidden data pointers according to the data relation, generating specific pointers, determining hidden operation instructions corresponding to the specific pointers, and establishing a third mapping relation;
meanwhile, according to the data relation, matching the specific pointer with a hidden target data segment to establish a fourth mapping relation;
based on the fourth mapping relation, respectively adding a link mark to the specific pointer and the hidden target data segment;
and when the operation instruction received by the single chip microcomputer chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic flow chart of a data processing method for a single chip according to the present invention;
FIG. 2 is a schematic flow chart of step 1 of a data processing method applicable to a single chip microcomputer chip according to the present invention;
fig. 3 is a schematic flow chart of step 2 of a data processing method applicable to a single chip microcomputer chip according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Example 1:
the invention provides a data processing method suitable for a single chip microcomputer chip, as shown in fig. 1, comprising the following steps:
step 1: acquiring the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list;
and 2, step: and after the single chip microcomputer chip receives an operation instruction, target storage data are obtained and operated according to the data storage list, and the operation instruction is executed.
In this embodiment, the target storage data refers to storage data that needs to be called when the operation instruction is executed.
In this embodiment, the data storage list refers to a table constructed according to the function corresponding to the operation instruction and the storage location of the data to be stored corresponding to the operation instruction.
The beneficial effects of the above technical scheme are that: the invention obtains the relevance between the data to be stored of the single chip microcomputer chip, determines the storage position of the data to be stored according to the relevance, reasonably allocates the storage space, ensures that the used space of the data storage is reduced to store more data under the conditions of not expanding the single chip microcomputer chip and not losing the data, generates a data storage list, is convenient for searching the data and improves the response speed of an operation instruction; and after the single chip microcomputer chip receives the operation instruction, the target data to be stored is obtained and operated according to the data storage list, the operation instruction is executed, and the user operation instruction is rapidly completed to provide user using good feeling.
Example 2:
on the basis of example 1, the step 1: obtaining the correlation between the data to be stored of the single chip, determining the storage position of the data to be stored according to the correlation, and generating a data storage list, as shown in fig. 2, the specific steps include:
step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored;
step 102: judging whether the data to be stored have relevance according to the relation tree of the data to be stored;
step 103: when the relevance exists between the data to be stored, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed to the corresponding storage position;
step 104: and generating a data storage list according to the storage result.
In this embodiment, the relation tree of the data to be stored represents a relation graph of the classification relation of the data to be stored.
The beneficial effects of the above technical scheme are that: according to the invention, all data to be stored of the single chip microcomputer chip are obtained, and the relation tree of the data to be stored is constructed, so that the classification of the data to be stored is more definite, and the data storage is convenient; judging whether the data to be stored have relevance according to the relation tree of the data to be stored; when the data to be stored has relevance, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, the data to be processed is compressed and then placed to the corresponding storage position, the reasonable distribution of the storage space is facilitated, and the storage space is reduced under the condition that the data are not lost; and a data storage list is generated according to the storage result, so that data searching is facilitated, and the response speed of the operation instruction is improved.
Example 3:
on the basis of example 2, the step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored, wherein the specific steps comprise:
acquiring all functions of the single chip microcomputer chip and operation data corresponding to all the functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the single chip microcomputer chip, and acquiring a function generation second mapping relation according to all function realization processes;
determining a final component corresponding to each function according to the second mapping relation, classifying all the functions based on the final components to obtain a function classification group, and adding a name label to the function group according to a corresponding final component name of the function classification;
taking the single chip microcomputer chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relationship tree;
and establishing a relation tree of the data to be stored according to the first mapping relation and the functional relation tree.
In this embodiment, the first mapping relationship refers to a corresponding relationship between data to be stored and functions that can be realized by the single chip microcomputer.
In this embodiment, all components controlled by the single chip microcomputer chip refer to all devices and equipment involved in the process of realizing each function according to an operation instruction by the single chip microcomputer.
In this embodiment, the implementation flow refers to the order of the devices and the equipment that the single chip microcomputer implements each function.
In this embodiment, the second mapping relationship refers to a corresponding relationship between functions of the single chip and implementation flows thereof.
In this embodiment, the final component means that the single chip determines the type of the final component according to the actual use of the single chip, based on the final device or equipment controlled according to the operation instruction, or a part of the equipment.
In this embodiment, the function grouping refers to determining the function grouping of the single chip microcomputer chips according to whether the final components are the same, and the functions of the final components which are the same are a group.
In this embodiment, the name tag is a tag added to distinguish each function group, and the tag is determined according to the name of the final component.
In this embodiment, the functional relationship tree refers to a relationship diagram of functional relationships of the single chip microcomputer. The root node and the child nodes of the data relation tree to be stored established according to the functional relation tree are not changed, and only the leaf nodes are replaced by the corresponding data to be stored.
The beneficial effects of the above technical scheme are that: the invention establishes a first mapping relation according to the corresponding relation between the function which can be realized by the single chip microcomputer chip and the data to be stored, and then establishes a second mapping relation according to the function and all devices or equipment (realizing process) involved in the function realizing process; and classifying the functions according to the final function device of the function to obtain a function relation tree, and then establishing a data relation tree to be stored according to the first mapping relation and the function relation tree to provide a basis for data classification in the storage process of the data to be stored.
Example 4:
on the basis of example 2, the step 102: judging whether the data to be stored have relevance according to the relation tree of the data to be stored, and the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that no correlation exists among the data to be stored.
The beneficial effects of the above technical scheme are that: the method and the device determine that the relevance exists among the data to be stored when the data to be stored are leaf nodes under the same child node.
Example 5:
on the basis of example 2, the step 103: when the relevance exists between the data to be stored, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, the data to be processed is compressed and then placed in the corresponding storage position, and the specific steps comprise:
dividing the storage space of the single chip microcomputer chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the plurality of subspaces;
acquiring to-be-stored data corresponding to all leaf nodes under the same child node as to-be-processed data, acquiring data compiling characteristics of the to-be-processed data, determining similar data segments of the to-be-processed data according to the data compiling characteristics, performing first marking on the similar data segments, and performing second marking on the remaining data segments;
dividing the data to be processed into a plurality of data segments according to the first marks and the second marks, respectively determining the data attributes of the data segments according to the marks corresponding to the data segments, and classifying the data segments according to the data attributes to obtain a public data group and a non-public data group;
combining the repeated data segments in the public data group and the non-public data group to obtain the quantity of the non-repeated data segments corresponding to the data to be processed;
according to the quantity of the non-repeated data segments, dividing subspaces corresponding to the child nodes to obtain a plurality of physical storage blocks;
and after data compression processing is carried out on the plurality of data segments, storing the data segments in corresponding physical storage blocks, wherein the size of the physical storage blocks is self-adaptively adjusted according to the size of the data segments.
In this embodiment, the subspace is a plurality of small spaces obtained by dividing a storage space according to the number of child nodes, that is, the number of categories of function classification, and the size of each subspace is determined by the size of data to be stored corresponding to each function group; the subspace boundary refers to a mark arranged at the edge of each subspace, so that data chaos in the data storage process is avoided.
In this embodiment, the data to be processed refers to data to be stored corresponding to all leaf nodes under the same child node, that is, the data to be stored corresponding to the data to be stored and having the same function type.
In this embodiment, the data writing characteristic refers to a part included in the same type of data (data to be stored corresponding to all leaf nodes under the same child node) in the data writing process, for example, initialization, time delay, interruption, and the like.
In this embodiment, the similar data segment refers to a portion commonly owned in the data to be processed, such as initialization, time delay, interrupt, and the like.
In this embodiment, the first mark is a mark for marking the position of a similar data segment on each complete data to be stored.
In this embodiment, the second flag is a flag of a position of the remaining data segment on each complete data to be stored. The remaining data segments refer to other data segments on the respective complete data to be stored that handle similar data segments.
In this embodiment, the data attribute includes a common data segment and a private data segment. The common data segment refers to a data segment which is shared by all the data to be processed; the private data segment refers to a data segment specific to each piece of data to be processed.
In this embodiment, the common data group refers to a data segment group constructed by common data; a non-public data group refers to a grouping of data segments of a private data construct.
In this embodiment, the duplicate data segment refers to a data segment with the same data.
In this embodiment, the number of non-duplicate data segments includes all non-duplicate data in the common data group and the non-common data group.
In this embodiment, a physical storage block refers to a minimum unit used for storing each data segment in a subspace.
In this embodiment, the adaptive adjustment means that the size of the physical storage block is also changed according to the size of the number segment.
The beneficial effects of the above technical scheme are as follows: according to the invention, the storage space of the single chip microcomputer chip is divided into a plurality of subspaces according to the number of the child nodes of the data relation tree to be stored, the storage positions of different types of data to be stored are limited, the data search in the execution process of an operation instruction is facilitated, and the boundary of the subspaces is respectively arranged at the edge boundary of the plurality of subspaces, so that the data confusion caused by the interleaving of the different types of data to be stored is avoided; then, dividing the data in the complete data to be processed into two types (common data and private data) according to the data writing characteristics of the data to be processed, marking the two types of data by using two types of marks (a first mark and a second mark), dividing the data to be processed into a plurality of data segments according to the marking result, classifying the plurality of data segments according to the data attributes of the data segments to obtain a public data group and a non-public data group, combining and repeating the data segments, and reducing the space required by storage as much as possible; and according to the quantity of the non-repeated data segments, dividing the subspace corresponding to the child nodes to obtain a plurality of physical storage blocks, and storing the plurality of data segments in the corresponding physical storage blocks after data compression processing. The data to be stored is divided into a plurality of data segments for storage, and meanwhile, the data is stored by using the principle that data compression is unchanged, so that the storage space is reduced and more data are stored under the conditions that the expansion of a single chip microcomputer chip is not carried out and the data are not lost.
Moreover, the size of the physical storage block is adaptively adjusted according to the size of the data segment, so that the situation that a large number of segments cannot be stored due to unreasonable physical storage block division is avoided, and the phenomenon of storage space waste for storing small data in a large space is also avoided.
Example 6:
on the basis of embodiment 5, after the data to be processed is divided into a plurality of data segments, the method further includes:
adding identity codes to the data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding updating on the public data to obtain a public code;
updating the first running sequence according to the public code to obtain a second running sequence;
acquiring a coding rule corresponding to the public code, performing coding replacement on the second mark corresponding code based on the coding rule, and updating the second running sequence according to a coding replacement result to acquire a third running sequence;
and generating a data storage list according to the third running sequence and the function corresponding to all the data to be stored and the operation instruction corresponding to the function, and setting the trigger level of the data storage list as the highest priority level.
In this embodiment, the identity code is a code for determining which data segment belongs to which data to be processed.
In this embodiment, the first running sequence refers to a sequence constructed by identity codes of to-be-processed data corresponding to each leaf node, that is, a data segment corresponding to complete to-be-processed data before segmentation, where a sequence of the identity codes in the sequence is the same as a position sequence of the corresponding data segment in the complete to-be-processed data.
In this embodiment, the common code is a code used to indicate that the data segment is common data of the current subspace, and different common data segments correspond to different common codes.
In this embodiment, the second run sequence refers to replacing the identity code of the data segment with the common code in the first run sequence with the common data code.
In this embodiment, the encoding replacement refers to that the encoding of the data with the data attribute being private data is modified in the same format as public encoding, so that the neatness of the data is ensured, and the data sorting and data searching are facilitated.
In this embodiment, the triple run sequence refers to replacing a non-common code in the second pre-sequence with a new code corresponding to a result of the corresponding code replacement.
In this embodiment, the most priority level means that the data storage list is automatically decompressed as long as the single chip receives the operation instruction.
The beneficial effects of the above technical scheme are that: according to the method, after the data to be processed is divided into a plurality of data segments, identity codes are added to the data segments, and according to the identity codes, a first operation sequence in the operation process of the data to be processed corresponding to each leaf node is respectively determined, so that data chaos caused by data division is avoided, and the integrity of the storage of the data to be processed is ensured; and then, updating the running sequence according to the codes, and finally generating a data storage list, so that the data searching is facilitated, and the response speed of the operation instruction is improved.
Example 7:
on the basis of the example 1, the step 2: after receiving the operation instruction, the single chip microcomputer chip obtains and runs target storage data according to the data storage list, and executes the operation instruction, as shown in fig. 3, the specific steps include:
step 201: when the single chip receives an operation instruction, automatically decompressing the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third running sequence corresponding to the operation instruction on the data storage list;
step 203: after the target storage data are decompressed, recombining the target storage data according to the third running sequence to generate calling storage data;
step 204: and operating the calling storage data to complete the operation instruction.
In this embodiment, the target storage data refers to a data segment to be decompressed, which is determined according to the third run sequence corresponding to the operation instruction.
In this embodiment, the calling of the storage data refers to the decompressed target storage data, and the complete storage data corresponding to the operation instruction is obtained after the splicing sequence represented by the third running sequence is recombined.
The beneficial effects of the above technical scheme are that: according to the invention, after the single chip receives an operation instruction, the data storage list is automatically decompressed; obtaining a plurality of compressed target storage data according to a third running sequence corresponding to the operation instruction on the data storage list; after the target storage data are decompressed, recombining the target storage data according to the third running sequence to generate calling storage data; and operating and calling the stored data, completing the operation instruction, and quickly completing the user operation instruction to provide good use feeling for the user.
Example 8:
on the basis of embodiment 1, after the execution of the operation instruction is completed, the method further includes:
the data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the single chip microcomputer chip does not receive a new operation instruction continuously within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggering state is recovered.
In this embodiment, the current mark time refers to the completion time of the current operation command,
in this embodiment, the non-triggered state refers to a compressed state.
The beneficial effects of the above technical scheme are as follows: after the current operation instruction is executed, the data storage list keeps a decompression state and obtains the current marking time; if the single chip does not receive a new operation instruction continuously within a preset time (for example, 60S) after the current marking time, the data storage list is compressed and stored, and an un-triggered state is recovered, which is beneficial to reducing the storage occupied space.
Example 9:
on the basis of embodiment 1, a data processing method suitable for a single chip microcomputer chip further includes:
and 3, step 3: generating an operation record after the operation instruction is completed, and hiding the infrequently stored data according to the operation record, wherein the method specifically comprises the following steps:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip in a preset time length based on the operation list, and generating a statistical list;
when the execution times are greater than the preset times, judging that the operation instruction is a common operation instruction;
when the execution times are less than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third running sequence corresponding to the operation instruction;
determining a private data segment of the uncommon operation instruction according to the third running sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
In this embodiment, the operation list is a table containing all operation instructions that can be received by the single chip microcomputer chip; the statistical list is an operation list showing the number of times each operation instruction is executed in length (for example, one week) in a preset time.
In this embodiment, the infrequent operation instruction refers to an operation instruction that is infrequently used (the execution times within the preset time length is less than or equal to the preset times); the common operation instruction refers to an operation instruction that is frequently used (the execution number within a preset time length is greater than a preset number).
In this embodiment, the target data segment refers to a private data segment corresponding to an unusual operation instruction.
The beneficial effects of the above technical scheme are that: the method comprises the steps of obtaining a data storage list of a single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip in a preset time length based on the operation list, and generating a statistical list; when the execution times are greater than the preset times, judging that the operation instruction is a common operation instruction; when the execution times are less than or equal to the preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third running sequence corresponding to the operation instruction; determining a private data segment of the uncommon operation instruction according to the third running sequence, and taking the private data segment as a target data segment; and acquiring a data segment number corresponding to the target data segment, hiding the target data segment based on the data segment number, reducing the data volume of query data in the execution process of the operation instruction of the single chip microcomputer chip and shortening the response time of the operation instruction of the single chip microcomputer chip under the condition of ensuring the integrity of original stored data.
Example 10:
on the basis of embodiment 9, after hiding the target data segment based on the data segment number, the method further includes:
acquiring a storage position of a hidden target data segment in the storage space of the single chip microcomputer chip, and generating a hidden data pointer based on the storage position;
acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relation between the hidden target data segments, combining the hidden data pointers according to the data relation to generate a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relation;
meanwhile, according to the data relation, matching the specific pointer with a hidden target data segment to establish a fourth mapping relation;
based on the fourth mapping relation, respectively adding a link mark to the specific pointer and the hidden target data segment;
and when the operation instruction received by the single chip microcomputer chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
In this embodiment, the hidden target data segment refers to a target data segment that has been hidden.
In this embodiment, the hidden data pointer is a tool for calibrating the storage location of the hidden target data segment.
In this embodiment, the data relationship indicates whether the hidden target data segment is a private data segment of the same operation instruction.
In this embodiment, the specific pointer is a new pointer generated by combining hidden data pointers corresponding to private data segments of the same operation instruction, and the pointer may mark storage locations of all hidden target data segments of the same operation instruction.
In this embodiment, the third mapping relationship refers to a corresponding relationship between the hidden operation instruction and the specific pointer; the hidden operation instruction refers to an operation instruction of the hidden target data segment.
In this embodiment, the fourth mapping relationship refers to a corresponding relationship between specific pointers and hidden target data segments, and one specific pointer corresponds to a plurality of hidden target data segments.
In this embodiment, the unicom flag is used to determine that the hidden target data segments belong to the same hidden operation instruction, and when a specific pointer corresponding to the unicom flag is triggered, the hidden target data segments of the same unicom flag are recovered at the same time.
In this embodiment, the target link marker is a link marker determined according to a specific pointer when the operation instruction received by the single chip microcomputer chip is identified as the hidden operation instruction.
The beneficial effects of the above technical scheme are as follows: the method comprises the steps of obtaining the storage position of a hidden target data segment in the storage space of a single chip microcomputer chip, and generating a hidden data pointer based on the storage position; acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relation between the hidden target data segments, combining the hidden data pointers according to the data relation to generate a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relation; meanwhile, according to the data relation, matching the specific pointer with a hidden target data segment to establish a fourth mapping relation; based on the fourth mapping relation, respectively adding a link mark to the specific pointer and the hidden target data segment; when the operation instruction received by the single chip microcomputer chip is identified as a hidden operation instruction, a specific pointer is triggered based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, the hidden target data segment is recovered according to the target communication mark, reversible change of the hidden data segment is achieved, the situation that the operation instruction cannot be executed after the private data segment of the infrequent operation instruction is hidden is avoided, and normal use of all functions of the single chip microcomputer chip is guaranteed.
Example 11:
on the basis of embodiment 7, the method for evaluating the use condition of the storage space according to the execution condition of the operation instruction of the single chip microcomputer chip comprises the following specific steps:
acquiring the current data processing speed of the single chip microcomputer chip and the sizes of a plurality of storage data sections corresponding to the operation instruction, and calculating the response time of the operation instruction of the single chip microcomputer chip according to the following formula;
wherein T represents the response time of the operation instruction of the single chip; t is A Representing the query waiting time of the operation instruction target data segment; l is a radical of an alcohol u Representing the size of the u-th storage data segment corresponding to the operation instruction; n represents the total number of storage data segments corresponding to the operation instruction; delta represents the data compression ratio and the value rangeIs (0.5, 0.8); v represents the current data processing speed of the single chip; theta represents a speed influence factor, and the value range is (0, 0.4);
calculating an operation instruction execution time deviation value of the single chip microcomputer according to the operation instruction response time of the single chip microcomputer chip;
wherein, T 0 The standard response time of the single chip microcomputer chip is represented; rho represents an aging factor, and the value range is (0, 0.1);
and when the execution time deviation value of the operation instruction of the single chip is larger than a preset value, judging that the storage operation of the single chip is overloaded, and sending a storage space cleaning request to a user.
The beneficial effects of the above technical scheme are that: according to the invention, the use condition of the storage space is evaluated according to the execution condition of the operation instruction of the single chip, the response time of the operation instruction of the single chip is firstly calculated, the response time of the operation instruction is compared with the standard response time of the single chip, whether the storage operation of the single chip is overloaded or not is judged, and when the storage operation of the single chip is overloaded, a storage space cleaning request is sent to a user, so that the autonomous monitoring of the storage space is realized, the occupation of an internal memory by irrelevant data is avoided, the internal memory pressure of the chip is favorably reduced, and the response speed of the single chip is improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A data processing method suitable for a single chip microcomputer chip is characterized by comprising the following steps:
step 1: acquiring the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list;
step 2: and after the single chip microcomputer chip receives an operation instruction, target storage data are obtained and operated according to the data storage list, and the operation instruction is executed.
2. The data processing method applicable to the single chip microcomputer chip according to claim 1, wherein the step 1: the method comprises the following steps of obtaining the relevance between data to be stored of a single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, and generating a data storage list, wherein the specific steps comprise:
step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored;
step 102: judging whether the data to be stored have relevance according to the relation tree of the data to be stored;
step 103: when the relevance exists between the data to be stored, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed to the corresponding storage position;
step 104: and generating a data storage list according to the storage result.
3. The data processing method suitable for the single chip microcomputer chip according to claim 2, wherein the step 101: acquiring all data to be stored of the single chip microcomputer chip, and constructing a relation tree of the data to be stored, wherein the specific steps comprise:
acquiring all functions of the single chip microcomputer chip and operation data corresponding to all the functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the single chip microcomputer chip, and acquiring a function generation second mapping relation according to all function realization processes;
determining a final component corresponding to each function according to the second mapping relation, classifying all the functions based on the final components to obtain a function classification group, and adding a name label to the function classification group according to the function classification as a corresponding final component name;
taking the single chip microcomputer chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relationship tree;
and establishing a relation tree of the data to be stored according to the first mapping relation and the functional relation tree.
4. The data processing method applicable to the single chip microcomputer chip as claimed in claim 2, wherein the step 102: judging whether the data to be stored has relevance according to the relation tree of the data to be stored, and the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that no correlation exists among the data to be stored.
5. The data processing method suitable for the single chip microcomputer chip according to claim 2, wherein the step 103: when the data to be stored has relevance, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, the data to be processed is compressed and then placed to the corresponding storage position, and the specific steps comprise:
dividing the storage space of the single chip microcomputer chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the plurality of subspaces;
acquiring to-be-stored data corresponding to all leaf nodes under the same child node as to-be-processed data, acquiring data compiling characteristics of the to-be-processed data, determining similar data segments of the to-be-processed data according to the data compiling characteristics, carrying out first marking on the similar data segments, and simultaneously carrying out second marking on the rest data segments;
dividing the data to be processed into a plurality of data segments according to the first marks and the second marks, respectively determining the data attributes of the data segments according to the marks corresponding to the data segments, and classifying the data segments according to the data attributes to obtain a public data group and a non-public data group;
combining the repeated data segments in the public data group and the non-public data group to obtain the quantity of the non-repeated data segments corresponding to the data to be processed;
according to the quantity of the non-repeated data segments, dividing subspaces corresponding to the child nodes to obtain a plurality of physical storage blocks;
and after data compression processing is carried out on the plurality of data segments, storing the data segments in corresponding physical storage blocks, wherein the size of the physical storage blocks is self-adaptively adjusted according to the size of the data segments.
6. The data processing method suitable for the single chip microcomputer chip according to claim 5, wherein after the data to be processed is divided into a plurality of data segments, the method further comprises:
adding identity codes to the data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding updating on the public data to obtain a public code;
updating the first running sequence according to the public code to obtain a second running sequence;
acquiring a coding rule corresponding to the public code, performing coding replacement on the second mark corresponding code based on the coding rule, and updating the second running sequence according to a coding replacement result to acquire a third running sequence;
and generating a data storage list according to the third running sequence and the function corresponding to all the data to be stored and the operation instruction corresponding to the function, and setting the trigger level of the data storage list as the highest priority level.
7. The data processing method suitable for the single chip microcomputer chip according to claim 1, wherein the step 2: after the single chip receives the operation instruction, obtaining and operating target storage data according to the data storage list, and executing the operation instruction, wherein the specific steps comprise:
step 201: when the single chip receives an operation instruction, automatically decompressing the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third running sequence corresponding to the operation instruction on the data storage list;
step 203: after the target storage data are decompressed, recombining the target storage data according to the third running sequence to generate calling storage data;
step 204: and operating the calling storage data to complete the operation instruction.
8. The data processing method applicable to the single chip microcomputer chip according to claim 1, wherein: after the execution of the operation instruction is completed, the method further comprises the following steps:
the data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the single chip does not receive a new operation instruction continuously within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggering state is recovered.
9. The data processing method suitable for the single chip microcomputer chip according to claim 7, further comprising:
and step 3: generating an operation record after the operation instruction is completed, and hiding the infrequently stored data according to the operation record, wherein the specific steps comprise:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip in a preset time span based on the operation list, and generating a counting list;
when the execution times are larger than the preset times, judging that the operation instruction is a common operation instruction;
when the execution times are less than or equal to the preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third running sequence corresponding to the operation instruction;
determining a private data segment of the uncommon operation instruction according to the third running sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
10. The data processing method suitable for the single chip microcomputer chip according to claim 1, wherein after hiding the target data segment based on the data segment number, further comprising:
acquiring the storage position of a hidden target data segment in the storage space of the single chip microcomputer chip, and generating a hidden data pointer based on the storage position;
acquiring data codes at positions corresponding to the hidden data pointers, comparing the data codes with a data storage list, determining a data relation between the hidden target data segments, combining the hidden data pointers according to the data relation, generating specific pointers, determining hidden operation instructions corresponding to the specific pointers, and establishing a third mapping relation;
meanwhile, according to the data relation, matching the specific pointer with a hidden target data segment to establish a fourth mapping relation;
based on the fourth mapping relation, respectively adding a link mark to the specific pointer and the hidden target data segment;
and when the operation instruction received by the single chip microcomputer chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
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