CN115392468B - Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer - Google Patents

Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer Download PDF

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CN115392468B
CN115392468B CN202110573304.7A CN202110573304A CN115392468B CN 115392468 B CN115392468 B CN 115392468B CN 202110573304 A CN202110573304 A CN 202110573304A CN 115392468 B CN115392468 B CN 115392468B
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qubit
chip
quantum chip
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CN115392468A (en
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孔伟成
李松
杨振权
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Benyuan Quantum Computing Technology Hefei Co ltd
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    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
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    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
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Abstract

The invention discloses a method and a device for regulating and controlling a quantum chip, a quantum measurement and control system and a quantum computer. The control method utilizes the principle of a drive bus, and can drive a plurality of quantum bits simultaneously through one drive bus, so that the quantum bits needing to be operated are in a working state, the quantum bits not needing to be operated are in a non-working state, the mode that a single quantum bit needs to be controlled by a single drive line in the traditional scheme can be effectively avoided, and the number of drive control lines is reduced and the complexity of a system is reduced during large-scale expansion.

Description

Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer
Technical Field
The invention relates to the field of quantum computing, in particular to a quantum chip regulation and control method and device, a quantum measurement and control system and a quantum computer.
Background
Quantum computing is a novel computing mode combining quantum mechanics and computer science, and is computed by regulating and controlling quantum information units according to quantum mechanics rules. The quantum bit formed by microscopic particles is taken as a basic unit, and the quantum bit has the characteristics of quantum superposition, entanglement and the like. Moreover, through the controlled evolution of the quantum state, the quantum computation can realize information coding and computation storage, and has huge information carrying capacity and super-strong parallel computation processing capacity which are incomparable with the classical computation technology.
The implementation of quantum computing relies on quantum chips, which are the core components of a quantum computer, which are equivalent to the traditional computers of CPUs. With the continuous research and advancement of quantum computing related technologies, the number of quantum bits on a quantum chip is also increasing year by year, and it is expected that larger-scale quantum chips will appear later, and at that time, the number of quantum bits in the quantum chip will be greater, and larger-scale quantum chips will be mounted in a quantum computer.
The existing quantum chip is mostly characterized in that a single quantum bit corresponds to a quantum bit frequency control line and a microwave drive control line respectively, the quantum bit frequency control line is used for controlling and adjusting the frequency of the quantum bit, and the microwave drive control line is used for controlling and adjusting the transition excitation of the quantum bit. When the quantum chip needs to be expanded in a large scale, the number of the quantum bit microwave driving control lines can be increased sharply, so that the chip layout scale is larger, the internal signal crosstalk is serious, and even the basic functions of the quantum chip are affected. The number of channels of the corresponding measurement and control system also increases sharply, and the control logic becomes more complex.
Therefore, how to solve the problem of high complexity of large-scale expansion of quantum chips is a urgent need in the art.
It should be noted that the information disclosed in the background section of the present application is only for enhancement of understanding of the general background of the present application and should not be taken as an admission or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a method and a device for regulating and controlling a quantum chip, a quantum measurement and control system and a quantum computer, which are used for solving the problem that the number of quantum bit microwave driving control lines can be rapidly increased when the quantum chip is expanded in a large scale in the prior art.
In order to solve the above technical problems, the present invention provides a method for controlling a quantum chip, including:
determining the quantum chip as a first area needing to perform an operation and a second area not needing to perform the operation;
setting a coupling state between the qubit in the first region and the driving bus to be on, and setting a coupling state between the qubit in the second region and the driving bus to be off;
a steering signal is applied on the drive bus to perform an operation on the qubits within the first region.
Optionally, the setting the coupling state between the qubit in the first region and the driving bus to be on and the coupling state between the qubit in the second region and the driving bus to be off includes:
setting the working point of the quantum bit in the first area at a first degeneracy point to enable the coupling state between the quantum bit in the first area and the driving bus to be opened;
and setting the working point of the quantum bit in the second area at a second degeneracy point so that the coupling state between the quantum bit in the second area and the driving bus is closed.
Optionally, the magnetic flux modulation signal applied by the qubit frequency control line of the qubit is adjusted to bring the working point of the qubit to the first degenerate point and the second degenerate point, respectively.
Optionally, the value of the frequency of the modulating signal is close to the value of the frequency corresponding to the first degenerate point, and the value of the frequency of the modulating signal is far from the value of the frequency corresponding to the second degenerate point.
Optionally, the method further comprises:
acquiring a quantum computing task;
acquiring a regulation signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
Optionally, the dividing the quantum chip into a first area where an operation needs to be performed and a second area where an operation does not need to be performed includes:
determining the qubit corresponding to the first topological structure as the first region;
and determining the quantum bits except for the first topological structure on the quantum chip as the second area.
Optionally, the method further comprises:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
and acquiring a quantum bit regulation signal based on the calibration task.
Optionally, the dividing the quantum chip into a first area where an operation needs to be performed and a second area where an operation does not need to be performed includes:
acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip;
determining a qubit in the quantum chip, in which an abnormality occurs, as the first region based on the state information;
and determining quantum bits in the quantum chip, in which no abnormality occurs, as the second region.
Based on the same inventive concept, the invention also provides a quantum chip regulating device, which comprises:
a first module configured to determine a quantum chip as a first region in which an operation needs to be performed and a second region in which the operation does not need to be performed;
a second module configured to set a coupling state between the qubit and the drive bus in the first region to on and a coupling state between the qubit and the drive bus in the second region to off;
a third module configured to apply a steering signal on the drive bus to perform an operation on the qubits within the first region.
Based on the same inventive concept, the invention also provides a quantum measurement and control system, which comprises the regulation and control device or a regulation and control method using any one of the above characteristic descriptions.
Based on the same inventive concept, the invention also provides a quantum computer, which comprises the quantum measurement and control system.
Based on the same inventive concept, the invention further provides a readable storage medium, on which a computer program is stored, which when executed by a processor can implement the method for regulating and controlling the quantum chip according to any one of the above feature descriptions.
Based on the same inventive concept, the invention also provides a quantum chip, comprising:
a plurality of qubits, the qubits comprising superconducting quantum interference devices, two josephson junctions of the superconducting quantum interference devices having different impedances;
a plurality of drive buses;
a plurality of coupling means, each coupling means for coupling a corresponding one of the qubits to the drive buses, wherein a number of the qubits are coupled to each of the drive buses;
a plurality of qubit frequency control lines, each for controlling the frequency of a corresponding one of the qubits.
Compared with the prior art, the invention has the following beneficial effects:
the method for regulating and controlling the quantum chip comprises the steps of firstly determining the quantum chip as a first area needing to be operated and a second area not needing to be operated, then setting the coupling state between the quantum bit in the first area and a driving bus to be on, setting the coupling state between the quantum bit in the second area and the driving bus to be off, and finally applying a regulating and controlling signal on the driving bus to operate the quantum bit in the first area. According to the regulation and control method, the principle of the drive bus is utilized, a plurality of quantum bits can be driven simultaneously through one drive bus, so that the quantum bits needing to be operated are in a working state, the quantum bits not needing to be operated are in a non-working state, the mode that a single quantum bit needs to be controlled by a single drive line in the traditional scheme can be effectively avoided, the number of drive control lines is reduced during large-scale expansion, and the complexity of a system is reduced.
The invention also provides a regulating device of the quantum chip, a quantum measurement and control system, a quantum computer, a readable storage medium and the quantum chip, which belong to the same conception as the regulating method, so that the regulating device has the same beneficial effects and is not described in detail herein.
Drawings
Fig. 1 is a schematic flow chart of a method for controlling a quantum chip according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a quantum chip according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a qubit according to an embodiment of the present invention;
FIG. 4 is a graph showing the variation of the operating frequency of the qubit of FIG. 3 with the qubit frequency control signal;
wherein, in fig. 2 and 3: 10-drive bus, 20-coupling means, 30-qubit frequency control line, 401-first josephson junction, 402-second josephson junction.
Detailed Description
Specific embodiments of the present invention will be described in more detail below with reference to the drawings. Advantages and features of the invention will become more apparent from the following description and claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
In the description of the present invention, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
Referring to fig. 1, the present embodiment provides a method for adjusting and controlling a quantum chip, including:
s102: determining the quantum chip as a first area needing to perform an operation and a second area not needing to perform the operation;
s104: setting the coupling state between the qubit in the first region and the drive bus 10 to be on, and setting the coupling state between the qubit in the second region and the drive bus 10 to be off;
s106: a steering signal is applied to the drive bus 10 to perform an operation on the qubits in the first region.
The difference from the prior art is that the method for adjusting and controlling a quantum chip according to the present embodiment first determines a first area in which an operation needs to be performed and a second area in which an operation does not need to be performed, then sets a coupling state between a qubit in the first area and a driving bus 10 to be on, sets a coupling state between a qubit in the second area and the driving bus 10 to be off, and finally applies an adjusting and controlling signal on the driving bus 10 to perform an operation on the qubit in the first area. The regulation and control method utilizes the principle of the drive bus 10, and can drive a plurality of quantum bits simultaneously through one drive bus 10, so that the quantum bits needing to be operated are in a working state, the quantum bits not needing to be operated are in a non-working state, the mode that a single quantum bit needs to be controlled by a single drive line in the traditional scheme can be effectively avoided, and the number of drive control lines and the complexity of a system are reduced during large-scale expansion.
Specifically, in the present embodiment, the structure of the quantum chip may refer to fig. 2, assuming that the quantum chip needs to use the qubits q11, q21 and q31 when performing an operation, it is only necessary to adjust the frequencies of the three qubits to a value equal to or close to the frequency of the regulation signal on the drive bus 10 through the qubit frequency control lines 30 of the qubits q11, q21 and q31 by setting the coupling states of the qubits q11, q21 and q31 to the drive bus 10 to on, and to set the coupling states of the remaining qubits on the drive bus 10 to off through the qubit frequency control lines 30 of the remaining qubits, respectively. Based on this, a plurality of qubits are driven simultaneously by one driving bus 10, so that the manner that a single qubit needs to be controlled by a single driving line in the conventional scheme is effectively avoided.
Preferably, the setting the coupling state between the qubit in the first region and the driving bus 10 to be on, and the coupling state between the qubit in the second region and the driving bus 10 to be off, that is, the step S104 includes:
s1041: setting the working point of the qubit in the first area at a first degeneracy point G1, so that the coupling state between the qubit in the first area and the driving bus 10 is opened;
s1042: the working point of the qubit in the second region is set at a second degenerate point G2 so that the coupling state between the qubit in the second region and the drive bus 10 is off.
In this embodiment, the SQUID structure is formed by using an asymmetric josephson structure to realize that a single qubit has two degeneracy points, by setting the working point of the qubit in the first region at a first degeneracy point G1, so that the coupling state between the qubit in the first region and the driving bus 10 is on, and setting the working point of the qubit in the second region at a second degeneracy point G2, so that the coupling state between the qubit in the second region and the driving bus 10 is off. The coupling and uncoupling states of the qubit and the drive bus 10 are controlled to realize the working state and the non-working state of the qubit, and conditions are provided for selectively controlling single or multiple bits by a single drive bus 10. In addition, the first degenerated point G1 and the second degenerated point G2 are insensitive points of the frequency of the quantum bit along with the change of the magnetic flux modulation signal, so that the accuracy of quantum chip regulation and control can be improved, the reliability of the running result of the quantum chip is improved to a certain extent, and the robustness of the quantum chip is improved.
Specifically, the magnetic flux modulation signal applied by the qubit frequency control line 30 of the qubit can be adjusted to bring the working point of the qubit to the first degenerate point G1 and the second degenerate point G2, respectively. Referring to fig. 4, fig. 4 is a plot of a change of a qubit operating frequency with a qubit frequency control signal, where a frequency corresponding to the first degenerate point G1 is f1, a frequency corresponding to the second degenerate point G2 is f2, in this embodiment, the first degenerate point G1 is set as a frequency operating point when a coupling state between a qubit and the driving bus 10 is on, and the second degenerate point G2 is set as a frequency operating point when a coupling state between the qubit and the driving bus 10 is off. It should be understood by those skilled in the art that, in other embodiments, the second degenerate point G2 may be set to be a frequency operating point when the coupling state between the qubit and the driving bus 10 is on, and the first degenerate point G1 may be set to be a frequency operating point when the coupling state between the qubit and the driving bus 10 is off, which is not limited herein, and may be specifically selected according to practical needs.
Optionally, the value of the frequency of the regulating signal is close to the value of the frequency corresponding to the first degenerate point G1, and the value of the frequency of the regulating signal is far from the value of the frequency corresponding to the second degenerate point G2. It will be appreciated that the value of the frequency of the regulation signal is not limited herein, and is specifically selected according to the actual needs.
Further, the regulation method may further include:
acquiring a quantum computing task;
acquiring a regulation signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
Still further, the dividing the quantum chip into a first region in which an operation needs to be performed and a second region in which an operation does not need to be performed includes:
determining the qubit corresponding to the first topological structure as the first region;
and determining the quantum bits except for the first topological structure on the quantum chip as the second area.
Optionally, the method further comprises:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
acquiring a quantum bit regulation signal based on the calibration task;
and acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip.
Optionally, the dividing the quantum chip into a first area where an operation needs to be performed and a second area where an operation does not need to be performed includes:
determining a qubit in the quantum chip, in which an abnormality occurs, as the first region based on the state information;
and determining quantum bits in the quantum chip, in which no abnormality occurs, as the second region.
Based on the same inventive concept, the embodiment also provides a quantum chip regulation device, which comprises:
a first module configured to determine a quantum chip as a first region in which an operation needs to be performed and a second region in which the operation does not need to be performed;
a second module configured to set a coupling state between the qubit in the first region and the drive bus 10 to on and a coupling state between the qubit in the second region and the drive bus 10 to off;
a third module configured to apply a steering signal on the drive bus 10 to perform an operation on the qubits within the first region.
It will be appreciated that the first, second and third modules may be combined in one apparatus or any one of the modules may be split into a plurality of sub-modules or that at least part of the functions of one or more of the first, second and third modules may be combined with at least part of the functions of the other modules and implemented in one functional module. According to embodiments of the invention, at least one of the first module, the second module, and the third module may be implemented at least in part as hardware circuitry, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or any other reasonable way of integrating or packaging circuits, or as hardware or firmware, or as a suitable combination of three implementations of software, hardware, and firmware. Alternatively, at least one of the first module, the second module, and the third module may be at least partially implemented as a computer program module, which when executed by a computer, may perform the functions of the respective module.
Based on the same inventive concept, the embodiment also provides a quantum measurement and control system, which comprises the regulation and control device described by the characteristics, or a regulation and control method using any one of the characteristics.
Based on the same inventive concept, the embodiment also provides a quantum computer, which comprises the quantum measurement and control system.
Based on the same inventive concept, the present embodiment further proposes a readable storage medium having stored thereon a computer program, which when executed by a processor, is capable of implementing the method for controlling a quantum chip according to any of the above-mentioned feature descriptions.
The readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device, such as, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the preceding. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: portable computer disks, hard disks, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static Random Access Memory (SRAM), portable compact disk read-only memory (CD-ROM), digital Versatile Disks (DVD), memory sticks, floppy disks, mechanical coding devices, punch cards or in-groove structures such as punch cards or grooves having instructions stored thereon, and any suitable combination of the foregoing. The computer program described herein may be downloaded from a readable storage medium to a respective computing/processing device or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives the computer program from the network and forwards the computer program for storage in a readable storage medium in the respective computing/processing device. Computer programs for carrying out operations of the present invention may be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, c++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer program may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present invention are implemented by personalizing electronic circuitry, such as programmable logic circuits, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information for a computer program, which can execute computer-readable program instructions.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, systems, and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer programs. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the programs, when executed by the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer programs may also be stored in a readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the readable storage medium storing the computer program includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the computer program which is executed on the computer, other programmable apparatus or other devices implements the functions/acts specified in the flowchart and/or block diagram block or blocks.
Based on the same inventive concept, this embodiment further provides a quantum chip, please refer to fig. 2, the quantum chip includes:
a plurality of qubits, the qubits comprising superconducting quantum interference devices, two josephson junctions of the superconducting quantum interference devices having different impedances;
a number of drive buses 10;
a plurality of coupling means 20, each coupling means 20 being adapted to couple a corresponding one of the qubits to the drive bus 10, wherein a number of the qubits are coupled to each of the drive buses 10;
a plurality of qubit frequency control lines 30, each of said qubit frequency control lines 30 for controlling the frequency of a corresponding one of said qubits.
Referring to fig. 3, fig. 3 is a schematic structural diagram of the qubit, and since the qubit includes a superconducting quantum interference device, the superconducting quantum interference device has an asymmetric structure, and has two josephson junctions, namely a first josephson junction 401 and a second josephson junction 402, the first josephson junction 401 and the second josephson junction 402 have different impedances, i.e. the three-layer structure of the superconducting layer-insulating layer-superconducting layer has different physical parameters, so that the critical currents are different. In fig. 2, Z11, Z12, Z13 and … are respectively a qubit frequency control signal (generally, a magnetic flux modulation signal) of each qubit, please refer to fig. 4, fig. 4 is a plot of a change of a working frequency of a qubit with the qubit frequency control signal shown in fig. 3, on the plot shown in fig. 4, there are two degenerate points of which the frequency is insensitive with the modulation of the qubit frequency control signal, namely, a first degenerate point G1 and a second degenerate point G2, respectively, and in the vicinity of the degenerate points, the change of the qubit frequency control signal has little influence on the change of the frequency, so that it can be ensured that the influence of an error of the change of the qubit frequency control signal on the frequency of the qubit is very weak at this time, and further, the control accuracy of the quantum chip is ensured. It will be appreciated that the coupling means may be a coupling capacitor or a coupling inductor, as well as many other forms of coupling, which are capable of achieving a coupling effect between the drive bus and the qubit.
It should be noted that the number of the driving buses may be one or more, and specifically, the number of the driving buses may be selected according to the number of the qubits in the quantum chip and the actual needs, which is not limited herein.
In the description of the present specification, a description of the terms "one embodiment," "some embodiments," "examples," or "particular examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the invention without departing from the scope of the technical solution of the invention, and the technical solution of the invention is not departing from the scope of the invention.

Claims (12)

1. The method for regulating and controlling the quantum chip is characterized by comprising the following steps of:
determining the quantum chip as a first area needing to perform an operation and a second area not needing to perform the operation;
setting the working point of the quantum bit in the first area at a first degenerate point so that the coupling state between the quantum bit in the first area and the driving bus is opened, and setting the working point of the quantum bit in the second area at a second degenerate point so that the coupling state between the quantum bit in the second area and the driving bus is closed;
a steering signal is applied on the drive bus to perform an operation on the qubits within the first region.
2. The method of claim 1, wherein the operating point of the qubit is at the first degenerate point and the second degenerate point, respectively, by adjusting a magnetic flux modulation signal applied by a qubit frequency control line of the qubit.
3. The method of claim 2, wherein the value of the frequency of the modulating signal is close to the value of the frequency corresponding to the first degenerate point, and the value of the frequency of the modulating signal is far from the value of the frequency corresponding to the second degenerate point.
4. The method of quantum chip regulation and control of claim 1, further comprising:
acquiring a quantum computing task;
acquiring a regulation signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
5. The method for controlling a quantum chip according to claim 4, wherein the dividing the quantum chip into a first region in which an operation is required to be performed and a second region in which the operation is not required to be performed comprises:
determining the qubit corresponding to the first topological structure as the first region;
and determining the quantum bits except for the first topological structure on the quantum chip as the second area.
6. The method of quantum chip regulation and control of claim 1, further comprising:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
and acquiring a quantum bit regulation signal based on the calibration task.
7. The method for controlling a quantum chip according to claim 6, wherein the dividing the quantum chip into a first region in which an operation is required to be performed and a second region in which the operation is not required to be performed comprises:
acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip;
determining a qubit in the quantum chip, in which an abnormality occurs, as the first region based on the state information;
and determining quantum bits in the quantum chip, in which no abnormality occurs, as the second region.
8. A quantum chip regulation and control device, characterized by comprising:
a first module configured to determine a quantum chip as a first region in which an operation needs to be performed and a second region in which the operation does not need to be performed;
a second module configured to set an operating point of the qubit in the first region at a first degenerate point such that a coupling state between the qubit in the first region and the drive bus is on, and set an operating point of the qubit in the second region at a second degenerate point such that a coupling state between the qubit in the second region and the drive bus is off;
a third module configured to apply a steering signal on the drive bus to perform an operation on the qubits within the first region.
9. A quantum measurement and control system comprising a regulating device according to claim 8 or using a regulating method according to any one of claims 1 to 7.
10. A quantum computer comprising the quantum measurement and control system of claim 9.
11. A readable storage medium having stored thereon a computer program, which when executed by a processor is capable of implementing the quantum chip regulation method of any one of claims 1 to 7.
12. A quantum chip for use in the method of any one of claims 1-7, comprising:
a plurality of qubits, the qubits comprising superconducting quantum interference devices, two josephson junctions of the superconducting quantum interference devices having different impedances;
a plurality of drive buses;
a plurality of coupling means, each coupling means for coupling a corresponding one of the qubits to the drive buses, wherein a number of the qubits are coupled to each of the drive buses;
a plurality of qubit frequency control lines, each for controlling the frequency of a corresponding one of the qubits.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1636366A (en) * 2001-09-28 2005-07-06 英特尔公司 Apparatus and method for power efficient line driver
US7613765B1 (en) * 2004-03-26 2009-11-03 D-Wave Systems, Inc. Bus architecture for quantum processing
CN110383485A (en) * 2017-03-07 2019-10-25 国际商业机器公司 The weak adjustable quantum bit of the different transmon coupled based on two

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7898282B2 (en) * 2005-04-26 2011-03-01 D-Wave Systems Inc. Systems, devices, and methods for controllably coupling qubits
US10097143B2 (en) * 2015-06-29 2018-10-09 International Business Machines Corporation Josephson-coupled resonator amplifier (JRA)
US10592814B2 (en) * 2017-12-01 2020-03-17 International Business Machines Corporation Automatic design flow from schematic to layout for superconducting multi-qubit systems
US10599805B2 (en) * 2017-12-01 2020-03-24 International Business Machines Corporation Superconducting quantum circuits layout design verification

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1636366A (en) * 2001-09-28 2005-07-06 英特尔公司 Apparatus and method for power efficient line driver
US7613765B1 (en) * 2004-03-26 2009-11-03 D-Wave Systems, Inc. Bus architecture for quantum processing
CN110383485A (en) * 2017-03-07 2019-10-25 国际商业机器公司 The weak adjustable quantum bit of the different transmon coupled based on two

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
Anti-crosstalk high-fidelity state discrimination for superconducting qubits;Zi-Feng Chen 等;《arXiv:2103.08961v1》;20210316;第1-5页 *
Motional averaging in a superconducting qubit;Jian Li 等;《nature》;20130129;第1-6页 *
张珂.超导量子器件制备及工艺研究.《CNKI学位》.2018,第2018年卷(第02期),全文. *

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