CN115392468A - Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer - Google Patents
Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer Download PDFInfo
- Publication number
- CN115392468A CN115392468A CN202110573304.7A CN202110573304A CN115392468A CN 115392468 A CN115392468 A CN 115392468A CN 202110573304 A CN202110573304 A CN 202110573304A CN 115392468 A CN115392468 A CN 115392468A
- Authority
- CN
- China
- Prior art keywords
- quantum
- region
- qubit
- chip
- quantum chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000005259 measurement Methods 0.000 title claims abstract description 13
- 239000002096 quantum dot Substances 0.000 claims abstract description 111
- 238000010168 coupling process Methods 0.000 claims description 52
- 238000005859 coupling reaction Methods 0.000 claims description 52
- 230000008878 coupling Effects 0.000 claims description 51
- 238000004590 computer program Methods 0.000 claims description 20
- 230000001276 controlling effect Effects 0.000 claims description 14
- 230000001105 regulatory effect Effects 0.000 claims description 9
- 230000002159 abnormal effect Effects 0.000 claims description 6
- 230000005856 abnormality Effects 0.000 claims description 6
- 230000004907 flux Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000005610 quantum mechanics Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Evolutionary Computation (AREA)
- Data Mining & Analysis (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- Computational Mathematics (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Computer Hardware Design (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
The invention discloses a regulation and control method and a regulation and control device of a quantum chip, a quantum measurement and control system and a quantum computer. The regulation and control method utilizes the principle of a driving bus, and can simultaneously drive a plurality of qubits through one driving bus, so that the qubits needing to be operated are in a working state, and the qubits not needing to be operated are in a non-working state, thereby effectively avoiding the mode that a single qubit in the traditional scheme needs to be controlled by a single driving line, reducing the number of driving control lines and the complexity of a system during large-scale expansion.
Description
Technical Field
The invention relates to the field of quantum computing, in particular to a quantum chip regulation and control method, a quantum chip regulation and control device, a quantum measurement and control system and a quantum computer.
Background
Quantum computing is a novel computing mode which combines quantum mechanics and computer science and carries out computing by following quantum mechanics rules and regulating and controlling quantum information units. The quantum bit formed by microscopic particles is used as a basic unit, and has the characteristics of quantum superposition, entanglement and the like. Moreover, through the controlled evolution of quantum states, information coding and computational storage can be realized by quantum computation, and the method has huge information carrying capacity and super-strong parallel computation processing capacity which cannot be compared with a classical computation technology.
The quantum computing is realized by depending on a quantum chip, a quantum computer of the quantum chip is equivalent to a traditional computer of a CPU, and the quantum chip is a core component of the quantum computer. With the continuous research and advance of the quantum computing related technology, the quantum bit number on the quantum chip is also increased year by year, and it is expected that a larger-scale quantum chip will appear subsequently, the quantum bit number in the quantum chip will be more at that time, and the larger-scale quantum chip will be carried in the quantum computer.
Most of the existing quantum chips have a single qubit corresponding to a qubit frequency control line and a microwave drive control line respectively, the qubit frequency control line is used for controlling and adjusting the frequency of the qubit, and the microwave drive control line is used for controlling and adjusting the transition excitation of the qubit. When a quantum chip needs to be expanded in a large scale, the number of quantum bit microwave drive control lines can rise rapidly, so that the chip layout scale is larger, the internal signal crosstalk is serious, and even the basic functions of the quantum chip are affected. The number of corresponding channels of the measurement and control system is also increased sharply, and the control logic becomes more complex.
Therefore, how to solve the problem of high complexity in large-scale expansion of quantum chips becomes an urgent solution in the field.
It is noted that the information disclosed in this background section is only for enhancement of understanding of the general background of the application and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a quantum chip regulation and control method and device, a quantum measurement and control system and a quantum computer, which are used for solving the problem that the number of quantum bit microwave drive control lines is increased sharply when a quantum chip is expanded on a large scale in the prior art.
In order to solve the above technical problems, the present invention provides a method for adjusting and controlling a quantum chip, comprising:
determining the quantum chip as a first area needing to be operated and a second area not needing to be operated;
setting the coupling state between the qubit in the first region and a drive bus to be on, and setting the coupling state between the qubit in the second region and the drive bus to be off;
applying a regulation signal on the drive bus to perform an operation on a qubit within the first region.
Optionally, the setting the coupling state between the qubit in the first region and the drive bus to be on and the setting the coupling state between the qubit in the second region and the drive bus to be off includes:
setting the working point of the qubit in the first region at a first degenerate point so as to enable the coupling state between the qubit in the first region and the drive bus to be on;
and setting the working point of the quantum bit in the second region at a second degenerate point so as to enable the coupling state between the quantum bit in the second region and the drive bus to be closed.
Optionally, the magnetic flux modulation signal applied by the qubit frequency control line of the qubit is adjusted to bring the working points of the qubit in the first and second degenerate points, respectively.
Optionally, a value of the frequency of the control signal is close to a value of the corresponding frequency of the first degenerate point, and a value of the frequency of the control signal is far from a value of the corresponding frequency of the second degenerate point.
Optionally, the method further comprises:
acquiring a quantum computing task;
acquiring a regulation and control signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
Optionally, the dividing the quantum chip into a first region where an operation needs to be performed and a second region where an operation does not need to be performed includes:
determining a qubit corresponding to the first topological structure as the first region;
determining a qubit on the quantum chip other than the first topology as the second region.
Optionally, the method further comprises:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
and acquiring a regulation and control signal of the quantum bit based on the calibration task.
Optionally, the dividing the quantum chip into a first region where an operation needs to be performed and a second region where an operation does not need to be performed includes:
acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip;
determining a qubit in the quantum chip with an abnormality as the first region based on the state information;
and determining the quantum bit without abnormality in the quantum chip as the second region.
Based on the same inventive concept, the invention also provides a regulation and control device of the quantum chip, which comprises:
a first module configured to determine a quantum chip as a first region where an operation needs to be performed and a second region where the operation does not need to be performed;
a second module configured to set a coupling state between a qubit and a drive bus in the first region to on and a coupling state between a qubit and the drive bus in the second region to off;
a third module configured to apply a regulation signal on the drive bus to perform an operation on a qubit within the first region.
Based on the same inventive concept, the invention also provides a quantum measurement and control system, which comprises the regulation and control device as claimed in claim 9, or the regulation and control method using any one of the above characteristic descriptions.
Based on the same inventive concept, the invention also provides a quantum computer which comprises the quantum measurement and control system.
Based on the same inventive concept, the invention further provides a readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, can implement the quantum chip regulation and control method described in any of the above features.
Based on the same inventive concept, the invention also provides a quantum chip, comprising:
a plurality of qubits including a superconducting quantum interference device, two josephson junctions of the superconducting quantum interference device having different impedances;
a plurality of drive buses;
a plurality of coupling devices, each coupling device for coupling a corresponding one of the qubits to the drive bus, wherein a number of the qubits are coupled to each of the drive buses;
a plurality of qubit frequency control lines, each for controlling the frequency of a corresponding one of the qubits.
Compared with the prior art, the invention has the following beneficial effects:
the method for regulating and controlling the quantum chip comprises the steps of firstly determining the quantum chip as a first area needing to be operated and a second area not needing to be operated, then setting the coupling state between the quantum bit in the first area and a driving bus to be on, setting the coupling state between the quantum bit in the second area and the driving bus to be off, and finally applying a regulating and controlling signal on the driving bus to operate the quantum bit in the first area. The regulation and control method utilizes the principle of a driving bus, and can simultaneously drive a plurality of qubits through one driving bus, so that the qubits needing to be operated are in a working state, the qubits not needing to be operated are in a non-working state, the mode that a single driving line is required to control a single qubit in the traditional scheme can be effectively avoided, the number of driving control lines is reduced during large-scale expansion, and the complexity of a system is reduced.
The invention also provides a quantum chip regulation and control device, a quantum measurement and control system, a quantum computer, a readable storage medium and a quantum chip, which belong to the same inventive concept with the regulation and control method, so that the regulation and control device has the same beneficial effects, and the details are not repeated.
Drawings
Fig. 1 is a schematic flow chart of a method for regulating a quantum chip according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a quantum chip according to an embodiment of the present invention;
FIG. 3 is a simplified schematic diagram of a qubit structure according to an embodiment of the present invention;
FIG. 4 is a graph illustrating the variation of the operating frequency of the qubit according to the qubit frequency control signal in FIG. 3;
wherein, in fig. 2 and 3: 10-drive bus, 20-coupling means, 30-qubit frequency control line, 401-first josephson junction, 402-second josephson junction.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Referring to fig. 1, the present embodiment provides a method for adjusting a quantum chip, including:
s102: determining the quantum chip as a first area needing to be operated and a second area not needing to be operated;
s104: setting the coupling state between the qubit in the first region and the drive bus 10 to be on, and setting the coupling state between the qubit in the second region and the drive bus 10 to be off;
s106: a modulation signal is applied on the drive bus 10 to perform an operation on the qubits in the first region.
The difference from the prior art is that, in the regulation method of the quantum chip provided in this embodiment, the quantum chip is first determined as a first region where an operation needs to be performed and a second region where an operation does not need to be performed, then a coupling state between a qubit in the first region and the drive bus 10 is set to be on, a coupling state between a qubit in the second region and the drive bus 10 is set to be off, and finally a regulation signal is applied to the drive bus 10 to perform an operation on a qubit in the first region. The regulation and control method utilizes the principle of the driving bus 10, and can simultaneously drive a plurality of qubits through one driving bus 10, so that the qubits needing to be operated are in a working state, and the qubits not needing to be operated are in a non-working state, thereby effectively avoiding the mode that a single qubit in the traditional scheme needs to be controlled by a single driving line, reducing the number of driving control lines and reducing the complexity of a system during large-scale expansion.
Specifically, in this embodiment, referring to fig. 2, assuming that the qubits q11, q21 and q31 are needed by the quantum chip when performing an operation, it is only necessary to set the coupling states of the qubits q11, q21 and q31 and the drive bus 10 to be on, specifically operate to adjust the frequencies of the three qubits to values equal to or close to the frequency of the modulation signal on the drive bus 10 through the qubit frequency control lines 30 of the qubits q11, q21 and q31, and set the coupling states of the remaining qubits and the drive bus 10 on the drive bus 10 to be off, specifically operate to adjust the frequencies of the qubits to values far from the frequency of the modulation signal on the drive bus 10 through the respective qubit frequency control lines 30 of the remaining qubits. Based on this, a plurality of qubits are driven simultaneously by one drive bus 10, which effectively avoids the way that a single qubit needs a separate drive line for control in the conventional scheme.
Preferably, the setting of the coupling state between the qubit in the first region and the drive bus 10 to be on and the setting of the coupling state between the qubit in the second region and the drive bus 10 to be off, that is, the step S104 includes:
s1041: setting the working point of the qubit in the first region at a first degenerate point G1, so that the coupling state between the qubit in the first region and the drive bus 10 is on;
s1042: and setting the working point of the qubit in the second region at a second degenerate point G2 so as to enable the coupling state between the qubit in the second region and the drive bus 10 to be closed.
In this embodiment, an asymmetric josephson structure is adopted to realize that a single qubit has two degenerate points, by setting the working point of the qubit in the first region at the first degenerate point G1, the coupling state between the qubit in the first region and the drive bus 10 is on, and setting the working point of the qubit in the second region at the second degenerate point G2, the coupling state between the qubit in the second region and the drive bus 10 is off. The coupling and non-coupling states of the qubits and the drive bus 10 are controlled to realize the working state and the non-working state of the qubits, and conditions are provided for selectively controlling a single bit or a plurality of bits for a single drive bus 10. In addition, the first degenerate point G1 and the second degenerate point G2 are insensitive points in which the frequency of the qubit is insensitive to the change of the magnetic flux modulation signal, so that the accuracy of the regulation and control of the quantum chip can be improved, the reliability of the operation result of the quantum chip is improved to a certain extent, and the robustness of the quantum chip is improved.
Specifically, the magnetic flux modulation signal applied by the qubit frequency control line 30 can be adjusted to bring the working points of the qubits to the first degenerate point G1 and the second degenerate point G2, respectively. Referring to fig. 4, fig. 4 is a variation curve of a qubit operating frequency according to a qubit frequency control signal, where a frequency corresponding to the first degenerate point G1 is f1, and a frequency corresponding to the second degenerate point G2 is f2, in this embodiment, the first degenerate point G1 is set as a frequency operating point when a coupling state between a qubit and the drive bus 10 is on, and the second degenerate point G2 is set as a frequency operating point when the coupling state between the qubit and the drive bus 10 is off. It should be understood by those skilled in the art that, in other embodiments, the second degenerate point G2 may also be set as a frequency operating point when the coupling state between the qubit and the drive bus 10 is on, and the first degenerate point G1 is set as a frequency operating point when the coupling state between the qubit and the drive bus 10 is off, which is not limited herein and may be specifically selected according to actual needs.
Optionally, a value of the frequency of the control signal is close to a value of a frequency corresponding to the first degenerate point G1, and a value of the frequency of the control signal is far from a value of a frequency corresponding to the second degenerate point G2. It is to be understood that the value of the frequency of the regulation signal is not limited herein, and is specifically selected according to actual needs.
Further, the regulation and control method can also comprise the following steps:
acquiring a quantum computing task;
acquiring a regulation and control signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
Further, the dividing the quantum chip into a first region where an operation needs to be performed and a second region where an operation does not need to be performed includes:
determining the quantum bit corresponding to the first topological structure as the first area;
determining a qubit on the quantum chip other than the first topology as the second region.
Optionally, the method further comprises:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
acquiring a regulation and control signal of a quantum bit based on the calibration task;
and acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip.
Optionally, the dividing the quantum chip into a first region where an operation needs to be performed and a second region where an operation does not need to be performed includes:
determining a qubit in the quantum chip with an abnormality as the first region based on the state information;
and determining the quantum bit without abnormality in the quantum chip as the second region.
Based on the same inventive concept, the present embodiment further provides a quantum chip regulation and control device, including:
a first module configured to determine a quantum chip as a first region where an operation needs to be performed and a second region where the operation does not need to be performed;
a second module configured to set a coupling state between the qubit in the first region and the drive bus 10 to on, and set a coupling state between the qubit in the second region and the drive bus 10 to off;
a third module configured to apply a regulation signal on the drive bus 10 to perform an operation on a qubit within the first region.
It is understood that the first module, the second module and the third module may be combined and implemented in one device, or any one of the modules may be split into a plurality of sub-modules, or at least part of the functions of one or more of the first module, the second module and the third module may be combined with at least part of the functions of other modules and implemented in one functional module. According to an embodiment of the present invention, at least one of the first module, the second module, and the third module may be implemented at least partially as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in hardware or firmware in any other reasonable manner of integrating or packaging a circuit, or in a suitable combination of three implementations of software, hardware, and firmware. Alternatively, at least one of the first module, the second module, and the third module may be implemented at least in part as a computer program module that, when executed by a computer, may perform the functions of the respective module.
Based on the same inventive concept, the embodiment further provides a quantum measurement and control system, which comprises the regulation and control device described in the above characteristic description, or utilizes the regulation and control method described in any one of the above characteristic descriptions.
Based on the same inventive concept, the embodiment also provides a quantum computer which comprises the quantum measurement and control system.
Based on the same inventive concept, the present embodiment further provides a readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method for regulating and controlling a quantum chip according to any one of the above-mentioned features can be implemented.
The readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device, such as, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. The computer programs described herein may be downloaded from a readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives the computer program from the network and forwards the computer program for storage in a readable storage medium in the respective computing/processing device. Computer programs for carrying out operations of the present invention may be assembly instructions, instruction Set Architecture (ISA) instructions, machine related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer program may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, the electronic circuitry, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), can execute computer-readable program instructions to implement various aspects of the present invention by utilizing state information of a computer program to personalize the electronic circuitry.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, systems and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer programs. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the programs, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a computer program may also be stored in a readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the readable storage medium storing the computer program comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the computer program which executes on the computer, other programmable apparatus or other devices implements the functions/acts specified in the flowchart and/or block diagram block or blocks.
Based on the same inventive concept, the present embodiment further provides a quantum chip, please refer to fig. 2, where the quantum chip includes:
a plurality of qubits including a superconducting quantum interference device, two josephson junctions of the superconducting quantum interference device having different impedances;
a plurality of drive buses 10;
a plurality of coupling devices 20, each coupling device 20 for coupling a corresponding one of the qubits to the drive bus 10, wherein a number of the qubits are coupled to each of the drive buses 10;
a plurality of qubit frequency control lines 30, each of the qubit frequency control lines 30 being for controlling the frequency of a corresponding one of the qubits.
Referring to fig. 3, fig. 3 is a schematic structural diagram of the qubit, in which the qubit includes a superconducting quantum interference device having an asymmetric structure with two josephson junctions, namely a first josephson junction 401 and a second josephson junction 402, and impedances of the first josephson junction 401 and the second josephson junction 402 are different, that is, physical parameters of three-layer structures of superconducting layer-insulating layer-superconducting layer are different, so critical currents thereof are different. Referring to fig. 4, fig. 4 is a graph showing a variation curve of the operating frequency of the qubit along with the qubit frequency control signal shown in fig. 3, where on the graph shown in fig. 4, there are two degenerate points whose frequencies are insensitive to modulation of the qubit frequency control signal, which are respectively a first degenerate point G1 and a second degenerate point G2, and near the degenerate points, the variation of the qubit frequency control signal has little influence on the variation of the frequency, so that it can be ensured that an error of the variation of the qubit frequency control signal has a very weak influence on the frequency of the qubit, thereby ensuring the control accuracy of the quantum chip. It will be appreciated that the coupling means may be a coupling capacitor or a coupling inductor, and that there are many other forms of coupling that can achieve the coupling effect between the drive bus and the qubit.
It should be noted that the number of the driving buses may be one or multiple, and specifically needs to be selected according to the number of quantum bits in the quantum chip and the actual needs, and is not limited herein.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example" or "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (13)
1. A regulation and control method of a quantum chip is characterized by comprising the following steps:
determining the quantum chip as a first area needing to be operated and a second area not needing to be operated;
setting the coupling state between the qubit in the first region and a drive bus to be on, and setting the coupling state between the qubit in the second region and the drive bus to be off;
applying a regulation signal on the drive bus to perform an operation on a qubit within the first region.
2. The method for controlling the quantum chip according to claim 1, wherein the setting of the coupling state between the qubit in the first region and the driving bus to be on and the setting of the coupling state between the qubit in the second region and the driving bus to be off comprises:
setting the working point of the quantum bit in the first region at a first degenerate point so as to enable the coupling state between the quantum bit in the first region and the drive bus to be on;
and setting the working point of the qubit in the second region at a second degenerate point so as to enable the coupling state between the qubit in the second region and the drive bus to be closed.
3. The quantum chip regulation method of claim 2, wherein the magnetic flux modulation signal applied by the qubit frequency control line of the qubit is adjusted so that the working points of the qubit are at the first degenerate point and the second degenerate point, respectively.
4. A method as claimed in claim 3, wherein the frequency of the modulation signal has a value close to the value corresponding to the frequency of the first degenerated point and a value far from the value corresponding to the frequency of the second degenerated point.
5. The method for regulating a quantum chip of claim 1, further comprising:
acquiring a quantum computing task;
acquiring a regulation and control signal of a quantum bit based on the quantum computing task;
and acquiring a first topological structure based on the quantum computing task, wherein the first topological structure is a topological structure corresponding to quantum bits required by the quantum computing task.
6. The method for regulating and controlling the quantum chip as claimed in claim 5, wherein the dividing the quantum chip into a first region where an operation is required to be performed and a second region where an operation is not required to be performed comprises:
determining the quantum bit corresponding to the first topological structure as the first area;
determining a qubit on the quantum chip other than the first topology as the second region.
7. The method for regulating a quantum chip of claim 1, further comprising:
acquiring a calibration task, wherein the calibration task is used for performing calibration operation on abnormal quantum bits;
and acquiring a regulation and control signal of the quantum bit based on the calibration task.
8. The method for regulating and controlling the quantum chip as claimed in claim 7, wherein the dividing the quantum chip into a first region where an operation is required to be performed and a second region where an operation is not required to be performed comprises:
acquiring state information of the quantum chip, wherein the state information comprises information of abnormal quantum bits in the quantum chip;
determining a qubit in the quantum chip with an abnormality as the first region based on the state information;
and determining the quantum bit without abnormality in the quantum chip as the second region.
9. A regulation and control device of quantum chip is characterized by comprising:
a first module configured to determine a quantum chip as a first region where an operation needs to be performed and a second region where the operation does not need to be performed;
a second module configured to set a coupling state between a qubit and a drive bus in the first region to on and a coupling state between a qubit and the drive bus in the second region to off;
a third module configured to apply a regulation signal on the drive bus to perform an operation on a qubit within the first region.
10. A quantum measurement and control system comprising the control device according to claim 9 or using the control method according to any one of claims 1 to 8.
11. A quantum computer comprising the quantum measurement and control system of claim 10.
12. A readable storage medium on which a computer program is stored, wherein the computer program, when executed by a processor, is capable of implementing the method of quantum chip manipulation according to any one of claims 1 to 8.
13. A quantum chip, comprising:
a plurality of qubits including a superconducting quantum interference device, two josephson junctions of the superconducting quantum interference device having different impedances;
a plurality of drive buses;
a plurality of coupling devices, each coupling device for coupling a corresponding one of the qubits to the drive bus, wherein a number of the qubits are coupled to each of the drive buses;
a plurality of qubit frequency control lines, each for controlling the frequency of a corresponding one of the qubits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110573304.7A CN115392468B (en) | 2021-05-25 | 2021-05-25 | Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110573304.7A CN115392468B (en) | 2021-05-25 | 2021-05-25 | Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115392468A true CN115392468A (en) | 2022-11-25 |
| CN115392468B CN115392468B (en) | 2024-04-05 |
Family
ID=84114805
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110573304.7A Active CN115392468B (en) | 2021-05-25 | 2021-05-25 | Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115392468B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1636366A (en) * | 2001-09-28 | 2005-07-06 | 英特尔公司 | Apparatus and method for power efficient line driver |
| US7613765B1 (en) * | 2004-03-26 | 2009-11-03 | D-Wave Systems, Inc. | Bus architecture for quantum processing |
| US20100148853A1 (en) * | 2005-04-26 | 2010-06-17 | Harris Richard G | Systems, devices, and methods for controllably coupling qubits |
| US20170085231A1 (en) * | 2015-06-29 | 2017-03-23 | International Business Machines Corporation | Josephson-coupled resonator amplifier (jra) |
| US20190171784A1 (en) * | 2017-12-01 | 2019-06-06 | International Business Machines Corporation | Superconducting quantum circuits layout design verification |
| US20190171973A1 (en) * | 2017-12-01 | 2019-06-06 | International Business Machines Corporation | Automatic design flow from schematic to layout for superconducting multi-qubit systems |
| CN110383485A (en) * | 2017-03-07 | 2019-10-25 | 国际商业机器公司 | The weak adjustable quantum bit of the different transmon coupled based on two |
-
2021
- 2021-05-25 CN CN202110573304.7A patent/CN115392468B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1636366A (en) * | 2001-09-28 | 2005-07-06 | 英特尔公司 | Apparatus and method for power efficient line driver |
| US7613765B1 (en) * | 2004-03-26 | 2009-11-03 | D-Wave Systems, Inc. | Bus architecture for quantum processing |
| US20100148853A1 (en) * | 2005-04-26 | 2010-06-17 | Harris Richard G | Systems, devices, and methods for controllably coupling qubits |
| US20170085231A1 (en) * | 2015-06-29 | 2017-03-23 | International Business Machines Corporation | Josephson-coupled resonator amplifier (jra) |
| CN110383485A (en) * | 2017-03-07 | 2019-10-25 | 国际商业机器公司 | The weak adjustable quantum bit of the different transmon coupled based on two |
| US20190171784A1 (en) * | 2017-12-01 | 2019-06-06 | International Business Machines Corporation | Superconducting quantum circuits layout design verification |
| US20190171973A1 (en) * | 2017-12-01 | 2019-06-06 | International Business Machines Corporation | Automatic design flow from schematic to layout for superconducting multi-qubit systems |
Non-Patent Citations (2)
| Title |
|---|
| JIAN LI 等: "Motional averaging in a superconducting qubit", 《NATURE》, 29 January 2013 (2013-01-29), pages 1 - 6 * |
| ZI-FENG CHEN 等: "Anti-crosstalk high-fidelity state discrimination for superconducting qubits", 《ARXIV:2103.08961V1》, 16 March 2021 (2021-03-16), pages 1 - 5 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115392468B (en) | 2024-04-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11048839B2 (en) | Adaptive error correction in quantum computing | |
| US9705773B2 (en) | Parallelized network traffic flow availability simulation using stochastic process and traffic engineering algorithms | |
| JP7442515B2 (en) | Noise and calibration adaptive compilation of quantum programs | |
| CN112668722B (en) | Quantum circuit processing method, device, equipment, storage medium and product | |
| JP7315684B2 (en) | Quantum Algorithm Verification and Estimation of Quantum Algorithm Execution Time | |
| US20220366291A1 (en) | Methods and apparatuses for parameter optimization and quantum chip control | |
| US20040266084A1 (en) | Semiconductor calculation device | |
| Mao | Representing attribute reduction and concepts in concept lattice using graphs | |
| Turpin et al. | An approximation algorithm for time optimal multi-robot routing | |
| US8577717B2 (en) | Method and system for predicting shrinkable yield for business assessment of integrated circuit design shrink | |
| CN115392468A (en) | Quantum chip regulation and control method and device, quantum measurement and control system and quantum computer | |
| JP7320065B2 (en) | Compiling quantum algorithms | |
| Dahn et al. | A fixed-parameter algorithm for the Max-Cut problem on embedded 1-planar graphs | |
| Consolini et al. | Graph-based algorithms for the efficient solution of optimization problems involving monotone functions | |
| Thabet et al. | Real‐time fault‐voltage estimation for nonlinear dynamic power systems | |
| Stevens et al. | Automating quantum experiment control: From circuit compilation to ion routing | |
| CN114492813B (en) | Quantum circuit processing method, quantum circuit processing circuit, computing equipment, quantum circuit processing device and storage medium | |
| US20180107778A1 (en) | Global routing in circuit design | |
| US20230186132A1 (en) | CONTROL CIRCUIT COMPRISING SYMMETRIC ASYMMETRIC THREADED SUPERCONDUCTING QUANTUM INTERFERENCE DEVICES (SYMMETRIC ATSs) | |
| WO2023221680A1 (en) | Quantum state preparation circuit generation and quantum state preparation methods and apparatuses, and quantum chip | |
| Dghais et al. | Real Time Modelling and Processing | |
| Uddin et al. | Finding, Counting, and Highlighting all Triangles in Large Graphs | |
| US20230194594A1 (en) | Method of generating device model and computing device performing the same | |
| US20240070520A1 (en) | Federated automatic machine learning | |
| Zhang | On Several Properties of A Class of Hybrid Recursive Trees |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, Hefei high tech Zone, Hefei City, Anhui Province Applicant after: Benyuan Quantum Computing Technology (Hefei) Co.,Ltd. Address before: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, Hefei high tech Zone, Hefei City, Anhui Province Applicant before: ORIGIN QUANTUM COMPUTING COMPANY, LIMITED, HEFEI |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |