CN115389808B - Current detection circuit and buck converter - Google Patents
Current detection circuit and buck converter Download PDFInfo
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- CN115389808B CN115389808B CN202211343382.9A CN202211343382A CN115389808B CN 115389808 B CN115389808 B CN 115389808B CN 202211343382 A CN202211343382 A CN 202211343382A CN 115389808 B CN115389808 B CN 115389808B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/003—Measuring mean values of current or voltage during a given time interval
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The application is suitable for the technical field of power electronics, and provides a current detection circuit and a buck converter. A control module in the current detection circuit receives a first current signal and a first voltage signal and outputs a first control signal according to the first current signal and the first voltage signal, wherein the first current signal is a current signal flowing through a first switching tube in the buck converter; the pulse generation module receives a first control signal and a second control signal and outputs a first pulse signal and a second pulse signal according to the first control signal and the second control signal; the signal output module adjusts the first voltage signal according to the first pulse signal and the second pulse signal, and when the current signal corresponding to the first voltage signal is located at the midpoint position of the first current signal in the switching-on period of the first switching tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter. The current detection circuit solves the problem that the current detection precision of the inductive current detection circuit is low in the prior art.
Description
Technical Field
The application belongs to the technical field of power electronics, and particularly relates to a current detection circuit and a buck converter.
Background
The dc buck converter is most widely used in power supply technology, and its operating principle is to convert the dc input voltage into a lower voltage output by controlling the on and off of the power device in the dc buck converter through the driving circuit. In some applications, such as: in the case of an in-vehicle charger, a mobile phone charger, a battery charger, and the like, the output current of the dc down-converter needs to be accurately limited, and the output current needs to be detected in order to limit or adjust the output current of the dc down-converter. In the dc buck converter, the inductor current is the output current, so it is only necessary to detect the inductor current. The existing inductive current detection circuit detects current through an upper tube and a lower tube in a power device, and finally synthesizes the detected current to obtain inductive current. However, the inductance current detection circuit has low detection accuracy, and the main reasons are that the detection gains of the upper tube and the lower tube are matched to be consistent, no output current exists in the dead zone period of the upper tube and the lower tube, and the requirement on response time is high.
Disclosure of Invention
The embodiment of the application provides a current detection circuit and a buck converter, and can solve the problem that in the prior art, the current detection precision of an inductive current detection circuit is low.
In a first aspect, an embodiment of the present application provides a current detection circuit, which includes a control module, a pulse generation module, and a signal output module; the control module is respectively and electrically connected with the pulse generation module and the signal output module, the pulse generation module is electrically connected with the signal output module, and the control module and the pulse generation module are both used for being electrically connected with the buck converter;
the control module is used for receiving a first current signal and a first voltage signal and outputting a first control signal according to the first current signal and the first voltage signal, wherein the first current signal is a current signal flowing through a first switch tube in the buck converter, and the first voltage signal is a voltage signal output by the signal output module; the pulse generation module is used for receiving the first control signal and the second control signal and outputting a first pulse signal and a second pulse signal according to the first control signal and the second control signal, wherein the second control signal is a driving signal of the first switching tube or a voltage signal at a switching node in the buck converter; the signal output module is used for receiving the first pulse signal and the second pulse signal, adjusting the first voltage signal according to the first pulse signal and the second pulse signal, and when the current signal corresponding to the first voltage signal is at the midpoint position of the first current signal in the turn-on period of the first switch tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter.
In one possible implementation manner of the first aspect, the control module includes a sampling unit, a first resistor, and a first comparator;
the sampling unit is connected in series between the source electrode of the first switching tube and a switching node in the buck converter, the sampling unit is also respectively electrically connected with a first end of the first resistor and a negative input end of the first comparator, a second end of the first resistor is grounded, a positive input end of the first comparator is electrically connected with the signal output module, and an output end of the first comparator is electrically connected with the pulse generation module;
the sampling unit is used for receiving the first current signal, sampling the first current signal and outputting a second current signal, and the sampling ratio of the second current signal to the first current signal is 1/N 1 ，N 1 >1; the first resistor is used for generating a second voltage signal according to the second current signal; the first comparator is used for receiving the second voltage signal and the first voltage signal, comparing the second voltage signal with the first voltage signal and outputting the first control signal.
In a possible implementation manner of the first aspect, the control module includes an operational amplifier, a third switching tube, a fourth switching tube, a second resistor, and a second comparator;
the drain electrode of the third switching tube is electrically connected with the drain electrode of the first switching tube, the grid electrode of the third switching tube is electrically connected with the grid electrode of the first switching tube, the source electrode of the third switching tube is respectively electrically connected with the drain electrode of the fourth switching tube and the negative input end of the second comparator, and the source electrode of the fourth switching tube is respectively electrically connected with the negative input end of the operational amplifier and the negative input end of the second comparatorA first end of a second resistor is electrically connected, a positive input end of the operational amplifier is electrically connected with the signal output module, an output end of the operational amplifier is electrically connected with a grid electrode of the fourth switching tube, a second end of the second resistor is grounded, a positive input end of the second comparator is electrically connected with a source electrode of the first switching tube, and an output end of the second comparator is electrically connected with the pulse generation module; wherein the size of the first switch tube is N of the third switch tube 2 Multiple, N 2 >1；
The positive input end of the operational amplifier is used for receiving the first voltage signal, so that the voltage signal at the first end of the second resistor is the first voltage signal; the second resistor is used for generating a third current signal according to the first voltage signal; the second comparator is configured to receive the third current signal and the first current signal, compare the third current signal and the first current signal, and output the first control signal.
In a possible implementation manner of the first aspect, the pulse generation module includes a first and gate, a first not gate, and a second and gate;
a first input end of the first and gate is electrically connected with the control module and is used for receiving the first control signal, a second input end of the first and gate is used for receiving the second control signal, an output end of the first and gate is respectively electrically connected with an input end of the first not gate and the signal output module, and an output end of the first and gate is used for outputting the first pulse signal; the output end of the first NOT gate is electrically connected with the first input end of the second AND gate, the second input end of the second AND gate is used for receiving the second control signal, and the output end of the second AND gate is electrically connected with the signal output module and used for outputting the second pulse signal.
In a possible implementation manner of the first aspect, the pulse generation module includes a third and gate, a second not gate, and a fourth and gate;
the first input end of the third AND gate and the input end of the second NOT gate are electrically connected with the control module and used for receiving the first control signal, the second input end of the third AND gate is used for receiving the second control signal, and the output end of the third AND gate is electrically connected with the signal output module and used for outputting the first pulse signal; the output end of the second not gate is electrically connected with the first input end of the fourth and gate, the second input end of the fourth and gate is used for receiving the second control signal, and the output end of the fourth and gate is electrically connected with the signal output module and used for outputting the second pulse signal.
In a possible implementation manner of the first aspect, the pulse generation module includes a fifth and gate; the first input end of the fifth and gate is electrically connected with the control module and used for receiving the first control signal, the second input end of the fifth and gate is used for receiving the second control signal, the second input end of the fifth and gate is also electrically connected with the signal output module and used for providing the second pulse signal, and the output end of the fifth and gate is electrically connected with the signal output module and used for outputting the first pulse signal.
In a possible implementation manner of the first aspect, the signal output module includes a first current source, a fifth switching tube, a second current source, a sixth switching tube, and a first capacitor;
the positive pole of first current source receives first voltage, the negative pole of first current source with the first end electricity that switches on of fifth switch tube is connected, the control end of fifth switch tube with pulse generation module electricity is connected, is used for receiving first pulse signal, the second of fifth switch tube switches on the end respectively with the positive pole of second current source with the first end electricity of first electric capacity is connected, the first end of first electric capacity is used for exporting first voltage signal, the second end ground connection of first electric capacity, the negative pole of second current source with the first end electricity that switches on of sixth switch tube is connected, the control end of sixth switch tube with pulse generation module electricity is connected, is used for receiving second pulse signal, the second end ground connection of sixth switch tube.
In a possible implementation manner of the first aspect, the current provided by the first current source is equal in magnitude and same in direction as the current provided by the second current source.
In a possible implementation manner of the first aspect, the current provided by the first current source is twice the current provided by the second current source, and the current provided by the first current source is in the same direction as the current provided by the second current source.
In a second aspect, an embodiment of the present application provides a buck converter, including the current detection circuit of any one of the first aspects.
Compared with the prior art, the embodiment of the application has the advantages that:
the embodiment of the application provides a current detection circuit, which comprises a control module, a pulse generation module and a signal output module. The control module is used for receiving the first current signal and the first voltage signal and outputting a first control signal according to the first current signal and the first voltage signal. The first current signal is a current signal flowing through a first switching tube in the buck converter, and the first voltage signal is a voltage signal output by the signal output module. The pulse generation module is used for receiving the first control signal and the second control signal and outputting a first pulse signal and a second pulse signal according to the first control signal and the second control signal. The second control signal is a driving signal of the first switching tube or a voltage signal at a switching node in the buck converter. The signal output module is used for receiving the first pulse signal and the second pulse signal, adjusting the first voltage signal according to the first pulse signal and the second pulse signal, and when the current signal corresponding to the first voltage signal is at the midpoint position of the first current signal in the turning-on period of the first switch tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter.
Therefore, the current detection circuit provided by the embodiment of the application generates an average current signal flowing through the inductor by using a current signal flowing through the first switch tube, wherein the first switch tube is equivalent to an upper tube in the inductive current detection circuit in the prior art, so that the problem that the inductive current detection circuit in the prior art needs the detection gain matching of the upper tube and a lower tube to be consistent is avoided, the opening dead zone of the upper tube and the lower tube is avoided, and the current detection precision is improved. In addition, the current detection circuit provided by the embodiment of the application can automatically realize sampling of the midpoint of the current signal flowing through the first switch tube, namely when the current signal corresponding to the first voltage signal is at the midpoint position of the first current signal in the switching-on period of the first switch tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter.
It is to be understood that, the beneficial effects of the second aspect may refer to the relevant description in the first aspect, and are not described herein again.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a current detection circuit according to an embodiment of the present application;
FIG. 2 is a circuit topology suitable for a buck converter;
FIG. 3 is a circuit diagram of a current detection circuit according to another embodiment of the present application;
FIG. 4 is a schematic diagram of an operating waveform of the current sensing circuit shown in FIG. 3;
FIG. 5 is a schematic circuit diagram of a current detection circuit according to another embodiment of the present application;
FIG. 6 is a schematic circuit diagram of a current detection circuit according to another embodiment of the present application;
FIG. 7 is a schematic circuit diagram of a current sensing circuit according to another embodiment of the present application;
FIG. 8 is a schematic diagram of the operating waveforms of the current sensing circuit shown in FIG. 7;
FIG. 9 is a schematic circuit diagram of a current sensing circuit according to another embodiment of the present application;
FIG. 10 is a waveform diagram illustrating the operation of the current sensing circuit shown in FIG. 9;
FIG. 11 is a circuit diagram of a current detection circuit according to another embodiment of the present application;
fig. 12 is a schematic diagram of a buck converter according to another embodiment of the present application.
In the figure: 10. a current detection circuit; 100. a control module; 101. a sampling unit; 200. a pulse generation module; 300. a signal output module; 20. a buck converter.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in the specification of this application and the appended claims, the term "if" may be interpreted contextually as "when 8230that is," or "once" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing a relative importance or importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
As shown in fig. 1, the present embodiment provides a current detection circuit 10, which includes a control module 100, a pulse generation module 200, and a signal output module 300. The control module 100 is electrically connected to the pulse generating module 200 and the signal output module 300, respectively, the pulse generating module 200 is electrically connected to the signal output module 300, and both the control module 100 and the pulse generating module 200 are electrically connected to the buck converter 20.
Specifically, the control module 100 is configured to receive a first current signal and a first voltage signal, and output a first control signal according to the first current signal and the first voltage signal. The first current signal is a current signal flowing through a first switch in the buck converter 20. The first voltage signal is a voltage signal output by the signal output module 300. The pulse generating module 200 is configured to receive the first control signal and the second control signal, and output the first pulse signal and the second pulse signal according to the first control signal and the second control signal. The second control signal is a driving signal of the first switching tube or a voltage signal at a switching node in the buck converter 20. The signal output module 300 is configured to receive the first pulse signal and the second pulse signal, adjust the first voltage signal according to the first pulse signal and the second pulse signal, and when a current signal corresponding to the first voltage signal is located at a midpoint position of the first current signal during the turn-on period of the first switch tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter 20.
From the above, the current detection circuit 10 provided in the embodiment of the present application generates an average current signal flowing through the inductor according to the current signal flowing through the first switch tube, where the first switch tube is equivalent to the upper tube in the inductive current detection circuit in the prior art, so that the problem that the inductive current detection circuit in the prior art needs the detection gain of the upper tube and the detection gain of the lower tube to be matched consistently is avoided, the open dead zone of the upper tube and the lower tube is avoided, and the current detection precision is improved. In addition, the current detection circuit 10 provided in the embodiment of the present application can automatically realize sampling of the midpoint of the current signal flowing through the first switching tube, that is, when the current signal corresponding to the first voltage signal is at the midpoint of the first current signal during the turn-on period of the first switching tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter 20.
It should be noted that the buck converter 20 is suitable for the topology shown in fig. 2, where the topology shown in (a) in fig. 2 is composed of the first switching tube Q1, the second switching tube Q2 and the inductor L. The topology shown in fig. 2 (a) is a topology to which the inductor current detection circuit in the prior art is applicable, and the inductor current detection circuit in the prior art is only applicable to the topology shown in fig. 2 (a), which is easily limited by the topology. The first switch tube Q1 is equivalent to an upper tube in an inductor current detection circuit in the prior art, and the second switch tube Q2 is equivalent to a lower tube in an inductor current detection circuit in the prior art. The topology shown in (b) of fig. 2 is composed of a first switching tube Q1, a diode D1, and an inductor L. The first switch tube Q1 is an NMOS tube or a PMOS tube, and the first switch tube Q1 is an NMOS tube for example, and the second switch tube Q2 is an NMOS tube for explanation. When the buck converter 20 is applied to the topology shown in (a) of fig. 2, the switching node in the buck converter 20 is a connection node between the first switching tube Q1 and the inductor L and the second switching tube Q2. When the buck converter 20 is applied to the topology shown in fig. 2 (b), the switching node in the buck converter 20 is a connection node between the first switching transistor Q1 and the inductor L and the diode D1. When the circuit connection structure of the current detection circuit 10 is described in detail, the present application will explain an example in which the step-down converter 20 is applied to the topology shown in fig. 2 (a).
As shown in fig. 3, 5 and 6, the control module 100 includes a sampling unit 101, a first resistor R1 and a first comparator Com1. The sampling unit 101 is connected in series between the source of the first switching tube Q1 and the switching node in the buck converter 20, the sampling unit 101 is further electrically connected to the first end of the first resistor R1 and the negative input end of the first comparator Com1, the second end of the first resistor R1 is grounded, the positive input end of the first comparator Com1 is electrically connected to the signal output module 300, and the output end of the first comparator Com1 is electrically connected to the pulse generation module 200.
Specifically, the sampling unit 101 is configured to receive a first current signal, sample the first current signal, and output a second current signal. Wherein the sampling ratio of the second current signal to the first current signal is 1/N 1 ，N 1 >1. The first resistor R1 is used for generating a second voltage signal according to the second current signal. The first comparator Com1 is configured to receive the second voltage signal and the first voltage signal Vcs, compare the second voltage signal and the first voltage signal Vcs, and output a first control signal a.
It should be noted that the sampling unit 101 has a plurality of sampling modes, and may adopt a current transformer, a current detection resistor, or a MOSFET shunt, etc., and the present application is not limited thereto, and aims to linearly extract a current signal flowing through the first switching tube Q1.
As shown in fig. 7, 9 and 11, the control module 100 includes an operational amplifier EA, a third switching tube Q3, a fourth switching tube Q4, a second resistor R2 and a second comparator Com2. The drain of the third switch tube Q3 is electrically connected to the drain of the first switch tube Q1, the gate of the third switch tube Q3 is electrically connected to the gate of the first switch tube Q1, the source of the third switch tube Q3 is electrically connected to the drain of the fourth switch tube Q4 and the negative input terminal of the second comparator Com2, the source of the fourth switch tube Q4 is electrically connected to the negative input terminal of the operational amplifier EA and the first end of the second resistor R2, the positive input terminal of the operational amplifier EA is electrically connected to the signal output module 300 for receiving the first voltage signal Vcs output by the signal output module 300, the output terminal of the operational amplifier EA is electrically connected to the gate of the fourth switch tube Q4, the second end of the second resistor R2 is grounded, the positive input terminal of the second comparator Com2 is electrically connected to the source of the first switch tube Q1, and the output terminal of the second comparator Com2 is electrically connected to the pulse generation module 200. The size of the first switch tube Q1 is N of the third switch tube Q3 2 Multiple, N 2 >1。
Specifically, the positive input end of the operational amplifier EA is configured to receive a first voltage signal Vcs, and based on the effect of the operational amplifier EA, when the system is stable in a closed loop, the operational amplifier EA controls the fourth switching tube Q4 to be in linear conduction, so that the voltage signal Vref at the first end of the second resistor R2 is approximately equal to the first voltage signal Vcs. The second resistor R2 generates a third current signal according to the voltage signal Vref (i.e., the first voltage signal Vcs), and the third current signal flows through the third transistor Q3 and generates a voltage difference between the drain and the source of the third transistor Q3. The current signal flowing through the first switch tube Q1, i.e. the first current signal, also generates a voltage difference on the first switch tube Q1, since the magnitude of the first switch tube Q1 is N of the third switch tube Q3 2 Therefore, the second comparator Com2 substantially flows the current signal (third current signal) flowing through the third switch tube Q3 and the current signal flowing through the first switch tubeThe current signal (the first current signal) of Q1 is compared, that is, the second comparator Com2 is used for comparing the third current signal with the first current signal and outputting the first control signal a.
In addition, N is 2 Generally, the size of the third switch tube Q3 is larger than 1000 and even more than 10000, that is, the size of the third switch tube Q3 is negligible compared with that of the first switch tube Q1, so the cost thereof is also negligible. The size of the first switch tube Q1 is N of the third switch tube Q3 2 The third current signal is 1/N of the first current signal 2 Therefore, the power loss caused by the current detection circuit can be ignored.
As shown in fig. 3 and 7, the pulse generation module 200 includes a first and gate Y1, a first not gate F1, and a second and gate Y2. A first input end of the first and gate Y1 is electrically connected to the control module 100 and configured to receive the first control signal a, a second input end of the first and gate Y1 is configured to receive the second control signal SW or Q1_ G, where SW represents a voltage signal at a switch node in the buck converter 20, Q1_ G represents a driving signal of the first switch Q1, an output end of the first and gate Y1 is electrically connected to an input end of the first not gate F1 and the signal output module 300, respectively, and an output end of the first and gate Y1 is configured to output the first pulse signal SA. The output end of the first not gate F1 is electrically connected to the first input end of the second and gate Y2, the second input end of the second and gate Y2 is configured to receive the second control signal SW or Q1_ G, and the output end of the second and gate Y2 is electrically connected to the signal output module 300 and configured to output the second pulse signal SB.
Specifically, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the first and gate Y1. The first pulse signal SA generates a pulse signal after passing through the first NOT gate F1
Of pulse signals
And the second control signal SW or Q1_ G generates the second pulse signal SB through the second and gate Y2.
As shown in fig. 5 and 11, the pulse generating module 200 includes a third and gate Y3, a second not gate F2, and a fourth and gate F4. A first input end of the third and gate Y3 and an input end of the second not gate F2 are electrically connected to the control module 100, and are configured to receive the first control signal a, a second input end of the third and gate F3 is configured to receive the second control signal SW or Q1_ G, and an output end of the third and gate Y3 is electrically connected to the signal output module 300, and is configured to output the first pulse signal SA. The output end of the second not gate F2 is electrically connected to the first input end of the fourth and gate Y4, the second input end of the fourth and gate Y4 is configured to receive the second control signal SW or Q1_ G, and the output end of the fourth and gate Y4 is electrically connected to the signal output module 300 and configured to output the second pulse signal SB.
Specifically, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the third and gate Y3, and the first control signal a generates the control signal SA through the second not gate F2
Control signal
And the second control signal SW or Q1_ G generates the second pulse signal SB through the fourth and gate Y4.
As shown in fig. 6 and 9, the pulse generating module 200 includes a fifth and gate Y5. A first input terminal of the fifth and gate Y5 is electrically connected to the control module 100 and configured to receive the first control signal a, a second input terminal of the fifth and gate Y5 is configured to receive the second control signal SW or Q1_ G, a second input terminal of the fifth and gate Y5 is further electrically connected to the signal output module 300 and configured to provide the second pulse signal SB, and an output terminal of the fifth and gate Y5 is electrically connected to the signal output module 300 and configured to output the first pulse signal SA.
Specifically, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the fifth and gate Y5. Wherein the second control signal SW or Q1_ G directly serves as the second pulse signal SB.
As shown in fig. 3, 5, 6, 7, 9 and 11, the signal output module 300 includes a first current source I1, a fifth switch tube Q5, a second current source I2, a sixth switch tube Q6 and a first capacitor C1. The positive electrode of the first current source I1 receives the first voltage VCC, the negative electrode of the first current source I1 is electrically connected to the first conduction end of the fifth switch tube Q5, the control end of the fifth switch tube Q5 is electrically connected to the pulse generating module 200 and is configured to receive the first pulse signal SA, the second conduction end of the fifth switch tube Q5 is electrically connected to the positive electrode of the second current source I2 and the first end of the first capacitor C1, the first end of the first capacitor C1 is configured to output the first voltage signal Vcs, the second end of the first capacitor C1 is grounded, the negative electrode of the second current source I2 is electrically connected to the first conduction end of the sixth switch tube Q6, the control end of the sixth switch tube Q6 is electrically connected to the pulse generating module 200 and is configured to receive the second pulse signal SB, and the second conduction end of the sixth switch tube Q6 is grounded.
Illustratively, the current IA provided by the first current source I1 and the current IB provided by the second current source I2 have the same magnitude and the same direction, corresponding to fig. 3, 5, 7 and 11.
Specifically, the first pulse signal SA is used to control the fifth switching tube Q5 to be turned on and off, and the second pulse signal SB is used to control the sixth switching tube Q6 to be turned on and off. When the first pulse signal SA is at a high level, the fifth switch Q5 is turned on to charge the first capacitor C1 according to the magnitude of the current IA. When the second pulse signal SB is at a high level, the sixth switching tube Q6 is turned on to discharge to the first capacitor C1 according to the magnitude of the current IB. The current IA is equal to the current IB, so when the pulse widths of the first pulse signal SA and the second pulse signal SB are just equal, the charging current and the discharging current of the first capacitor C1 are just equal, and the current signal corresponding to the output first voltage signal Vcs is just at the midpoint position of the first current signal during the turn-on period of the first switching tube Q1, and the current value corresponding to the midpoint position is just the average value of the inductor current, that is, the current signal corresponding to the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20.
Illustratively, corresponding to fig. 6 and 9, the current IA provided by the first current source I1 is twice the current IB provided by the second current source I2, and the current IA provided by the first current source I1 is in the same direction as the current IB provided by the second current source I2.
Specifically, the first pulse signal SA is used to control the fifth switching tube Q5 to be turned on and off, and the second pulse signal SB is used to control the sixth switching tube Q6 to be turned on and off. When the first pulse signal SA is at a high level, the fifth switch Q5 is turned on to charge the first capacitor C1 according to the magnitude of the current IA. When the second pulse signal SB is at a high level, the sixth switching tube Q6 is turned on to discharge to the first capacitor C1 according to the magnitude of the current IB. The current IA is twice the current IB, so when the pulse width of the first pulse signal SA is exactly 50% of the pulse width of the second pulse signal SB, the average charging current and the average discharging current of the first capacitor C1 are exactly equal, and the current signal corresponding to the output first voltage signal Vcs is exactly at the midpoint position of the first current signal during the turn-on period of the first switching tube Q1, and the current value corresponding to the midpoint position is exactly the average value of the inductor current, that is, the current signal corresponding to the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20.
For clarity of the description of the present application, the operation of the current detection circuit 10 will be described in detail with reference to fig. 3 and 4.
First, the sampling unit 101 samples a first current signal and outputs a second current signal, wherein the sampling ratio of the second current signal to the first current signal is 1/N 1 ，N 1 > 1, assuming that the first current signal is i Q1 Indicating that the second current signal is i Q1 /N 1 Indicating that the first resistor R1 generates a second voltage signal from the second current signal, assuming that the second voltage signal is V 2 Is shown as V 2 =R1*i Q1 /N 1 The first comparator Com1 couples the second voltage signal R1 i Q1 /N 1 And the first voltage signal Vcs, and a first control signal A is output.
The first control signal a and the second control signal SW or Q1_ G generate a first pulse signal SA through the first and gate Y1, and the first pulse signal SA is used for controlling the on and off of the fifth switching tube Q5. The first pulse signal SA generates a pulse signal after passing through the first NOT gate F1
Of pulse signals
And the second control signal SW or Q1_ G generates a second pulse signal SB through the second AND gate Y2, and the second pulse signal SB is used for controlling the on and off of the sixth switching tube Q6.
When the first pulse signal SA is at a high level, the fifth switch Q5 is turned on to charge the first capacitor C1 according to the magnitude of the current IA. When the second pulse signal SB is at a high level, the sixth switching tube Q6 is turned on to discharge to the first capacitor C1 according to the magnitude of the current IB. The current IA is equal to the current IB, so when the pulse widths of the first pulse signal SA and the second pulse signal SB are equal to each other, the charging current and the discharging current of the first capacitor C1 are equal to each other, and the current signal corresponding to the output first voltage signal Vcs is at the midpoint position of the first current signal during the turn-on period of the first switching tube Q1, and the current value corresponding to the midpoint position is just the average value of the inductor current, that is, the current signal corresponding to the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20.
When the first voltage signal Vcs is lower than the second voltage signal R1 |, i Q1 /N 1 When the average value of the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20, the pulse width of the first pulse signal SA generated by the pulse generation module 200 is smaller than the pulse width of the second pulse signal SB, the charging current to the first capacitor C1 is larger than the discharging current, the first voltage signal Vcs increases until the pulse width of the first pulse signal SA is equal to the pulse width of the second pulse signal SB, and the first capacitor C1 stops charging, at this time, the current signal corresponding to the output first voltage signal Vcs is just at the midpoint position of the first current signal in the on period of the first switching tube Q1, and the current value corresponding to the midpoint position is just the average value of the inductor current.
When the first voltage signal Vcs is higher than the second voltage signal R1 i Q1 /N 1 Is the average value of the first pulse signal SA generated by the pulse generating module 200The width is greater than the pulse width of the second pulse signal SB, the charging current to the first capacitor C1 is less than the discharging current, the first voltage signal Vcs is decreased until the pulse width of the first pulse signal SA is equal to the pulse width of the second pulse signal SB, and the first capacitor C1 stops discharging. The current signal corresponding to the first voltage signal Vcs output at this time is just at the midpoint position of the first current signal during the on period of the first switching tube Q1, and the current value corresponding to the midpoint position is just the average value of the inductor current, that is, the current signal corresponding to the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20. Wherein the first voltage signal Vcs is equal to I L *R1/N 1 ，I L Representing the average current signal flowing through the inductance L.
In summary, the current detection circuit 10 provided in the embodiment of the present application can automatically realize sampling of the midpoint of the first current signal, that is, sampling of the average value of the current signal flowing through the inductor L, and compared with the inductor current detection circuit in the prior art, the present application avoids the dead zone of switching on the switching tube and the distortion of the current during switching on, reduces the requirement on the response time, and improves the current detection precision. When the current signal flowing through the inductor L changes, the pulse width of the first pulse signal SA and the pulse width of the second pulse signal SB also change, and the charge-discharge current of the first capacitor C1 also changes, so that the output first voltage signal Vcs changes, and finally reaches a new equilibrium point.
Meanwhile, the current detection circuit provided by the embodiment of the application needs a small chip area, so that the realization cost is low, and the current detection precision is high.
Fig. 5 is another implementation of the current detection circuit, and the difference from fig. 3 is that the second pulse signal SB is generated slightly differently. As shown in FIG. 5, the first control signal A and the second control signal SW or Q1_ G generate the first pulse signal SA through the third AND gate Y3, and the first control signal A generates the control signal SA through the second NOT gate F2
Control signal
And the second control signal SW or Q1_ G generates the second pulse signal SB through the fourth and gate Y4. The operation principle is similar to that of the circuit shown in fig. 3, and the description is omitted here.
Fig. 6 shows another implementation of the current detection circuit, which is slightly different from fig. 3 in the generation of the second pulse signal SB. As shown in fig. 6, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the fifth and gate Y5. Wherein the second control signal SW or Q1_ G directly serves as the second pulse signal SB. The current IA is defined as twice the current IB, and the operation principle is that the sampling unit 101 samples the first current signal and outputs the second current signal, wherein the sampling ratio of the second current signal to the first current signal is 1/N 1 ，N 1 > 1, assume that the first current signal is i Q1 Indicating that the second current signal is i Q1 /N 1 Indicating that the first resistor R1 generates a second voltage signal from the second current signal, assuming that the second voltage signal is V 2 Is shown as V 2 =R1*i Q1 /N 1 The first comparator Com1 couples the second voltage signal R1 i Q1 /N 1 And the first voltage signal Vcs, and a first control signal A is output.
The first control signal a and the second control signal SW or Q1_ G generate a first pulse signal SA through the fifth and gate Y5, and the first pulse signal SA is used for controlling the on and off of the fifth switching tube Q5. The second control signal SW or Q1_ G directly serves as a second pulse signal SB, and the second pulse signal SB is used for controlling the sixth switching tube Q6 to be turned on and off.
When the first pulse signal SA is at a high level, the fifth switch Q5 is turned on to charge the first capacitor C1 according to the magnitude of the current IA. When the second pulse signal SB is at a high level, the sixth switching tube Q6 is turned on to discharge to the first capacitor C1 according to the magnitude of the current IB. Wherein the current IA is twice the current IB, so that when the pulse width of the first pulse signal SA is just 50% of the pulse width of the second pulse signal SB, the average charging current and the average discharging current of the first capacitor C1 are justAnd when the current signal corresponding to the first voltage signal Vcs is equal to the current signal corresponding to the first voltage signal Vcs, the current signal corresponding to the first voltage signal Vcs is just at the midpoint position of the first current signal during the turn-on period of the first switching tube Q1, and the current value corresponding to the midpoint position is just the average value of the inductor current, that is, the current signal corresponding to the first voltage signal Vcs is the average current signal flowing through the inductor L in the buck converter 20. The first voltage signal Vcs is equal to I L *R1/N 1 ，I L Representing the average current signal flowing through the inductance L. When the current signal flowing through the inductor L changes, the pulse width of the first pulse signal SA and the pulse width of the second pulse signal SB also change, and the charging and discharging current of the first capacitor C1 also changes until the current signal corresponding to the first voltage signal Vcs reaches the average current signal of the inductor L again.
The circuits shown in fig. 3, 5, and 6 sample the first current signal, so that the detection accuracy of the first voltage signal Vcs is controlled by the sampling accuracy and the response time of the first current signal, and especially in high-frequency applications, the detection accuracy of the first voltage signal Vcs is affected by the delay caused by the response time. The circuit shown in fig. 7 can overcome the above-mentioned drawbacks, and the operation of the current detection circuit 10 will be described with reference to fig. 7 and 8.
The positive input end of the operational amplifier EA is used for receiving a first voltage signal Vcs, and based on the action of the operational amplifier EA, when the system achieves closed-loop stability, the operational amplifier EA controls the fourth switching tube Q4 to be in linear conduction, so that the voltage signal Vref at the first end of the second resistor R2 is approximately equal to the first voltage signal Vcs. The second resistor R2 generates a third current signal according to the voltage signal Vref (i.e., the first voltage signal Vcs). Suppose the first current signal is I Q1 Indicating that the third current signal is I 3 Is represented by 3 = Vcs/R2. Wherein the size of the first switch tube Q1 is N of the third switch tube D3 2 The on-resistance of the third switch tube Q3 is N of the first switch tube Q1 2 On the assumption that the on-resistance of the third switching tube Q3 is represented by Rdson _ Q3 and the on-resistance of the first switching tube Q1 is represented by Rdson _ Q1, the voltage drop generated by the third current signal on the third switching tube Q3 is I 3 *Rdson_Q3, the voltage drop of the first current signal generated on the first switch tube Q1 is I Q1 * Rdson _ Q1, when the second comparator Com2 is turned over, the voltage drop generated on the first switch Q1 is equal to the voltage drop generated on the third switch Q3, and the current I flowing through the first switch Q1 Q1 =I 3 *(Rdson_Q3/Rdson_Q1)=I 3 *N 2 I.e. I Q1 /N 2 =I 3 ，I 3 = Vcs/R2, then I Q1 /N 2 =Vcs/R2，1/N 2 Is the current sampling ratio. The working waveforms are shown in FIG. 8, the second comparator Com2 couples Vcs/R2 and I Q1 /N 2 Compares and outputs a first control signal a. The first control signal a and the second control signal SW or Q1_ G generate a first pulse signal SA through the first and gate Y1, and the first pulse signal SA is used for controlling the on and off of the fifth switching tube Q5. The first pulse signal SA generates a pulse signal after passing through a first NOT gate F1
Of pulse signals
And the second control signal SW or Q1_ G generates a second pulse signal SB through the second AND gate Y2, and the second pulse signal SB is used for controlling the on and off of the sixth switching tube Q6.
When the first pulse signal SA is at a high level, the fifth switch Q5 is turned on to charge the first capacitor C1 according to the magnitude of the current IA. When the second pulse signal SB is at a high level, the sixth switching tube Q6 is turned on to discharge to the first capacitor C1 according to the magnitude of the current IB. Wherein the current IA is equal to the current IB, so when the pulse widths of the first pulse signal SA and the second pulse signal SB are just equal, the charging current and the discharging current of the first capacitor C1 are just equal, the current value of the first current signal at the midpoint position of the turn-on period of the first switch tube Q1 is the average value of the inductor current, and the average current signal of the inductor L is represented by I L Denotes that N is exactly equal to the third current signal 2 Double, i.e. I L =N 2 * Vcs/R2, then the first voltage signal Vcs is equal to I L *R2/N 2 。
As can be seen from the above, the current detection circuit described above avoids the sampling unit 101 in fig. 3, and is not limited by the response time of the sampling unit 101, so that the current sampling accuracy is higher. In practical application, N 2 Generally, the size of the third switch tube Q3 is larger than 1000 and even more than 10000, that is, the size of the third switch tube Q3 is negligible compared with that of the first switch tube Q1, so the cost thereof is also negligible. The third current signal is 1/N of the first current signal 2 Therefore, the power loss caused by the current detection circuit can be ignored. Therefore, the current detection circuit provided by the embodiment of the application has the advantages of no power loss, low cost, high-precision detection and the like.
Fig. 9 is another implementation of a current sensing circuit, similar to fig. 7, and fig. 10 is its corresponding operating waveform. The difference is that the second pulse signal SB is generated in a slightly different manner, specifically, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the fifth and gate Y5. The second control signal SW or Q1_ G is directly used as the second pulse signal SB, wherein the second control signal Q1_ G is defined as the second pulse signal SB and the current IA is defined as twice the current IB. When the pulse width of the first pulse signal SA is just 50% of the pulse width of the second pulse signal SB, the average charging current and the average discharging current of the first capacitor C1 are just equal, and the first voltage signal Vcs reaches a steady state, where the first voltage signal Vcs is equal to I L *R2/N 2 In which I L Is the average current signal of the inductor L.
Fig. 11 is another implementation of the current detection circuit, similar to fig. 7, with the difference that the second pulse signal SB is generated in a slightly different manner, specifically, the first control signal a and the second control signal SW or Q1_ G generate the first pulse signal SA through the third and gate Y3, and the first control signal a generates the control signal SA through the second not gate F2
Control signal
And a second control signalThe signal SW or Q1_ G generates the second pulse signal SB through the fourth and gate Y4. The operation principle is similar to that of fig. 7, and is not described herein again.
It should be noted that the current detection circuit 10 provided in the embodiment of the present application is also applicable to a boost converter and a boost and buck converter, in addition to a buck converter.
As shown in fig. 12, the present embodiment further provides a buck converter 20, which includes the current detection circuit 10 described above. Wherein the current measuring circuit 10 passes the current signal i through the first switch tube Q1 Q1 The average current signal flowing through the inductor L is generated, the problem that in the prior art, an inductor current detection circuit needs to match the detection gains of the upper pipe and the lower pipe consistently is solved, the opening dead zone of the upper pipe and the lower pipe is avoided, and the current detection precision is improved. In addition, the current detection circuit 10 can automatically realize the current signal i flowing through the first switch tube Q1 Q1 Compared with the inductive current detection circuit in the prior art, the current detection circuit 10 avoids the distortion of the current when the switching tube is turned on, reduces the requirement on response time, and further improves the current detection precision. The average current signal of the inductor L generated by the current detection circuit 10 can be used for control of the output current of the buck converter 20, overcurrent protection, and output current and output power monitoring.
In the above embodiments, the description of each embodiment has its own emphasis, and reference may be made to the related description of other embodiments for parts that are not described or recited in any embodiment.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present application, and they should be construed as being included in the present application.
Claims (9)
1. A current detection circuit is applied to a buck converter, wherein the buck converter consists of a first switching tube, a second switching tube and an inductor or consists of a first switching tube, a diode and an inductor, and the first switching tube is an upper tube; when the buck converter consists of a first switching tube, a second switching tube and an inductor, a switching node in the buck converter is a connection node of the first switching tube, the inductor and the second switching tube; when the buck converter consists of a first switching tube, a diode and an inductor, a switching node in the buck converter is a connection node of the first switching tube, the inductor and the diode, and the buck converter is characterized by comprising a control module, a pulse generation module and a signal output module; the control module is respectively electrically connected with the pulse generation module and the signal output module, the pulse generation module is electrically connected with the signal output module, and the control module and the pulse generation module are both used for being electrically connected with the buck converter;
the control module is used for receiving a first current signal and a first voltage signal and outputting a first control signal according to the first current signal and the first voltage signal, wherein the first current signal is a current signal flowing through a first switching tube in the buck converter, and the first voltage signal is a voltage signal output by the signal output module; the pulse generation module is used for receiving the first control signal and the second control signal and outputting a first pulse signal and a second pulse signal according to the first control signal and the second control signal, wherein the second control signal is a driving signal of the first switching tube or a voltage signal at a switching node in the buck converter; the signal output module is used for receiving the first pulse signal and the second pulse signal, adjusting the first voltage signal according to the first pulse signal and the second pulse signal, and when a current signal corresponding to the first voltage signal is at a midpoint position of the first current signal during the turn-on period of the first switching tube, the current signal corresponding to the first voltage signal is an average current signal flowing through an inductor in the buck converter;
the signal output module comprises a first current source, a fifth switch tube, a second current source, a sixth switch tube and a first capacitor;
the positive pole of first current source receives first voltage VCC, the negative pole of first current source with the first end electricity connection that switches on of fifth switch tube, the control end of fifth switch tube with pulse generation module electricity is connected, is used for receiving first pulse signal, the second of fifth switch tube switch on the end respectively with the positive pole of second current source with the first end electricity of first electric capacity is connected, the first end of first electric capacity is used for exporting first voltage signal, the second end ground connection of first electric capacity, the negative pole of second current source with the first end electricity connection that switches on of sixth switch tube, the control end of sixth switch tube with pulse generation module electricity is connected, is used for receiving second pulse signal, the second of sixth switch tube switches on the end ground connection.
2. The current sensing circuit of claim 1, wherein the control module comprises a sampling unit, a first resistor, and a first comparator;
the sampling unit is connected in series between the source electrode of the first switching tube and a switching node in the buck converter, the sampling unit is also respectively electrically connected with a first end of the first resistor and a negative input end of the first comparator, a second end of the first resistor is grounded, a positive input end of the first comparator is electrically connected with the signal output module, and an output end of the first comparator is electrically connected with the pulse generation module;
the sampling unit is used for receiving the first current signal, sampling the first current signal and outputting a second current signal, and the sampling ratio of the second current signal to the first current signal is 1/N 1 ，N 1 >1; the first resistor is used for generating a second voltage signal according to the second current signal; the first comparator is used for receiving the second voltage signal and the first voltage signal and comparing the second voltage signal with the first voltage signalA voltage signal is compared and the first control signal is output.
3. The current detection circuit of claim 1, wherein the control module comprises an operational amplifier, a third switching tube, a fourth switching tube, a second resistor and a second comparator;
the drain electrode of the third switching tube is electrically connected with the drain electrode of the first switching tube, the gate electrode of the third switching tube is electrically connected with the gate electrode of the first switching tube, the source electrode of the third switching tube is electrically connected with the drain electrode of the fourth switching tube and the negative input end of the second comparator respectively, the source electrode of the fourth switching tube is electrically connected with the negative input end of the operational amplifier and the first end of the second resistor respectively, the positive input end of the operational amplifier is electrically connected with the signal output module, the output end of the operational amplifier is electrically connected with the gate electrode of the fourth switching tube, the second end of the second resistor is grounded, the positive input end of the second comparator is electrically connected with the source electrode of the first switching tube, and the output end of the second comparator is electrically connected with the pulse generation module; the size of the first switching tube is N of the third switching tube 2 Multiple, N 2 >1；
The positive input end of the operational amplifier is configured to receive the first voltage signal, so that the voltage signal at the first end of the second resistor is the first voltage signal; the second resistor is used for generating a third current signal according to the first voltage signal; the second comparator is configured to receive the third current signal and the first current signal, compare the third current signal and the first current signal, and output the first control signal.
4. The current sensing circuit of claim 1, wherein the pulse generation module comprises a first AND gate, a first NOT gate, and a second AND gate;
a first input end of the first and gate is electrically connected with the control module and used for receiving the first control signal, a second input end of the first and gate is used for receiving the second control signal, an output end of the first and gate is electrically connected with an input end of the first not gate and the signal output module respectively, and an output end of the first and gate is used for outputting the first pulse signal; the output end of the first NOT gate is electrically connected with the first input end of the second AND gate, the second input end of the second AND gate is used for receiving the second control signal, and the output end of the second AND gate is electrically connected with the signal output module and used for outputting the second pulse signal.
5. The current sensing circuit of claim 1, wherein the pulse generation module comprises a third and gate, a second not gate, and a fourth and gate;
the first input end of the third AND gate and the input end of the second NOT gate are electrically connected with the control module and used for receiving the first control signal, the second input end of the third AND gate is used for receiving the second control signal, and the output end of the third AND gate is electrically connected with the signal output module and used for outputting the first pulse signal; the output end of the second not gate is electrically connected with the first input end of the fourth and gate, the second input end of the fourth and gate is used for receiving the second control signal, and the output end of the fourth and gate is electrically connected with the signal output module and used for outputting the second pulse signal.
6. The current sensing circuit of claim 1, wherein the pulse generation module comprises a fifth and gate; the first input end of the fifth and gate is electrically connected with the control module and used for receiving the first control signal, the second input end of the fifth and gate is used for receiving the second control signal, the second input end of the fifth and gate is also electrically connected with the signal output module and used for providing the second pulse signal, and the output end of the fifth and gate is electrically connected with the signal output module and used for outputting the first pulse signal.
7. The current sensing circuit of claim 1, wherein the current provided by the first current source is equal in magnitude and same in direction as the current provided by the second current source.
8. The current sensing circuit of claim 1, wherein the first current source provides twice the current as the second current source and the first current source provides the current in the same direction as the second current source.
9. A buck converter including a current sensing circuit according to any one of claims 1 to 8.
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