CN115379023A - HART communication device - Google Patents
HART communication device Download PDFInfo
- Publication number
- CN115379023A CN115379023A CN202211024431.2A CN202211024431A CN115379023A CN 115379023 A CN115379023 A CN 115379023A CN 202211024431 A CN202211024431 A CN 202211024431A CN 115379023 A CN115379023 A CN 115379023A
- Authority
- CN
- China
- Prior art keywords
- module
- hart
- conversion module
- processing unit
- central processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006854 communication Effects 0.000 title claims abstract description 76
- 238000004891 communication Methods 0.000 title claims abstract description 76
- 238000006243 chemical reaction Methods 0.000 claims abstract description 91
- 230000008878 coupling Effects 0.000 claims abstract description 20
- 238000010168 coupling process Methods 0.000 claims abstract description 20
- 238000005859 coupling reaction Methods 0.000 claims abstract description 20
- 238000002955 isolation Methods 0.000 claims description 18
- 238000001914 filtration Methods 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000007175 bidirectional communication Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Health & Medical Sciences (AREA)
- Computing Systems (AREA)
- General Health & Medical Sciences (AREA)
- Medical Informatics (AREA)
- Communication Control (AREA)
Abstract
The invention discloses a HART communication device which comprises a central processing unit and a plurality of communication units, wherein each communication unit comprises a protocol conversion module, a plurality of HART modulation and demodulation modules, a plurality of coupling modules and a plurality of signal conversion modules, the protocol conversion module is respectively connected with the central processing unit and the plurality of HART modulation and demodulation modules, each HART modulation and demodulation module is correspondingly connected with one coupling module, each coupling module is connected with one signal conversion module, and each signal conversion module is connected with the central processing unit. The central processing unit of the device communicates with a plurality of external devices through the protocol conversion module, so that the defects of an input interface and an output interface of the central processing unit can be overcome, and the communication efficiency is improved.
Description
Technical Field
The application relates to the field of HART communication, in particular to a HART communication device.
Background
The HART protocol is called high way Addressable Remote transmitter and is a communication protocol between field intelligent instruments and control devices introduced in 1985 by rosemont corporation of america. However, the existing HART communication has disadvantages of relatively low communication bandwidth and long response time.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a HART communication apparatus to overcome the defects of relatively low communication bandwidth and long response time of a single external device in the HART communication apparatus in the prior art.
The invention solves the technical problems through the following technical scheme:
a HART communication device comprises a central processing unit and a plurality of communication units, wherein each communication unit comprises a protocol conversion module, a plurality of HART modulation and demodulation modules, a plurality of coupling modules and a plurality of signal conversion modules;
the protocol conversion module is respectively connected with a central processing unit and a plurality of HART modulation and demodulation modules;
each HART modulation and demodulation module is correspondingly connected with one coupling module, and each coupling module is connected with one signal conversion module; each signal conversion module is connected with the central processing unit;
the signal conversion module is used for converting the digital signal acquired from the central processing unit into an analog signal;
the protocol conversion module is used for sequentially outputting the communication data of the central processing unit to each HART modulation and demodulation module;
the HART modulation and demodulation module is used for acquiring and modulating the signal output by the protocol conversion module;
and the coupling module is used for superposing the signal modulated by the HART modulation and demodulation module on a corresponding analog signal and outputting the signal to external equipment.
Preferably, the HART modulation and demodulation module is further configured to sequentially acquire and demodulate the response signal of the external device, and input the demodulated response signal to the protocol conversion module;
the protocol conversion module is also used for feeding back each demodulated response signal to a central processing unit in sequence;
the signal conversion module is also used for sequentially converting analog signals acquired from external equipment into digital signals and feeding the digital signals back to the central processing unit.
Preferably, the central processing unit is further connected with the plurality of protocol conversion modules through a data distribution module;
the data distribution module is used for sequentially distributing the communication data of the central processing unit to each protocol conversion module.
Preferably, the data distribution module is further configured to acquire a response signal of the protocol conversion module of each communication unit, store each response signal, and feed back the response signal to the central processing unit at regular time.
Preferably, the data distribution module is a field programmable gate array.
Preferably, the central processor and the data distribution module communicate with each other according to a PCIe protocol;
and/or the data distribution module and the protocol conversion module are communicated according to an SPI protocol;
and/or the protocol conversion module and the HART modulation and demodulation module communicate according to a UART protocol.
Preferably, the signal conversion module is further connected to the external device through a filtering module.
Preferably, the coupling module is further connected to the external device through a protection circuit, and the protection circuit is configured to perform at least one of overvoltage protection, overcurrent protection, and electrostatic protection on the external device.
Preferably, the HART communication device further comprises an isolation module, the central processing unit is connected to the protocol conversion module through the isolation module, and the isolation module is used for electrically isolating the central processing unit from the protocol conversion module.
Preferably, the HART communication device further includes an isolation module, the central processing unit is further connected to the signal conversion module through the isolation module, and the isolation module is configured to electrically isolate the central processing unit from the protocol conversion module.
The positive progress effects of the invention are as follows: the central processing unit communicates with a plurality of external devices through the protocol conversion module, so that the defects of an input interface and an output interface of the central processing unit can be overcome, and the communication efficiency is improved.
Because the communication channel between each external device and the central processing unit is independent, the communication of other external devices cannot be influenced by the fault of a single channel, and the safety and the reliability are good.
By adopting the architecture of the central processing unit, the data distribution module and the protocol conversion module, data are transmitted among the central processing unit, the data distribution module and the protocol conversion module through communication protocols with different rates, so that the communication efficiency is maximized.
Drawings
Fig. 1 is a first structural diagram of the HART communication device in this embodiment 1.
Fig. 2 is a second structural diagram of the HART communication device in this embodiment 1.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
Example 1
Referring to fig. 1, the present embodiment provides a HART communication device, which includes a central processing unit 1 and a plurality of communication units, each of which includes a protocol conversion module 2, a plurality of HART modulation and demodulation modules 3, a plurality of coupling modules 4 and a plurality of signal conversion modules 5;
the protocol conversion module 2 is respectively connected with a central processing unit 1 and a plurality of HART modulation and demodulation modules 3;
each HART modulation and demodulation module 3 is correspondingly connected with one coupling module 4, and each coupling module 4 is connected with one signal conversion module 5; each signal conversion module 5 is connected with the central processing unit 1;
the signal conversion module 5 is used for converting the digital signal acquired from the central processing unit 1 into an analog signal;
the protocol conversion module 2 is used for sequentially outputting the communication data of the central processing unit 1 to each HART modulation and demodulation module 3;
the HART modulation and demodulation module 3 is used for acquiring and modulating the signal output by the protocol conversion module 2;
the coupling module 4 is configured to superimpose the signal modulated by the HART modulation and demodulation module 3 on a corresponding analog signal, and output the signal to the external device 6.
In this embodiment, the central processing unit 1 communicates with the protocol conversion module 2 according to a first communication protocol, the protocol conversion module 2 communicates with each HART modem module 3 according to a second communication protocol, a rate of the first communication protocol is at least n times greater than a rate of the second communication protocol, where n is the number of HART modem modules 3. In this embodiment, the protocol conversion module 2 may use a protocol conversion chip, and the protocol conversion chip may be a four-way asynchronous transceiver, so that one-way fast first communication protocol is converted into four-way second communication protocol for communication.
Through this embodiment, in this application through with central processing unit 1 send communication data input to each HART modem module 3 in proper order, will pass through again on the signal stack to the analog signal that corresponds after HART modem module 3 modulates, output to external equipment 6. Each external device 6 can receive signals in sequence, and communication efficiency is greatly improved. Of course, in this embodiment, the rate of the second communication protocol only needs to satisfy the communication rate of the external device 6. In this embodiment, the signal conversion module 5 may specifically be a digital-to-analog converter.
In the present embodiment, each external device 6 has a corresponding signal conversion module 5, and when one signal conversion module 5 fails, the remaining signal conversion modules 5 are not affected. In the actual use process, the channels from the protocol conversion module 2 to the coupling module 4 are also independent for each external device 6.
In the above embodiment, the coupling module 4 may be a set of resistance-capacitance networks, and couples the modulated signal to the analog current signal (i.e. the analog signal output by the signal conversion module 5) in the form of 1.2KHz and 2.2KHz sine waves.
Specifically, the HART modulation and demodulation module 3 may be further configured to sequentially acquire and demodulate the response signal of the external device 6, and input the demodulated response signal to the protocol conversion module 2;
the protocol conversion module 2 is further configured to sequentially feed back each demodulated response signal to the central processing unit 1;
the signal conversion module 5 is further configured to sequentially convert analog signals acquired from the external device 6 into digital signals, and feed the digital signals back to the central processing unit 1.
In this embodiment, the device can not only transmit the communication data of the central processing unit 1 to the external device 6, but also sequentially feed back the response signal of the external device 6 to the central processing unit 1 to complete the bidirectional communication. The HART modem module 3 is used for demodulating the response signal and the digital signal sent by the external device 6.
Referring to fig. 2, specifically, the central processor 1 and the plurality of protocol conversion modules 2 may be further connected through a data distribution module 7;
the data distribution module 7 is configured to sequentially distribute the communication data of the central processing unit 1 to each protocol conversion module 2.
The data allocating module 7 in this embodiment is configured to allocate corresponding data to different protocol conversion modules 2. The central processing unit 1 and the data distribution module 7 can communicate with each other through a third communication protocol, and the data distribution module 7 and the protocol conversion module 2 can communicate with each other through a first communication protocol. The speed of the third communication protocol is at least m times larger than that of the first communication protocol, wherein m is the number of the protocol conversion modules 2 connected with a single data distribution module 7.
Specifically, the data distribution module 7 may be further configured to obtain response signals of the protocol conversion module 2 of each communication unit, store the response signals, and feed back the response signals to the central processing unit 1 at regular time. In this embodiment, the central processing unit 1 does not need to receive the response signal every moment, and only needs to receive the stored response signal at a certain moment, so that the stress on the central processing unit 1 is reduced.
Specifically, the data distribution module 7 may be a Field Programmable Gate Array (Field Programmable Gate Array, abbreviated as FPGA).
Specifically, the central processing unit 1 and the data distribution module 7 may communicate with each other according to a PCIe protocol;
and/or, the data distribution module 7 and the protocol conversion module 2 can communicate according to the SPI protocol;
and/or, the protocol conversion module 2 and the HART modem module 3 may communicate according to UART protocol.
Specifically, the signal conversion module 5 may further be connected to the external device 6 through a filtering module 8. In this embodiment, the filtering module 8 is a low-pass filtering module, and can filter the influence of the modulated communication signal and the high-frequency noise on the analog signal.
Specifically, the coupling module 4 may further be connected to the external device 6 through a protection circuit 9, where the protection circuit 9 is configured to perform at least one of overvoltage protection, overcurrent protection, and electrostatic protection on the external device 6.
Specifically, the central processing unit 1 is connected to the protocol conversion module 2 through an isolation module 10, and the isolation module 10 is configured to electrically isolate the central processing unit 1 from the protocol conversion module 2.
Specifically, the central processing unit 1 is further connected to the signal conversion module 5 through an isolation module 10, and the isolation module 10 is configured to electrically isolate the central processing unit 1 from the protocol conversion module 2.
In the above two embodiments, the isolation module 10 is used to electrically isolate the central processing unit 1 from the protocol conversion module 2, and the central processing unit 1 is electrically isolated from the signal conversion module 5, and when the protocol conversion module 2 or the signal conversion module 5 fails, the isolation module 10 is arranged to avoid affecting the normal operation of the central processing unit 1.
In this embodiment, the cpu 1 may be divided into three stages: 1. transmitting communication data; 2. waiting for the response of the external equipment 6; 3. a response signal is received.
1. Sending communication data: after the central processing unit 1 is started, the central processing unit 1 can sequentially send communication data to the external device 6, and the external device 6 can receive the processed communication data through the modulation of the HART modulation and demodulation module 3 and the processing of the signal conversion module 5.
2. Waiting for the external device 6 to respond: when the external device 6 receives the processed communication data, the external device 6 will respond after a certain time, and when waiting for the response of the external device 6, the central processing unit 1 can also send communication data to other external devices 6, so that the efficiency is greatly improved. In this stage, a preset time period may also be set, and if the time for waiting for the response data is within the preset time period, the central processing unit 1 will continue to wait for the response signal of the external device 6.
3. Receiving a response signal: when the external device 6 generates the corresponding response data, the central processing unit 1 receives the response data, and when all the response data of the external device 6 are received, the central processing unit 1 can send the communication data to each external device 6 again. In this stage, if the waiting time exceeds the preset time period, it can be determined that the channel where the external device is located has an overtime error. If the received response data is analyzed to have errors, the response data is determined to be in error. When the phase is finished, the phase 1 can be entered again to circulate.
In actual operation, when the device of the present invention is started, initialization will occur. After the initialization is completed, the central processing unit 1 sends a signal, and the device enters a state of sending communication data. When the device is initialized or started, whether a communication channel from the central processing unit 1 to each external device 6 is normal or not can be checked, and an abnormal condition is fed back to the central processing unit 1.
When transmitting the communication signal, the content of the communication signal can be determined according to the actual situation. For example, the communication signal may comprise a query command. The query command may be used to obtain the state of the external device or information obtained by the external device.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (10)
1. The HART communication device is characterized by comprising a central processing unit and a plurality of communication units, wherein each communication unit comprises a protocol conversion module, a plurality of HART modulation and demodulation modules, a plurality of coupling modules and a plurality of signal conversion modules;
the protocol conversion module is respectively connected with a central processing unit and a plurality of HART modulation and demodulation modules;
each HART modulation and demodulation module is correspondingly connected with one coupling module, and each coupling module is connected with one signal conversion module; each signal conversion module is connected with the central processing unit;
the signal conversion module is used for converting the digital signal acquired from the central processing unit into an analog signal and outputting the analog signal to the external equipment;
the protocol conversion module is used for sequentially outputting communication data of the central processing unit to each HART modulation and demodulation module;
the HART modulation and demodulation module is used for acquiring and modulating the signal output by the protocol conversion module;
the coupling module is used for superposing the signal modulated by the HART modulation and demodulation module on a corresponding analog signal and outputting the signal to external equipment.
2. The HART communication device according to claim 1, wherein the HART modem module is further configured to sequentially acquire and demodulate the response signals of the external device, and input the demodulated response signals to the protocol conversion module;
the protocol conversion module is also used for feeding back each demodulated response signal to a central processing unit in sequence;
the signal conversion module is also used for sequentially converting analog signals acquired from external equipment into digital signals and feeding the digital signals back to the central processing unit.
3. The HART communication device according to claim 1, wherein the central processor is further connected to the plurality of protocol conversion modules via a data distribution module;
the data distribution module is used for sequentially distributing the communication data of the central processing unit to each protocol conversion module.
4.The HART communication device of claim 3, wherein the data distribution moduleThe block is also used for acquiring the response signals of the protocol conversion modules of the communication units, storing the response signals and feeding the response signals back to the central processing unit in a timing mode.
5. The HART communication device of claim 3, wherein the data distribution module is a field programmable gate array.
6. The HART communicator of claim 3, wherein the central processor and the data distribution module communicate according to a PCIe protocol;
and/or the data distribution module and the protocol conversion module are communicated according to an SPI protocol;
and/or the protocol conversion module and the HART modulation and demodulation module communicate according to a UART protocol.
7. The HART communication device according to claim 1, wherein the signal conversion module is further coupled to the external device via a filtering module.
8. The HART communicator of claim 1, wherein the coupling module is further coupled to the external device via a protection circuit for at least one of over-voltage protection, over-current protection, and electrostatic protection of the external device.
9. The HART communication device of claim 1, further comprising an isolation module, the central processor coupled to the protocol conversion module via the isolation module, the isolation module configured to electrically isolate the central processor from the protocol conversion module.
10. The HART communication device of claim 1, further comprising an isolation module, the central processor further coupled to the signal conversion module via the isolation module, the isolation module configured to electrically isolate the central processor from the protocol conversion module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211024431.2A CN115379023A (en) | 2022-08-25 | 2022-08-25 | HART communication device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211024431.2A CN115379023A (en) | 2022-08-25 | 2022-08-25 | HART communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115379023A true CN115379023A (en) | 2022-11-22 |
Family
ID=84068054
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211024431.2A Pending CN115379023A (en) | 2022-08-25 | 2022-08-25 | HART communication device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115379023A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117407348A (en) * | 2023-12-15 | 2024-01-16 | 成都电科星拓科技有限公司 | PCIe self-adaptive switching method and device, storage medium and electronic equipment |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008127657A1 (en) * | 2007-04-13 | 2008-10-23 | Hart Communication Foundation | A wireless protocol adapter |
| CN102025660A (en) * | 2010-12-22 | 2011-04-20 | 上海工业自动化仪表研究院 | Multiplexing intelligent gateway and working method thereof |
| CN102523310A (en) * | 2012-01-04 | 2012-06-27 | 上海工业自动化仪表研究院 | Multifunctional HART (Highway Addressable Remote Transducer) communication interface |
| CN202435421U (en) * | 2012-01-04 | 2012-09-12 | 上海工业自动化仪表研究院 | Multifunctional HART (highway addressable remote transducer) communication interface |
| US20120253481A1 (en) * | 2011-03-29 | 2012-10-04 | General Electric Company | Hart channel interface component including redundancy |
| CN202696650U (en) * | 2012-06-12 | 2013-01-23 | 深圳市特安电子有限公司 | HART protocol conversion device |
| CN103186126A (en) * | 2011-12-31 | 2013-07-03 | 北京国电智深控制技术有限公司 | Interface device and method used for connecting distributed control system and intelligent device |
| CN103576643A (en) * | 2012-08-10 | 2014-02-12 | Ls产电株式会社 | HART analog input module with differential input stage |
| CN106789608A (en) * | 2016-12-21 | 2017-05-31 | 成都弘典自动化控制技术有限公司 | A kind of multipath concurrence type intelligent gateway and its method of work |
| US20190384249A1 (en) * | 2018-06-14 | 2019-12-19 | Honeywell International Inc. | System and method for dynamically scalable soft hart modems |
| CN211628040U (en) * | 2019-12-27 | 2020-10-02 | 上海新华控制技术集团科技有限公司 | Analog quantity output module with HART protocol conversion and DCS system |
| CN213276360U (en) * | 2020-11-16 | 2021-05-25 | 上海新华控制技术集团科技有限公司 | Multi-channel analog input module with HART protocol conversion |
| CN214101409U (en) * | 2020-11-09 | 2021-08-31 | 广西电网有限责任公司南宁供电局 | Intelligent gateway |
| CN113790304A (en) * | 2021-08-23 | 2021-12-14 | 浙江中控技术股份有限公司 | Intrinsic safety HART communication system for intelligent valve positioner |
| CN113839903A (en) * | 2020-06-08 | 2021-12-24 | 海鹰航空通用装备有限责任公司 | Protocol conversion device based on HART technology |
-
2022
- 2022-08-25 CN CN202211024431.2A patent/CN115379023A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008127657A1 (en) * | 2007-04-13 | 2008-10-23 | Hart Communication Foundation | A wireless protocol adapter |
| CN102025660A (en) * | 2010-12-22 | 2011-04-20 | 上海工业自动化仪表研究院 | Multiplexing intelligent gateway and working method thereof |
| US20120253481A1 (en) * | 2011-03-29 | 2012-10-04 | General Electric Company | Hart channel interface component including redundancy |
| CN103186126A (en) * | 2011-12-31 | 2013-07-03 | 北京国电智深控制技术有限公司 | Interface device and method used for connecting distributed control system and intelligent device |
| CN202435421U (en) * | 2012-01-04 | 2012-09-12 | 上海工业自动化仪表研究院 | Multifunctional HART (highway addressable remote transducer) communication interface |
| CN102523310A (en) * | 2012-01-04 | 2012-06-27 | 上海工业自动化仪表研究院 | Multifunctional HART (Highway Addressable Remote Transducer) communication interface |
| CN202696650U (en) * | 2012-06-12 | 2013-01-23 | 深圳市特安电子有限公司 | HART protocol conversion device |
| CN103576643A (en) * | 2012-08-10 | 2014-02-12 | Ls产电株式会社 | HART analog input module with differential input stage |
| CN106789608A (en) * | 2016-12-21 | 2017-05-31 | 成都弘典自动化控制技术有限公司 | A kind of multipath concurrence type intelligent gateway and its method of work |
| US20190384249A1 (en) * | 2018-06-14 | 2019-12-19 | Honeywell International Inc. | System and method for dynamically scalable soft hart modems |
| CN211628040U (en) * | 2019-12-27 | 2020-10-02 | 上海新华控制技术集团科技有限公司 | Analog quantity output module with HART protocol conversion and DCS system |
| CN113839903A (en) * | 2020-06-08 | 2021-12-24 | 海鹰航空通用装备有限责任公司 | Protocol conversion device based on HART technology |
| CN214101409U (en) * | 2020-11-09 | 2021-08-31 | 广西电网有限责任公司南宁供电局 | Intelligent gateway |
| CN213276360U (en) * | 2020-11-16 | 2021-05-25 | 上海新华控制技术集团科技有限公司 | Multi-channel analog input module with HART protocol conversion |
| CN113790304A (en) * | 2021-08-23 | 2021-12-14 | 浙江中控技术股份有限公司 | Intrinsic safety HART communication system for intelligent valve positioner |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117407348A (en) * | 2023-12-15 | 2024-01-16 | 成都电科星拓科技有限公司 | PCIe self-adaptive switching method and device, storage medium and electronic equipment |
| CN117407348B (en) * | 2023-12-15 | 2024-03-22 | 成都电科星拓科技有限公司 | PCIe self-adaptive switching method and device, storage medium and electronic equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0093623B1 (en) | Transceiver multiplexor | |
| WO1996027241A1 (en) | Data communications device to selectively operate as an analog modem, a digital modem, and a terminal adapter | |
| CN115379023A (en) | HART communication device | |
| EP3489836B1 (en) | Data processing method and system, peripheral component interconnect express device and host | |
| CN106649171A (en) | Single-bus full-duplex data communication method and system | |
| US4881244A (en) | Transmission-reception equipment for a bus system | |
| US6862294B1 (en) | Method and apparatus for overcoming large transport delays between master and slave utopia devices | |
| CN213461779U (en) | Clock synchronization device and system based on Ethernet cable | |
| CN111884987B (en) | Electronic device and method for electronic device | |
| CN115865835A (en) | Master and backup exchange board, interface board, exchange system and state summarizing method thereof | |
| CN110297795B (en) | System and method for realizing single-channel serial data transmission based on Ethernet PHY chip | |
| US20030103448A1 (en) | Clear channel 1:N SONET transport system and method | |
| US20060188259A1 (en) | HDSL optical fiber transmission system and method | |
| US7573902B2 (en) | Fibre channel interface unit | |
| EP0389182A2 (en) | Transmitter and receiver for data link system | |
| CN104917704A (en) | Method and system for multiplexing 10GBase-R PCSs and 40GBase-R PCSs in the same architecture | |
| CN220043437U (en) | Multi-path ARINC-429 bus control system | |
| CN115774689A (en) | Interface processing device | |
| KR100969881B1 (en) | Apparatus for transmitting and receiving data | |
| US11729272B2 (en) | Hart-enabled device with reduced communication lines and break extension protocol | |
| CN115866173B (en) | Video transmission chip | |
| KR200280672Y1 (en) | Digital data repeater with various communication ports and data converters | |
| CN106776430A (en) | Server system | |
| KR100299137B1 (en) | Circuit emulation apparatus for communication system | |
| CN106130652A (en) | Optical transmitter and transmission method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |