CN115377075A

CN115377075A - High-capacity three-dimensional stacked DDR3 micro-component memory bank

Info

Publication number: CN115377075A
Application number: CN202211048666.5A
Authority: CN
Inventors: 石梦诗; 毛臻; 余国良; 顾林; 孙晓冬
Original assignee: CETC 58 Research Institute
Current assignee: CETC 58 Research Institute
Priority date: 2022-08-30
Filing date: 2022-08-30
Publication date: 2022-11-22

Abstract

The invention discloses a high-capacity three-dimensional stacked DDR3 micro-component memory bank, which belongs to the field of semiconductor storage and comprises 1 DDR3 micro-component, a PCB (printed circuit board) substrate, a plurality of resistance capacitors and a golden finger. The DDR3 micro component and the plurality of resistance capacitors are welded on the PCB substrate, and the gold fingers are located on the front face and the back face of the PCB substrate. The DDR3 micro-component internally comprises 5 pieces of bare chips subjected to RDL rewiring and is formed by three-dimensional stacking and packaging. The DDR3 micro-assembly is connected to the PCB substrate, and part of signals are led to the golden finger, so that the external leading-out of pins of the DDR3 micro-assembly is realized; the memory bank package is in the form of a DIMM. The invention adopts the DDR3 micro-assembly with large-capacity three-dimensional stacking, thereby realizing the large capacity, small size, light weight, small wiring time delay, high speed and high reliability of the memory bank.

Description

High-capacity three-dimensional stacked DDR3 micro-component memory bank

Technical Field

The invention relates to the technical field of semiconductor storage, in particular to a high-capacity three-dimensional stacked DDR3 micro-component memory bank.

Background

The memory is an important part of the computer and is used for temporarily storing operation data in the CPU and exchanging data with an external memory (i.e., an external memory) such as a hard disk; it is a bridge for communicating the external memory and the CPU. All programs in the computer are run in the memory, the level of the overall performance of the computer is affected by the strength of the memory performance, and the memory is usually in an independent packaging form, namely a memory bank.

At present, the memory bank is mainly of a DDR SDRAM (Double Data Rate synchronous random-access memory) type, and is a Double Data Rate synchronous dynamic random access memory. The SDRAM only transmits data once in a clock period, and the data transmission is carried out in the rising period of the clock; the DDR SDRAM transfers data twice in one clock cycle, and it can transfer data once in each of the rising and falling periods of the clock. Common interfaces for memory banks are SIMM single inline memory banks and DIMM dual inline memory banks. The operation of the memory determines the overall operation speed of the computer, the current commonly used memory is a DDR3 memory bank, and the bit width of DDR3 granule data is usually 8 bits and 16 bits. In order to meet the requirement of ultra-large capacity of the whole machine, a plurality of DDR3 particles are usually welded on a memory bank, so that the memory bank occupies a large area on a PCB, the integration level is low, the memory is difficult to further expand, and the problems of low reliability, heavy weight and the like are solved; meanwhile, because the DDR3 clock, the command and the address adopt a daisy chain connection mode, the span between the first DDR3 particle and the last DDR3 particle is large, the distance is long, the signal transmission delay is large, and the timing coordination difficulty is large.

Disclosure of Invention

The invention aims to provide a high-capacity three-dimensional stacked DDR3 micro-component memory bank, which aims to solve the problems of large area of the memory bank, long wiring delay, large volume of a system and heavy weight caused by the fact that a single DDR3 particle memory is small and multiple DDR3 particles need to be welded on the memory bank for matching use at present.

In order to solve the technical problem, the invention provides a high-capacity three-dimensional stacked DDR3 micro-component memory bank, which comprises 1 DDR3 micro-component, a PCB (printed circuit board) substrate, a plurality of resistance capacitors and gold fingers, wherein the PCB substrate is provided with a plurality of through holes;

the DDR3 micro component and the plurality of resistance capacitors are welded on the PCB substrate, and the gold fingers are positioned on the front side and the back side of the PCB substrate;

and the DDR3 micro-assembly is connected to the PCB substrate, and part of signals are led to the golden finger, so that the DDR3 micro-assembly is led out outwards through pins and is packaged as a DIMM.

In one embodiment, the DDR3 micro-assembly comprises a plastic package substrate, an insulating adhesive, n first DDR3 chips, n-1 second DDR3 chips, a gold wire, a plastic package body and a solder ball, wherein n is an integer not less than 2;

a first DDR3 chip is electrically connected with the plastic package substrate in a bonding mode through a gold wire and is bonded on the plastic package substrate through insulating glue; a second DDR3 chip is bonded to the first DDR3 chip in a stacking mode through insulating glue, and then is electrically connected with the plastic package substrate in a bonding mode through a gold wire, and the like, wherein the first DDR3 chip and the second DDR3 chip are arranged in an overlapping mode;

the plastic package body is used for plastically packaging the insulating glue, the first DDR3 chip, the second DDR3 chip and the gold wire on the plastic package substrate, and the solder balls are arranged at the bottom of the plastic package substrate.

In one embodiment, the n first DDR3 chips fan out the pads to the left through a rewiring process, and the n-1 second DDR3 chips fan out the pads to the right through a rewiring process.

In one embodiment, the DDR3 micro-component includes 3 first DDR3 chips and 2 second DDR3 chips, i.e., 5 dies are respectively Die0, die1, die2, die3, and Die4;

the Die0 brings out data lines DDR _ DQ [0 ] to a gold finger, the Die1 brings out data lines DDR _ DQ [ 16; the data line DDR _ DQ [64 ];

the data line DDR _ DQ [72 ] of the Die4 is led out to a solder ball of the DDR3 micro component, and whether the data line DDR _ DQ [ 79] is led out to a gold finger is determined according to needs.

In one embodiment, the DDR _ A [ 0.

In one embodiment, the resistance calibration signal DDR _ ZQ for each Die within the DDR3 micro-component is separately routed to solder balls, and pulled down to ground with a resistor on the PCB substrate.

In one embodiment, the DDR _ DQSP [0 ], DDR _ DQSN [0 ] and DDR _ DM [ 0.

In one embodiment, the DDR _ CKP signals of each Die in the DDR3 micro-component are connected together, the DDR _ CKN signals of each Die are connected together, then the two signals are led out to the solder balls and then to the gold fingers, and a resistor is connected between the two signals on the PCB substrate in a bridging manner.

In one embodiment, the power supply signals VDD, VDDQ, VREFDQ, VREFCA, VSS of each Die within the DDR3 micro component are collectively connected together internally and then routed to the gold fingers.

In one embodiment, the PCB substrate is internally provided with a power supply layer, a ground layer and a plurality of signal line layers, wherein the layers are mutually isolated through an insulating layer; the number of golden fingers on the PCB substrate is 240 needles, the length of the PCB substrate is 133.35mm, and the height of the PCB substrate is 25.0mm.

The invention provides a high-capacity three-dimensional stacked DDR3 micro-component memory bank which has the following beneficial effects compared with the prior art:

(1) Based on the DDR3 micro-component memory bank with large-capacity three-dimensional stacking, the technical means of advanced packaging is adopted, and the problems of large area, long wiring delay, large volume, heavy weight and the like of the conventional memory bank are solved;

(2) The DDR3 micro-component memory bank with large capacity has small size, low power consumption, stable performance and high reliability;

(3 the DDR3 micro-component memory bank with large-capacity three-dimensional stacking reduces the overall wiring length of a clock and a command signal, reduces wiring differences among DDR3 particles, reduces time delay, simplifies time sequence control, and can further improve reading and writing speed.

Drawings

Fig. 1 is a schematic block diagram of a high-capacity three-dimensionally stacked DDR3 micro-component memory bank according to the present invention.

Fig. 2 is a top view of a large-capacity three-dimensionally stacked DDR3 micro-component memory bank provided in the present invention.

Fig. 3 is a bottom view of a high-capacity three-dimensionally stacked DDR3 micro-component memory bank provided by the present invention.

Fig. 4 is a partial side view of a large-capacity three-dimensionally stacked DDR3 micro-component memory bank provided by the present invention.

Detailed Description

The following describes a large-capacity three-dimensional stacked DDR3 micro device memory bank according to the present invention in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

The invention provides a high-capacity three-dimensional stacked DDR3 micro-component memory bank which comprises 1 DDR3 micro-component, a PCB (printed circuit board) substrate, a plurality of resistance capacitors and gold fingers.

Fig. 1 is a schematic block diagram of a large-capacity three-dimensionally stacked DDR3 micro-component memory bank according to the present invention. The DDR3 micro component includes 5 dice Die in total, die0, die1, die2, die3, and Die4, respectively. The Die0 brings out the data lines DDR _ DQ [0 ] to the gold finger, the Die1 brings out the data lines DDR _ DQ [16 ] to the gold finger, the Die2 brings out the data lines DDR _ DQ [ 47] to the gold finger, the Die3 leads a data line DDR _ DQ [48 ] to the gold finger, and the Die4 leads a data line DDR _ DQ [64 ]; the data line DDR _ DQ [ 64. The data line DDR _ DQ [72 ] 79 of the Die4 is led out to the solder ball of the DDR3 micro component, and whether the data line is led out to a gold finger or not can be determined according to requirements. The signals of DDR _ A [0 ] 15, DDR _ RST _ N, DDR _ ODT _0, DDR _ODT _ODT1, DDR _CKE0, DDR _CKE1, DDR _CS0_N, DDR _CAS _N, DDR _RAS _N, DDR _WE _N, DDR _BA [ BA ] "0 ] of each Die within the DDR3 micro-component are all internally connected together, led out onto the solder balls of the DDR3 micro-component, and then each signal is connected with a pull-up resistor to VTT on the PCB substrate of the DDR3 memory bank, respectively, and led out to a gold finger. The DDR _ ZQ signal (i.e., DDR _ ZQ [0 [4 ]) for each Die in the DDR3 micro-component is separately brought out to the solder balls, and pulled down to ground with a 240 ohm resistor on the PCB substrate of the DDR3 memory bank. DDR _ DQSP [0 ], DDR _ DQSN [0 ]. DDR _ CKP signals of each bare Die Die in the DDR3 micro-assembly are connected together, DDR _ CKN signals of each bare Die Die are connected together, then the two signals are led out to a solder ball and then to a gold finger, and a 82-ohm resistor is connected between the two signals on the PCB substrate in a bridging mode. The power supply signals VDD, VDDQ, VREFDQ, VREFCA, VSS of each Die Die in the DDR3 micro-assembly are uniformly connected together internally and then led out to the gold fingers.

Fig. 2 is a top view of the large-capacity three-dimensional stacked DDR3 micro-component memory bank according to the present invention, the DDR3 micro-component and a plurality of resistor capacitors are welded on the PCB substrate to form the DDR3 micro-component memory bank, the size of the DDR3 micro-component memory bank is 133.35mm × 25.0mm, the package form is DIMM, and the volume of the DDR3 micro-component is 12mm × 14.5mm × 2.08mm.

Fig. 3 is a bottom view of a large-capacity three-dimensional stacked DDR3 micro-component memory bank according to the present invention. The front and the back of the PCB substrate both contain gold fingers, and the total number of the gold fingers is 240 pins for signal and power connection.

In the above, the DDR3 micro component is welded on the front side of the PCB substrate, and in order to further expand the memory capacity, the DDR3 micro component may be welded on the back side again.

Fig. 4 is a partial side view of a high-capacity three-dimensional stacked DDR3 micro-component memory bank according to the present invention, which mainly includes a plastic package substrate 1, an insulating paste 2, a first DDR3 chip 3 after re-wiring, a second DDR3 chip 4, a gold wire 5, a plastic package body 6, a solder ball 7, and a PCB substrate 8; the first DDR3 chip 3 fans out the bonding pad to the left through the rewiring design, and the second DDR3 chip 4 fans out the bonding pad to the right through the rewiring design. Firstly, a first DDR3 chip 3 is electrically connected with a plastic package substrate 1 in a bonding mode through a gold wire 5 and is bonded on the plastic package substrate 1 through an insulating glue 2; a second DDR3 chip 4 is bonded to the first DDR3 chip 3 through an insulating adhesive 2 in a stacking manner, and then an electrical connection is established with the plastic package substrate 1 through a gold wire 5 in a bonding manner, so on, the first DDR3 chip 3 and the second DDR3 chip 4 are arranged in an overlapping manner, and 3

first DDR3 chips

3 and 2 second DDR3 chips 4 are placed in total. And finally, forming a plastic package body 6 by injection molding, arranging solder balls 7 at the bottom of the plastic package substrate 1, and finally forming the DDR3 micro-assembly. The manufactured DDR3 micro-assembly is welded on the PCB substrate 8, and a memory bank based on the DDR3 micro-assembly is formed.

The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.

Claims

1. A high-capacity three-dimensional stacked DDR3 micro-component memory bank is characterized by comprising 1 DDR3 micro-component, a PCB substrate, a plurality of resistance capacitors and golden fingers;

2. The high-capacity three-dimensional stacked DDR3 micro-component memory bank as claimed in claim 1, wherein the DDR3 micro-component comprises a plastic package substrate, an insulating glue, n first DDR3 chips, n-1 second DDR3 chips, a gold wire, a plastic package body and a solder ball, n is an integer not less than 2;

a first DDR3 chip is electrically connected with the plastic package substrate in a bonding mode through a gold wire and is bonded on the plastic package substrate through insulating glue; a second DDR3 chip is bonded to the first DDR3 chip in a stacking mode through insulating glue, and then is electrically connected with the plastic package substrate in a bonding mode through gold wires in the same way, and the first DDR3 chip and the second DDR3 chip are arranged in an overlapping mode;

the plastic package body is used for plastically packaging an insulating glue, a first DDR3 chip, a second DDR3 chip and a gold wire on the plastic package substrate, and the solder balls are arranged at the bottom of the plastic package substrate.

3. The high capacity stereo stacked DDR3 micro component memory bank of claim 2, wherein n first DDR3 chips fan out the pads to the left through a rewiring process and n-1 second DDR3 chips fan out the pads to the right through a rewiring process.

4. The DDR3 micro-component memory bank according to claim 3, wherein the DDR3 micro-component comprises 3 first DDR3 chips and 2 second DDR3 chips, i.e. 5 dies are Die0, die1, die2, die3 and Die4, respectively;

the Die0 brings out data lines DDR _ DQ [0 ] to the gold finger, the Die1 brings out data lines DDR _ DQ [16 ] to the gold finger, the Die2 brings out data lines DDR _ DQ [32 ] to the gold finger, the Die Die3 leads a data line DDR _ DQ [48 ] to the gold finger, and the Die Die4 leads a data line DDR _ DQ [64 ]; the data line DDR _ DQ [64 ] is capable of error checking and correction;

the data line DDR _ DQ [72 ] of the Die Die4 is led out to a solder ball of the DDR3 micro-component, and whether the data line DDR _ DQ [ 79] is led out to a gold finger is determined according to requirements.

5. The high capacity stereo-stacked DDR3 micro-component memory strip according to claim 4, wherein DDR _ a [0 ], DDR _ RST _ N, DDR _ ODT _0, DDR _odt1, DDR _cke0, DDR _cke1, DDR _cs0_n, DDR _casu N, DDR _ras _n, DDR w we _n, DDR _ba2 signals of each Die within said DDR3 micro-component are all internally connected together, led out to the solder balls of the DDR3 micro-component, and then each signal is connected to a pull-up resistor to VTT on said PCB substrate and led out to a gold finger, respectively.

6. The high capacity stereo-stacked DDR3 micro-component memory bank of claim 4, wherein the resistance calibration signal DDR _ ZQ for each Die within said DDR3 micro-component is separately routed to a solder ball, resistively pulled down to ground on said PCB substrate.

7. The DDR3 micro-component memory bank with high-volume three-dimensional stacking as claimed in claim 4, wherein DDR _ DQSP [0 ], DDR _ DQSN [0 ] and DDR _ DM [0 ].

8. The DDR3 micro-component memory bank with large capacity and three-dimensional stacking as claimed in claim 4, wherein DDR _ CKP signals of each Die Die in the DDR3 micro-component are connected together, DDR _ CKN signals of each Die Die are connected together, then the two signals are led out to a solder ball and then to a gold finger, and a resistor is connected between the two signals on the PCB substrate in a bridging manner.

9. The DDR3 micro-component memory bank with high volume stereoscopic stacking of claim 4, wherein the power supply signals VDD, VDDQ, VREFDQ, VREFCA, VSS of each Die within the DDR3 micro-component are unified internally together and then brought out to the golden finger.

10. The DDR3 micro-component memory bank with large capacity three-dimensional stacking of claim 1, wherein the PCB substrate is internally provided with a power supply layer, a ground layer and a plurality of signal line layers, and the layers are isolated from each other through an insulating layer; the number of golden fingers on the PCB substrate is 240 needles, the length of the PCB substrate is 133.35mm, and the height of the PCB substrate is 25.0mm.