CN115372799A - De-embedding method under gallium arsenide-based integrated circuit process - Google Patents
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Abstract
The invention discloses a de-embedding method under a gallium arsenide-based integrated circuit process, which comprises the following steps: constructing a straight-through, reflection and line calibration piece structure; acquiring S parameters of a to-be-detected piece and a calibration piece; solving eight errors introduced by the lead and the bonding pad structure; according to the eight errors, de-embedding the S parameter of the piece to be detected is completed; eight errors introduced by the lead and the pad structure are calculated by S parameters of the straight-through, reflection and line calibration pieces through methods of scattering parameter cascade, signal flow analysis and matrix identity, and finally, the S parameters of the piece to be tested are de-embedded according to the scattering parameter cascade principle. The method can eliminate the influence of the lead and the pad structure on the performance of the original circuit during the measurement of the gallium arsenide-based radio frequency integrated circuit, and has the advantages of good de-embedding effect, less required calibration parts and low occupation of computing resources.
Description
Technical Field
The invention belongs to the field of radio frequency microwave measurement, and particularly relates to a de-embedding method under a gallium arsenide-based integrated circuit process.
Technical Field
Modern wireless communication systems are moving towards high frequency, high speed and miniaturization, and corresponding radio frequency devices are also moving towards high integration. Due to the smaller size and higher working frequency of the radio frequency integrated device, the lead and bonding pad structures introduced during measurement have larger influence on the performance of the device during radio frequency microwave measurement. The de-embedding method for the measurement on the radio frequency integrated circuit chip has high practicability.
The radio frequency integrated device is manufactured by a complex semiconductor process, and the physical size of the radio frequency integrated device is in a micron order. The related measurement is wafer measurement, namely, a semiconductor wafer where a device is located is fixed on a radio frequency probe station, and the device is measured through a micron-sized radio frequency probe connected with a vector network analyzer by means of microscope observation operation.
The calibration before the wafer measurement is divided into off-chip calibration and on-chip de-embedding, wherein the off-chip calibration is to calibrate a reference surface during measurement from a port of a vector analyzer to a radio frequency probe tip by using a standard component matched with the vector analyzer. On-chip de-embedding is to use a self-made calibration piece to translate the reference surface during measurement from the radio frequency probe tip to the ideal position of the device to be measured.
An on-wafer measurement calibration procedure for a 16-term error model is proposed in document 1 (j.v. butler, d.ryting, m.f. iskander, r.pollard and m.van der bosche, "16-term error model and calibration procedure for on-wafer network analysis (MMICs)," in IEEE trans. Microwave Symposium Digest, vol.3, no.12, pp.1125-1127, dec.1991), in which eight errors are used to trace leakage errors due to the crosstalk on both sides of the device under test, and for a signal leakage free system, the error model can be greatly simplified while ensuring constant de-embedding accuracy.
A10-Term Error Model de-embedding Method is proposed in document 2 (C.Liu, A.Wu, C.Li and N.Ridler, "ANew SOLT Calibration Method for leak On-Wafer Measurements Using a 10-Term Error Model," in IEEE Transactions On Microwave Theory and Techniques, vol.66, no.8, pp.3894-3900, aug.2018.), which is a simplification of the 16-Term Error Model and depends very much On the accuracy of the matching Calibration.
In a system without leakage crosstalk, on the premise of ensuring de-embedding precision, the error model can be further simplified into an eight-term error model. The de-embedding process is achieved by using a set of straight-through, reflective and wire alignment elements. And solving the eight error networks on the two sides of the to-be-detected element by using the scattering parameters of the calibration element through a matrix identity and signal flow analysis method, and finally completing de-embedding correction of the scattering parameters of the to-be-detected element according to a scattering parameter cascade principle.
Disclosure of Invention
The invention aims to provide a de-embedding method under a gallium arsenide-based integrated circuit process, which eliminates the influence of a lead and a bonding pad structure introduced during measurement on a radio frequency integrated circuit chip on a measurement result of scattering parameters of a to-be-measured element; through the scattering parameters of the straight-through, reflection and line calibration pieces, eight interference errors introduced by the lead and the bonding pad structure are determined through calculation of a de-embedding algorithm, and de-embedding is finally completed according to the cascade principle of the scattering parameters.
The technical solution for realizing the purpose of the invention is as follows: in a first aspect, the present invention provides a de-embedding method under a gaas-based integrated circuit process, including the steps of:
step 1, constructing a straight-through, reflection and line calibration piece according to a lead and a pad structure of a piece to be tested;
step 2, obtaining S parameters of the piece to be measured and the calibration piece;
step 3, solving eight errors introduced by the lead and the pad structure;
and 4, completing de-embedding of the S parameter of the piece to be detected according to the eight errors.
In a second aspect, the present application further provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the method of the first aspect is implemented.
In a third aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, which when executed by a processor, implements the method of the first aspect.
Compared with the prior art, the invention has the beneficial effects that:
(1) The de-embedding algorithm provided by the invention is obtained by analyzing the black box theory, and only a port scattering parameter matrix of an error network introduced by a bonding pad and a transmission line is concerned, so that the complex modeling of the inside of the error network is not needed, and the operation is simple and convenient;
(2) The straight-through, reflection and line calibration piece used for de-embedding does not need to depend on a standard piece with high precision requirement such as a matching calibration piece, and has better de-embedding precision and repeatability;
(3) Aiming at a system without leakage crosstalk, the error model is further simplified into an eight-term error model, the de-embedding precision is ensured, the de-embedding algorithm is simpler, and the de-embedding program is lower in time complexity.
Drawings
FIG. 1 is a flow chart of an implementation of the present invention.
Fig. 2 is a schematic structural diagram of an inductor device under test used for de-embedding demonstration in the present invention.
FIG. 3 is a schematic diagram of the lead and pad structures required to be introduced for the measurement of the DUT in the de-embedding demonstration of the present invention, which is an error net part for de-embedding and eliminating.
Fig. 4 (a) is a schematic view of a straight-through calibration piece, fig. 4 (b) is a schematic view of a reflective calibration piece, and fig. 4 (c) is a schematic view of a line calibration piece.
Fig. 5 (a) is a schematic diagram of a straight-through element cascade T parameter matrix, fig. 5 (b) is a schematic diagram of a line calibration element cascade T parameter matrix, and fig. 5 (c) is a schematic diagram of a reflection calibration element port normalized voltage.
FIG. 6 (a) shows S 11 Real part de-embedding result graph, wherein FIG. 6 (b) is S 11 And (4) embedding the imaginary part into a result graph.
FIG. 7 (a) shows S 21 Real part de-embedding result graph, wherein FIG. 7 (b) is S 21 And (4) embedding the imaginary part into a result graph.
FIG. 8 (a) shows S 11 Phase de-embedding result diagram, FIG. 8 (b) is S 21 And (5) phase de-embedding result graph.
Detailed Description
As shown in fig. 1, the present invention provides a de-embedding method under the gaas-based integrated circuit process, including: constructing a straight-through, reflection and line calibration piece according to the lead and the pad structure of the piece to be tested; acquiring S parameters of a to-be-detected piece and a calibration piece; importing S parameters of the to-be-tested piece and the calibration piece into a computer de-embedding program; solving eight errors introduced by the lead and the bonding pad structure; and according to the eight errors, de-embedding the S parameter of the piece to be detected.
Aiming at the influence of a lead and a bonding pad structure introduced during the measurement of a two-port radio frequency integrated circuit on the performance of the original circuit, the method adopts a set of straight-through, reflection and line calibration pieces to de-embed the measurement result so as to restore the original performance of the radio frequency integrated circuit.
The calibration is constructed as follows: directly communicating lead wires led in from two sides of the piece to be measured with the pad structure to form a through calibration piece; horizontally placing lead wires and pad structures led in from two sides of a piece to be measured, and keeping a certain distance to realize open circuit of a terminal to form a reflection calibration piece; the lead and pad structures led in from two sides of the element to be tested are horizontally arranged, and a section of transmission line with equal width is connected in the middle to form a line calibration element, so that in order to avoid phase ambiguity generated by de-embedding results, the phase delay caused by the length of the transmission line is required to be not more than 160 degrees.
Acquiring S parameters of the to-be-detected piece and the calibration piece, importing the S parameters into a computer de-embedding program, and converting the S parameters of the to-be-detected piece and the calibration piece into T parameters for subsequent solution of eight errors of an error network; the method specifically comprises the following steps:
converting S parameter matrixes of the straight-through calibration piece and the line calibration piece into cascaded T parameter matrixes;
according to the cascade principle of T parameters, a straight-through piece T parameter matrix is equal to the cascade of error network T parameter matrixes on two sides of the piece to be tested, and a line calibration piece T parameter matrix is equal to the cascade of the middle of the error network T parameter matrixes on the two sides of the piece to be tested and an extension line T parameter matrix; solving an error item e of error networks on two sides of the to-be-measured piece according to the two matrix identity relation simultaneous equations 1 、e 2 ；
According to the identity relation that the T parameter matrix of the straight-through piece is equal to the cascade of the T parameter matrixes of the error networks on the two sides of the piece to be detected, the error item e is substituted 1 、e 2 And eliminating elements, simplifying and solving an error term e of error networks on two sides of the piece to be measured 3 、e 4 、e 5 、e 6 ；
According to the operation rule of the cascade T parameter matrix of two ports of the reflection calibration part, the normalized voltage wave of the port 1 is equal to the normalized voltage wave of the cascade T parameter matrix of the reflection part network multiplied by the port 2 to obtain the reflection calibrationAn expression of port scattering parameters, terminal reflectivity and reflector cascade T parameters on port normalized voltage waves is obtained through elimination and simplification 7 、e 8 。
The solution to the eight errors is as follows: t parameter error matrix T for leading in left and right bonding pads and lead of to-be-tested piece A 、T B Is composed of
T A 、T B I.e. the error matrix required, where a, b, c, d, e, f, x 22 、y 22 The unknown quantity of the T parameter error matrix introduced for the left and right bonding pads and the lead of the to-be-measured element is eight errors required to be obtained; converting S parameter matrix of straight-through calibration piece and line calibration piece into cascade T parameter matrix T t And T l Is provided with
Wherein T is t And T l A cascaded T parameter matrix of straight-through elements and line calibration elements, a cascaded T parameter matrix of line calibration elements T for measuring known quantities l Composed of left and right error networks and T parameter matrix cascade of middle extension line according to transmission line theory
A T-parameter matrix being an extension of the line calibration element, where γ is the transmission line propagation constant, l is the transmission line length,
subsequent calculations can be removed by elimination, and are not required to be known;
multiplying the T parameter matrix of the linear calibration piece by the inverse of the T parameter matrix of the direct calibration piece to obtain a known measurement quantity; return loss at the input port of the reflector is S R11 、S R22 Are all known quantities.
According to T t ＝T A *T B 、
Substituting the equation relationship of the matrix into the elimination
Namely:
removing by elimination element according to the above matrix identity relation
To obtain a term e related to the error 1 、e 2 The system of equations of (1):
wherein
e 2 ＝b，T L The T parameter matrix of the extension line of the line calibration piece is not required to be known; error term e 1 、e 2 I.e. the solution of the above equation.
According to T t ＝T A *T B The cascade relation of the straight-through pieces is as the following matrix equation:
solving the following four error terms according to the matrix identity relation:
the relationship between a T parameter matrix cascaded by two ports of the reflection calibration piece and port normalized voltage waves is obtained as follows:
wherein a is ij 、b ij And (3) normalizing voltage waves at the port of the reflection calibration piece, wherein i is the number of the input port of the reflection calibration piece, and j is the number of the port of the single-side reflection piece. The reflection coefficient at the open circuit at the tail end of the reflection piece is gamma R And need not be known. The error term is obtained through elimination and simplification as follows:
according to eight errors that find accomplish the de-embedding to the measured S parameter, specifically include: converting the S parameter matrix of the piece to be detected into a T parameter matrix for subsequent operation processing; obtaining a T parameter matrix after de-embedding of the piece to be detected by correcting the T parameter cascade relation, wherein the T parameter matrix is equal to two sides of the T parameter matrix without de-embedding of the piece to be detected and multiplied by an error item e 1～ e 8 Determining an inverse matrix of an error network T parameter matrix on two sides of the to-be-detected element; and converting the T parameter matrix obtained after the de-embedding of the piece to be detected into an S parameter matrix for output.
Completion of e 1 ～e 8 After solving the eight errors, according to the scattering parameter cascade principle, the T parameter matrix of the de-embedded part to be detected is expressed as follows:
wherein T is de-embed Is a T parameter matrix obtained after de-embedding of a to-be-detected piece, T A 、T B Is a cascaded T parameter error matrix introduced by the left and right bonding pads and the lead of the piece to be tested, T dut Is a T parameter matrix of the to-be-detected piece without de-embedding.
And finally, converting the T parameter matrix of the de-embedded part to be tested into an S parameter matrix for output, namely completing de-embedding of the S parameter of the part to be tested.
The invention is further illustrated by the following figures and examples.
Examples
As shown in fig. 1, the de-embedding method under the gaas-based integrated circuit process of the present invention is implemented by four steps: constructing a straight-through, reflection and line calibration piece structure; acquiring S parameters of a to-be-detected piece and a calibration piece; solving eight errors introduced by the bonding pad and the lead; and according to the eight errors, de-embedding the S parameter of the piece to be detected.
The construction of the calibration piece comprises three steps: directly communicating lead wires led in from two sides of the piece to be measured with the pad structure to form a through calibration piece; horizontally placing lead wires and pad structures led in from two sides of a piece to be measured, and keeping a certain distance to realize open circuit of a terminal to form a reflection calibration piece; the lead and the pad structures led in from two sides of the piece to be tested are horizontally placed, and a section of transmission line with the same width is connected in the middle to form a line calibration piece, in order to avoid phase ambiguity generated by a de-embedding result, the phase delay caused by the length of the transmission line is required to be lower than 160 degrees, the frequency range corresponding to the phase is the applicable frequency range for de-embedding, and the specific length is determined by electromagnetic simulation software.
Inputting S parameters of the to-be-measured piece and the calibration piece into a computer, and converting the S parameter matrix of the to-be-measured piece into a T parameter matrix T dut Converting S parameter matrix of straight-through part into T parameter matrix T t Conversion of S parameter of line calibration part into T parameter matrix T l For subsequent de-embedding processing.
Fig. 5 (a), 5 (b) and 5 (c) show cascade diagrams of T-parameter error networks and port normalized voltage wave diagrams of straight-through, line and reflection calibration pieces. According to T t ＝T A *T B 、T l ＝T A *T L *T B The matrix identity relation and the relation between the two port cascade T parameter matrixes of the reflection calibration part and the port normalized voltage wave are further analyzed and solved to obtain eight errors of the error network on the two sides of the part to be measured, and the specific result expression is as follows:
wherein T is t 、T l Is a T parameter matrix of a pass-through and a line calibration, T L A T-parameter matrix, not necessarily known, being the extension of the line calibration element, S R11 、S R22 Is the return loss at the two ports of the reflector. With known quantity
T parameter matrix of error network on two sides of piece to be measured determined by eight errors
Wherein x 22 y 22 ＝e 3 。
According to the obtained error network and the cascade relation of the error network in the to-be-detected piece, the de-embedding of the T parameter matrix of the to-be-detected piece is completed, and the T parameter matrix T after the de-embedding of the to-be-detected piece is completed de-embed The expression is as follows:
wherein T is A 、T B The method is characterized in that a cascaded T parameter error matrix introduced by a left bonding pad, a right bonding pad and a lead of a to-be-tested element is determined by the solved eight errors, T dut Is a T parameter matrix of the to-be-detected piece without de-embedding.
And finally, converting the T parameter subjected to de-embedding into an S parameter for output, drawing a de-embedding result graph, and completing de-embedding of the scattering parameter of the to-be-detected piece.
Fig. 2 shows an inductor to be tested, which is a planar spiral inductor using gaas-based integrated circuit process, wherein the metal layer on the substrate is a composite structure of three layers of metal and compound. The thickness of the gallium arsenide substrate 1 is 100um, the grounding pad 2 is 80 multiplied by 75um, the distance between the grounding pad and the signal pad 3 is 50um, the signal pad 4 is 65 multiplied by 75um, and the grounding column 5 connects the grounding pad and the signal ground below the gallium arsenide substrate. As the demonstration of the universal de-embedding method, the size of the inductor 6 to be tested is random, and the length of the signal lead 7 is random.
Fig. 3 shows the bonding pads and leads required for measuring the inductance to be measured, and the structure which has influence on the measurement result and is eliminated for de-embedding. Wherein 1 thickness of gallium arsenide base is 100um, and ground pad 2 is 80X 75um, and ground pad is 50um with signal pad interval 3, and signal pad 4 is 65X 75um, and 5 length of signal lead are 150um, and the width is 10um, and is unanimous with the inductance linewidth that awaits measuring, and ground column 6 communicates ground pad and gallium arsenide base below signal ground.
Fig. 4 (a) -4 (c) show the structure of the calibration piece determined according to the pad and lead structure required to be introduced for measuring the inductance to be measured, wherein fig. 4 (a) is a through calibration piece, the thickness of the gaas substrate 1 is 100um, the ground pad 2 is 80 × 75um, the distance between the ground pad and the signal pad 3 is 50um, the signal pad 4 is 65 × 75um, the length of the signal lead 5 is 300um, the width is 10um, and the ground pin 6 connects the ground pad and the gaas substrate lower signal ground. Fig. 4 (b) is a reflective alignment feature, the substrate, pad and ground post structure is the same as the feed-through, with open-ended lead 7 being 150um long and 10um wide. Fig. 4 (c) is a line calibration piece, the substrate, pad and ground pillar structure is the same as the through piece, wherein the connecting line 8 is 800um long and 10um wide.
FIG. 5 (a) is a schematic diagram of cascaded T parameter matrices of a pass-through, which is a measurement of scattering parameter matrices at two ends of the pass-through, and is represented by an error network T A 、T B Cascade connection is carried out; FIG. 5 (b) is a schematic diagram of a cascade T parameter matrix of a line calibration piece, measuring scattering parameter matrices at both ends of the line calibration piece, which is formed by an error network T A 、T B The line calibration piece extension line T parameter matrix is cascaded; FIG. 5 (c) is a schematic diagram of normalized voltage at the port of the reflective calibration member, and the return loss S at the two ends of the reflective calibration member is measured R11 、S R22 。
After the structures of the to-be-detected piece and the calibration piece are prepared and the scattering parameters of the to-be-detected piece and the calibration piece are obtained, the scattering parameters of the to-be-detected piece and the calibration piece are led into a computer, de-embedding is completed through processing of the de-embedding algorithm program detailed in the foregoing, and finally an de-embedding result graph is output.
FIG. 6 (a) to FIG. 6 (b) shows S 11 De-embedding result graph of parameters, whichIn FIG. 6 (a) is S 11 Real part de-embedding result graph, wherein FIG. 6 (b) is S 11 And (4) embedding the imaginary part into a result graph.
FIG. 7 (a) to FIG. 7 (b) shows S 21 De-embedding result graph of parameters, wherein FIG. 7 (a) is S 21 Real part de-embedding result graph, wherein FIG. 7 (b) is S 21 And (4) embedding the imaginary part into a result graph.
FIGS. 8 (a) to 8 (b) are graphs showing the de-embedding result of the phase, where S is shown in FIG. 8 (a) 11 Phase de-embedding result diagram, FIG. 8 (b) is S 21 And (5) phase de-embedding result graph.
In the legend, an expected curve is a scattering parameter of an inductor to be detected without a lead and a bonding pad structure, a dut curve is a scattering parameter of a part to be detected which is not subjected to de-embedding, and de-embeded is a scattering parameter output after de-embedding. The de-embedding result is displayed in a frequency band of 5-30 GHz, the de-embedding error is kept within 5%, and the de-embedding effect on the scattering parameters of the to-be-detected piece is good.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims (10)
1. A de-embedding method under a gallium arsenide-based integrated circuit process is characterized by comprising the following steps:
step 1, constructing a straight-through, reflection and line calibration piece according to a lead and a pad structure of a piece to be tested;
step 2, obtaining S parameters of the piece to be measured and the calibration piece;
step 3, solving eight errors introduced by the lead and the pad structure;
and 4, completing de-embedding of the S parameter of the piece to be detected according to the eight errors.
2. The method for de-embedding in a gaas-based integrated circuit process of claim 1, wherein step 1 specifically includes:
step 1-1, directly communicating lead wires led in from two sides of a piece to be tested with a pad structure to form a straight-through calibration piece;
step 1-2, horizontally placing lead wires and pad structures led in from two sides of a piece to be tested, and keeping a certain distance to realize open circuit of a terminal to form a reflection calibration piece;
step 1-3, horizontally placing lead wires and pad structures led in from two sides of a to-be-tested piece, connecting a section of transmission line with equal width in the middle to form a line calibration piece, and requiring that the phase delay caused by the length of the transmission line is not more than 160 degrees.
3. The method of claim 2, wherein step 3 comprises:
step 3-1, converting the S parameter matrix of the straight-through calibration piece and the line calibration piece into a cascade T parameter matrix;
3-2, according to the cascading principle of the T parameters, a straight-through piece T parameter matrix is equal to the cascading of error network T parameter matrixes on two sides of the piece to be tested, and a line calibration piece T parameter matrix is equal to the cascading of the middle of the error network T parameter matrixes on the two sides of the piece to be tested and an extension line T parameter matrix; solving an error item e of error networks on two sides of the to-be-measured piece according to the two matrix identity relation simultaneous equations 1 、e 2 ；
3-3, according to the identity relation that the T parameter matrix of the straight-through piece is equal to the cascade of the T parameter matrixes of the error networks on the two sides of the piece to be tested, substituting the error item e 1 、e 2 And eliminating elements, simplifying, solving error item e of error network at two sides of the piece to be measured 3 、e 4 、e 5 、e 6 ；
Step 3-4, according to the operation rule of the cascade T parameter matrix of the two ports of the reflection calibration piece, the normalized voltage wave of the first port is equal to the reflection piece network cascade T parameter matrix multiplied by the normalized voltage wave of the second port to obtain the scattering parameter of the port of the reflection calibration piece, the terminal reflectivity and the expression of the cascade T parameter of the reflection piece on the normalized voltage wave of the port, and the error of the two sides of the piece to be measured is solved through simplificationError term e of difference network 7 、e 8 。
4. The method of claim 3, wherein the T parameter error matrix T is derived from the left and right pads and leads of the device under test A 、T B ，
a、b、c、d、e、f、x 22 、y 22 Introducing unknown quantities of T parameter error matrixes into a left bonding pad, a right bonding pad and a lead of the to-be-tested piece, namely eight required errors; converting S parameter matrix of straight-through calibration piece and line calibration piece into cascade T parameter matrix T t And T l Is provided with
Wherein T is t And T l Is a cascaded T parameter matrix of pass-through and line calibration,
multiplying the T parameter matrix of the linear calibration piece by the inverse of the T parameter matrix of the straight-through calibration piece; return loss at the input port of the reflector is S R11 、S R22 Are all known amounts;
according to T t ＝T A *T B 、T l ＝T A *T L *T B Substituting the equation relationship of the matrix into the elimination element to obtain:
obtaining the error term e according to the matrix identity relation 1 、e 2 The system of equations of (1):
wherein
e 2 ＝b，T L As a T-parameter matrix of the extension line of the line calibration element, error term e 1 、e 2 I.e. the solution of the above equation.
5. The method of claim 4, wherein the de-embedding is performed according to T t ＝T A *T B The cascade relation of the straight-through pieces is as the following matrix equation:
solving the following four error terms according to the matrix identity relation:
6. the de-embedding method under GaAs-based IC process of claim 5, wherein the relationship between the T parameter matrix cascaded across the two ports of the reflection calibration device and the normalized voltage wave at the ports is obtained by:
port1:
port2:
wherein a is ij 、b ij Normalizing voltage waves at a port of the reflection calibration piece, wherein i is the number of an input port of the reflection calibration piece, and j is the number of a port of the single-side reflection piece; the reflection coefficient at the open circuit at the tail end of the reflection piece is gamma R The error term is obtained through elimination and simplification as follows:
7. the method of claim 6, wherein the step 4 comprises:
step 4-1, converting the S parameter matrix of the piece to be detected into a T parameter matrix for subsequent operation processing;
step 4-2, obtaining a T parameter matrix after de-embedding of the piece to be detected through correcting the T parameter cascade relation, wherein the T parameter matrix is equal to two sides of the T parameter matrix without de-embedding of the piece to be detected and multiplied by an error item e 1～ e 8 Determining an inverse matrix of an error network T parameter matrix on two sides of the to-be-detected element;
and 4-3, converting the T parameter matrix obtained after the de-embedding of the piece to be detected into an S parameter matrix and outputting the S parameter matrix.
8. The method of claim 7, wherein e is performed by de-embedding in GaAs based integrated circuit (GaAs based IC) process 1 ～e 8 After solving the eight errors, according to the scattering parameter cascade principle, the T parameter matrix of the de-embedded part to be detected is expressed as follows:
wherein T is de-embed Is a T parameter matrix obtained after de-embedding of a to-be-detected piece, T A 、T B Is a cascaded T parameter error matrix, T, introduced by the left and right bonding pads and the lead wire of the piece to be tested dut Is to standAnd (5) testing the T parameter matrix of the part without de-embedding.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1-8 are implemented when the program is executed by the processor.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 8.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116449183A (en) * | 2023-04-24 | 2023-07-18 | 上海新微半导体有限公司 | De-embedding structure and method for on-chip test of radio frequency chip, storage medium and terminal |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116449183A (en) * | 2023-04-24 | 2023-07-18 | 上海新微半导体有限公司 | De-embedding structure and method for on-chip test of radio frequency chip, storage medium and terminal |
| CN116449183B (en) * | 2023-04-24 | 2024-04-05 | 上海新微半导体有限公司 | De-embedding structure and method for on-chip test of radio frequency chip, storage medium and terminal |
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