CN115361513A - Single-electron reading circuit and method based on composite dielectric grid photosensitive detector - Google Patents
Single-electron reading circuit and method based on composite dielectric grid photosensitive detector Download PDFInfo
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- CN115361513A CN115361513A CN202210942472.3A CN202210942472A CN115361513A CN 115361513 A CN115361513 A CN 115361513A CN 202210942472 A CN202210942472 A CN 202210942472A CN 115361513 A CN115361513 A CN 115361513A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
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- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
Abstract
The invention discloses a single-electron reading circuit and a method based on a composite dielectric grid photosensitive detector. The photosensitive detector comprises a photosensitive transistor and a reading transistor which are formed on the same substrate, the two transistors share a composite dielectric gate, and the composite dielectric gate comprises a bottom dielectric layer, a charge coupling layer, a top dielectric layer and a control gate. The readout circuit comprises a related double sampling circuit, an amplifying circuit and a quantizing circuit, wherein the related double sampling circuit is used for sampling drain current of a reading transistor, the amplifying circuit is used for amplifying voltage signals output by the related double sampling circuit, and the quantizing circuit is used for carrying out single-bit quantization on the voltage signals output by the amplifying circuit. The invention provides a reading circuit with low noise, high gain and high frame rate and a method thereof based on a composite dielectric grid photosensitive detector, which can realize single electron level reading and solve the problem of high-performance imaging of high-resolution low-illumination scenes.
Description
Technical Field
The invention relates to a reading mode of a photosensitive detector array, in particular to a single-electron-level low-noise, high-gain and high-frame-rate reading circuit and a method thereof based on a composite dielectric grating photosensitive detector.
Background
The photosensitive detector plays an extremely important role in daily life and the field of national defense safety, the current mainstream photosensitive detectors are divided into two categories of CCD and CMOS-APS, and with the development of the CMOS process, the CMOS-APS occupies most of the market, but with the smaller and smaller pixel size, the sensitivity and full well capacity of the CMOS-APS are lower and lower, so that the problems of greatly reduced signal-to-noise ratio, low dynamic range and poor imaging quality are caused.
In order to solve the problem of low signal-to-noise ratio of small pixels, the photosensitive detector based on the composite dielectric gate improves the signal-to-noise ratio by enlarging the capacity of a full well under the condition of small pixel size. Because a common photosensitive detector based on the composite dielectric gate does not need high sensitivity in order to detect large full-well signal quantity, a long exposure time is needed for photosensitive detection under extremely low illumination, and therefore, dark current accumulation is excessive and signals are submerged easily.
Disclosure of Invention
In view of the fact that the existing photosensitive detectors cannot meet the imaging requirements under extremely low illumination, particularly under the scene requiring high resolution, in order to solve the problem of high-performance imaging of the high-resolution low-illumination scene, the invention provides a reading circuit with low noise, high gain and high frame rate and a method thereof based on a composite dielectric grid photosensitive detector, and can realize single-electron-level reading.
The technical scheme adopted by the invention is as follows:
the single-electron reading circuit based on the composite dielectric gate photosensitive detector comprises a photosensitive transistor and a reading transistor which are formed on the same substrate, wherein the two transistors share a composite dielectric gate which comprises a bottom dielectric layer, a charge coupling layer, a top dielectric layer and a control gate; the readout circuit comprises a related double sampling circuit, an amplifying circuit and a quantizing circuit, wherein the related double sampling circuit is used for sampling drain current of the reading transistor, the amplifying circuit is used for amplifying voltage signals output by the related double sampling circuit, and the quantizing circuit is used for carrying out single-bit quantization on the voltage signals output by the amplifying circuit.
Further, the thickness of the top dielectric layer is larger than 10nm, and the size of the composite dielectric gate is smaller than 500nm.
Further, the amplifying circuit employs a charge transfer amplifying circuit.
Further, the quantization circuit employs a single bit ADC or a D-latch circuit.
Further, when the photosensitive detector is a plurality of photosensitive detectors forming an array structure, the array structure is divided into a plurality of sub-arrays, each sub-array sharing one of the readout circuits.
The invention also provides a reading method of the single-electron reading circuit based on the composite dielectric gate photosensitive detector, which comprises the following steps:
(1) Resetting: applying a voltage of-4V to the control grid and a voltage of-3V to the substrate, resetting electrons collected by a photosensitive transistor of the photosensitive detector, and reading a reset signal by a related double sampling circuit;
(2) Exposure: the voltage of 0V is applied to the control grid, the voltage of-3V is applied to the substrate, when the energy of photoelectrons is larger than the forbidden bandwidth of silicon under illumination, an electron-hole pair is excited, the generated photoelectrons are collected by the photosensitive transistor under the action of an electric field of a depletion region, the potential of the photosensitive transistor is changed and is coupled to the charge coupling layer of the composite dielectric grid to change the potential of the charge coupling layer, so that the threshold voltage for starting the reading transistor is changed, the threshold voltage change is U = Q/C, wherein Q is the charge quantity of the collected photoelectrons, and C is the capacitance of the top dielectric grid; reading the exposure signal by a correlated double sampling circuit;
(3) Reading: in the reading stage, the control grid is applied with a voltage of 2-5V, the substrate is applied with a voltage of-3-0V, and the voltages of the control grid and the substrate need to meet the requirement that the reading transistor of the photosensitive detector is in a linear region under an empty well and a full well; the drain of the read transistor is supplied with a constant voltage, the source is supplied with a constant voltage of 0V, and the drain current is read by the correlated double sampling circuit.
Furthermore, after the photosensitive detector is reset, the related double sampling circuit samples the drain current through the reset signal sampling capacitor and outputs a voltage signal VOUTR of a reset signal; after the photosensitive detector is exposed, the drain current is sampled through an exposure signal sampling capacitor, a voltage signal VOUTS of an exposure signal is output, and the difference VOUTS-VOUTR of the two voltage signals is the signal quantity corresponding to photoelectrons collected after exposure.
The detector of the invention realizes high gain at the device level, improves the integral signal-to-noise ratio of a signal transmission link, and is beneficial to improving the imaging quality. Because the signal collection amount of the photosensitive detector is far lower than the full-well capacity in a low-illumination imaging environment or an imaging condition of a very high frame rate, the high-gain output from the charge to the voltage meets the dynamic range of an analog circuit, and the difficulty of circuit design is reduced. In a post-stage circuit, the invention adopts a related double sampling circuit to reduce reset noise, shot noise and the like, thereby further improving the signal-to-noise ratio; the amplifying circuit adopts a charge transfer amplifying circuit, and compared with the structure of the traditional operational amplifier, the structure does not need continuous active input, so that the power consumption is greatly superior; in the 1-bit quantization requirement, the requirement on the amplification precision of the amplifying circuits in the reading circuits of different arrays is low, so that the advantages of the charge transfer amplifying circuit can be fully exerted, and in the quantization circuit, only 1-bit quantization is needed for low illumination or extremely high frame rate requirements, so that single-bit ADC or D-latch can be adopted for high frame rate quantization. Through the optimization from the device to the reading circuit, compared with the traditional reading mode of the threshold value of the ramp voltage scanning device adopted by the photosensitive detector based on the composite dielectric grid, the circuit reading method of the invention enables the noise to be lower than 0.2e-, which is only 2% of the traditional scheme; the conversion gain of the charge to the voltage reaches 1mv/e-, which is 4 times of that of the traditional scheme; the frame rate can reach 1000fps, while the traditional scheme is only 3fps.
Drawings
FIG. 1 is a schematic structural diagram of a composite dielectric grid-based photosensitive detector according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a read transistor of a composite dielectric gate photosensitive detector;
FIG. 3 is a schematic diagram of an m × n pixel sub-array sharing a readout circuit;
FIG. 4 is a block diagram of a readout circuit;
FIG. 5 is a schematic diagram of a correlated double sampling circuit;
FIG. 6 is a schematic diagram of a charge transfer amplifier circuit;
FIG. 7 is a schematic diagram of a D-latch structure;
FIG. 8 is a block diagram of an m × n photosensor sub-array and a readout circuit;
FIG. 9 is a schematic diagram of an M N array of photosensors integrated with (M/N) X (N/N) readout circuits.
Detailed Description
The present embodiment utilizes a composite dielectric gate-based photosensitive detector as shown in fig. 1, and its structure is: the device comprises a photosensitive transistor 101 and a reading transistor 103 which are formed above the same P-type semiconductor substrate, wherein the photosensitive transistor 101 and the reading transistor 103 share a composite dielectric gate, and the composite dielectric gate sequentially comprises a bottom dielectric layer 107, a charge coupling layer 106, a top dielectric layer 104 and a control gate 105 from bottom to top. The light sensing transistor 101 is used for sensing light and converting an optical signal into an electrical signal, and the reading transistor 103 is used for reading the electrical signal. The structure of the read transistor 103 is shown in fig. 2, and further includes a drain 201 and a source 202.
According to the capacitance formula: c = ε r S/4 π kd, where C is the capacitance, ε r Is dielectric constant, S is the facing area between two electrode plates, k is coulomb constant, d is the distance of capacitor plate. If the area of the composite dielectric gate is small and the thickness of the composite dielectric gate is large, a small composite dielectric gate capacitance can be obtained, according to a formula C = Q/U, wherein C is capacitance, Q is electric charge amount, and U is voltage, one electric charge amount can be converted into a larger voltage amount, and therefore the sensitivity of the photosensitive detector is improved. Therefore, the capacitance of the composite dielectric gate can be reduced by increasing the thickness of the top dielectric layer 104 and reducing the size of the composite dielectric gate, so as to improve the sensitivity, for example, the capacitance of the composite dielectric gate can be made smaller than 0.15fF by increasing the thickness of the top dielectric layer 104 to be larger than 10nm and reducing the size of the composite dielectric gate to be smaller than 500nm, under the condition that the charge-to-voltage conversion is carried outThe gain, i.e., sensitivity, may be greater than 1mV/e-.
The photo transistor 101 of the photo detector is used to convert the optical signal into photoelectrons, which are in a linear relationship, and the photoelectrons generated by the substrate 102 are coupled to the charge coupling layer 106 and converted into a voltage through a capacitor, thereby changing the threshold voltage of the read transistor 103. When a fixed grid voltage is given, the current of the drain 201 is different due to different threshold voltages, and the gray value of the photosensitive detector can be calculated by collecting current signals. For the large-array photosensitive detector, the large-array photosensitive detector is divided into a plurality of sub-arrays, and each sub-array shares one reading circuit (as shown in fig. 3), so that the photosensitive detector array can be read out in parallel, and a high frame rate is realized.
Photoelectrons collected by the photosensitive transistor 101 during exposure are coupled to the charge coupling layer 106 of the composite dielectric gate at the interface of silicon and silicon dioxide, the potential of the charge coupling layer 106 of the composite dielectric gate is changed, so that the threshold voltage of the reading transistor 103 is changed, in the signal reading process, the control gate 105 is applied with a positive bias pulse, the current of the drain 201 is changed along with the change of the threshold voltage, and whether the photoelectrons are collected or not is judged.
The readout circuit of the present embodiment includes a correlated double sampling circuit 401, an amplification circuit 402, and a quantization circuit 403, as shown in fig. 4. In the sampling process of the correlated double sampling circuit 401, it is necessary to reset the signal sampling capacitor 501 and the reset signal sampling capacitor 502, and read the current I of the drain 201 of the photosensitive detector after reset respectively R And drain 201 current I after exposure S The reset signal sampling capacitor 502 and the signal sampling capacitor 501 are charged, and the voltage difference between the reset signal sampling capacitor 502 and the signal sampling capacitor 501 is the signal quantity generated by the collected photoelectrons. In the amplifying circuit 402, a charge transfer amplifying circuit is adopted, which has the advantage of low power consumption, and can reduce the overall power consumption of a large-scale photosensitive detector array. In the quantization circuit 403, the output signal of the amplifying circuit 402 is quantized with a single bit, and a single-bit ADC or D-latch601 can be used to increase the speed and reduce the area of the readout circuit, which has the advantages of effectively reducing power consumption, having high speed, and satisfying the imaging requirement under low illumination.
The embodiment provides a single-electron-level low-noise, high-gain and high-frame-rate reading method based on a composite dielectric gate photosensitive detector, which comprises the following steps:
(1) Resetting: applying a voltage of-4V to the control gate 105 and a voltage of-3V to the P-type substrate 102 to reset electrons collected by the photosensitive transistor 101 of the MOS-C part of the photosensitive detector, switching to a reading mode, and reading a reset signal by a related double sampling circuit;
(2) Exposure: when the control gate 105 is applied with a voltage of 0V and the P-type substrate 102 is applied with a voltage of-3V, when the energy of photoelectrons is greater than the forbidden bandwidth of silicon under illumination, an electron-hole pair is excited, the generated photoelectrons are collected by the photosensitive transistor 101 under the action of an electric field of a depletion region, the potential of the photosensitive transistor 101 is changed, and the photosensitive transistor is coupled to the charge coupling layer 106 of the composite dielectric gate to change the potential of the charge coupling layer 106, so that the threshold voltage for turning on the reading transistor 103 is changed, the threshold voltage change amount is U = Q/C, wherein Q is the charge amount of the collected photoelectrons, C is the capacitance of the top dielectric gate 104, the reading mode is switched, and an exposure signal is read by a related double sampling circuit;
(3) Reading: in the readout stage, the gate voltage may be 2 to 5V, for example, 3V bias is applied to the control gate 105, the substrate may be-3 to 0V, for example, -3V bias is applied to the P-type substrate 102, the gate voltage and the substrate voltage are required to satisfy that the read transistor of the photosensitive detector is in a linear region under both the empty well and the full well, the drain of the composite dielectric gate read transistor is applied with a constant voltage, for example, 0.2V, and the source is applied with a constant voltage of 0V, and the current of the drain 201 is read out by the correlated double sampling circuit 401.
The VIN input terminal of the correlated double sampling circuit is connected to the drain 201 of the composite dielectric gate read transistor 103, and after reset, the current of the drain 201 is read, and as shown in fig. 5, the current of the drain 201 is sampled by a reset signal sampling capacitor CR502 of the correlated double sampling circuit, and a voltage signal VOUTR of the reset signal is output. After exposure, the current of the drain 201 is read, the current of the drain 201 is sampled by an exposure signal sampling capacitor CS501 of the correlated double sampling circuit, and a voltage signal VOUTS of the signal is output. The difference value VOUTS-VOUTR of the two is the signal quantity corresponding to the photoelectrons collected after exposure, and the reset noise, shot noise and the like can be effectively reduced by adopting a related double sampling circuit.
Signals VOUTR and VOUTS output by the correlated double sampling circuit are input to input ends in1 and in2 of a charge transfer amplifying circuit shown in fig. 6, a capacitor C1 and a capacitor C2 are charged by closing a switch S1, output ends out1 and out2 are pre-charged by closing a switch S2, a voltage signal is output to out1 and out2 by opening the switch S1, and the gain is C2/C1 after the voltage signal is amplified by a charge transfer amplifier. Since the charge transfer amplifier is charged only when the switch is closed, power consumption can be effectively reduced.
The quantization circuit may use a D-latch circuit as shown in fig. 7. The outputs out1 and out2 of the charge transfer amplifier are used as the input of the D-latch circuit to carry out single-bit quantization, and the single-bit quantization can greatly improve the quantization speed, so that the photosensitive detector has extremely short exposure time and meets the requirement of single photon imaging in the exposure time under low illumination.
Since the size of the photosensitive detector is very small and the size of the readout circuit is large, in order to save chip area, a plurality of photosensitive detectors can be formed into a sub-array 801 to share one readout circuit 802, as shown in fig. 8.
For the photosensitive detector array, in order to realize high-speed readout, if the photosensitive detector array is composed of M × N photosensitive detectors, and each M × N photosensitive detector sub-arrays 901 share one readout circuit 902, as shown in fig. 9, (M/N) × (N/N) photosensitive detector sub-arrays and readout circuits are shared, and the photosensitive detector sub-arrays 901 and the readout circuits 902 correspond to each other one by one, compared with the case of using only one readout circuit, the readout speed is increased by (M/N) × (N/N) times, and high-frame-rate fast readout is realized.
Claims (8)
1. The single-electron reading circuit based on the composite dielectric gate photosensitive detector comprises a photosensitive transistor and a reading transistor which are formed on the same substrate, wherein the two transistors share a composite dielectric gate which comprises a bottom dielectric layer, a charge coupling layer, a top dielectric layer and a control gate; the readout circuit is characterized by comprising a correlated double sampling circuit, an amplifying circuit and a quantizing circuit, wherein the correlated double sampling circuit is used for sampling the drain current of the reading transistor, the amplifying circuit is used for amplifying a voltage signal output by the correlated double sampling circuit, and the quantizing circuit is used for carrying out single-bit quantization on the voltage signal output by the amplifying circuit.
2. The single-electron readout circuit based on the composite dielectric gate photosensitive detector as claimed in claim 1, wherein the thickness of the top dielectric layer is greater than 10nm, and the size of the composite dielectric gate is less than 500nm.
3. The single-electron readout circuit based on the composite dielectric gate photosensitive detector as claimed in claim 1, wherein the amplification circuit is a charge transfer amplification circuit.
4. The single-electron readout circuit based on the composite dielectric gate photosensitive detector as claimed in claim 1, wherein the quantization circuit is a single-bit ADC or D-latch circuit.
5. The single-electron readout circuit based on the composite dielectric gate photosensitive detector of claim 1, wherein when the photosensitive detector is a plurality of photosensitive detectors, the array structure is divided into a plurality of sub-arrays, and each sub-array shares one readout circuit.
6. A method for reading out a single-electron reading out circuit based on a composite dielectric gate photosensitive detector as claimed in any one of claims 1 to 5, comprising the steps of:
(1) Resetting: applying a voltage of-4V to the control grid and a voltage of-3V to the substrate, resetting electrons collected by a photosensitive transistor of the photosensitive detector, and reading a reset signal by a related double sampling circuit;
(2) Exposure: the voltage of 0V is applied to the control grid, the voltage of-3V is applied to the substrate, when the energy of photoelectrons is larger than the forbidden bandwidth of silicon under illumination, an electron hole pair is excited, the generated photoelectrons are collected by the photosensitive transistor under the action of an electric field of a depletion region, the potential of the photosensitive transistor is changed, and the photosensitive transistor is coupled to the charge coupling layer of the composite dielectric grid to change the potential of the charge coupling layer, so that the threshold voltage for starting the reading transistor is changed; reading the exposure signal by a correlated double sampling circuit;
(3) Reading: in the reading stage, 2-5V of voltage is applied to the control grid, and-3-0V of voltage is applied to the substrate, and the voltages of the control grid and the substrate need to meet the requirement that a reading transistor of the photosensitive detector is in a linear region under an empty well and a full well; the drain of the read transistor is supplied with a constant voltage, the source is supplied with a constant voltage of 0V, and the drain current is read by the correlated double sampling circuit.
7. A readout method according to claim 6, wherein in step (2), the threshold voltage of the read transistor varies by an amount of U = Q/C, where Q is the charge amount of collected photoelectrons and C is the capacitance of the top dielectric gate.
8. The readout method according to claim 6, wherein the correlated double sampling circuit samples the drain current through the reset signal sampling capacitor after the photosensitive detector is reset, and outputs a voltage signal VOUTR of the reset signal; after the photosensitive detector is exposed, the drain current is sampled through an exposure signal sampling capacitor, a voltage signal VOUTS of an exposure signal is output, and the difference VOUTS-VOUTR of the two voltage signals is the signal quantity corresponding to photoelectrons collected after exposure.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115967864A (en) * | 2022-12-29 | 2023-04-14 | 脉冲视觉(北京)科技有限公司 | Method, circuit, device and medium for collecting optical signal in image sensor |
| CN117135478A (en) * | 2023-10-27 | 2023-11-28 | 南京大学 | Composite dielectric gate transistor pixel reading circuit based on double-transimpedance amplifier |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115967864A (en) * | 2022-12-29 | 2023-04-14 | 脉冲视觉(北京)科技有限公司 | Method, circuit, device and medium for collecting optical signal in image sensor |
| CN115967864B (en) * | 2022-12-29 | 2023-12-26 | 脉冲视觉(北京)科技有限公司 | Method, circuit, equipment and medium for collecting optical signals in image sensor |
| CN117135478A (en) * | 2023-10-27 | 2023-11-28 | 南京大学 | Composite dielectric gate transistor pixel reading circuit based on double-transimpedance amplifier |
| CN117135478B (en) * | 2023-10-27 | 2024-03-15 | 南京大学 | Composite dielectric gate transistor pixel reading circuit based on double-transimpedance amplifier |
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