CN115329712A - PCB (printed circuit board) routing generation method, device and equipment and server board card - Google Patents
PCB (printed circuit board) routing generation method, device and equipment and server board card Download PDFInfo
- Publication number
- CN115329712A CN115329712A CN202211052218.2A CN202211052218A CN115329712A CN 115329712 A CN115329712 A CN 115329712A CN 202211052218 A CN202211052218 A CN 202211052218A CN 115329712 A CN115329712 A CN 115329712A
- Authority
- CN
- China
- Prior art keywords
- signal line
- target
- pcb
- filter circuit
- interference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 51
- 230000008878 coupling Effects 0.000 claims description 40
- 238000010168 coupling process Methods 0.000 claims description 40
- 238000005859 coupling reaction Methods 0.000 claims description 40
- 239000003990 capacitor Substances 0.000 claims description 22
- 238000004590 computer program Methods 0.000 claims description 18
- 238000004364 calculation method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 14
- 238000012545 processing Methods 0.000 description 10
- 230000000694 effects Effects 0.000 description 9
- 230000002452 interceptive effect Effects 0.000 description 9
- 230000014509 gene expression Effects 0.000 description 8
- 230000006870 function Effects 0.000 description 7
- 230000003071 parasitic effect Effects 0.000 description 6
- 238000012546 transfer Methods 0.000 description 6
- 230000001965 increasing effect Effects 0.000 description 5
- 230000001939 inductive effect Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 238000010801 machine learning Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000002085 persistent effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Hardware Redundancy (AREA)
Abstract
The application is suitable for the technical field of servers, and particularly discloses a PCB wiring generation method, a device, equipment, a computer readable storage medium and a server board card.
Description
Technical Field
The present application relates to the technical field of servers, and in particular, to a PCB trace generation method, apparatus, device, computer readable storage medium, and server board.
Background
The server board includes a Central Processing Unit (CPU), a Platform Controller Hub (PCH), a memory, a Baseboard Management Controller (BMC), a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA), and a peripheral high-speed connector. The size of the server board card is limited, and the wiring on the server board card is dense and complex, for example, about 4000 to 5000 pins (Pin) are provided for 1 Intel central processing unit (Intel CPU), and tens of thousands of signal lines are provided on the whole server board card. The Printed Circuit Boards (PCBs) are designed to route in such a small space of the server board, which inevitably causes the signal routing on the server board to be very close to each other, and inevitably causes the mutual crosstalk between the signal lines. According to different types of signal transmission lines affected by crosstalk, the influence of signal crosstalk between PCB (printed circuit board) lines on the whole server board card can be large or small, and if some key signals (such as power signals and reset signals) are affected by crosstalk, the server can be directly shut down or be in due course.
The existing idea for solving the problem of signal crosstalk between PCB traces is to reduce electromagnetic coupling between signal lines on a PCB to suppress crosstalk, and the practical implementation mode is to increase the distance between the signal lines to suppress crosstalk. However, theoretically, the electromagnetic coupling can only be reduced but cannot be eliminated, and the effect of suppressing crosstalk by this method is limited, and since there are tens of thousands of signal lines on the server board card, if crosstalk is suppressed by increasing the line pitch, the area cost will be greatly increased, which is certainly unreasonable and cannot be realized.
The technical problem to be solved by those skilled in the art is to provide a solution capable of well suppressing crosstalk between PCB signal lines without greatly increasing the PCB trace area.
Disclosure of Invention
The application aims to provide a PCB wiring generation method, a PCB wiring generation device, a PCB wiring generation equipment, a computer readable storage medium and a server board card, which can eliminate crosstalk between PCB signal lines without greatly increasing the area of PCB wiring and improve the quality of the board card.
In order to solve the above technical problem, the present application provides a PCB trace generation method, including:
determining a target signal line influenced by crosstalk on a target board card;
determining an interference signal line generating crosstalk to the target signal line;
calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line;
adding the filter circuit between a far end of the target signal line and a load end of the interference signal line.
Optionally, the filter circuit is specifically an RC filter circuit;
the first end of a first filter capacitor of the RC filter circuit is connected with the load end of the interference signal line, the second end of the first filter capacitor and the first end of a first filter resistor of the RC filter circuit are connected with the far end of the target signal line, and the second end of the first filter resistor is grounded.
Optionally, the circuit parameters of the filter circuit for eliminating the interference signal of the interference signal line to the target signal line are calculated according to the PCB board parameters of the target board card and the coupling length between the interference signal line and the target signal line, specifically according to the following equation:
wherein R is 1 Is the resistance value of the first filter resistor, C 1 Is the capacitance value of the first filter capacitor, A is the coupling length of the interference signal line and the target signal line, and Z 0 Is the equivalent impedance of the target signal line, C m For mutual capacitance of the interference signal line and the target signal line, L m The mutual inductance of the interference signal line and the target signal line is obtained.
Optionally, a resistance value of the first filter resistor is equal to an equivalent impedance of the target signal line.
Optionally, the filter circuit is specifically an LC filter circuit;
the first end of a first filter inductor of the LC filter circuit is connected with the load end of the interference signal line, the second end of the first filter inductor and the first end of a second filter capacitor of the LC filter circuit are connected with the far end of the target signal line, and the second end of the second filter capacitor is grounded.
Optionally, the determining a target signal line affected by crosstalk on a target board card specifically includes:
receiving an initial PCB file of the target board card, and scanning a signal line of a preset type in the initial PCB file;
if the signal line of the preset type is scanned, comparing the line spacing between the scanned signal line of the preset type and the adjacent signal line by using the minimum allowable line spacing corresponding to the signal line of the preset type;
and if the line spacing between the scanned signal line of the preset type and the adjacent signal line is smaller than the corresponding minimum allowable line spacing, determining the scanned signal line of the preset type as the target signal line.
Optionally, the preset type of signal line includes: a power signal line and a reset signal line.
Optionally, the adding the filter circuit between the far end of the target signal line and the load end of the interference signal line specifically includes:
and adding the filter circuit between the far end of the target signal line and the load end of the interference signal line on the initial PCB file of the target board card to obtain an optimized PCB file.
In order to solve the above technical problem, the present application further provides a server board card, including: the PCB, the signal line and the filter circuit;
the signal line and the filter circuit are arranged on the PCB, and the filter circuit is arranged between the far end of a target signal line affected by crosstalk of an interference signal line and the load end of the interference signal line; and calculating circuit parameters of the filter circuit according to PCB board parameters of the PCB and the coupling length of the interference signal line and the target signal line so as to eliminate an interference signal of the interference signal line to the target signal line.
In order to solve the above technical problem, the present application further provides a PCB trace generation device, including:
the first determining unit is used for determining a target signal line influenced by crosstalk on a target board card;
a second determination unit configured to determine an interference signal line that generates crosstalk to the target signal line;
the calculation unit is used for calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line;
a generating unit to add the filter circuit between a far end of the target signal line and a load end of the interference signal line.
In order to solve the above technical problem, the present application further provides a PCB routing generation device, including:
a memory for storing a computer program;
a processor configured to execute the computer program, wherein the computer program when executed by the processor implements the steps of the PCB trace generation method as described in any one of the above.
To solve the above technical problem, the present application further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the PCB trace generation method according to any one of the above mentioned items.
According to the PCB wiring generation method, after the target signal line affected by crosstalk and the interference signal line generating crosstalk to the target signal line are determined on the target board card, the circuit parameters of the filter circuit used for eliminating the interference signal of the interference signal line to the target signal line are calculated according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line, and then the filter circuit is added between the far end of the target signal line and the load end of the interference signal line, so that the interference signal of the interference signal line to the target signal line is eliminated.
The application also provides a PCB routing generation device, equipment, a computer readable storage medium and a server board card, which have the beneficial effects and are not repeated herein.
Drawings
For a clearer explanation of the embodiments or technical solutions of the prior art of the present application, the drawings needed for the description of the embodiments or prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart of a PCB trace generation method according to an embodiment of the present disclosure;
FIG. 2 is a diagram of capacitively coupled interference;
FIG. 3 is a diagram of near-end interference and far-end interference;
FIG. 4 is a schematic diagram of a frequency domain transfer function of an interference signal;
fig. 5 is a circuit diagram of a filter circuit according to an embodiment of the present application;
fig. 6 is a schematic diagram illustrating an effect obtained after a filter circuit is added according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a PCB trace generating device according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of a PCB trace generating device according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a PCB wiring generation method, a PCB wiring generation device, a PCB wiring generation equipment, a computer readable storage medium and a server board card, which can eliminate crosstalk between PCB signal lines without greatly increasing the area of PCB wiring and improve the quality of the board card.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
Fig. 1 is a flowchart of a PCB trace generation method according to an embodiment of the present disclosure; FIG. 2 is a diagram of capacitively coupled interference; FIG. 3 is a diagram of near-end interference and far-end interference; fig. 4 is a schematic diagram of a frequency domain transfer function of an interference signal.
As shown in fig. 1, a method for generating a PCB trace provided in an embodiment of the present application includes:
s101: and determining a target signal line influenced by crosstalk on the target board card.
S102: an interfering signal line that generates crosstalk to the target signal line is determined.
S103: and calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line.
S104: a filter circuit is added between the far end of the target signal line and the load end of the interference signal line.
It should be noted that the target board in the embodiment of the present application may be a server board, and may also be a board on any electronic device. Due to the miniaturization requirement of the board card on the electronic equipment, the requirement on the density of PCB wiring is higher and higher, so that the influence of the crosstalk problem between signal lines on the signal quality of the board card is more serious. Therefore, the PCB trace generation method provided by the embodiment of the present application eliminates the interference signal by adding the filter circuit at the far end of the signal line, so as to reduce the influence of crosstalk on the signal, especially on the critical signal.
For S101, a target signal line (i.e., a disturbed signal line) affected by crosstalk on the target board may be determined specifically in a simulation manner or a measurement manner or in an empirical manner. Along with the line density of PCB wiring on the integrated circuit board constantly increases, the quantity of the signal line that receives the influence of crosstalking can be more and more, and the mode that all the signal lines that receive the influence of crosstalking all adopt at the distal end to increase filter circuit has also undoubtedly taken up more PCB space this moment, so need receive to determine key signal as target signal in the signal line that the influence of crosstalking. Then S101: determining a target signal line affected by crosstalk on a target board card may specifically include:
receiving an initial PCB file of a target board card, and scanning a signal line of a preset type in the initial PCB file;
if the signal line of the preset type is scanned, comparing the line spacing between the scanned signal line of the preset type and the adjacent signal line by using the minimum allowable line spacing corresponding to the signal line of the preset type;
and if the line spacing between the scanned signal line of the preset type and the adjacent signal line is smaller than the corresponding minimum allowable line spacing, determining the scanned signal line of the preset type as a target signal line.
In particular implementations, the detection of the target signal line may be accomplished by scripting. The signal lines of the preset type, namely the key signal lines which have great influence on the whole system after being influenced by crosstalk, are determined in advance. The initial PCB file is a PCB layout file designed by a PCB designer, in which the types and positions of traces on the PCB are recorded. From the initial PCB file, whether the scanning detection target board card contains a signal line of a preset type may include: a power signal line and a reset signal line. If it is determined by scanning that a preset type of signal line exists on the target board, it is further determined whether an interfering signal line which has a crosstalk influence on the preset type of signal line exists on the target board, and specifically, whether an interfering signal line exists in adjacent signal lines of the preset type of signal line may be checked by a preset minimum allowable line distance between each preset type of signal line and another signal line (a corresponding minimum allowable line distance may be further preset according to the type of the interfered signal line and the type of the interfering signal line). If it is determined that an interference signal line exists in the adjacent signal lines of the signal line of the preset type, it may be determined that the signal line of the preset type is the target signal line in the embodiment of the present application.
For S102, after the target signal line is determined in S101, an interfering signal line that causes a crosstalk influence that must be eliminated on the target signal line may be subsequently determined. That is, all the adjacent signal lines of the target signal line may have crosstalk influence on the target signal line, and the severity of the crosstalk influence is different according to the line pitch. Therefore, the interference signal lines to be considered in the embodiment of the present application need to be screened from the adjacent signal lines of the target signal line. The screening method may be as described above, where a corresponding minimum allowed line pitch is established in advance according to the type of the interfered signal line and the type of the interfering signal line, and whether a situation smaller than the minimum allowed line pitch exists between the target signal line and the adjacent signal line is determined, and if the situation exists, the adjacent signal line is determined to be the interfering signal line.
For S103, after the target signal line and the interference signal line are determined, it is clear that a filter circuit needs to be added between the far end of the target signal line and the load end of the interference signal line to eliminate the interference signal of the interference signal line to the target signal line, and at this time, it is necessary to determine the circuit parameters of the filter circuit.
In particular, the coupling of one signal trace to another signal on a PCB is called signal crosstalk. There are three ways of coupling: capacitive coupling, inductive coupling, radiative coupling. The radiative coupling is generally in the electromagnetic interference (EMI) domain, and only capacitive coupling and inductive coupling are generally considered on the PCB on the server.
As shown in fig. 2, on the target signal line, an end close to the start end (source end) of signal transmission on the interference signal line is a near end, and an end close to the far end (load end) of signal transmission on the interference signal line is a far end. When the distance between the interference signal line and the target signal line is close, an equivalent parasitic capacitance C is generated between the two lines, and the voltage V transmitted by the interference signal line s The parasitic capacitance C can be parasitic on the target signal line according to the characteristic impedance design of the target signal line on the PCB wiringParasitic current i is generated on the target signal line, and the parasitic current i generates voltage V which is transmitted by the interference signal line s Forward interference voltage V with same direction f1 And a voltage V transmitted with the interference signal line s Backward interference voltage V in opposite direction b1 . According to kirchhoff principle, a forward interference voltage V f1 Equal to the backward interference voltage V b1 . Suppose the length (i.e. coupling length) of the interference signal line causing a large crosstalk effect on the target signal line is a, and the corresponding parasitic capacitance value is C m Then there is
Since the interference effect of the backward interference on the target signal line is negligible, it can be considered that expression (1) is an interference value, i.e., V, generated by the capacitive coupling between the interference signal line and the target signal line f1 Is the capacitive coupling effect of the interfering signal line on the far end of the target signal line.
Meanwhile, as shown in fig. 3, the PCB traces all have equivalent parasitic inductance, and the voltage V transmitted by the interference signal line is generated between the interference signal line and the target signal line due to the mutual inductance L s Also, a forward interference voltage V is generated on the target signal line relative to the far end and the near end f2 And a backward interference voltage V b2 The relation between the two is reversed due to different inductive effects, and the current transmission is continuous based on kirchhoff principle, and finally the result can be obtained
Since the interference effect of the backward interference on the target signal line is negligible, it can be considered that expression (2) is an interference value, i.e., V, generated by the inductive coupling between the interference signal line and the target signal line f2 Is the inductive coupling influence of the interference signal line on the far end of the target signal line.
According to the expression (1) and the expression (2), when the coupling distance between the interference signal line and the target signal line is a, the total interference magnitude of the interference signal line to the target signal line can be obtained as follows:
wherein V is the total interference value of the interference signal line to the target signal line, A is the coupling length of the interference signal line and the target signal line, and Z 0 Characteristic impedance of PCB trace on target board card, C m For mutual capacitance of interference signal line and target signal line, L m For interfering with mutual inductance, V, of signal lines with respect to a target signal line s Is the voltage transmitted by the interference signal line.
The crosstalk influence of the disturbing signal line on the target signal line, i.e., V is reduced or even eliminated as shown in expression (3).
The frequency domain transfer function of the total interference value of the interference signal line to the target signal line can be obtained according to the expression (3):
then, as shown in fig. 4, by adding a filter circuit with the following transfer function between the load end of the interference signal line and the far end of the target signal line:
thus, H can be substituted 2 And H 1 Neutralization is performed and theoretically the crosstalk can be infinitely reduced.
Therefore, according to expression (5), in which the coupling length a of the disturbing signal line and the target signal line can be predetermined, the mutual capacitance C of the disturbing signal line and the target signal line m Mutual inductance L of interference signal line and target signal line m All can be obtained by calculation according to the PCB parameters of the target board card, and the characteristic impedance Z of the PCB routing on the target board card 0 Is also a known design parameter of the target board card, so H can be calculated 2 Can then establish the transfer function and H of the filter circuit 2 The type of the filter circuit (such as an RC filter circuit, an LC filter circuit, etc.) is selected, and the circuit parameters (the design values of the components) of the filter circuit can be calculated.
Calculating the mutual capacitance C of the interference signal line and the target signal line according to the PCB board parameters of the target board card m Mutual inductance L of interference signal line and target signal line m Specifically, it can be calculated according to the following formula:
wherein epsilon is the PCB dielectric constant of the target board card, w is the PCB wiring line width of the target board card, h is the distance from the PCB wiring of the target board card to the reference layer, r is the copper thickness of the PCB wiring of the target board card, s is the line spacing between the target signal line and the interference signal line, and mu is the magnetic conductivity of the PCB wiring of the target board card.
For step S104, after determining the circuit parameters of the filter circuit, according to the type of the filter circuit, connecting the input end of the filter circuit with the load end of the interference signal line and the far end of the target signal line, and connecting the voltage V transmitted by the interference signal line s And converting the signal into V to eliminate the crosstalk signal.
To improve the automation level of PCB trace generation, S104: adding the filter circuit between the far end of the target signal line and the load end of the interference signal line may specifically be: and adding a filter circuit between the far end of the target signal line and the load end of the interference signal line on the initial PCB file of the target board card to obtain an optimized PCB file. Specifically, after the filter circuit is connected between the far end of the target signal line and the load end of the interference signal line on the initial PCB file, labels for circuit parameters of the filter circuit are generated, and after the filter circuit is added to all the target signal lines in a traversing mode, the optimized PCB file is obtained and output.
According to the PCB wiring generation method provided by the embodiment of the application, after the target signal line affected by crosstalk and the interference signal line generating crosstalk to the target signal line are determined on the target board card, the circuit parameters of the filter circuit used for eliminating the interference signal of the interference signal line to the target signal line are calculated according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line, and then the filter circuit is added between the far end of the target signal line and the load end of the interference signal line, so that the interference signal of the interference signal line to the target signal line is eliminated.
The method for generating the PCB trace provided by the embodiment of the application is applied to simulation verification, and taking a Video Graphics Array (VGA) signal as an example, a line synchronization (HSYNC) signal in the VGA signal is closer to a color signal R, G, B in the PCB trace, so that the rising edge and the falling edge of the HSYNC signal appearing in actual measurement affect the amplitude of the color signal R, G, B. After calculating the circuit parameters of the filter circuit, the filter circuit is respectively added between the load end of the HSYNC signal line and the far end of the color signal R, G, B signal line, and the influence of crosstalk can be greatly reduced through simulation.
Example two
Fig. 5 is a circuit diagram of a filter circuit according to an embodiment of the present disclosure; fig. 6 is a schematic diagram illustrating an effect of adding a filter circuit according to an embodiment of the present disclosure.
On the basis of the above embodiments, the embodiments of the present application further take the RC filter circuit as an example of the filter circuit for explanation. The RC filter circuit may be constituted only by the first filter capacitor and the first filter resistor.
As shown in fig. 5, in the PCB trace generation method provided in the embodiment of the present application, the filter circuit is specifically an RC filter circuit;
first filter capacitor C of RC filter circuit 1 Is connected with the load end of the interference signal line, and a first filter capacitor C 1 Second terminal of (3), first filter resistor R of RC filter circuit 1 Is connected with the far end of the target signal line, and a first filter resistor R 1 The second terminal of (a) is grounded.
The equivalent transfer function of the RC filter circuit is then:
V＝j2πfR 1 C 1 ·V s ；(8)
according to the expressions (5) and (8), let H 2 If V is equal to V, the total interference value of the interference signal line to the target signal line can be eliminated through the RC filter circuit, and S103: calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line, specifically calculating according to the following equation:
wherein R is 1 Is the resistance value of the first filter resistor, C 1 Is the capacitance value of the first filter capacitor, A is the coupling length of the interference signal line and the target signal line, and Z 0 Is the equivalent impedance of the target signal line, C m For mutual capacitance of interference signal line and target signal line, L m Is the mutual inductance of the interference signal line and the target signal line.
Wherein, the resistance R of the first filter resistor 1 May be equal to the equivalent impedance of the target signal line. Generally, the impedance characteristic of the PCB trace on the server board card is mostly 50 Ω, that is, the resistance R of the first filter resistor 1 The coupling length of the interference signal line and the target signal line is predetermined, and the mutual capacitance C of the interference signal line and the target signal line is calculated according to the PCB board parameters of the target board card m Interference signal line and target signalMutual inductance L of the wire m And further calculating to obtain the capacitance value C of the first filter capacitor 1 And (4) finishing.
EXAMPLE III
On the basis of the above embodiment, in addition to using the RC filter circuit as a filter circuit for eliminating an interference signal of an interference signal line to a target signal line, other types of filter circuits may be used, for example, the filter circuit may specifically be an LC filter circuit;
the first end of a first filter inductor of the LC filter circuit is connected with the load end of the interference signal line, the second end of the first filter inductor and the first end of a second filter capacitor of the LC filter circuit are connected with the far end of the target signal line, and the second end of the second filter capacitor is grounded.
For S103, the circuit parameters of the LC filter circuit can be calculated by referring to the description of the above embodiment, and are not described herein again.
On the basis of the above detailed description of each embodiment corresponding to the PCB trace generation method, the application also discloses a PCB trace generation device, equipment, a computer readable storage medium and a server board card corresponding to the above method.
Example four
The embodiment of the application provides a server board card, include: the PCB, the signal line and the filter circuit;
the signal line and the filter circuit are arranged on the PCB, and the filter circuit is arranged between the far end of the target signal line affected by the crosstalk of the interference signal line and the load end of the interference signal line; the circuit parameters of the filter circuit are calculated according to the PCB parameters of the PCB and the coupling length of the interference signal line and the target signal line, so that the interference signal of the interference signal line to the target signal line is eliminated.
Since the embodiment of the server board card portion and the embodiment of the method portion correspond to each other, please refer to the description of the embodiment of the method portion for the embodiment of the server board card portion, which is not repeated here.
EXAMPLE five
Fig. 7 is a schematic structural diagram of a PCB trace generating device according to an embodiment of the present disclosure.
As shown in fig. 7, the PCB trace generating device provided in the embodiment of the present application includes:
a first determining unit 701, configured to determine a target signal line affected by crosstalk on a target board card;
a second determining unit 702, configured to determine an interference signal line that generates crosstalk with respect to the target signal line;
a calculating unit 703, configured to calculate, according to the PCB board parameter of the target board and the coupling length between the interference signal line and the target signal line, a circuit parameter of a filter circuit for eliminating an interference signal of the interference signal line to the target signal line;
a generating unit 704, configured to add the filter circuit between the far end of the target signal line and the load end of the interference signal line.
Further, the filter circuit is specifically an RC filter circuit;
the first end of a first filter capacitor of the RC filter circuit is connected with the load end of the interference signal line, the second end of the first filter capacitor and the first end of a first filter resistor of the RC filter circuit are connected with the far end of the target signal line, and the second end of the first filter resistor is grounded.
Further, according to the PCB board parameter of the target board card and the coupling length of the interference signal line and the target signal line, the circuit parameter of the filter circuit for eliminating the interference signal of the interference signal line to the target signal line is calculated, specifically according to the following equation:
wherein R is 1 Is the resistance value of the first filter resistor, C 1 Is the capacitance value of the first filter capacitor, A is the coupling length of the interference signal line and the target signal line, and Z 0 Is the equivalent impedance of the target signal line, C m For mutual capacitance of interference signal line and target signal line, L m Is the mutual inductance of the interference signal line and the target signal line.
Further, the resistance value of the first filter resistor is equal to the equivalent impedance of the target signal line.
Further, the filter circuit is specifically an LC filter circuit;
the first end of a first filter inductor of the LC filter circuit is connected with the load end of the interference signal line, the second end of the first filter inductor and the first end of a second filter capacitor of the LC filter circuit are connected with the far end of the target signal line, and the second end of the second filter capacitor is grounded.
Further, the first determining unit 701 specifically includes:
the scanning subunit is used for receiving an initial PCB file of the target board card and scanning a signal line of a preset type in the initial PCB file;
the comparison subunit is used for comparing the line spacing between the scanned signal line of the preset type and the adjacent signal line by using the minimum allowable line spacing corresponding to the signal line of the preset type if the signal line of the preset type is scanned;
and the determining subunit is used for determining the scanned signal line of the preset type as the target signal line if the line spacing between the scanned signal line of the preset type and the adjacent signal line is smaller than the corresponding minimum allowable line spacing.
Further, the signal line of the preset type includes: a power signal line and a reset signal line.
Further, the generating unit 704 adds a filter circuit between the far end of the target signal line and the load end of the interference signal line, specifically:
and adding a filter circuit between the far end of the target signal line and the load end of the interference signal line on the initial PCB file of the target board card to obtain an optimized PCB file.
Since the embodiments of the apparatus portion and the method portion correspond to each other, please refer to the description of the embodiments of the method portion for the embodiments of the apparatus portion, which is not repeated here.
EXAMPLE six
Fig. 8 is a schematic structural diagram of a PCB trace generating device according to an embodiment of the present application.
As shown in fig. 8, the PCB trace generating device provided in the embodiment of the present application includes:
a memory 810 for storing a computer program 811;
a processor 820 for executing the computer program 811, wherein the computer program 811 realizes the steps of the PCB trace generation method according to any one of the above embodiments when executed by the processor 820.
Processor 820 may include one or more processing cores, such as a 3-core processor, an 8-core processor, and so forth. The processor 820 may be implemented in hardware using at least one of a Digital Signal Processing (DSP), a Field-Programmable Gate Array (FPGA), and a Programmable Logic Array (PLA). Processor 820 may also include a main processor, which is a processor for Processing data in the wake state, also referred to as a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor 820 may be integrated with a Graphics Processing Unit (GPU) that is responsible for rendering and drawing the content that the display screen needs to display. In some embodiments, processor 820 may also include an Artificial Intelligence (AI) processor for processing computational operations related to machine learning.
Memory 810 may include one or more computer-readable storage media, which may be non-transitory. Memory 810 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 810 is at least used for storing the following computer program 811, wherein after the computer program 811 is loaded and executed by the processor 820, the relevant steps in the PCB trace generation method disclosed in any of the foregoing embodiments can be implemented. In addition, the resources stored by the memory 810 may also include an operating system 812 and data 813, etc., which may be stored in a transient or persistent manner. Operating system 812 may be Windows, among others. The data 813 may include, but is not limited to, data involved in the above-described method.
In some embodiments, the PCB trace generation apparatus may further include a display screen 830, a power supply 840, a communication interface 850, an input output interface 860, a sensor 870, and a communication bus 880.
Those skilled in the art will appreciate that the configuration shown in fig. 8 does not constitute a definition of a PCB trace generation apparatus and may include more or fewer components than those shown.
The PCB trace generation device provided by the embodiment of the application comprises the memory and the processor, and the processor can realize the PCB trace generation method when executing the program stored in the memory, and the effect is the same as the effect.
EXAMPLE seven
It should be noted that the above-described embodiments of the apparatus and device are merely illustrative, for example, the division of modules is only one division of logical functions, and there may be other divisions when actually implementing, for example, a plurality of modules or components may be combined or integrated into another system, or some features may be omitted or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form. Modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
In addition, functional modules in the embodiments of the present application may be integrated into one processing module, or each of the modules may exist alone physically, or two or more modules are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
The integrated module, if implemented in the form of a software functional module and sold or used as a separate product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium and executes all or part of the steps of the methods described in the embodiments of the present application, or all or part of the technical solutions.
To this end, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the method as X.
The computer-readable storage medium may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory ROM (Read-Only Memory), a Random Access Memory RAM (Random Access Memory), a magnetic disk, or an optical disk.
The computer program contained in the computer-readable storage medium provided in this embodiment can implement the steps of the PCB trace generation method described above when being executed by a processor, and the effect is the same as above.
The method, the device, the equipment, the computer readable storage medium and the server board card for generating the PCB trace provided by the present application are described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device, the apparatus, the computer-readable storage medium, and the server board disclosed in the embodiments correspond to the method disclosed in the embodiments, so that the description is simple, and reference may be made to the description of the method in relevant places. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It should also be noted that, in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
Claims (12)
1. A PCB trace generation method is characterized by comprising the following steps:
determining a target signal line influenced by crosstalk on a target board card;
determining an interference signal line generating crosstalk to the target signal line;
calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line;
adding the filter circuit between a far end of the target signal line and a load end of the interference signal line.
2. The PCB trace generation method of claim 1, wherein the filter circuit is specifically an RC filter circuit;
the first end of a first filter capacitor of the RC filter circuit is connected with the load end of the interference signal line, the second end of the first filter capacitor and the first end of a first filter resistor of the RC filter circuit are connected with the far end of the target signal line, and the second end of the first filter resistor is grounded.
3. The PCB trace generation method according to claim 2, wherein the circuit parameters of the filter circuit for eliminating the interference signal of the interference signal line to the target signal line are calculated according to the PCB board parameters of the target board card and the coupling length between the interference signal line and the target signal line, specifically according to the following equation:
wherein R is 1 Is the resistance value of the first filter resistor, C 1 Is the capacitance value of the first filter capacitor, A is the coupling length of the interference signal line and the target signal line, and Z 0 Is the equivalent impedance of the target signal line, C m For mutual capacitance of the interference signal line and the target signal line, L m Mutual inductance of the interference signal line and the target signal line is obtained.
4. The PCB trace generation method of claim 3, wherein the first filter resistor has a resistance equal to an equivalent impedance of the target signal line.
5. The PCB trace generation method according to claim 1, wherein the filter circuit is specifically an LC filter circuit;
the first end of a first filter inductor of the LC filter circuit is connected with the load end of the interference signal line, the second end of the first filter inductor and the first end of a second filter capacitor of the LC filter circuit are connected with the far end of the target signal line, and the second end of the second filter capacitor is grounded.
6. The PCB trace generation method according to claim 1, wherein the determining a target signal line affected by crosstalk on a target board specifically includes:
receiving an initial PCB file of the target board card, and scanning a signal line of a preset type in the initial PCB file;
if the signal line of the preset type is scanned, comparing the line spacing between the scanned signal line of the preset type and the adjacent signal line by using the minimum allowable line spacing corresponding to the signal line of the preset type;
and if the line spacing between the scanned signal line of the preset type and the adjacent signal line is smaller than the corresponding minimum allowable line spacing, determining the scanned signal line of the preset type as the target signal line.
7. The PCB trace generation method of claim 6, wherein the preset type of signal line comprises: a power signal line and a reset signal line.
8. The PCB trace generation method according to claim 1, wherein the adding the filter circuit between the far end of the target signal line and the load end of the interference signal line specifically includes:
and adding the filter circuit between the far end of the target signal line and the load end of the interference signal line on the initial PCB file of the target board card to obtain an optimized PCB file.
9. A server board card, comprising: the PCB, the signal line and the filter circuit;
the signal line and the filter circuit are arranged on the PCB, and the filter circuit is arranged between the far end of a target signal line affected by crosstalk of an interference signal line and the load end of the interference signal line; and calculating circuit parameters of the filter circuit according to PCB board parameters of the PCB and the coupling length of the interference signal line and the target signal line so as to eliminate an interference signal of the interference signal line to the target signal line.
10. A PCB trace generation apparatus, comprising:
the first determining unit is used for determining a target signal line influenced by crosstalk on a target board card;
a second determination unit configured to determine an interference signal line that generates crosstalk to the target signal line;
the calculation unit is used for calculating circuit parameters of a filter circuit for eliminating interference signals of the interference signal line to the target signal line according to the PCB board parameters of the target board card and the coupling length of the interference signal line and the target signal line;
a generating unit to add the filter circuit between a far end of the target signal line and a load end of the interference signal line.
11. A PCB trace generation apparatus, comprising:
a memory for storing a computer program;
a processor for executing the computer program, wherein the computer program when executed by the processor implements the steps of the PCB trace generation method as claimed in any one of claims 1 to 8.
12. A computer readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the steps of the PCB trace generation method according to any of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211052218.2A CN115329712B (en) | 2022-08-31 | 2022-08-31 | PCB wiring generation method, device, equipment and server board card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211052218.2A CN115329712B (en) | 2022-08-31 | 2022-08-31 | PCB wiring generation method, device, equipment and server board card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115329712A true CN115329712A (en) | 2022-11-11 |
| CN115329712B CN115329712B (en) | 2024-01-23 |
Family
ID=83927626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211052218.2A Active CN115329712B (en) | 2022-08-31 | 2022-08-31 | PCB wiring generation method, device, equipment and server board card |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115329712B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117473944A (en) * | 2023-12-26 | 2024-01-30 | 苏州元脑智能科技有限公司 | Transmission line crosstalk protection method and device, integrated circuit and electronic equipment |
| CN117545191A (en) * | 2023-11-10 | 2024-02-09 | 东莞明瑾电子科技有限公司 | Method, device, equipment and medium for controlling assembly of PCB router |
| CN117674903A (en) * | 2024-01-31 | 2024-03-08 | 苏州元脑智能科技有限公司 | Transmission line crosstalk processing method, circuit, storage medium and server |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8737188B1 (en) * | 2012-01-11 | 2014-05-27 | Audience, Inc. | Crosstalk cancellation systems and methods |
| CN106844850A (en) * | 2016-12-16 | 2017-06-13 | 南京航空航天大学 | A kind of elimination circuit design method for far end crosstalk noise |
| CN108337016A (en) * | 2018-02-08 | 2018-07-27 | 南京航空航天大学 | It is a kind of to generate the far-end cross talk removing method for adding crosstalk |
| CN208241977U (en) * | 2018-05-28 | 2018-12-14 | 郑州云海信息技术有限公司 | A kind of pcb board |
| CN110290637A (en) * | 2019-07-30 | 2019-09-27 | 广东浪潮大数据研究有限公司 | A kind of method, system and associated component reducing pcb board signal cross-talk |
| CN110531171A (en) * | 2019-08-28 | 2019-12-03 | 湖南大学 | A kind of calculation method of the critical wiring spacing of determining cable crosstalk |
| CN114417781A (en) * | 2022-03-31 | 2022-04-29 | 苏州浪潮智能科技有限公司 | PCB wiring crosstalk evaluation method, system, device, equipment and storage medium |
-
2022
- 2022-08-31 CN CN202211052218.2A patent/CN115329712B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8737188B1 (en) * | 2012-01-11 | 2014-05-27 | Audience, Inc. | Crosstalk cancellation systems and methods |
| CN106844850A (en) * | 2016-12-16 | 2017-06-13 | 南京航空航天大学 | A kind of elimination circuit design method for far end crosstalk noise |
| CN108337016A (en) * | 2018-02-08 | 2018-07-27 | 南京航空航天大学 | It is a kind of to generate the far-end cross talk removing method for adding crosstalk |
| CN208241977U (en) * | 2018-05-28 | 2018-12-14 | 郑州云海信息技术有限公司 | A kind of pcb board |
| CN110290637A (en) * | 2019-07-30 | 2019-09-27 | 广东浪潮大数据研究有限公司 | A kind of method, system and associated component reducing pcb board signal cross-talk |
| CN110531171A (en) * | 2019-08-28 | 2019-12-03 | 湖南大学 | A kind of calculation method of the critical wiring spacing of determining cable crosstalk |
| CN114417781A (en) * | 2022-03-31 | 2022-04-29 | 苏州浪潮智能科技有限公司 | PCB wiring crosstalk evaluation method, system, device, equipment and storage medium |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117545191A (en) * | 2023-11-10 | 2024-02-09 | 东莞明瑾电子科技有限公司 | Method, device, equipment and medium for controlling assembly of PCB router |
| CN117545191B (en) * | 2023-11-10 | 2024-05-24 | 东莞明瑾电子科技有限公司 | Method, device, equipment and medium for controlling assembly of PCB router |
| CN117473944A (en) * | 2023-12-26 | 2024-01-30 | 苏州元脑智能科技有限公司 | Transmission line crosstalk protection method and device, integrated circuit and electronic equipment |
| CN117473944B (en) * | 2023-12-26 | 2024-04-26 | 苏州元脑智能科技有限公司 | Transmission line crosstalk protection method and device, integrated circuit and electronic equipment |
| CN117674903A (en) * | 2024-01-31 | 2024-03-08 | 苏州元脑智能科技有限公司 | Transmission line crosstalk processing method, circuit, storage medium and server |
| CN117674903B (en) * | 2024-01-31 | 2024-04-30 | 苏州元脑智能科技有限公司 | Transmission line crosstalk processing method, circuit, storage medium and server |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115329712B (en) | 2024-01-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN115329712B (en) | PCB wiring generation method, device, equipment and server board card | |
| WO2017099885A1 (en) | Capacitive compensation structures using partially meshed ground planes | |
| US6564355B1 (en) | System and method for analyzing simultaneous switching noise | |
| CN114417781B (en) | PCB wiring crosstalk evaluation method, system, device, equipment and storage medium | |
| US8560296B2 (en) | Printed circuit board via model design for high frequency performance | |
| US8288657B2 (en) | Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules | |
| WO2004111890A1 (en) | Printed circuit wiring board designing support device, printed circuit board designing method, and its program | |
| US20160094272A1 (en) | Signal routing with reduced crosstalk | |
| CN109842989B (en) | High-speed circuit and high-speed differential line structure thereof | |
| US20110127069A1 (en) | Printed circuit board and layout method thereof | |
| KR100913711B1 (en) | Printed circuit board | |
| CN101389183A (en) | Through-hole region design system and method for differential signal line | |
| Novak et al. | Measurement and simulation of crosstalk reduction by discrete discontinuities along coupled PCB traces | |
| WO2016105782A1 (en) | Two-part electrical connector | |
| Koo et al. | Crosstalk reduction effect of asymmetric stub loaded lines | |
| CN113939091B (en) | Impedance matching design method and device of link electrostatic impedance device and printed circuit board | |
| CN112117971A (en) | Crystal oscillator circuit on PCB, PCB and server | |
| Cheng et al. | Enhanced microstrip guard trace for ringing noise suppression using a dielectric superstrate | |
| CN114126230A (en) | Compatible wiring method of PCB and related device | |
| CN110290634B (en) | Printed circuit board, generation method of printed circuit board model and electronic equipment | |
| Enriquez et al. | Additional coupling for far end crosstalk cancellation in high speed interconnects | |
| CN115361787B (en) | PCB wiring design method, PCB wiring design processing method and PCB | |
| CN117674903B (en) | Transmission line crosstalk processing method, circuit, storage medium and server | |
| CN114302554B (en) | PCB (printed circuit board) capable of improving integrity of cross-split signals based on capacitance and layout method thereof | |
| CN116528481A (en) | Printed circuit board optimization method, device, equipment, medium and printed circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |