CN115314036B - Switching circuit and electronic device - Google Patents
Switching circuit and electronic device Download PDFInfo
- Publication number
- CN115314036B CN115314036B CN202211243716.5A CN202211243716A CN115314036B CN 115314036 B CN115314036 B CN 115314036B CN 202211243716 A CN202211243716 A CN 202211243716A CN 115314036 B CN115314036 B CN 115314036B
- Authority
- CN
- China
- Prior art keywords
- power semiconductor
- switch
- control
- module
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K2017/515—Mechanical switches; Electronic switches controlling mechanical switches, e.g. relais
Landscapes
- Electronic Switches (AREA)
Abstract
The application discloses switching circuit and electronic equipment can further ensure the security and the stability of whole circuit under the switching speed's of assurance switching circuit circumstances. The switching circuit comprises a relay switch module, a power semiconductor switch module and a time delay control module connected between the relay switch module and the power semiconductor switch module. And a first switch control signal input for controlling the relay in the relay switch module to be switched on is simultaneously input during the relay switch module, the delay control module works under the control of the first switch control signal and is used for switching on a second switch control signal of the power semiconductor switch tube after presetting time length.
Description
Technical Field
The application relates to the technical field of electronic circuits, in particular to a switching circuit and electronic equipment.
Background
A switching circuit is a common circuit structure in various electronic devices, and is used to realize on and off states of a specific signal in the electronic device. The switching circuit generally controls transmission or interruption of a target signal to a controlled object in accordance with a control signal at a switching control terminal.
In a specific application scenario of the switch circuit, power Semiconductor switch devices such as MOS (Metal-Oxide-Semiconductor Field-Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), and relays are switch elements that are often used in the switch circuit. The power semiconductor switch device has the advantages of high switching speed, high working frequency, simple driving circuit, no contact, no electromagnetic interference and the like, and has the defects of electric leakage, optical coupling isolation in occasions requiring isolation and the like. The relay has the advantages of isolation and safety, but has the defects of slower switching speed, electromagnetic interference, easy abrasion of contacts, limited service life and the like when the power is higher.
Disclosure of Invention
In order to solve at least a part of the above technical problems, an object of the present invention is to provide a switching circuit and an electronic device.
In a first aspect, the present application provides a switching circuit, including a relay switch module, a power semiconductor switch module, and a delay control module connected between the relay switch module and the power semiconductor switch module;
the relay switch module is used for receiving a first switch control signal, a second switch control signal and a time delay control signal, wherein the first switch control signal is used for controlling the relay in the relay switch module to be switched on, the first switch control signal is input into the relay switch module and is simultaneously input into the time delay control module, the time delay control module works under the control of the first switch control signal and outputs a second switch control signal used for switching on the power semiconductor switch tube to the power semiconductor switch tube in the power semiconductor switch module after preset time.
Preferably, in one implementation of the first aspect, the relay switch module includes a control port, an input port, and at least one relay;
the power semiconductor switch module comprises at least one power semiconductor switch tube and an output port;
the control port is used for receiving a first switch control signal for controlling the relay to be switched on and off, the input end of the delay control module is connected with the control port, the output end of the delay control module is connected with the control electrode of the power semiconductor switch tube, and the delay control module is used for delaying a preset time under the control of the first switch control signal and then outputting a second switch control signal for switching on the power semiconductor switch tube.
Preferably, in an implementation of the first aspect, the relay switch module includes a plurality of relays, the power semiconductor switch module includes a plurality of power semiconductor switch tubes, one power semiconductor switch tube is connected to one relay, and when the relay and the power semiconductor switch tube are turned on under the control of the first switch control signal and the second switch control signal, respectively, an electrical signal input from the input port passes through the relay switch module and the power semiconductor switch module in sequence and is output from the output port.
Preferably, in an implementation scheme of the first aspect, the power semiconductor switch transistor is a metal oxide semiconductor field effect transistor or an insulated gate bipolar transistor, and the control electrode is a gate.
Preferably, in an implementation scheme of the first aspect, the delay control module includes a delay circuit unit, an or gate, a monostable circuit unit, and an and gate;
the delay circuit unit comprises a first reverser, a first voltage-dividing resistor, a second voltage-dividing resistor, a first charging capacitor, a triode, a first pull-up resistor and a second reverser;
an input end of the first inverter is connected to the control port, the first voltage-dividing resistor and the second voltage-dividing resistor are connected in series between the first inverter and ground, and the first charging capacitor is connected in parallel with the second voltage-dividing resistor; a control electrode of the triode is connected with the first charging capacitor, a collector electrode of the triode is connected with a voltage source through a first pull-up resistor, and an emitting electrode of the triode is grounded; the input end of the second inverter is connected with the collector of the triode, and the output end of the second inverter is connected with the first input end of the OR gate; the second input end of the OR gate is connected with the control port, and the output end of the OR gate is connected with the monostable circuit unit;
the monostable circuit unit comprises a second charging capacitor, a timer, a third voltage dividing resistor, a second pull-up resistor and a third inverter; the timer is connected with the output end of the OR gate and is connected with a voltage source through the second pull-up resistor; one end of the second charging capacitor is connected with the voltage source through the third voltage dividing resistor, and the other end of the second charging capacitor is connected with the timer; the input end of the third reverser is connected with the output pin of the timer, the output end of the third reverser is connected with the first input end of the AND gate, the second input end of the AND gate is connected with the output end of the second reverser, and the output end of the AND gate is connected with the control electrode of the power semiconductor switch tube in the power semiconductor switch module.
Preferably, in an implementation of the first aspect, the timer includes a threshold pin and a ground pin respectively connected to two ends of the second charging capacitor; the voltage source provides charging voltage for the second charging capacitor, and when the second charging capacitor is charged to a set threshold voltage, the output pin of the timer outputs a set level signal.
Preferably, in an implementation of the first aspect, the set threshold voltage is two thirds of the charging voltage provided by the voltage source.
Preferably, in an implementation of the first aspect, the transistor is an NPN transistor.
In a second aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes the above switch circuit and a controlled object, the controlled object is electrically connected to the output port of the switch circuit, and when the switch circuit is turned on, an electrical signal input from the input port of the switch circuit is input to the controlled object through the output port.
Based on the above, the switching circuit and the electronic device provided by the embodiment of the application can firstly give the first switch control signal through the control port, then delay the preset time through the delay control module and then apply the second switch control signal to the power semiconductor switch tube of the power semiconductor switch module, in the preset time, ensure that the relay can be in a conducting state, after the preset time is delayed, the power semiconductor switch tube can be conducted instantly, so that the whole switching circuit starts to normally work, and the input port and the output port are conducted. Therefore, under the condition that the switching speed of the switching circuit can be ensured, the safety and the stability of the whole circuit are further ensured.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic diagram of a switching circuit according to an embodiment of the present disclosure.
Fig. 2 is a schematic diagram of an alternative exemplary circuit implementation of the delay module of fig. 1.
Detailed Description
The technical solutions in some embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is to be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived from the embodiments given herein by a person skilled in the art, are within the scope of the present invention.
Fig. 1 is a schematic diagram of a switching circuit according to an embodiment of the present disclosure.
In this embodiment, the switching circuit includes a relay switch module 100, a power semiconductor switch module 200, and a delay control module 300 connected between the relay switch module 100 and the power semiconductor switch module 200. When a first switch control signal for controlling the relay 110 in the relay switch module 100 to be turned on is input into the relay switch module 100, the first switch control signal is simultaneously input into the delay control module 200, and the delay control module 200 works under the control of the first switch control signal and outputs a second switch control signal for turning on the power semiconductor switch tube to the power semiconductor switch tube in the power semiconductor switch module 200 after a preset time.
In one example, the relay switch module 100 includes a control port Ctr, an Input port Input, and at least one relay 110. The power semiconductor switch module 200 includes at least one power semiconductor switch tube and an Output port Output. For example, the at least one power semiconductor switch may comprise a first power semiconductor switch S1 and a second power semiconductor switch S2 as shown in fig. 1.
The control port Ctr is used for receiving a first switch control signal for controlling the on-off of the relay 110, the input end of the delay control module 300 is connected with the control port Ctr, and the output end of the delay control module is connected with the control electrode of the power semiconductor switch tube, and is used for delaying a preset time under the control of the first switch control signal and then outputting a second switch control signal to the power semiconductor switch tube to conduct the power semiconductor switch tube.
One power semiconductor switch tube may be connected to one relay 110, and when the relay 110 and the power semiconductor switch tube are turned on under the control of the first switch control signal and the second switch control signal, respectively, an electrical signal (e.g., a high-voltage current signal) Input from the Input port Input passes through the relay switch module 100 and the power semiconductor switch module 200 in sequence and is Output from the Output port Output.
In an alternative implementation of this embodiment, the power semiconductor switch tube may be, but is not limited to, a metal oxide semiconductor field effect transistor (Mos) or an Insulated Gate Bipolar Transistor (IGBT), and accordingly, the control electrode is a gate of the power semiconductor switch tube. In addition, in the present embodiment, a plurality of relays 110 may be stacked in the relay switch module 100 to increase the capability of the relay switch module to generate an excessive current.
To sum up, the switch circuit provided by the embodiment of the present application may first pass through control port Ctr gives first switch control signal (if be used for closing relay 100's closure signal, can be low level signal), then through delay control module 300 time delay predetermine time (if 2-3 ms) after to power semiconductor switch tube of power semiconductor switch module 200 applys second switch control signal (if be used for closing power semiconductor switch tube's gate control signal, can be high level signal) it is in to predetermine time in, ensure relay 110 can be in the conducting state, after should predetermine time in the time delay, power semiconductor switch tube can switch on in the twinkling of an eye for whole switch circuit begins normal work, makes Input port Input and Output port Output switch on. Therefore, compared with the traditional switching circuit only using a relay, the switching speed is improved; accordingly, compared with the traditional switching circuit only using a power semiconductor switching tube, the anti-creeping and over-current-preventing capabilities of the whole switching circuit are correspondingly improved, and the safety and the stability of the whole switching circuit are further improved.
Further, as shown in fig. 2, it is a schematic diagram of an alternative implementation circuit of the delay control module 300 in the embodiment of the present application.
The delay control module 300 may include a delay circuit unit 310, an or gate U3A, a monostable circuit unit 320, and an and gate U5B.
The delay circuit unit 310 includes a first inverter U4B, a first voltage-dividing resistor R4, a second voltage-dividing resistor R5, a first charging capacitor C1, a triode Q1, a first pull-up resistor R3, and a second inverter U1B;
the input end of the first inverter U4B is connected to the control port Ctr, the first voltage-dividing resistor R4 and the second voltage-dividing resistor R5 are connected in series between the first inverter U4B and the ground GND, and the first charging capacitor C1 is connected in parallel with the second voltage-dividing resistor R5; a control electrode of the triode Q1 is connected with the first charging capacitor C1, a collector electrode of the triode Q1 is connected with a voltage source VDD through a first pull-up resistor R3, and an emitting electrode of the triode Q1 is grounded; the input end of the second inverter U1B is connected with the collector of the triode Q1, and the output end of the second inverter U1B is connected with the first input end of the OR gate U3A; in this embodiment, the transistor Q1 is preferably an NPN-type transistor;
a second input end of the or gate U3A is connected to the control port Ctr, and an output end thereof is connected to the monostable circuit unit 320;
the monostable circuit unit 320 includes a second charging capacitor C2, a timer U2, a third voltage dividing resistor R1, a second pull-up resistor R2, and a third inverter U1A; the timer U2 is connected with the output end of the OR gate U3A and is connected with a voltage source VDD through the second pull-up resistor R2; one end of the second charging capacitor C2 is connected to the voltage source VDD through the third voltage dividing resistor R1, and the other end is connected to the timer U2; the input end of the third inverter U1A is connected to the output pin OUT of the timer U2, the output end is connected to the first input end of the and gate U5B, the second input end of the and gate U5B is connected to the output end of the second inverter U1B, and the output end of the and gate U5B is connected to the control electrode of the power semiconductor switch tube in the power semiconductor switch module 200;
in detail, the timer U2 may be a 555 timer, and the timer U2 includes a threshold pin THR and a ground pin GND respectively connected to two ends of the second charging capacitor C2; the voltage source VDD provides a charging voltage for the second charging capacitor C2, and when the second charging capacitor C2 is charged to a set threshold voltage (e.g., 2/3 VDD), the output pin OUT of the timer U2 outputs a set level signal (e.g., a low level signal). For example, in actual operation, the trigger pin TRI of the timer U2 is pulled up to VDD (5V) through the second pull-up resistor R2, when the trigger pin TRI has no input or inputs a high level, the output pin OUT immediately outputs a low level, when the input of the trigger pin TRI changes from the high level to the low level, the output pin OUT outputs a high level, so that the discharge tube inside the timer U2 is in an off state, and the discharge pin DIS is set to the high level, so that VDD charges the second charge capacitor C2 through the resistor R1, and after the delay time of t2 ≈ 1.1r1c2, when the charge reaches (2/3) × VDD, the output pin OUT outputs a low level.
Based on the above circuit connection relationship, a specific circuit operation principle of the delay control module 300 will be described below.
First, for the delay circuit unit 310, when the first switch control signal (which may be referred to as a delay control signal) is a low level signal, the first switch control signal is inverted by the first inverter U4B and then charges the first charging capacitor C1 through the first voltage-dividing resistor R4 and the second voltage-dividing resistor R5, the charging time t1 ≈ 1ms, and when the voltage across the first charging capacitor C1 exceeds a set threshold voltage (e.g., 0.7V), the triode Q1 is turned on, so that the input end of the second inverter U1B inputs the low level signal and outputs the low level signal to the or gate U3A through inversion.
Then, the first switch control signal and the signal output by the second inverter U1B are output to the monostable unit 320 after being or-operated in the or gate U3A.
Secondly, when the first switch control signal input by the control port Ctr is a high level signal, a low level signal is output after being inverted by the first inverter U4B, and after voltage division is performed by the first voltage dividing resistor R4 and the second voltage dividing resistor R5, the voltage at two ends of the second voltage dividing resistor R5 is far lower than the voltage drop at two ends of the VBE of the triode, so that the triode Q1 is turned off, and further, the whole delay control module 300 can output a level signal for turning off the power semiconductor switching tube.
Further, for the monostable circuit unit 320, the trigger pin TRI of the timer U2 is pulled up to the voltage source VDD through the second pull-up resistor R2, when the trigger pin TRI of the timer U2 has no input or the input is a high level signal, the output pin OUT of the timer U2 immediately outputs a low level signal, when the input of the trigger pin TRI of the timer U2 changes from a high level to a low level, the output pin OUT outputs a high level signal, the discharge tube inside the timer U2 is in an off state, and the discharge pin DIS is at a high level. In actual operation, the power supply VDD charges the second charging capacitor C2 through the third voltage dividing resistor R1, after a preset time t2 (for example, t2 ≈ 1.1r1c2) elapses, when the second charging capacitor C2 is charged to a preset voltage threshold (for example, 2/3 × VDD), the level signal of the trigger pin TRI is converted from a high level to a low level, and accordingly, the output pin OUT outputs a low level signal and is inverted by the third inverter U1A and then outputs the low level signal to the and gate U5B.
Finally, after the and operation of the output of the delay circuit unit 310 (the output of the second inverter U1B) and the output of the monostable circuit unit 320 (the output of the third inverter U1A) is performed by the and gate U5B, a second switch control signal is generated, which delays the preset time t2 with respect to the first switch control signal (low level active), and is used for controlling the conduction of the power semiconductor switch tube in the power semiconductor switch module 200. The circuit operation principle of the whole delay control module 300 can be summarized as follows: the first switch control signal (low level is valid) is processed by the delay circuit unit 310, and then a low level signal is input to the trigger pin TRI of the timer U2, so that the monostable circuit unit 320 starts to operate, then the output pin OUT of the timer U2 outputs a positive pulse with a time width (delay time) of t2, the positive pulse is inverted by the third inverter U1A, and then a negative pulse with a time width of t2 is output, and then the negative pulse and the output of the second inverter U1B are subjected to and operation by the U5B, and a second switch control signal (such as a high level gate control signal) delayed by about t2 with respect to the first switch control signal is generated. When the first switch control signal is at high level, the second switch control signal is immediately changed into low level, the whole switch circuit is turned off, and the work is stopped.
The charging duration of the first charging capacitor C1 can be adjusted by adjusting parameters of the first voltage dividing resistor R4, the second voltage dividing resistor R5, and the first charging capacitor C1, and the time width of the delay time t2 can be adjusted by adjusting parameters of the third voltage dividing resistor R1 and the second charging capacitor C2.
The timer U2 further includes a control pin CON, the control pin CON is connected to one end of the capacitor C3, and the other end of the capacitor C3 is connected to the second charging capacitor C3.
On the basis of the above, an embodiment of the present application further provides an electronic device, where the electronic device includes the above switch circuit and a controlled object, the controlled object is electrically connected to the Output port Output of the switch circuit, and when the switch circuit is turned on, an electrical signal Input from the Input port Input is Input to the controlled object through the Output port Output.
To sum up, the switch circuit and the electronic equipment that this application embodiment provided can at first pass through control port Ctr gives first on-off control signal, then through time delay control module 300 time delay predetermine time length after again to power semiconductor switch tube of power semiconductor switch module 200 applys second on-off control signal predetermine in time length, ensure relay 110 can be in the on-state, should predetermine time length after at the time delay, power semiconductor switch tube can switch on in the twinkling of an eye for whole switch circuit begins normal work, makes Input port Input and Output port Output switches on. Therefore, under the condition that the switching speed of the switching circuit can be ensured, the safety and the stability of the whole circuit are further ensured.
It should be understood that in the foregoing, unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be interpreted in an open, inclusive sense, i.e., as "including, but not limited to". In the description herein, the terms "some embodiments," "some examples," or "exemplary" etc. are intended to indicate that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. The schematic representations of the terms used above are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be included in any suitable manner in any one or more embodiments or examples.
In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "a plurality" means two or more unless otherwise specified.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the present application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (7)
1. A switch circuit is characterized by comprising a relay switch module, a power semiconductor switch module and a time delay control module connected between the relay switch module and the power semiconductor switch module;
when a first switch control signal for controlling the conduction of a relay in the relay switch module is input into the relay switch module, the first switch control signal is simultaneously input into the delay control module, and the delay control module works under the control of the first switch control signal and outputs a second switch control signal for conducting a power semiconductor switch tube to the power semiconductor switch tube in the power semiconductor switch module after a preset time length;
the relay switch module comprises a control port, an input port and at least one relay;
the power semiconductor switch module comprises at least one power semiconductor switch tube and an output port;
the control port is used for receiving a first switch control signal for performing on-off control on the relay, the input end of the delay control module is connected with the control port, the output end of the delay control module is connected with the control electrode of the power semiconductor switch tube, and the delay control module is used for delaying a preset time under the control of the first switch control signal and then outputting a second switch control signal for conducting the power semiconductor switch tube to the power semiconductor switch tube;
the delay control module comprises a delay circuit unit, an OR gate, a monostable circuit unit and an AND gate;
the delay circuit unit comprises a first reverser, a first voltage-dividing resistor, a second voltage-dividing resistor, a first charging capacitor, a triode, a first pull-up resistor and a second reverser;
an input end of the first inverter is connected with the control port, the first voltage-dividing resistor and the second voltage-dividing resistor are connected between an output end of the first inverter and the ground in series, and the first charging capacitor is connected with the second voltage-dividing resistor in parallel; a control electrode of the triode is connected with the first charging capacitor, a collector electrode of the triode is connected with a voltage source through a first pull-up resistor, and an emitting electrode of the triode is grounded; the input end of the second inverter is connected with the collector of the triode, and the output end of the second inverter is connected with the first input end of the OR gate; the second input end of the OR gate is connected with the control port, and the output end of the OR gate is connected with the monostable circuit unit;
the monostable circuit unit comprises a second charging capacitor, a timer, a third voltage dividing resistor, a second pull-up resistor and a third inverter; the timer is connected with the output end of the OR gate and is connected with a voltage source through the second pull-up resistor; one end of the second charging capacitor is connected with the voltage source through the third voltage dividing resistor, and the other end of the second charging capacitor is connected with the timer; the input end of the third reverser is connected with the output pin of the timer, the output end of the third reverser is connected with the first input end of the AND gate, the second input end of the AND gate is connected with the output end of the second reverser, and the output end of the AND gate is connected with the control electrode of the power semiconductor switch tube in the power semiconductor switch module.
2. The switch circuit according to claim 1, wherein the relay switch module includes a plurality of relays, the power semiconductor switch module includes a plurality of power semiconductor switching tubes, one of the power semiconductor switching tubes is connected to one of the relays, and when the relay and the power semiconductor switching tube are turned on under control of the first switching control signal and the second switching control signal, respectively, the electric signal input from the input port passes through the relay switch module and the power semiconductor switch module in this order and is output from the output port.
3. The switch circuit of claim 1, wherein the power semiconductor switch transistor is a metal oxide semiconductor field effect transistor or an insulated gate bipolar transistor, and the control electrode is a gate electrode.
4. The switch circuit according to claim 1, wherein the timer includes a threshold pin and a ground pin connected to both ends of the second charging capacitance, respectively; the voltage source provides charging voltage for the second charging capacitor, and when the second charging capacitor is charged to a set threshold voltage, an output pin of the timer outputs a set level signal.
5. The switch circuit of claim 4, wherein the set threshold voltage is two-thirds of a charging voltage provided by the voltage source.
6. The switch circuit of claim 1, wherein the transistor is an NPN transistor.
7. An electronic device comprising the switching circuit according to any one of claims 1 to 6 and a controlled object, wherein the controlled object is electrically connected to an output port of the switching circuit, and when the switching circuit is turned on, an electric signal input from an input port of the switching circuit is input to the controlled object through the output port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211243716.5A CN115314036B (en) | 2022-10-12 | 2022-10-12 | Switching circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211243716.5A CN115314036B (en) | 2022-10-12 | 2022-10-12 | Switching circuit and electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115314036A CN115314036A (en) | 2022-11-08 |
| CN115314036B true CN115314036B (en) | 2023-01-06 |
Family
ID=83867766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211243716.5A Active CN115314036B (en) | 2022-10-12 | 2022-10-12 | Switching circuit and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115314036B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2113025A (en) * | 1981-05-15 | 1983-07-27 | Michael Shmuel Howard | Thyristor switching circuits |
| JP2005295665A (en) * | 2004-03-31 | 2005-10-20 | Sanken Electric Co Ltd | Power supply |
| WO2022193696A1 (en) * | 2021-03-19 | 2022-09-22 | 苏州贝昂科技有限公司 | Gear control circuit for alternating current motor, system, switch controller, and electronic device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012249377A (en) * | 2011-05-26 | 2012-12-13 | Sanken Electric Co Ltd | Gate driving circuit |
-
2022
- 2022-10-12 CN CN202211243716.5A patent/CN115314036B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2113025A (en) * | 1981-05-15 | 1983-07-27 | Michael Shmuel Howard | Thyristor switching circuits |
| JP2005295665A (en) * | 2004-03-31 | 2005-10-20 | Sanken Electric Co Ltd | Power supply |
| WO2022193696A1 (en) * | 2021-03-19 | 2022-09-22 | 苏州贝昂科技有限公司 | Gear control circuit for alternating current motor, system, switch controller, and electronic device |
Non-Patent Citations (2)
| Title |
|---|
| A Power Relay System With Multiple Loads Using Asymmetrical Coil Design;Chenwen Cheng;《IEEE Transactions on Industrial Electronics ( Volume: 68, Issue: 2, February 2021)》;20200205;1188-1196 * |
| 基于可编程控制器单稳态触发器的设计与分析;徐良雄;《电子设计工程》;20111231;85-87 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115314036A (en) | 2022-11-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108718193B (en) | Driving protection circuit of power semiconductor element and control method thereof | |
| CN103857083A (en) | IGBT drive device for electromagnetic heating system | |
| US6396672B1 (en) | Apparatus and method for utilizing a snubber capacitor to power a silicon-controlled rectifier gate trigger circuit | |
| CN115314036B (en) | Switching circuit and electronic device | |
| CN108233775A (en) | A kind of vehicle or the start-up circuit of complete machine and startup method | |
| KR20050044542A (en) | Circuit arrangement for the reliable switching of electrical circuits | |
| CN215009570U (en) | Overload protection circuit for soft start, soft start device and electronic equipment | |
| CN217159265U (en) | Hot plug power control circuit | |
| CN106601549A (en) | DC relay protection control method and circuit | |
| US4129812A (en) | Electronic timer | |
| CN110545097B (en) | Contactless switch circuit controlled by low-voltage pulse trigger | |
| CN210110647U (en) | Direct current relay control circuit | |
| CN207968454U (en) | A kind of switching circuit and underwater equipment | |
| CN219739994U (en) | Power supply shutoff circuit and power supply circuit | |
| CN108306631A (en) | A kind of switching circuit and underwater equipment | |
| CN217769474U (en) | Overcurrent protection circuit and device of switching device and driving power supply | |
| CN212849822U (en) | Control protection circuit | |
| CN218648725U (en) | Soft start circuit of switching power supply | |
| CN116995623B (en) | HV-EFUSE system of battery pack | |
| CN220605578U (en) | Charging circuit of battery and battery | |
| WO2019052458A1 (en) | Direct-current arc-extinguishing apparatus | |
| CN111541217A (en) | Short-circuit protection circuit, electrical equipment and electrical system | |
| CN214315217U (en) | Time sequence generating circuit and detection control device | |
| CN116231809A (en) | Power supply shutoff circuit and power supply circuit | |
| CN217882849U (en) | anti-AC input intermediate relay circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 230000 2 / F, east side of building D1, intelligent equipment science and Technology Park, 3963 Susong Road, Hefei Economic and Technological Development Zone, Anhui Province Patentee after: Hefei Yuexin Semiconductor Technology Co.,Ltd. Address before: 230000 2 / F, east side of building D1, intelligent equipment science and Technology Park, 3963 Susong Road, Hefei Economic and Technological Development Zone, Anhui Province Patentee before: Hefei Yuexin Semiconductor Technology Co.,Ltd. Address after: 230000 2 / F, east side of building D1, intelligent equipment science and Technology Park, 3963 Susong Road, Hefei Economic and Technological Development Zone, Anhui Province Patentee after: Yuexin Technology Co.,Ltd. Address before: 230000 2 / F, east side of building D1, intelligent equipment science and Technology Park, 3963 Susong Road, Hefei Economic and Technological Development Zone, Anhui Province Patentee before: Hefei Yuexin Semiconductor Technology Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder |