CN115313886B - Interleaving parallel five-level converter space vector modulation method and system - Google Patents

Interleaving parallel five-level converter space vector modulation method and system Download PDF

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CN115313886B
CN115313886B CN202211230787.1A CN202211230787A CN115313886B CN 115313886 B CN115313886 B CN 115313886B CN 202211230787 A CN202211230787 A CN 202211230787A CN 115313886 B CN115313886 B CN 115313886B
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vector
converter
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sector
parallel
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CN115313886A (en
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武美娜
周亮
马丰民
汪兴
王文进
陈广飞
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Wuhan Daquan Energy Technology Co ltd
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Wuhan New Energy Institute Of Access Equipment & Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4833—Capacitor voltage balancing
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The invention provides a method and a system for modulating space vectors of staggered parallel five-level converters, belonging to the technical field of power electronics and power transmission, wherein the method comprises the following steps: firstly, generating an output switching vector and action time by a given voltage vector according to a five-level space vector modulation method; then adjusting the action time of the redundant switch vector to balance the midpoint voltage of the direct current side of the converter; then calculating the magnitude of the parallel bridge arm circulating current at the starting moment of the next interrupt period, and distributing the five-level switch sequence into a three-level switch sequence of the parallel three-level converter by taking a predicted value as a criterion; and finally, generating corresponding PWM according to the three-level switch sequence of the parallel three-level converter. According to the invention, three-level parallel conversion is output according to five levels, so that the overall output waveform quality is improved; meanwhile, by adopting the current sharing algorithm based on the circulation prediction, the electric heating stress of the parallel converter is effectively reduced, and the output capacity of the parallel converter is improved.

Description

Interleaving parallel five-level converter space vector modulation method and system
Technical Field
The invention belongs to the technical field of power electronics and power transmission, and particularly relates to a method and a system for modulating a space vector of a staggered parallel five-level converter.
Background
In medium-voltage high-power transmission systems, high-capacity and high-performance converters are widely used. At present, the capacity of a power device is limited, the requirements of high voltage and large current are met by means of combination of the device and topology, and the high voltage target is realized through device series connection, device cascade connection and a multi-level technology; the high-current target is realized through device parallel connection, device parallel connection and a multiplexing technology. The interleaved parallel converter outputs the parallel bridge arms through inductive coupling, so that the output capacity of the converter is enlarged, the equivalent switching frequency can be improved, and the harmonic content of the output current is further reduced. Because the output pulses of the parallel bridge arms are not consistent, circulation currents exist among the parallel bridge arms. In practice, interleaved parallel converters sacrifice the current quality of a single converter in exchange for a reduction in the parallel output current. The traditional interleaved parallel type converter adopts each independent control method, the carrier phase shift between adjacent converters is 2 pi/N so as to achieve the best harmonic performance, the high-frequency loop current mainly depends on coupling inductance to inhibit the converter with 2 three-level bridge arms connected in parallel, the converter can be directly modulated and controlled by adopting a five-level space vector method without considering the converter as 2 discrete three-level converters, the constraint of three-level operation on a converter switching device can be broken, and the performance improvement is realized. However, the characteristic that the load has 1 beat delay after the PWM sampling calculation is carried out, the traditional circulation restraining method only takes the circulation sampling value of the current period as the criterion to carry out circulation regulation, the problem of circulation regulation delay exists, the circulation peak value is larger, the electrothermal stress of a power device is increased, and the output capacity of a parallel converter is reduced.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a space vector modulation method and system for a staggered parallel five-level converter, and aims to solve the problems of poor output waveform quality, large circulating current between parallel bridge arms and limited overall output capacity of the conventional parallel converter.
In order to achieve the above object, in one aspect, the present invention provides a space vector modulation method for an interleaved parallel five-level converter, including the following steps:
s1: acquiring a three-phase given voltage value expected to be output by the converter in each interrupt period, and carrying out normalization processing on the three-phase given voltage according to the direct-current bus voltage of the converter;
s2: converting the three-phase given voltage subjected to normalization processing into a two-phase static alpha beta coordinate system, and calculating a sector where a given voltage vector is located according to alpha component and beta component values of the given voltage;
s3: selecting an output switching vector according to a nearest three-vector synthesis method according to a sector where a given voltage vector is located, and calculating action time of the switching vector;
s4: according to the current converter DC side midpoint voltage and the output AC current, adjusting the action time of the redundant switch vector to balance the converter DC side midpoint voltage; wherein one switching vector is synthesized by a pair of redundant switching vectors;
s5: generating a five-level switching sequence of the converter according to the adjusted switching vector and the action time;
s6: predicting the size of the circulating current of the parallel bridge arm at the starting moment of the next interrupt period according to the three-level switch sequence output by the last interrupt period based on the sampling current of the current switch period, and allocating the five-level switch sequence as the three-level switch sequence of the parallel three-level converter by taking the predicted size of the circulating current of the parallel bridge arm as a criterion;
s7: and respectively passing the three-level switch sequence of the parallel three-level converter through a minimum pulse width module and a dead zone module to generate corresponding PWM (pulse width modulation) modulation pulse so as to realize space vector modulation of the staggered parallel five-level converter.
Further preferably, the predicted parallel bridge arm circulating current expression is as follows:
Figure 359880DEST_PATH_IMAGE001
wherein,i Cir x_ （k) Is composed ofkA circulating current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, when adjusting for a circulating current dropSign x (k-1) = -1, when there is no effect on circulating currentsSign x (k-1)=0；t x (k-1) isk-1 moment circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupling inductance;V dc is the converter dc bus voltage.
Further preferably, the calculation method of the sector where the given voltage vector is located is as follows:
Figure 369424DEST_PATH_IMAGE002
wherein,V α ' andV β ' the values of the alpha and beta components of a given voltage, respectively;Nif =1, sector II is indicated;N=2, indicates sector VI;Nif =3, it indicates sector I;Nif =4, it represents sector IV;N=5, indicates sector III;Nif =6, it indicates the sector V.
Further preferably, the sectors II to VI are converted to the sectors I according to the values of the α component and the β component of the given voltage, and each sector is further divided into 16 regions, where the method for dividing the sector I is as follows:
when the temperature is higher than the set temperatureV β * When the temperature is less than or equal to 0.25
Figure 871949DEST_PATH_IMAGE003
When 0.25 <V β * Less than or equal to 0.5 hour
Figure 207116DEST_PATH_IMAGE004
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 670458DEST_PATH_IMAGE005
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16;
wherein,
Figure 483693DEST_PATH_IMAGE006
,
Figure 716092DEST_PATH_IMAGE007
。
further preferably, the action time obtaining method of the redundant switching vector comprises the following steps:
establishing a relation between the action time of the redundant switch vector and the midpoint electric charge quantity by using the output alternating current of the converter;
collecting the upper midpoint voltage and the lower midpoint voltage of the direct current side of the converter, and calculating the charge deviation of the midpoint potential;
the action time of the redundant switch vector corresponding to the charge deviation of the midpoint potential is calculated so that the amount of charge flowing through the midpoint is equal to half of the midpoint potential charge deviation.
In another aspect, the present invention provides a space vector modulation system for an interleaved parallel five-level converter, including:
the three-phase given voltage calculation module is used for acquiring a three-phase given voltage value expected to be output by the converter in each interrupt period and carrying out normalization processing on the three-phase given voltage according to the direct-current bus voltage of the converter;
the sector calculation module is used for converting the three-phase given voltage after the normalization processing into a two-phase static alpha beta coordinate system and calculating a sector where a given voltage vector is located according to the alpha component and beta component values of the given voltage;
the computing module of the acting time of the switching vector is used for selecting the output switching vector according to the sector where the given voltage vector is located and the latest three-vector synthesis method and computing the acting time of the switching vector;
the redundant switch vector adjusting module is used for adjusting the action time of a redundant switch vector according to the current converter DC side midpoint voltage and the output AC current so as to balance the converter DC side midpoint voltage; wherein one of the switching vectors is synthesized by a pair of redundant switching vectors;
the five-level switch sequence generation module is used for generating a five-level switch sequence according to the adjusted switching vector and the action time;
the three-level switch sequence distribution module is used for calculating the magnitude of the circulating current of the parallel bridge arm at the starting moment of the next interrupt period as a predicted value according to the three-level switch sequence output by the previous interrupt period based on the sampling current of the current switch period, and distributing the five-level switch sequence as the three-level switch sequence of the parallel three-level converter by taking the predicted value as a criterion;
and the PWM modulation pulse generation module is used for enabling the three-level switch sequence of the parallel three-level converter to respectively pass through the minimum pulse width module and the dead zone module to generate corresponding PWM modulation pulses so as to realize the space vector modulation of the staggered parallel five-level converter.
Further preferably, the predicted parallel bridge arm circulating current expression is as follows:
Figure 487738DEST_PATH_IMAGE001
wherein,i Cir x_ （k) Is composed ofkA circulating current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, in regulation of the drop in circulationSign x (k-1) = -1, when there is no effect on circulating currentsSign x (k-1)=0；t x (k-1) isk-1 moment circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupling inductance;V dc is the converter dc bus voltage.
Further preferably, the calculation method of the sector where the given voltage vector is located is:
Figure 766273DEST_PATH_IMAGE002
wherein,V α ' andV β ' the values of the alpha and beta components of a given voltage, respectively;Nif =1, sector II is indicated;Nwhen =2, it represents sector VI;Nif =3, it indicates sector I;Nif =4, it represents sector IV;N=5, indicates sector III;Nif =6, it indicates the sector V.
Further preferably, the sectors II to VI are converted to the sectors I according to the values of the α component and the β component of the given voltage, and each sector is further divided into 16 regions, where the method for dividing the sector I is as follows:
when the temperature is higher than the set temperatureV β * When the temperature is less than or equal to 0.25
Figure 383199DEST_PATH_IMAGE003
When 0.25 <V β * When the temperature is less than or equal to 0.5
Figure 594738DEST_PATH_IMAGE004
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 271707DEST_PATH_IMAGE008
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16;
wherein,
Figure 444062DEST_PATH_IMAGE006
,
Figure 864679DEST_PATH_IMAGE007
。
further preferably, the redundant switching vector adjustment module comprises:
the construction unit of the midpoint charge quantity function is used for establishing a relational expression between the action time of the redundant switch vector and the midpoint charge quantity by utilizing the output alternating current of the converter;
the charge deviation calculation unit is used for acquiring the upper midpoint voltage and the lower midpoint voltage of the direct current side of the converter and calculating the charge deviation of the midpoint potential;
and the computing unit of the action time of the redundant switch vector is used for computing the action time of the redundant switch vector corresponding to the condition that the charge quantity flowing through the middle point is equal to half of the charge deviation of the middle point potential.
Generally, compared with the prior art, the technical scheme conceived by the invention has the following beneficial effects:
the invention provides a space vector modulation method and a space vector modulation system for an interleaved parallel five-level converter, wherein the PWM sampling calculation has the characteristic of 1 beat delay after loading, and if the circulation regulation is carried out by only taking a circulation sampling value of the current switching period as a criterion, the regulation delay exists, so that the circulation peak value is increased by 1 time. In order to solve the problem of increase of the circulation peak value caused by regulation lag, the circulation at the starting moment of the next interrupt cycle is predicted in each interrupt cycle, the circulation regulation is carried out by taking the predicted value as a criterion, the influence of one beat of lag is avoided when the circulation regulation is carried out by the method, the circulation regulation is more timely, the circulation between the parallel converters is smaller, the electrothermal stress of devices in the converters is effectively reduced, and the output capacity of the parallel converters is further improved.
The conventional three-level space vector modulation is divided into 6 sectors, each of which is divided into 4 regions. The invention takes two parallel three-level converters as a whole to carry out five-level space vector modulation, and the three-level converters are also divided into 6 sectors, but each sector is subdivided into 16 areas; compared with three levels, the area division is finer, more switching vectors can be selected, and when a given voltage is synthesized, a better switching vector can be selected, so that the quality of an output waveform is better, and the fluctuation of the output voltage can be greatly reduced.
Drawings
Fig. 1 is a schematic diagram of a staggered parallel topology structure of two three-phase three-level converters provided by an embodiment of the present invention;
fig. 2 is a block diagram of a flow chart of a method for modulating space vectors of an interleaved parallel five-level converter according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a sector and a region division of a five-level space voltage vector provided by an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating an interval where an output phase voltage affects a circulating current according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a method for predicting current circulation according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a switching sequence in which a five-level switching sequence is allocated to parallel three-level converters according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
On one hand, as shown in fig. 2, the invention provides a space vector modulation method for an interleaved parallel five-level converter, wherein the interleaved parallel five-level converter is shown in fig. 1, and the method comprises the following steps:
the method comprises the following steps: obtaining three-phase given voltage value of converter expected output in each interrupt periodV x ref (wherein,x=a，b，c) And according to the DC bus voltage of the converterV dc For a given voltageV x ref Normalization processing is carried out, and the normalized given voltageV x * Comprises the following steps:
V x * =V x ref /V dc （1）
normalized given voltageV x * Is limited to a range of-1. LtoreqV x * ≤1；
Step two: three phases are given voltageV x * Transforming into two-phase stationary alpha beta coordinate system based onV α ' andV β ' value calculates the sector and region in which the voltage vector is located; as shown in fig. 3, the whole space vector is divided into 6 sectors I to VI, each of which is subdivided into 16 regions;
further, a transformation formula for transforming a given voltage of the three-phase stationary abc coordinate system to the two-phase stationary α β coordinate system is as follows:
Figure 71670DEST_PATH_IMAGE009
（2）
to obtain a given voltageV α ' andV β after the value, the sector and area where the given voltage vector is located can be calculated; the 6 sectors of the entire space vector are divided as follows:
Figure 38314DEST_PATH_IMAGE002
（3）
wherein,N=1, indicates sector II;Nwhen =2, it represents sector VI;N=3, indicates sector I;Nif =4, it represents sector IV;N=5, indicates sector III;Nif =6, it indicates sector V;
the sectors II-VI can be converted into the sector I firstly, and then the area is divided according to the mode of the sector I;
Figure 697966DEST_PATH_IMAGE010
wherein,θfor a given electricityThe angle of the pressure vector;V m the magnitude of a given voltage vector;
the method of converting a given voltage vector from the remaining five sectors to sector I is:
Figure 922274DEST_PATH_IMAGE006
taking sector I as an example, 16 areas in the sector are divided as follows, and other sectors are similar;
when the temperature is higher than the set temperatureV β * When the temperature is less than or equal to 0.25
Figure 718191DEST_PATH_IMAGE003
（4）
When 0.25 <V β * When the temperature is less than or equal to 0.5
Figure 736963DEST_PATH_IMAGE004
（5）
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 664337DEST_PATH_IMAGE008
（6）
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16; (7)
Step three: according to the sector and the area where the given voltage vector is located, selecting the output switching vector according to the latest three-vector synthesis method, and calculating the action time of the switching vector;
after the sector and the area where the given voltage vector is positioned are determined, the output switching vector can be determined according to the latest three-vector synthesis methodV 1 、V 2 AndV 3 calculating the action time of the switching vector according to a volt-second balance principle;
Figure 285811DEST_PATH_IMAGE011
（8）
wherein,T 1 、T 2 andT 3 respectively the action times of the three switching vectors,T s is the switching period;V * is a given voltage vector under an alpha beta coordinate system;
step four: adjusting the action time of a redundant switch vector according to the current neutral point voltage on the direct current side and the output alternating current so as to balance the neutral point voltage on the direct current side; wherein the switching vectorV 1 、V 2 AndV 3 wherein there is a switching vector synthesized by a pair of redundant switching vectors;
taking area 7 of sector I as an example for explanation, three vertexes of a triangle where area 7 is located are three switching vectors, which are respectively switching vectorsV 1 、V 2 AndV 3 whereinV 1 there are two corresponding switch states (2, -1, -1) and (1, -2, -2), which are a pair of redundant switch vectors, the effects of which on the midpoint potential are opposite, so that the midpoint potential can be adjusted to balance the midpoint voltage on the dc side by controlling the action time proportional relationship of the pair of redundant switch vectors; setting a pair of redundant small vectors to have a time ratio relationship of actionp：（1-p) I.e. the on-off state (2, -1, -1) has an action time ofp T 1 The action time of the switch states (1, -2, -2) is (1-p）T 1 (ii) a The switching vector is outputted in one switching periodV 1 、V 2 AndV 3 the amount of charge flowing through the midpoint is:
Figure 201814DEST_PATH_IMAGE012
wherein,i NP (t) Represents the current flowing through the midpoint; by the above calculation, the amount of charge flowing through the midpoint can be measuredQ 0 Expressed as a function-time proportional relation with respect to the redundant small vectorspWatch (A)Da typeQ 0 （p) (ii) a The switch states in the brackets respectively represent the level of ABC three-phase output, and +/-2 represents the voltage +/-V dc And. + -. 1 represents a voltage. + -. 0.5 V dc 0 represents a voltage of 0;
further, according to the sampled mid-point voltage of the upper and lower parts of the DC sideV dc1 AndV dc2 the charge deviation existing in the midpoint potential can be calculated as:
△Q=0.5C(V dc1 - V dc2 )
by adjustingpValue of the amount of charge flowing through the midpointQ 0 Equal to half Δ of the midpoint potential charge deviationQThe/2, so as to achieve the equal charge quantity on the upper and lower capacitors and realize the balance of the midpoint potential; finally obtainpAfter the value is obtained, the action time of the redundant switch vector can be determined;
step five: generating a five-level switching sequence according to the adjusted switching vector and the action time;
when the output switching vector and the action time are obtained, a five-level switching sequence can be generated; in order to reduce the switching frequency of the converter as much as possible, the switching sequence is constrained by: a. allowing the switching state of at most one phase of bridge arm to change when switching the switching state each time; b. the switching times of the switch states in each sampling period cannot exceed three times; according to the times of switching state change in one switching period, the switching state can be divided into a three-section type, a five-section type, a seven-section type, a nine-section type and the like, and the seven-section type switching sequence is taken as an example for explanation;
step six: calculating the circulating current of the parallel bridge arms at the starting moment of the next interrupt period according to the sampling current of the current period and the switching sequence output by the previous interrupt period, and distributing the five-level switching sequence into the switching sequence of the parallel three-level converter by taking the predicted value as a criterion so as to realize the current sharing control of the parallel bridge arms;
for the staggered parallel type converter, an important index is to meet the current balance control of parallel bridge arms; FIG. 4 is a schematic diagram of a section where output phase voltage affects circulating current, which may be selected±0.5V dc The circulation current can be adjusted at 0 level, but when the circulation current is adjusted at 0 level (at the moment)V AO,1 =V dc 、V AO,2 =- V dc OrV AO,1 =-V dc 、V AO,2 =V dc ) Will have bridge arm voltage atV dc And-V dc Jump between each other to increase the switching loss and the electromagnetic interference, therefore, only plus or minus 0.5 is selectedV dc Adjusting the magnitude of the circulating current at the level;
because the PWM sampling calculation has the characteristic of delaying 1 beat when being loaded, if the circulation current adjustment is carried out by only taking the circulation current sampling value of the current period as a criterion, the adjustment delay exists, and the circulation current peak value is increased by 1 time; for further explanation, the description is made by taking fig. 5 as an example, wheret（k-1) at the moment when the sampled circulating current is less than 0, the circulating regulator determines that a rise is required andt（k) The effect is played at any moment; but int（k）~t（k+ 1) the actual circulating current is already greater than 0, att（k+1）~t（k+ 2), the circulation continues to change towards the ascending direction, resulting in a 1-fold increase in the circulation peak;
in order to solve the problem of increase of circulation peak caused by regulation lag, the invention provides an improved method, circulation at the starting moment of the next interruption period is predicted in each interruption period, circulation regulation is carried out by taking the predicted value as a criterion, and the predicted circulation expression is as follows:
Figure 125908DEST_PATH_IMAGE013
wherein,i Cir x_ （k) Is composed ofkA circulating current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, when adjusting for a circulating current dropSign x (k-1) = -1, when no influence on circulating current is causedSign x (k-1)=0；t x (k-1) isk-1 moment circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupled inductor;
fig. 6 is a schematic diagram of a switching sequence in which a five-level switching sequence is allocated to a parallel three-level converter, and after a predicted value of a circulating current is obtained by calculation according to the above formula, the five-level switching sequence is allocated to a switching sequence of the parallel three-level converter by using the predicted value as a criterion; taking phase a as an example, if the predicted circulating current value is greater than or equal to 0, the output level of the bridge arm connected in parallel by phase a is shown in the left side of fig. 6, so that the actual circulating current changes towards the zero axis direction; if the predicted circulating current value is less than 0, the output level of the A parallel bridge arm is shown on the right side of the graph 6, the actual circulating current is changed towards the direction of the zero axis, the circulating current is always kept to fluctuate near the zero axis, and the current sharing control of the parallel bridge arm can be realized;
step seven: and respectively passing the three-level switching sequence of the parallel converter through a minimum pulse width module and a dead zone module to generate corresponding PWM modulation pulse.
In another aspect, the present invention provides a space vector modulation system for an interleaved parallel five-level converter, including:
the three-phase given voltage calculation module is used for acquiring a three-phase given voltage value expected to be output by the converter in each interrupt period and carrying out normalization processing on the three-phase given voltage according to the direct-current bus voltage of the converter;
the sector calculation module is used for converting the three-phase given voltage subjected to the normalization processing into a two-phase static alpha beta coordinate system and calculating a sector where a given voltage vector is located according to alpha component and beta component values of the given voltage;
the computing module of the acting time of the switching vector is used for selecting the output switching vector according to the sector where the given voltage vector is located and the latest three-vector synthesis method and computing the acting time of the switching vector;
the redundant switch vector adjusting module is used for adjusting the action time of a redundant switch vector according to the current converter DC side midpoint voltage and the output AC current so as to balance the converter DC side midpoint voltage; wherein one of the switching vectors is synthesized from a pair of redundant switching vectors;
the five-level switch sequence generation module is used for generating a five-level switch sequence according to the adjusted switching vector and the action time;
the three-level switch sequence distribution module is used for calculating the magnitude of the circulating current of the parallel bridge arm at the starting moment of the next interrupt period as a predicted value according to the sampling current of the current switch period and the switch sequence output by the previous interrupt period, and distributing the five-level switch sequence as a three-level switch sequence of the parallel three-level converter by taking the predicted value as a criterion;
and the PWM modulation pulse generation module is used for enabling the three-level switch sequences of the parallel three-level converters to pass through the minimum pulse width module and the dead zone module respectively to generate corresponding PWM modulation pulses so as to realize space vector modulation of the staggered parallel five-level converters.
Further preferably, the predicted parallel bridge arm circulating current expression is as follows:
Figure 760151DEST_PATH_IMAGE013
wherein,i Cir x_ （k) Is composed ofkA circulating current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, when adjusting for a circulating current dropSign x (k-1) = -1, when no influence on circulating current is causedSign x (k-1)=0；t x (k-1) isk-1 moment circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupling inductance;V dc is the converter dc bus voltage.
Further preferably, the calculation method of the sector where the given voltage vector is located is:
Figure 185317DEST_PATH_IMAGE002
wherein,V α ' andV β ' are the values of the alpha and beta components, respectively, of a given voltage;Nif =1, sector II is indicated;Nwhen =2, it represents sector VI;Nif =3, it indicates sector I;Nif =4, it represents sector IV;Nif =5, it indicates sector III;Nif =6, it indicates the sector V.
Further preferably, the sectors II to VI are converted to the sectors I according to the values of the α component and the β component of the given voltage, and each sector is further divided into 16 regions, where the method for dividing the sector I is as follows:
when in useV β * When the temperature is less than or equal to 0.25
Figure 221406DEST_PATH_IMAGE003
When 0.25 <V β * When the temperature is less than or equal to 0.5
Figure 316401DEST_PATH_IMAGE004
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 437940DEST_PATH_IMAGE008
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16;
wherein,
Figure 807742DEST_PATH_IMAGE006
,
Figure 557392DEST_PATH_IMAGE007
。
further preferably, the redundant switching vector adjustment module comprises:
the construction unit of the midpoint charge quantity function is used for establishing a relational expression between the action time of the redundant switch vector and the midpoint charge quantity by utilizing the output alternating current of the converter;
the charge deviation calculation unit is used for acquiring the upper midpoint voltage and the lower midpoint voltage of the direct current side of the converter and calculating the charge deviation of the midpoint potential;
and the redundant switch vector action time calculating unit is used for calculating the action time of the redundant switch vector corresponding to half of the midpoint potential charge deviation, wherein the charge quantity flowing through the midpoint is equal to the midpoint potential charge deviation.
In summary, compared with the prior art, the invention has the following advantages:
the invention provides a space vector modulation method and a space vector modulation system for an interleaved parallel five-level converter, wherein the characteristic of 1 beat delay is obtained when PWM sampling calculation is carried out to loading, and if only a circulation sampling value of the current switching period is taken as a criterion for circulation adjustment, the adjustment delay exists, so that the circulation peak value is increased by 1 time. In order to solve the problem of increase of the circulation peak value caused by regulation lag, the circulation at the starting moment of the next interrupt cycle is predicted in each interrupt cycle, the circulation regulation is carried out by taking the predicted value as a criterion, the influence of one beat of lag is avoided when the circulation regulation is carried out by the method, the circulation regulation is more timely, the circulation between the parallel converters is smaller, the electrothermal stress of devices in the converters is effectively reduced, and the output capacity of the parallel converters is further improved.
The conventional three-level space vector modulation is divided into 6 sectors, each of which is divided into 4 regions. The invention takes two parallel three-level converters as a whole to carry out five-level space vector modulation, and is also divided into 6 sectors, but each sector is subdivided into 16 areas; compared with three levels, the area division is finer, more switching vectors can be selected, and when a given voltage is synthesized, a better switching vector can be selected, so that the quality of an output waveform is better, and the fluctuation of the output voltage can be greatly reduced.
It will be understood by those skilled in the art that the foregoing is only an exemplary embodiment of the present invention, and is not intended to limit the invention to the particular forms disclosed, since various modifications, substitutions and improvements within the spirit and scope of the invention are possible and within the scope of the appended claims.

Claims (8)

1. A space vector modulation method for an interleaved parallel five-level converter is characterized by comprising the following steps:
s1: acquiring a three-phase given voltage value expected to be output by the converter in each interrupt period, and carrying out normalization processing on the three-phase given voltage according to the direct-current bus voltage of the converter;
s2: converting the three-phase given voltage subjected to normalization processing into a two-phase static alpha beta coordinate system, and calculating a sector where a given voltage vector is located according to alpha component and beta component values of the given voltage;
s3: according to the sector where the given voltage vector is located, selecting the output switching vector according to the latest three-vector synthesis method, and calculating the action time of the switching vector;
s4: according to the current neutral point voltage of the direct current side of the converter and the output alternating current, the action time of the redundant switch vector is adjusted to balance the neutral point voltage of the direct current side of the converter; wherein one of the switching vectors is synthesized by a pair of redundant switching vectors;
s5: generating a five-level switching sequence according to the adjusted switching vector and the action time;
s6: calculating the size of the parallel bridge arm ring current at the starting moment of the next interrupt period as a predicted value according to the three-level switch sequence output by the last interrupt period based on the sampling current of the current switch period, and distributing the five-level switch sequence as the three-level switch sequence of the parallel three-level converter by taking the predicted value as a criterion;
s7: respectively passing the three-level switch sequence of the parallel three-level converter through a minimum pulse width module and a dead zone module to generate corresponding PWM (pulse width modulation) pulse so as to realize space vector modulation of the staggered parallel five-level converter;
the predicted parallel bridge arm circulation current expression is as follows:
Figure 419354DEST_PATH_IMAGE002
wherein,i Cir x_ （k) Is composed ofkA circulating current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, when adjusting for a circulating current dropSign x (k-1) = -1, when there is no effect on circulating currentsSign x (k-1)=0；t x (k-1) isk-1 moment circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupling inductance;V dc is the converter dc bus voltage.
2. The interleaved parallel five-level converter space vector modulation method according to claim 1, wherein the calculation method of the sector where the given voltage vector is located is as follows:
Figure 867653DEST_PATH_IMAGE004
wherein,V α ' andV β ' are the values of the alpha and beta components, respectively, of a given voltage;Nif =1, sector II is indicated;Nwhen =2, it represents sector VI;Nif =3, it indicates sector I;Nif =4, it represents sector IV;N=5, indicates sector III;Nand =6, it represents the sector V.
3. The space vector modulation method of an interleaved parallel five-level converter according to claim 2, wherein sectors II to VI are converted to sectors I according to values of α component and β component of a given voltage, each sector is further divided into 16 regions, and the method of dividing the sector I is:
when in useV β * When the temperature is less than or equal to 0.25
Figure 850652DEST_PATH_IMAGE006
When 0.25 <V β * When the temperature is less than or equal to 0.5
Figure 652386DEST_PATH_IMAGE008
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 732337DEST_PATH_IMAGE010
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16;
wherein,
Figure 758062DEST_PATH_IMAGE012
,
Figure 434550DEST_PATH_IMAGE014
。
4. the interleaved parallel five-level converter space vector modulation method according to claim 1, wherein the method for obtaining the action time of the redundant switch vector comprises:
establishing a relation between the action time of the redundant switch vector and the midpoint electric charge quantity by using the output alternating current of the converter;
collecting the upper midpoint voltage and the lower midpoint voltage of the direct current side of the converter, and calculating the charge deviation of the midpoint potential;
the action time of the redundant switch vector corresponding to the amount of charge flowing through the midpoint equal to half of the midpoint potential charge deviation is calculated.
5. An interleaved parallel five-level converter space vector modulation system, comprising:
the three-phase given voltage calculation module is used for acquiring a three-phase given voltage value expected to be output by the converter in each interrupt period and carrying out normalization processing on the three-phase given voltage according to the direct-current bus voltage of the converter;
the sector calculation module is used for converting the three-phase given voltage subjected to the normalization processing into a two-phase static alpha beta coordinate system and calculating a sector where a given voltage vector is located according to alpha component and beta component values of the given voltage;
the computing module of the acting time of the switching vector is used for selecting the output switching vector according to the sector where the given voltage vector is located and the latest three-vector synthesis method and computing the acting time of the switching vector;
the redundant switch vector adjusting module is used for adjusting the action time of a redundant switch vector according to the current converter DC side midpoint voltage and the output AC current so as to balance the converter DC side midpoint voltage; wherein one of the switching vectors is synthesized by a pair of redundant switching vectors;
the five-level switch sequence generation module is used for generating a five-level switch sequence according to the adjusted switching vector and the action time;
the three-level switch sequence distribution module is used for calculating the size of the parallel bridge arm circulation current at the starting moment of the next interrupt period as a predicted value according to the three-level switch sequence output by the last interrupt period based on the sampling current of the current switch period, and distributing the five-level switch sequence as the three-level switch sequence of the parallel three-level converter by taking the predicted value as a criterion;
the PWM modulation pulse generation module is used for enabling the three-level switch sequences of the parallel three-level converters to pass through the minimum pulse width module and the dead zone module respectively to generate corresponding PWM modulation pulses so as to realize space vector modulation of the staggered parallel five-level converters;
the predicted parallel bridge arm circulating current expression is as follows:
Figure DEST_PATH_IMAGE015
wherein,i Cir x_ （k) Is composed ofkA loop current value sampled at a moment;Sign x (k-1) isk-1 time circulation regulation sign function, regulation for circulation riseSign x (k-1) =1, in regulation of the drop in circulationSign x (k-1) = -1, when no influence on circulating current is causedSign x (k-1)=0；t x (k-1) isk-1 moment in time the circulation regulation active time;Lself-inductance of the coupling inductor;Mis the mutual inductance of the coupling inductance;V dc is the converter dc bus voltage.
6. The interleaved parallel five-level converter space vector modulation system according to claim 5, wherein the calculation method of the sector where the given voltage vector is located is as follows:
Figure 305554DEST_PATH_IMAGE016
wherein,V α ' andV β ' are the values of the alpha and beta components, respectively, of a given voltage;Nif =1, sector II is indicated;N=2, indicates sector VI;Nif =3, it indicates sector I;Nif =4, it represents sector IV;Nif =5, it indicates sector III;Nand =6, it represents the sector V.
7. The space vector modulation system of the interleaved parallel five-level converter according to claim 6, wherein the sectors II to VI are converted to the sectors I according to values of α component and β component of a given voltage, each sector is further divided into 16 regions, and the method of dividing the sector I is:
when in useV β * When the temperature is less than or equal to 0.25
Figure DEST_PATH_IMAGE017
When 0.25 <V β * Less than or equal to 0.5 hour
Figure 912116DEST_PATH_IMAGE008
When 0.5 <V β * When the temperature is less than or equal to 0.75
Figure 436638DEST_PATH_IMAGE010
When 0.75 <V β * When the value is less than or equal to 1, the value is a region 16;
wherein,
Figure 394230DEST_PATH_IMAGE012
,
Figure 537766DEST_PATH_IMAGE014
。
8. the interleaved parallel five-level converter space vector modulation system according to claim 5 wherein the redundancy switch vector adjustment module comprises:
the construction unit of the midpoint charge quantity function is used for establishing a relational expression between the action time of the redundant switch vector and the midpoint charge quantity by utilizing the output alternating current of the converter;
the charge deviation calculation unit is used for acquiring the upper midpoint voltage and the lower midpoint voltage of the direct current side of the converter and calculating the charge deviation of the midpoint potential;
and the computing unit of the action time of the redundant switch vector is used for computing the action time of the redundant switch vector corresponding to the condition that the charge quantity flowing through the middle point is equal to half of the charge deviation of the middle point potential.
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