CN115309032A - Clock signal correction method, terminal device and storage medium - Google Patents

Abstract

The embodiment of the invention discloses a clock signal correction method, terminal equipment and a storage medium, and relates to the technical field of clock correction, wherein the clock signal correction method is applied to the terminal equipment, the terminal equipment comprises a cellular network module and an RSMC chip, the RSMC chip comprises a first clock unit, and the cellular network module is connected with the RSMC chip; the cellular network module generates a plurality of continuous pulse-per-second signals and sends the pulse-per-second signals to the RSMC chip; the RSMC chip receives the pulse-per-second signal and counts the jumping times of the first clock unit in the process of receiving the pulse-per-second signal; and the RSMC chip corrects the jumping period of the first clock unit according to the number of the received pulse-per-second signals and the statistical result of the jumping times. According to the clock signal correction method and device, the clock signal locally generated by the RSMC chip can be corrected without additionally adding correction equipment or configuring a high-precision crystal oscillator module, and therefore production cost is reduced.

Description

Clock signal correction method, terminal device and storage medium

Technical Field

The embodiment of the invention relates to the technical field of clock correction, in particular to a clock signal correction method, terminal equipment and a storage medium.

Background

The Beidou system is a global satellite positioning navigation system and provides sea, land and air omnibearing global navigation positioning service. At present, the Beidou system provides two major types and seven services of navigation positioning and communication data transmission. Including the RSMC (Regional Short Message Communication) service provided for china and surrounding areas. In order to realize RSMC, an application terminal of the Beidou system needs to acquire, track, synchronize bits, synchronize frames, demodulate data, decode text messages and analyze communication through satellite signals. Acquisition of the satellite signal is the first step in signal processing. The step often determines the performance of key indexes such as the receiving sensitivity of the application terminal, the first acquisition time and the like.

In the process of acquiring the satellite signal, the signal generated by the local electronic product needs to be matched with the signal sent by the satellite. Currently, the application terminal generally generates a clock signal through an internal crystal oscillator module. The higher the precision of the crystal oscillator module, the more accurate the clock signal. Thus, the more accurate the acquisition of the satellite signal.

The existing electronic products need to generate a local clock signal by additionally adding a correction device or configuring a high-precision crystal oscillator module, which results in higher production cost.

Disclosure of Invention

The invention provides a clock signal correction method, terminal equipment and a storage medium, which can correct the clock signal locally generated by an RSMC chip without additionally adding correction equipment or configuring a high-precision crystal oscillator module, thereby reducing the production cost.

In a first aspect, an embodiment of the present invention provides a clock signal correction method, which is applied to a terminal device, where the terminal device includes a cellular network module and an RSMC chip, the RSMC chip includes a first clock unit, and the cellular network module is connected to the RSMC chip;

the cellular network module generates a plurality of continuous pulse-per-second signals and sends the pulse-per-second signals to the RSMC chip;

the RSMC chip receives the pulse-per-second signal and counts the jumping times of the first clock unit in the process of receiving the pulse-per-second signal;

the RSMC chip corrects the jitter period of the first clock unit according to the number of the received pulse per second signals and the statistics result of the jitter times.

In a second aspect, an embodiment of the present invention provides a terminal device, including a cellular network module and an RSMC chip, where the RSMC chip includes a first clock unit, and the cellular network module is connected to the RSMC chip;

the cellular network module is used for generating a plurality of continuous pulse per second signals and sending the pulse per second signals to the RSMC chip;

the RSMC chip is used for receiving the pulse per second signal and counting the jumping times of the first clock unit in the process of receiving the pulse per second signal;

and the RSMC chip is used for correcting the jumping period of the first clock unit according to the number of the received pulse-per-second signals and the statistical result of the jumping times.

In a third aspect, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, which, when executed by a processor, implements the clock signal correction method according to the first aspect.

The clock signal correction method, the terminal equipment and the storage medium are applied to the terminal equipment, the terminal equipment comprises a cellular network module and an RSMC chip, the RSMC chip comprises a first clock unit, and the cellular network module is connected with the RSMC chip; the cellular network module generates a plurality of continuous pulse-per-second signals and sends the pulse-per-second signals to the RSMC chip; the RSMC chip receives the pulse per second signal and counts the jumping times of the first clock unit in the process of receiving the pulse per second signal; and the RSMC chip corrects the jumping period of the first clock unit according to the number of the received pulse-per-second signals and the statistical result of the jumping times. In the application, after receiving the pulse-per-second signal generated by the cellular network module, the RSMC chip may correct the jitter cycle of the first clock unit according to the number of the received pulse-per-second signal and the statistical result of the jitter times of the first clock unit. Because the cellular network module is a module configured by the terminal equipment, the clock signal locally generated by the RSMC chip can be corrected without additionally adding a correction device or configuring a high-precision crystal oscillator module, so that the production cost is reduced.

Drawings

Fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present invention;

fig. 2 is a flowchart of a clock signal calibration method according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of another terminal device according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are for purposes of illustration and not limitation. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

It should be noted that, for the sake of brevity, this description does not exhaust all alternative embodiments, and it should be understood by those skilled in the art after reading this description that any combination of features may constitute an alternative embodiment as long as the features are not mutually inconsistent.

The following provides a detailed description of various embodiments of the invention.

Fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present invention, and as shown in fig. 1, the embodiment of the present invention provides a clock signal correction method, where the clock signal correction method is applied to a terminal device, the terminal device includes a cellular network module 100 and an RSMC chip 200, the RSMC chip 200 includes a first clock unit 210, and the cellular network module 100 is connected to the RSMC chip 200.

In order to realize the RSMC service, an application terminal of the Beidou system needs to acquire, track, synchronize a bit, synchronize a frame, demodulate data, decode a telegraph text and analyze communication through a satellite signal. In practical applications, the terminal device needs to acquire the satellite signal through the RSMC chip 200. Currently, the RSMC chip 200 includes a first clock unit 210. The first clock unit 210 is provided with a crystal oscillator. The first clock unit 210 in the RSMC chip 200 has its own timing standard, and the timing in the communication process is usually performed based on the respective crystal frequency. Different crystal oscillator types have different conventional crystal oscillator ranges, for example, the frequency range of a ceramic packaging passive crystal oscillator is mainly between 8MHz and 54MHz, and the frequency range of an active crystal oscillator metal packaging can be between 4MHz and 75MHz or between 1MHz and 150MHz according to the packaging size. Of course, the frequency of the crystal oscillator can also be customized as desired. For convenience of calculation, the present embodiment describes the crystal frequency by the number of times of crystal runout, and describes a specific implementation process of the present solution based on this example. For example, if the crystal frequency is 120Hz, it means that the number of times per second the crystal is pulsed in the first clock unit 210 is 120. Then the first clock unit 210 proves that 1 minute has elapsed when it jumps to 7200. Generally, the jitter of the crystal oscillator in the first clock unit 210 changes with the change of the environment, and it can be considered that the jitter of the crystal oscillator in the first clock unit 210 is generally relatively stable, taking 120Hz as an example, normally, the frequency of the crystal oscillator satisfies the standard frequency of 120Hz, but the frequency of the crystal oscillator deviates after long-term use, so the crystal oscillator needs to be corrected. In addition, the quality of the crystal oscillator also causes the frequency of the crystal oscillator to deviate, that is, the quality of the crystal oscillator is low and easily causes the deviation of 120Hz from the standard frequency, so that the deviation between the signal sent by the satellite and the signal received by the terminal device exists. The current RSMC chip 200 cannot independently correct the first clock unit 210, and under the condition that the timing of the crystal oscillator is not accurate, the problems that the acquisition time of the terminal device to the satellite signal is long and the loss is large in the communication process may occur in the satellite communication process.

In this embodiment, the first clock unit 210 in the RSMC chip 200 may be calibrated by the cellular network module 100. Cellular networks, also known as mobile networks, are a mobile communication hardware architecture that is divided into analog cellular networks and digital cellular networks. The signal coverage of each communication base station forming the network coverage is hexagonal, so that the whole network is named like a honeycomb. The cellular network mainly comprises three parts, which are respectively: a mobile station, a base station subsystem and a network subsystem. The mobile station refers to a general network terminal device, such as a mobile phone tablet computer. The base station subsystem comprises a mobile base station, wireless transceiving equipment, optical fiber and other digital equipment and the like. The mobile base station may be a cell tower. The base station subsystem acts as a switch between a wireless network and a wired network. The network subsystem includes a GSM (Global System for Mobile Communications) switching function and a database function required for user data and mobility management and security management. The network subsystem manages the communication between GSM mobile users and other communication network users. Currently, the common types of cellular networks include GSM (Global System for Mobile Communications), CDMA (Code Division Multiple Access), 3G, FDMA (Frequency Division Multiple Access), and TDMA (Time Division Multiple Access).

It will be appreciated that many terminal devices have a cellular network module 100 disposed therein. The cellular network module 100 is communicatively connected to the base station 300 to implement data signal transmission. The data transmitted by the cellular network module 100 and the base station 300 comprises time data to ensure clock synchronization between the cellular network module 100 and the base station 300, i.e. base station synchronized clocks. The base station synchronous clock is a high-performance time frequency reference receiver and can provide high-precision time and frequency synchronous signals for systems such as telecom, mobile communication base stations, PHS base stations, GSM network optimization and the like. That is, the timing between the cellular network module 100 and the base station 300 is almost identical. The cellular network module 100 generates the pulse-per-second signal in two ways, one is to generate the pulse-per-second signal by an internal hardware unit. The other is by connecting to the base station 300 and using the time data signal sent by the base station 300 as its corresponding clock signal. Normally, the time data transmitted by the base station 300 is relatively accurate, and therefore, the cellular network module 100 uses the time data signal transmitted by the base station 300 as the clock signal. In this embodiment, the RSMC chip 200 configured in the terminal device is connected to the cellular network module 100, so that the RSMC chip 200 can correct the first clock unit 210 through the cellular network module 100. The specific connection mode may be that the RSMC chip 200 is directly connected to the cellular network module 100, or that the RSMC chip 200 is connected to the cellular network module 100 through a controller (not shown in the figure). For the former connection mode, the RSMC chip 200 directly performs data transmission with the cellular network module 100; for the latter connection, the RSMC chip 200 and the cellular network module 100 perform data transmission through the controller.

Fig. 2 is a flowchart of a clock signal correction method according to an embodiment of the present invention. As shown in fig. 2, the clock signal correction method includes:

step S101: the cellular network module 100 generates several consecutive pulse-per-second signals and transmits the pulse-per-second signals to the RSMC chip 200.

The pulse signal is a discrete signal and can be used as a clock signal of various digital circuits and high-performance chips. A pulse refers to a sudden change in voltage or current that occurs over a short period of time. The pulse per second is the number of pulses generated per second, i.e., a pulse signal having a time interval of 1 second. For example, the number of crystal runout times in 1 second.

The cellular network module 100 may use the time data signal transmitted from the base station 300 as a corresponding pulse per second signal, or may generate a pulse per second signal by an internal hardware unit. Specifically, in the communication process between the base station 300 and the cellular network module 100, in order to ensure the time for transmitting and receiving signals is consistent, the transmission of time data signals is performed.

The cellular network module 100 may generate several consecutive pulse-per-second signals. For example, during the data signal transmission with the base station 300, several continuous pulse-per-second signals sent by the base station 300 are acquired. Or several successive pulse signals are generated by an internal hardware unit. Then, a plurality of continuous pulse-per-second signals are sent to the RSMC chip 200 for the RSMC chip 200 to perform calibration reference on the first clock unit 210.

Step S102: the RSMC chip 200 receives the pulse-per-second signal and counts the number of beats of the first clock unit 210 in the process of receiving the pulse-per-second signal.

The RSMC chip 200 includes a first clock unit 210. The first clock unit 210 typically has its own set of timing criteria. Specifically, the crystal in the first clock unit 210 will continuously bounce, with the number of beats per second being the second pulse it generates. In the calibration process, when the RSMC chip 200 receives several pulse-per-second signals sent by the cellular network module 100, it needs to count the number of jitter times of the first clock unit 210 in the process of receiving the pulse-per-second signals. For example, in the calibration, the cellular network module 100 generates 100 consecutive pulse-per-second signals and transmits the 100 consecutive pulse-per-second signals to the RSMC chip 200. At this time, the RSMC chip 200 counts the number of times that the first clock unit 210 beats as 10000 times in the process of receiving the 100-second pulse.

Step S103: the RSMC chip 200 corrects the jitter cycle of the first clock unit 210 according to the number of the received pulse-per-second signals and the statistical result of the number of jitters.

The timing speed of the RSMC chip 200 is related to how many times the first clock unit 210 beats for 1 second. If the first clock unit 210 beats a greater number of times per second, the first clock unit 210 proves to be faster than normal. If the first clock unit 210 has a low number of beats per second, the first clock unit 210 is proved to be slower than the normal standard time. Therefore, counting the number of beats of the first clock unit 210 is the most important calibration step. In this embodiment, the RSMC chip 200 may correct the jitter cycle of the first clock unit 210 according to the number of the received pulse-per-second signals and the statistical result of the jitter times. It will be appreciated that the jitter cycle may be expressed as the number of beats per second of the first clock unit 210, i.e. how many time intervals the first clock unit 210 beats once. For example, the first clock unit 210 in the RSMC chip 200 records the operating frequency of 90Hz before calibration, i.e. sets the number of beats within one second to 90 times, and counts the time interval of each beat to be 1/90 second during operation. During the calibration, the cellular network module 100 sends 100 continuous pulse-per-second signals to the RSMC chip 200, that is, it is determined that the duration of 100s has relatively high accuracy, and the RSMC chip 200 counts the number of times that the first clock unit 210 hops to 10000 times in the process of receiving the 100 pulse-per-second (that is, within 100 s), and then it can be determined that the first clock unit 210 has an interval of 10000 hops within 100s according to the 100 pulse-per-second and the number of times that the first clock unit hops to 10000 times. According to the received second pulse signal and the statistical result of the beating times, the average time interval of each beating of the first clock unit 210 is 1/100 second, based on which, the actual beating period of the first clock unit 210 is confirmed to be 1/100 second, namely the actual beating frequency is 100Hz, correspondingly, the originally recorded working frequency of 90Hz is modified to be 100Hz, and the correction is completed. In the corrected operation, the time interval of each jump is 1/100 second.

In a specific implementation process, the cellular network module 100 includes the analog timer unit 110, step S101 is implemented by step S1011 to step S1012, and step S1011 to step S1012 include:

step S1011: a clock reference signal transmitted by the base station 300 is received.

Step S1012: several successive pulse-per-second signals are generated by the analog timing unit 110 according to the clock reference signal.

The cellular network module 100 may be provided with an analog timing unit 110, and the analog timing unit 110 generates a plurality of continuous pulse-per-second signals, and because the analog timing unit 110 does not time accurately, it needs to use other signals as a reference, so as to generate a plurality of precise continuous pulse-per-second signals according to the reference signal. The cellular network module 100 in this embodiment may generate several continuous pulse-per-second signals through the analog timing unit 110 according to the clock reference signal sent by the base station 300.

In a specific implementation process, step S1012 may be implemented as:

at least three consecutive pulse-per-second signals are generated by the analog timing unit 110 in dependence on the clock reference signal.

Correspondingly, step S103 may be implemented as:

the RSMC chip 200 receives at least three consecutive pulse-per-second signals and counts the number of beats of the first clock unit 210 during the process of receiving the at least three consecutive pulse-per-second signals.

Since the pulse-per-second signal generated by the analog timing unit 110 may have an error, if the RSMC chip 200 directly generates a pulse-per-second signal according to the analog timing unit 110, the first clock unit 210 is calibrated, that is, the number of times of the first clock unit jitter is counted within 1 second of the timing of the analog timing unit, and the calibration may have an error because the counting is not performed based on a plurality of pulse-per-second signals. Therefore, the analog timing unit 110 in the present embodiment needs to generate at least three consecutive pulse-per-second signals. In the process of receiving the pulse-per-second signal generated by the analog clocking unit 110, the RSMC chip 200 needs to count the number of times of jitter of the first clock unit 210. For example, the analog timing unit 110 generates four continuous pulse-per-second signals (i.e. 4 seconds), the RSMC chip 200 counts the number of beats of the first clock unit 210 to 400 times in the process of receiving the four continuous pulse-per-second signals, so that the average time interval of each beat of the first clock unit 210 is 1/100 second, that is, the frequency of the actual beat is 100Hz, which is obtained according to the four continuous pulse-per-second signals and the statistical result of the number of beats of 400 times, and thus the 100Hz is used as the beat period of the first clock unit 210 to correct the beat period of the first clock unit 210, so that the first clock unit performs timing at the time interval of each beat of 1/100 seconds.

In a specific implementation process, the cellular network module 100 includes the second clock unit 120, and step S101 may be implemented as:

the cellular network module 100 generates two consecutive pulse-per-second signals by the second clock unit 120.

Correspondingly, step S103 may be implemented as:

the RSMC chip 200 receives two consecutive pulse-per-second signals, and counts the number of beats of the first clock unit 210 during the process of receiving the two consecutive pulse-per-second signals.

As shown in fig. 3, the cellular network module 100 may be provided with a second clock unit 120, and the second clock unit 120 is provided with a crystal oscillator, which has the same timing standard as the first clock unit 210, i.e. how many times the crystal oscillator jumps by 1 second, i.e. the crystal oscillator frequency. If the second clock unit 120 beats N times for 1 second, then the second clock unit can count 5 seconds when the second clock unit beats 5N times. The cellular network module 100 may implement the timing by the second clock unit 120. Since the cellular network module 100 and the base station 300 can achieve clock synchronization, the pulse-per-second signal generated by the second clock unit 120 is consistent with the clock signal sent by the base station 300. For the second clock unit 120, the clock of the base station 300 can be kept synchronous, so the pulse per second signal generated by the second clock unit 120 is relatively accurate. Based on this, the RSMC chip 200 in this embodiment may use the pulse-per-second signal generated by the second clock unit 120 as a reference for correcting the first clock unit 210. Specifically, the cellular network module 100 generates two continuous pulse-per-second signals through the second clock unit 120, and the RSMC chip 200 counts the number of hops of the first clock unit 210 during the process of receiving the two continuous pulse-per-second signals. For example, the RSMC chip 200 counts that the first clock unit 210 has jumped 100 times in the two consecutive pulse-per-second signals.

In a specific implementation process, step S103 may be implemented as:

the RSMC chip 200 calculates the average interval duration between two adjacent hops according to the number of the received pulse-per-second signals and the statistical result of the number of the hops, and obtains a jitter cycle after correction.

It can be understood that, in this embodiment, after receiving the pulse per second signal and counting the number of times of the first clock unit bouncing, the average interval duration between two adjacent bouncing, that is, how long the first clock unit 210 bounces once, can be calculated based on a mathematical application formula. For example, when the RSMC chip 200 receives 10-second pulse signals and counts that the first clock unit 210 beats 1100 times in the process of receiving the 10-second pulse signals, a result of 10/1100 can be calculated to be 1/110 based on a mathematical application formula, that is, the time for which the first clock unit 210 beats once is 1/110 second, so that the first clock unit 210 can be clocked at a time interval of 1/110 second per beat.

In the specific implementation process, the method further comprises the following steps:

step S100: the RSMC chip 200 acquires the satellite signal based on the corrected beat period.

It is understood that after the calibration of the first clock unit 210 in the RSMC chip 200, the timing of the first clock unit 210 is updated again. When the RSMC chip 200 needs to acquire the satellite signal, the satellite signal is acquired based on the corrected jitter cycle, so as to reduce the deviation between the satellite transmission signal and the terminal device reception signal. Specifically, if the first clock unit 210 is originally clocked with the time per hop being 1/90 second, and the time per hop is 1/110 second after being corrected by the cellular network module 100, the first clock unit 210 is clocked with the time per hop being 1/110 second. Based on this, the RSMC chip 200 acquires the satellite signal according to the time of each beat of the first clock unit 210 being 1/110 second.

In the specific implementation process, the method further comprises the following steps:

step S104: and comparing the corrected jumping cycles corresponding to the latest preset correction times, and confirming the next correction time according to the comparison result.

The first clock unit 210 in the RSMC chip 200 keeps the timing stable in a short time after calibration, and does not change much. However, since the terminal devices are widely used, the ambient environment changes greatly and is uncertain, so that the timing of the first clock unit 210 is likely to change due to the change in the ambient environment. Such as impact or moisture in the surrounding environment, etc., may affect the jitter behavior of the crystal oscillator within the first clock unit 210. Therefore, the first clock unit 210 needs to be calibrated periodically in this embodiment. The correction time can be a preset fixed time, namely, the correction is carried out periodically; or may be a time for confirming the next correction according to the corrected jitter cycle corresponding to the latest preset correction times of the first clock unit 210. That is, instead of performing a periodic correction, a dynamic correction is performed based on the data historically corrected by the first clock unit 210. This can avoid the increase of unnecessary calibration times due to too frequent calibration, and can also avoid the deviation of the RSMC chip 200 during the transmission and reception of signals with the satellite due to too long calibration time interval.

In a specific implementation process, step S104 may be implemented by step S1041 to step S1043, where step S1041 to step S1043 include:

step S1041: and comparing the corrected jumping cycles corresponding to the latest preset correction times, and confirming whether the corrected jumping cycles are consistent each time.

Step S1042: and when the jitter cycle after each correction is consistent, prolonging the interval duration between the next correction and the current correction.

Step S1041: and when the jitter cycles after each correction are inconsistent, shortening the interval duration between the next correction and the current correction.

In this embodiment, when the jitter cycles of the first clock unit 210 after each calibration are the same, it indicates that the jitter state of the crystal oscillator in the first clock unit 210 is relatively stable. Therefore, the interval duration between the next correction and the current correction can be appropriately extended. When the jitter cycles of the first clock unit 210 after each correction are inconsistent, it indicates that the jitter state of the crystal oscillator in the first clock unit 210 is unstable, and the jitter times of each jitter are different, resulting in inconsistent jitter cycles after correction. At this time, the interval duration between the next correction and the current correction can be appropriately shortened, thereby increasing the number of corrections to the first clock unit 210.

Fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present invention, and referring to fig. 1, the terminal device includes a cellular network module 100 and an RSMC chip 200, the RSMC chip 200 includes a first clock unit 210, and the cellular network module 100 is connected to the RSMC chip 200.

The cellular network module 100 is configured to generate a plurality of continuous pulse-per-second signals, and send the pulse-per-second signals to the RSMC chip 200; the RSMC chip 200 is configured to receive the pulse per second signal, and count the number of times of jitter of the first clock unit 210 in the process of receiving the pulse per second signal; the RSMC chip 200 is configured to correct a jitter cycle of the first clock unit 210 according to the number of received pulse-per-second signals and the statistical result of the jitter times.

On the basis of the above described embodiment, the cellular network module 100 comprises an analog timing unit 110, a receiving unit and a generating unit.

A receiving unit, configured to receive a clock reference signal sent by the base station 300.

The generating unit is used for generating a plurality of continuous pulse signals per second through the analog timing unit 110 according to the clock reference signal.

On the basis of the foregoing embodiment, the generating unit is specifically configured to:

at least three consecutive pulse-per-second signals are generated by the analog timing unit 110 in dependence on the clock reference signal.

Correspondingly, the RSMC chip 200 is specifically configured to:

at least three continuous pulse-per-second signals are received, and the number of beats of the first clock unit 210 in the process of receiving the at least three continuous pulse-per-second signals is counted.

On the basis of the above embodiment, the cellular network module 100 comprises the second clock unit 120.

And a second clock unit 120 for generating two consecutive pulse-per-second signals.

Correspondingly, the RSMC chip 200 is specifically configured to:

two continuous pulse-per-second signals are received, and the number of times of jitter of the first clock unit 210 in the process of receiving the two continuous pulse-per-second signals is counted.

On the basis of the above embodiment, the RSMC chip 200 is specifically configured to:

and calculating the average interval duration between two adjacent jumps according to the number of the received pulse signals per second and the statistical result of the number of the jumps to obtain the corrected jump period.

On the basis of the above embodiment, the RSMC chip 200 is further configured to acquire the satellite signal based on the corrected beat period.

On the basis of the above embodiment, the method further comprises the following steps:

and the confirming unit is used for comparing the corrected jumping cycles corresponding to the latest preset correction times and confirming the next correction time according to the comparison result.

On the basis of the above embodiment, the confirmation unit includes:

and the comparison unit is used for comparing the corrected jumping cycles corresponding to the latest preset correction times and confirming whether the corrected jumping cycles are consistent each time.

And the time prolonging unit is used for prolonging the interval duration between the next correction and the current correction when the jitter cycle after each correction is consistent.

And the time shortening unit is used for shortening the interval duration between the next correction and the current correction when the jitter cycles after each correction are inconsistent.

The terminal device provided by the embodiment of the invention can be used for executing the corresponding clock signal correction method provided by the embodiment, and has corresponding functions and beneficial effects.

It should be noted that, in the embodiment of the terminal device, each included unit and module are only divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be implemented; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.

Embodiments of the present invention further provide a computer-readable storage medium, on which a computer program is stored, where the computer program is used to execute relevant operations in the clock signal correction method provided in any embodiment of the present application when the computer program is executed by a processor, and has corresponding functions and advantages.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product.

Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory. The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

It is to be noted that the foregoing description is only exemplary of the invention and that the principles of the technology may be employed. Those skilled in the art will appreciate that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements and substitutions will now be apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. The clock signal correction method is applied to terminal equipment, wherein the terminal equipment comprises a cellular network module and an RSMC chip, the RSMC chip comprises a first clock unit, and the cellular network module is connected with the RSMC chip;

the cellular network module generates a plurality of continuous pulse-per-second signals and sends the pulse-per-second signals to the RSMC chip;

the RSMC chip receives the pulse per second signal and counts the jumping times of the first clock unit in the process of receiving the pulse per second signal;

and the RSMC chip corrects the jumping period of the first clock unit according to the number of the received pulse per second signals and the counting result of the jumping times.

2. The clock signal correction method of claim 1, wherein the cellular network module comprises an analog timing unit;

the cellular network module generates a number of consecutive pulse-per-second signals, including:

receiving a clock reference signal sent by a base station;

and generating a plurality of continuous pulse-per-second signals through the analog timing unit according to the clock reference signal.

3. The clock signal correction method of claim 2, wherein the generating of a number of consecutive pulse-per-second signals by the analog timing unit according to the clock reference signal comprises:

generating at least three continuous pulse-per-second signals through the analog timing unit according to the clock reference signal;

correspondingly, the RSMC chip receives the pulse per second signal and counts the number of times of the jitter of the first clock unit in the process of receiving the pulse per second signal, including:

the RSMC chip receives the at least three continuous pulse-per-second signals and counts the jumping times of the first clock unit in the process of receiving the at least three continuous pulse-per-second signals.

4. The clock signal correction method of claim 1, wherein the cellular network module comprises a second clock unit;

the cellular network module generates a number of consecutive pulse-per-second signals, including:

the cellular network module generates two continuous pulse-per-second signals through the second clock unit;

correspondingly, the RSMC chip receives the pulse per second signal and counts the number of times of the jitter of the first clock unit in the process of receiving the pulse per second signal, including:

and the RSMC chip receives the two continuous pulse-per-second signals and counts the jumping times of the first clock unit in the process of receiving the two continuous pulse-per-second signals.

5. The clock signal correction method of claim 1, wherein the RSMC chip corrects the jitter cycle of the first clock unit according to the number of the received pulse-per-second signals and the statistical result of the jitter times, and comprises:

and the RSMC chip calculates the average interval duration between two adjacent jumps according to the number of the received pulse per second signals and the counting result of the number of the jumps to obtain the corrected jump period.

6. The clock signal correction method according to claim 1, further comprising:

and the RSMC chip captures the satellite signals based on the corrected jitter cycle.

7. The clock signal correction method according to any one of claims 1 to 5, wherein the RSMC chip, after correcting the jitter cycle of the first clock unit according to the number of the received pulse-per-second signals and the statistical result of the jitter times, further comprises:

and comparing the corrected jumping cycles corresponding to the latest preset correction times, and confirming the next correction time according to the comparison result.

8. The method according to claim 7, wherein the comparing the corrected jitter cycles corresponding to the latest preset number of corrections and determining the next correction time according to the comparison result comprises:

comparing the corrected jumping cycles corresponding to the latest preset correction times, and confirming whether the corrected jumping cycles are consistent each time;

when the jitter cycle after each correction is consistent, the interval duration between the next correction and the current correction is prolonged;

and when the jitter cycle after each correction is inconsistent, shortening the interval duration between the next correction and the current correction.

9. A terminal device, comprising a cellular network module and an RSMC chip, wherein the RSMC chip comprises a first clock unit, and wherein the cellular network module is connected to the RSMC chip;

the cellular network module is used for generating a plurality of continuous pulse-per-second signals and sending the pulse-per-second signals to the RSMC chip;

the RSMC chip is used for receiving the pulse per second signal and counting the jumping times of the first clock unit in the process of receiving the pulse per second signal;

and the RSMC chip is used for correcting the jumping period of the first clock unit according to the number of the received pulse-per-second signals and the counting result of the jumping times.

10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the clock signal correction method according to any one of claims 1 to 8.

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