CN115296668B - Analog-to-digital conversion circuit and analog-to-digital conversion method - Google Patents
Analog-to-digital conversion circuit and analog-to-digital conversion method Download PDFInfo
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- CN115296668B CN115296668B CN202211186159.8A CN202211186159A CN115296668B CN 115296668 B CN115296668 B CN 115296668B CN 202211186159 A CN202211186159 A CN 202211186159A CN 115296668 B CN115296668 B CN 115296668B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
Abstract
The embodiment of the application relates to the technical field of electronics, and discloses an analog-to-digital conversion circuit and an analog-to-digital conversion method. The analog-to-digital conversion circuit includes: the sampling module is used for sampling an input signal and transmitting a sampling output signal to the quantization module through a first signal transmission channel; the control module is used for controlling the disconnection of the first signal transmission channel in a first time period which takes the end point of the previous time as a starting point and takes the first time point before the end point of the next time as an end point for the end point of each two adjacent sampling times; controlling the first signal transmission path to be conducted in a non-first period; the quantization module is used for receiving and holding the sampling output signal in a non-first period; for the first period, the sampled output signal is quantized within a second period starting at a second point in time after the front boundary point in time and ending at the rear boundary point in time. According to the method and the device, the sampling module and the quantization module work simultaneously, and the problem of low processing efficiency of an analog-to-digital conversion circuit is effectively solved.
Description
Technical Field
The embodiment of the application relates to the technical field of electronics, in particular to an analog-to-digital conversion circuit and an analog-to-digital conversion method.
Background
The analog-digital converter mainly comprises a sampling circuit and a quantization circuit, the working process of the analog-digital converter at present is that the sampling is carried out firstly and then the quantization is carried out, namely when the sampling circuit samples an input signal, the quantization circuit does not work, when the quantization circuit quantizes the signal, the sampling circuit does not work, so that the processing time of the analog-digital converter at present to the signal is greatly increased, and the processing efficiency of the analog-digital converter is reduced.
Disclosure of Invention
An object of the embodiments of the present application is to provide an analog-to-digital conversion circuit and an analog-to-digital conversion method, so that when a sampling module works, a quantization module also works at the same time, and when the whole analog-to-digital conversion circuit works, no circuit is in an idle state, thereby improving the overall working efficiency of the analog-to-digital conversion circuit.
To solve the above technical problem, an embodiment of the present application provides an analog-to-digital conversion circuit, including: the device comprises a sampling module, a quantization module and a control module; the sampling module is used for sampling an input signal and transmitting a sampled output signal obtained by sampling to the quantization module through a first signal transmission channel; the control module is respectively connected with the sampling module and the quantization module and is used for controlling the first signal transmission path to be disconnected in a first time period which takes the end point of the previous time as a starting point and takes the first time point before the end point of the next time as an end point for the end point of every two adjacent sampling times of the sampling module; controlling the first signal transmission channel to be conducted in a non-first period; the quantization module to receive and hold the sampled output signal during the non-first time period; for the first period, quantizing the held sampling output signal and outputting a quantized output signal within a second period taking a second time point after the front boundary time point as a starting point and taking the rear boundary time point as an end point; wherein a sum of the second period and a sampling time is greater than the first period.
The embodiment of the present application further provides an analog-to-digital conversion method, which is applied to the analog-to-digital conversion circuit, and the method includes: sampling an input signal through a sampling module, and transmitting a sampled output signal obtained by sampling to a quantization module through a first signal transmission channel; for the end point of every two adjacent sampling times, controlling the first signal transmission channel to be disconnected in a first time period taking the end point of the previous time as a starting point and taking the first time point before the end point of the next time as an end point; controlling the first signal transmission path to be conducted in a non-first period; receiving and holding the sampled output signal by the quantization module during a period other than the first period; for the first period, quantizing the held sampling output signal by the quantizing module within a second period taking a second time point after the front boundary time point as a starting point and taking the rear boundary time point as an end point, and outputting a quantized output signal; wherein a sum of the second period and a sampling time is greater than the first period.
In the analog-to-digital conversion circuit provided by the embodiment of the application, the control module is arranged between the sampling module and the quantization module, the control module controls the first signal transmission path between the sampling module and the quantization module to be disconnected in a first period, controls the first signal transmission path to be connected in a non-first period, the quantization module receives and holds the sampling output signal in the non-first period, quantizes the held sampling output signal in a second period, and outputs the quantization output signal, wherein the first period takes a previous time end point in end points of every two adjacent sampling times as a starting point, a first time point before a next time end point as an end point, namely the first period is smaller than a sampling interval (time from last sampling end to next sampling end), and the second period takes a second time point after the previous boundary time point of the first period as a starting point and the next boundary time point as an end point, namely the second period is smaller than the first period. That is to say, this application make full use of the idle time between the two sampling time of analog to digital conversion circuit for sampling module during operation, quantization module also works simultaneously, and whole analog to digital conversion circuit during operation does not have the circuit to be in idle state, has improved analog to digital conversion circuit's whole work efficiency.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a first schematic structural diagram of an analog-to-digital conversion circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of an analog-to-digital conversion circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of signals including a sampling control signal, a first control signal, and a quantization control signal according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an analog-to-digital conversion circuit provided in the embodiment of the present application;
fig. 5 is a signal diagram including a sampling control signal, a first control signal, a quantization control signal, and a second control signal according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an analog-to-digital conversion circuit provided in the embodiment of the present application;
fig. 7 is a flowchart of an analog-to-digital conversion method according to an embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that in the examples of the present application, numerous technical details are set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
The embodiment of the present application relates to an analog-to-digital conversion circuit, as shown in fig. 1, specifically including: a sampling module 101, a quantization module 102 and a control module 103.
The sampling module 101 is configured to sample an input signal, and transmit a sampled output signal obtained by sampling to the quantization module 102 through a first signal transmission path.
The control module 103 is respectively connected to the sampling module 101 and the quantization module 102, and is configured to control the first signal transmission path to be disconnected in a first time period that starts from an end point of a previous time and ends at a first time point before an end point of a next time for an end point of every two adjacent sampling times of the sampling module 101; and controlling the first signal transmission path to be conducted in a non-first period.
A quantization module 102 for receiving and holding the sampled output signal during a non-first period; for the first time interval, taking a second time point after the front boundary time point as a starting point, and quantizing the held sampling output signal in a second time interval taking the rear boundary time point as an end point, and outputting a quantized output signal; wherein the sum of the second period and the sampling time is greater than the first period.
In this embodiment, once the sampling time Ts and the sampling interval Ts of the sampling module 101 are set, they are fixed subsequently. The sampling interval Ts is a time from the end (or start) of the last sampling to the end (or start) of the next sampling, the first period th starts from the end of the previous time among the end points of every two adjacent sampling times, and ends at the first time point before the end of the next sampling time, that is, the first period th is smaller than the sampling interval Ts, the second period tq starts from the second time point of the first period th after the previous boundary time point, and ends at the next boundary time point, that is, the second period tq is smaller than the first period th. It should be noted that, for the first time point and the second time point in the same sampling interval Ts, the first time point is located after the second time point. The non-first period tc is a period of time with a first time point as a starting point and an end point of the sampling time as an end point in a sampling interval Ts, i.e., the sum of the first period th and the non-first period tc is a sampling interval Ts.
That is to say, in the period from the second time point after the last sampling is finished to the first time point before the next sampling is finished, the quantization module 102 quantizes the last sampled output signal under the condition that the first signal transmission path is disconnected, and the sampling module 101 performs the next sampling according to the sampling time ts in the period, so that the quantization module 102 fully utilizes the idle time between two sampling times, when the sampling module 101 works, the quantization module 102 also works at the same time, and when the whole analog-to-digital conversion circuit works, no circuit is in an idle state, thereby improving the overall working efficiency of the analog-to-digital conversion circuit.
In one embodiment, as shown in FIG. 2, the control module 103 includes: a signal generating module 1031 and a first isolation device 1032 disposed on the first signal transmission path, wherein the signal generating module 1031 is connected to the sampling module 101, the quantization module 102 and the first isolation device 1032 respectively; a signal generating module 1031, configured to send a sampling control signal to the sampling module 101 to control the sampling module 101 to sample the input signal; sending a quantization control signal to the quantization module 102 to control the quantization module 102 to quantize the held sampled output signal; a first control signal is sent to the first isolation device 1032 to control the on or off of the first signal transmission path.
It should be noted that, in this embodiment, the sampling module 101, the quantization module 102, and the first isolation device 1032 are respectively controlled by sending corresponding control signals through one signal generating module 1031. Of course, the control of the sampling module 101, the quantization module 102 and the first isolation device 1032 can also be controlled by a plurality of different control devices, such as: the first signal generation module sends a sampling control signal to control the sampling module 101, the second signal generation module sends a quantization control signal to control the quantization module 102, and the third signal generation module sends a first control signal to control the first isolation device 1032.
In an embodiment, the signal generation module 1031 sending the first control signal to the first isolation device 1032 includes: transmitting a first level signal in a first period th and a second level signal in a non-first period tc; the first level signal is at a high level, the second level signal is at a low level, or the first level signal is at a low level, and the second level signal is at a high level.
In each group of the first period th and the non-first period tc adjacent in the front-back order: the first isolation device 1032 responds to the first level signal in the first time period th, and controls the first signal transmission path to be disconnected; in a first time interval, the sampling module 101 samples an input signal at the time to obtain a sampled output signal at the time, and the quantization module 102 quantizes a sampled output signal at the last time received and held in a last non-first time interval to obtain a quantized output signal at the last time; the first isolation device 1032 responds to the second level signal in a non-first period tc, and controls the first signal transmission path to be conducted; during the non-first period tc, the sampling module 101 transmits the current-sampled output signal to the quantization module 102 through the first signal transmission path, and the quantization module 102 holds the current-sampled output signal to quantize the current-sampled output signal in the next first period.
As shown in fig. 3, for an embodiment of a signal diagram containing a sampling control signal, a first control signal and a quantization control signal, it can be seen that before the last sampling is finished, i.e. from the first time point, the first isolation device 1032 controls the first signal transmission path to be turned on until the sampling is finished (i.e. the non-first time period tc), and the quantization module 102 receives and holds the last sampled output signal in the non-first time period tc. At the end of the last sampling, the first isolation device 1032 controls the first signal transmission path to be disconnected until a first time point (i.e., a first time period th) before the end of the next sampling, and the quantization module 102 quantizes the output signal of the last sampling in a second time period tq after the end of the last sampling, i.e., from a second time point. Thus, the sampling module 101 and the quantization module 102 operate independently of each other through the first isolation device 1032, and the sampling time ts and the quantization time tq (i.e., the second period) overlap each other without affecting each other, thereby reducing idle time of each module of the analog-to-digital conversion circuit.
In addition, the holding function of the quantization module 102 in this embodiment is generally implemented by a capacitor, and the size of the capacitor determines the duration of the non-first period tc.
In one embodiment, as shown in fig. 4, the quantization module comprises: a first quantizing circuit 1021, a second quantizing circuit 1022, and a second isolating device 1023 disposed on a second signal transmission path between the first quantizing circuit and the second quantizing circuit.
The second isolating device 1023 is configured to control the second signal transmission path to be disconnected for a second time period tq, starting at a third time point after the previous time boundary point and ending at a third time period th2 after the subsequent time boundary point; and controlling the second signal transmission path to be conducted in the non-third period. In a non-third period within the second period tq, the first quantization circuit 1021 and the second quantization circuit 1022 are respectively configured to initially quantize the high bit and the low bit of the held sample output signal. In the third period th2, the first quantization circuit 1021 stops the quantization operation, and the second quantization circuit 1022 quantizes the low bit of the sampled output signal again.
Specifically, the first period is greater than the second period, the second period is greater than the third period, the end points of the first period, the second period and the third period are all the same, the first time point before the end of the sub-sampling is taken as the end point, the start point of the first period is the same as the time point of the end of the sampling, and the start point of the second period is the second time point after the end of the last sampling. The start point of the third period is a point after the second time point.
Before the last sampling is finished, i.e. from the first time point, the first isolation device 1032 controls the first signal transmission path to be conducted, the second isolation device 1023 controls the second signal transmission path to be conducted, and the first quantization circuit 1021 and the second quantization circuit 1022 receive and hold the sampled output signal of the last sampling until the last sampling is finished (i.e. not the first time period tc). At the end of the last sampling, the first isolation device 1032 controls the first signal transmission path to be turned off (at which time the second signal transmission path still maintains the on state) until a first point in time after the end of the next sampling. The first quantization circuit 1021 and the second quantization circuit 1022 are respectively configured to perform initial quantization on the high bit and the low bit of the sampled output signal at the previous time, starting at a second time point after the previous sampling is completed. At the third time point, the second isolation device 1023 controls the second signal transmission path to be disconnected, until the first time point before the end of the next sampling (i.e. in the third period), the first quantization circuit 1021 stops the quantization operation, and the second quantization circuit 1022 repeatedly quantizes the lower bits of the sampled output signal of the last time.
In this embodiment, because the sampling time Ts and the sampling interval Ts are fixed, when a high-speed quantization circuit is used, the time for quantizing the sampled output signal is shortened, and thus the first quantization circuit 1021 and the second quantization circuit 1022 are in an idle state before the sampling is finished.
It should be noted that the second isolation device 1023 may be controlled by the signal generation module 1031 sending the second control signal, or may be controlled by another control device different from the signal generation module 1031 sending the second control signal. Fig. 5 is a schematic diagram of signals including a sampling control signal, a first control signal, a quantization control signal, and a second control signal according to an embodiment.
In addition, the first isolation device and the second isolation device mentioned in the present application may be switching devices, or may be power semiconductor devices having switching characteristics.
In one embodiment, as shown in fig. 6, the quantization module 102 includes: a third quantization circuit 1024 and a noise shaping circuit 1025; a third quantizing circuit 1024, configured to quantize the held sampled output signal to obtain a quantized output initial signal; and the noise shaping circuit 1025 is used for carrying out noise shaping on the quantized output initial signal to obtain a quantized output signal.
In this embodiment, because sampling time Ts and sampling interval Ts are fixed, and when a high-speed quantization circuit is adopted, the time for quantizing the sampling output signal can be shortened, and thus the third quantization circuit 1024 is in an idle state before the sampling is finished.
In the analog-to-digital conversion circuit provided by the embodiment of the application, the control module is arranged between the sampling module and the quantization module, the control module controls the first signal transmission path between the sampling module and the quantization module to be disconnected in a first period, controls the first signal transmission path to be connected in a non-first period, the quantization module receives and holds the sampling output signal in the non-first period, quantizes the held sampling output signal in a second period, and outputs the quantization output signal, wherein the first period takes a previous time end point in end points of every two adjacent sampling times as a starting point, a first time point before a next time end point as an end point, namely the first period is smaller than a sampling interval (time from last sampling end to next sampling end), and the second period takes a second time point after the previous boundary time point of the first period as a starting point and the next boundary time point as an end point, namely the second period is smaller than the first period. That is to say, this application make full use of the idle time between the two sampling time of analog to digital conversion circuit for sampling module during operation, quantization module also works simultaneously, and whole analog to digital conversion circuit during operation does not have the circuit to be in idle state, has improved analog to digital conversion circuit's whole work efficiency.
Another embodiment of the present application relates to an analog-to-digital conversion method applied to the analog-to-digital conversion circuit described in the above embodiment, as shown in fig. 7, the analog-to-digital conversion method includes:
And 204, for the first time period, taking a second time point after the front boundary time point as a starting point, and quantizing the held sampling output signal by the quantizing module in a second time period taking the rear boundary time point as an end point, and outputting a quantized output signal, wherein the sum of the second time period and the sampling time is greater than the first time period.
In this embodiment, once the sampling time Ts and the sampling interval Ts are set, the subsequent steps are fixed. The sampling interval Ts is a time from the end (or start) of the last sampling to the end (or start) of the next sampling, the first period th starts from the end of the previous time among the end points of every two adjacent sampling times, and ends at the first time point before the end of the next sampling time, that is, the first period th is smaller than the sampling interval Ts, the second period tq starts from the second time point of the first period th after the previous boundary time point, and ends at the next boundary time point, that is, the second period tq is smaller than the first period th. It should be noted that, for the first time point and the second time point in the same sampling interval Ts, the first time point is located after the second time point.
That is to say, in the period from the second time point after the last sampling is finished to the first time point before the next sampling is finished, the quantization module quantizes the output signal of the last sampling under the condition that the first signal transmission path is disconnected, and the sampling module performs the next sampling according to the sampling time ts in the period, so that the idle time between two sampling times is fully utilized, and when the sampling module works, the quantization module also works simultaneously, and the overall efficiency of analog-digital conversion is improved.
In one embodiment, the input signal is sampled according to a sampling control signal; controlling the first signal transmission channel to be switched on or switched off according to the first control signal; and quantizing the sampled output signal according to the quantization control signal.
In one embodiment, the first control signal includes: a first level signal in a first period and a second level signal in a non-first period; the first level signal is at a high level and the second level signal is at a low level, or the first level signal is at a low level and the second level signal is at a high level.
The analog-to-digital conversion method further includes: in each group of first time interval and non-first time interval which are adjacent in the front-back order: in a first period, controlling a first signal transmission path to be disconnected according to the first level signal; the input signal is sampled by the sampling module when the current sampling output signal is obtained, and the last sampling output signal received and held in the last non-first period is quantized by the quantization module to obtain a last quantization output signal; in a non-first period, controlling the first signal transmission channel to be conducted according to the second level signal; the current-sampling output signal is transmitted to the quantization module through a first signal transmission path by the sampling module, and is held by the quantization module to be quantized in a next first period.
In one embodiment, the quantization module comprises: a first quantization circuit and a second quantization circuit; analog-to-digital conversion method the method further comprises: for the second time period, a third time point after the front time boundary point is taken as a starting point, and a second signal transmission path between the first quantization circuit and the second quantization circuit is controlled to be disconnected in a third time period with the rear time boundary point as an end point; controlling the second signal transmission channel to be conducted in a non-third time period; in a non-third time interval in the second time interval, carrying out initial quantization on high bits and low bits of the held sampling output signal through the first quantization circuit and the second quantization circuit respectively; in a third period, the high bit quantization operation is stopped, and the low bit of the sampled output signal is quantized again by a second quantization circuit.
In one embodiment, the quantization module comprises: a third quantization circuit and a noise shaping circuit; the analog-to-digital conversion method further includes: quantizing the held sampling output signal through a third quantizing circuit to obtain a quantized output initial signal; and carrying out noise shaping on the quantized output initial signal through a noise shaping circuit to obtain the quantized output signal.
It should be noted that, the details of the implementation of each step in this embodiment are similar to the details of the operation of the analog-to-digital conversion circuit provided in the above embodiments, and the technical details not described in detail in this embodiment can be referred to in the foregoing embodiments.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, which are within the scope of the present application as long as they include the same logical relationship; it is within the scope of the present application to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the present application, and that various changes in form and details may be made therein without departing from the spirit and scope of the present application in practice.
Claims (10)
1. An analog-to-digital conversion circuit, comprising: the device comprises a sampling module, a quantization module and a control module;
the sampling module is used for sampling an input signal and transmitting a sampled output signal obtained by sampling to the quantization module through a first signal transmission path;
the control module is respectively connected with the sampling module and the quantization module and is used for controlling the first signal transmission path to be disconnected in a first time interval which takes the end point of the previous time as a starting point and takes the first time point before the end point of the next time as an end point at the end point of every two adjacent sampling times of the sampling module; controlling the first signal transmission channel to be conducted in a non-first period;
the quantization module to receive and hold the sampled output signal during the non-first time period; for the first period, quantizing the held sampling output signal and outputting a quantized output signal within a second period taking a second time point after the front boundary time point as a starting point and taking the rear boundary time point as an end point; wherein a sum of the second period and a sampling time is greater than the first period.
2. The analog-to-digital conversion circuit of claim 1, wherein the control module comprises: the signal generation module is connected with the sampling module, the quantization module and the first isolation device respectively;
the signal generating module is used for sending a sampling control signal to the sampling module so as to control the sampling module to sample the input signal; sending a quantization control signal to the quantization module to control the quantization module to quantize the held sampled output signal; and sending a first control signal to the first isolation device to control the connection or disconnection of the first signal transmission path.
3. The analog-to-digital conversion circuit of claim 2, wherein the signal generation module sending a first control signal to the first isolation device comprises: transmitting a first level signal in the first period and transmitting a second level signal in a non-first period; the first level signal is at a high level, the second level signal is at a low level, or the first level signal is at a low level, and the second level signal is at a high level;
in each group of first time interval and non-first time interval which are adjacent in the front-back order:
the first isolation device responds to the first level signal in the first period of time and controls the first signal transmission path to be disconnected; in the first time interval, the sampling module samples the input signal for the second time to obtain a current sampling output signal, and the quantization module quantizes a last sampling output signal received and held in a last non-first time interval to obtain a last quantized output signal;
the first isolation device responds to the second level signal in the non-first period and controls the first signal transmission path to be conducted; during the non-first time period, the sampling module transmits the current-sampling output signal to the quantization module through the first signal transmission path, and the quantization module holds the current-sampling output signal to quantize the current-sampling output signal in the next first time period.
4. The analog-to-digital conversion circuit according to claim 1 or 2, wherein the quantization module comprises: a first quantization circuit, a second quantization circuit, and a second isolation device disposed on a second signal transmission path between the first quantization circuit and the second quantization circuit;
the second isolation device is used for controlling the second signal transmission path to be disconnected in a third time period which takes a third time point after the former time boundary point as a starting point and takes the latter time boundary point as an end point for the second time period; controlling the second signal transmission path to be conducted in a non-third period;
in a non-third period within the second period, the first quantization circuit and the second quantization circuit are respectively used for carrying out initial quantization on high bits and low bits of the held sampled output signal;
in the third period, the first quantization circuit stops the quantization operation, and the second quantization circuit quantizes the lower bit of the sampled output signal again.
5. The analog-to-digital conversion circuit according to claim 1 or 2, wherein the quantization module comprises: a third quantization circuit and a noise shaping circuit;
the third quantization circuit is used for quantizing the held sampling output signal to obtain a quantized output initial signal;
and the noise shaping circuit is used for carrying out noise shaping on the quantized output initial signal to obtain the quantized output signal.
6. An analog-to-digital conversion method applied to the analog-to-digital conversion circuit according to any one of claims 1 to 5, the method comprising:
sampling an input signal through a sampling module, and transmitting a sampled output signal obtained by sampling to a quantization module through a first signal transmission channel;
controlling the first signal transmission channel to be disconnected in a first period of time, wherein the end point of each two adjacent sampling times takes the end point of the previous time as a starting point and the first time point before the end point of the next time as an end point; controlling the first signal transmission path to be conducted in a non-first period;
receiving and holding the sampled output signal by the quantization module during the non-first time period;
for the first period, quantizing the held sampling output signal by the quantizing module within a second period taking a second time point after the front boundary time point as a starting point and taking the rear boundary time point as an end point, and outputting a quantized output signal; wherein a sum of the second period and the sampling time is greater than the first period.
7. The method of analog-to-digital conversion of claim 6, further comprising:
sampling the input signal according to a sampling control signal;
controlling the first signal transmission channel to be switched on or switched off according to the first control signal;
and quantizing the sampled output signal according to a quantization control signal.
8. The analog-to-digital conversion method according to claim 7, wherein the first control signal comprises: a first level signal in a first period and a second level signal in a non-first period; the first level signal is at a high level, the second level signal is at a low level, or the first level signal is at a low level, and the second level signal is at a high level;
the method further comprises the following steps:
in each group of first time interval and non-first time interval which are adjacent in the front-back order:
in the first period, the first signal transmission path is controlled to be disconnected according to the first level signal; sampling the input signal by the sampling module at the current time to obtain a current sampling output signal, and quantizing the last sampling output signal received and held in the last non-first time period by the quantization module to obtain a last quantized output signal;
in the non-first period, controlling the first signal transmission channel to be conducted according to the second level signal; and transmitting the current sampling output signal to the quantization module through the first signal transmission path by the sampling module, and holding the current sampling output signal by the quantization module to quantize the current sampling output signal in the next first period.
9. The analog-to-digital conversion method according to claim 6 or 7, characterized in that the quantization module comprises: a first quantization circuit and a second quantization circuit;
the method further comprises the following steps:
for the second time interval, taking a third time point after the previous time boundary point as a starting point, and controlling a second signal transmission path between the first quantization circuit and the second quantization circuit to be disconnected in a third time interval taking the later time boundary point as an end point; controlling the second signal transmission path to be conducted in a non-third period;
in a non-third period within the second period, initially quantizing, by the first quantizing circuit and the second quantizing circuit, high bits and low bits of the held sampled output signal, respectively;
in the third period, the upper bit quantization operation is stopped, and the lower bit of the sampled output signal is quantized again by the second quantization circuit.
10. The analog-to-digital conversion method according to claim 6 or 7, characterized in that the quantization module comprises: a third quantization circuit and a noise shaping circuit;
the method further comprises the following steps:
quantizing the held sampling output signal through the third quantization circuit to obtain a quantized output initial signal;
and performing noise shaping on the quantized output initial signal through the noise shaping circuit to obtain the quantized output signal.
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