CN115295683B - 一种单载流子输运的平衡探测器及其制备方法 - Google Patents
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Abstract
本发明公开了一种单载流子输运的平衡探测器及其制备方法,涉及光电探测器技术领域,本发明的探测器的吸收层最终为P型In0.53Ga0.47As吸收层,空穴在光吸收层中为多数载流子,光生空穴的产生速度为其介质弛豫速度,在飞秒量级,可以忽略。光生电子在P型In0.53Ga0.47As吸收层中通过扩散和漂移运动至n型InP漂移层。在本发明的探测器中,只有电子一种载流子控制实际的输运速度。相比于传统的PIN型平衡探测器,本发明的平衡探测器不受制于速度较慢的空穴,因此,其响应速度大幅度提高。
Description
技术领域
本发明涉及光电探测器技术领域,具体来说涉及一种单载流子输运的平衡探测器及其制备方法。
背景技术
平衡探测器是相干探测技术的核心器件之一。采用平衡探测器的相干探测技术,比通常的直接探测技术光探测器的接收灵敏度高约20dB,显著消除了接收机噪声和电子线路噪声对微弱光信号检测的影响。在单管探测器的相干光接收系统中,由光混频器接收的本振光和信号光光场发生干涉产生中频信号,输出的两路信号中,仅一路被光探测器使用,输入的光功率将损失一半,而使用平衡探测器的相干光通信系统,光混频器两个输出端口的光信号可以分别入射到两个光电探测器上,输入信号光功率基本被完全利用,从而提高了光的有效利用率并且抵消掉很大一部分噪声。
平衡探测器属于光电探测器的一种,通常在工业上会以三个重要参量来衡量光电探测器的品质,即:宽带宽、高效率和高饱和输出功率。对于传统的PIN光探测器,由于受到空间电荷效应的限制,很难在高电流密度条件下保持高速响应。
平衡探测器多应用于外差探测、光学延时测量、相干通信系统、光学传感。其内部集成了两个匹配的光电二极管和一个超低噪声的互阻放大器,能够有效减少激光器噪声和共模噪声,提高系统的信噪比,具有多种光谱响应可选,低噪声、高增益,使用方便等特点。
近年来,对单行载流子光探测器的研究逐渐变得热门,这种光电探测器只让迁移率大的电子作为有缘载流子流过结区,大大提高了探测器的响应速度。单行载流子光电二极管(UTC-PD)是一种高速、高饱和输出的新型光电探测器,其结构特点是由p型中性光吸收层和n型宽带隙集结层构成,并且只用电子作为有源载流子。由于电子漂移速度远高于空穴,因此需要更强的入射激光激发产生更大量的电子才能引起电子的囤积,所以与PIN-PD相比,UTC-PD有效地抑制了空间电荷效应。
发明内容
为了解决上述技术方案的不足,本发明的目的在于提供一种单载流子输运的平衡探测器的制备方法。
本发明的另一个目的在于提供一种采用上述制备方法获得的单载流子输运的平衡探测器。
本发明的目的是通过下述技术方案予以实现的。
一种单载流子输运的平衡探测器的制备方法,包括以下步骤:
步骤一,在半绝缘InP衬底上依次生长n型InP缓冲层、n型InP漂移层、n型InGaAsP过渡层(1层或多层)、本征型In0.53Ga0.47As吸收层、本征型In0.52Al0.48As电子扩散阻挡层和本征型InP盖层;
步骤二,在所述本征型InP盖层上表面沉积 SiN薄膜,利用光刻胶在SiN薄膜的表面形成2个间隔设置的Zn扩散窗口图形,通过刻蚀的方法去除Zn扩散窗口图形上的SiN薄膜,使SiN薄膜下方的InP盖层暴露出来,刻蚀完成后去除光刻胶,形成2个Zn扩散窗口;
步骤三,利用MOCVD或者炉管法在2个所述Zn扩散窗口区域均进行Zn扩散,形成P型扩散区域一和P型扩散区域二以及围绕P型扩散区域的非有源区域,所述P型扩散区域一和P型扩散区域二均包含本征型InP盖层、本征型In0.52Al0.48As电子扩散阻挡层和本征型In0.53Ga0.47As吸收层,停在本征型In0.53Ga0.47As吸收层的下表面,Zn扩散之后,本征型InP盖层、本征型In0.52Al0.48As电子扩散阻挡层和本征型In0.53Ga0.47As吸收层转化为P型,其中,转换成P型的In0.53Ga0.47As吸收层中Zn浓度至上而下逐渐降低,从而形成具有Zn浓度梯度的P型In0.53Ga0.47As吸收层;
步骤四,利用光刻胶在SiN薄膜和P型扩散区域一和P型扩散区域二的上表面均形成台阶图形,通过台阶腐蚀,形成台阶区域一和台阶区域二和围绕2个台阶区域的N型接触区域,将P型扩散区域一限制在台阶区域一内,P型扩散区域二限制在台阶区域二内,台阶区域的半径均大于P型扩散区域的半径,二者半径差为5~50μm,台阶腐蚀的深度包含本征型InP盖层、本征型In0.52Al0.48As电子扩散阻挡层和本征型In0.53Ga0.47As吸收层、n型InGaAsP过渡层、n型InP漂移层,直至n型InP缓冲层,腐蚀完成后去除光刻胶;
步骤五,利用光刻胶在P型扩散区域一和P型扩散区域二的上表面的一侧均形成P电极图形,利用电子束或者磁控溅射的方法蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到P金属电极一和P金属电极二;
步骤六,利用光刻胶在台阶区域一和台阶区域二的一侧附近的n型InP缓冲层的上表面各形成一个N电极图形,利用电子束蒸镀或者磁控溅射的方法在N电极图形的外表面蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到N金属电极一和N金属电极二;
步骤七,利用光刻胶形成隔离保护图形,所述隔离保护图形外的其他区域腐蚀至半绝缘InP衬底处,形成隔离保护图形一、隔离保护图形二和位于二者之间的电学隔离区域,隔离腐蚀后去除光刻胶,隔离保护图形一形成感光单元一,隔离保护图形二形成感光单元二;
步骤八,利用PECVD的沉积方式在所有暴露在外的上表面沉积SiN减反膜;
步骤九,利用光刻胶在P金属电极一、P金属电极二、N金属电极一和N金属电极二的上方的SiN减反膜上各形成金属接触窗口图形,利用刻蚀方法,去除所述金属接触窗口图形内的SiN减反膜,形成VIA孔洞,使下方的P金属电极一、P金属电极二、N金属电极一和N金属电极二暴露出来,所述VIA孔洞的上表面的面积均小于P金属电极一、P金属电极二、N金属电极一和N金属电极二上表面的面积;
步骤十,利用光刻胶在P金属电极一和N金属电极二的上表面以及二者之间的所有暴露的外表面形成互联金属图形,利用电子束或者磁控溅射的方法蒸镀金属并进行金属剥离,形成互联金属,所述互联金属将N金属电极二和P金属电极一相连;
步骤十一,在InP衬底的背面减薄和抛光。
在上述技术方案中,所述步骤二中,所述SiN薄膜厚度大于等于100nm。
在上述技术方案中,所述步骤三中,所述P型扩散区域一和P型扩散区域二的上表面均为圆形,半径为10~100μm,所述P型扩散区域一和P型扩散区域二相邻边缘的间距大于等于100μm。
在上述技术方案中,在所述步骤八中,所述SiN减反膜对于1310~1700nm波长光线的反射率大于等于70%。
在上述技术方案中,在所述步骤三中,In0.53Ga0.47As吸收层的厚度为1~4μm,其P型掺杂浓度从5×1017/cm3~5×1018/cm3降至1×1017/cm3至5×1017/cm3。
在上述技术方案中,所述n型InP漂移层的厚度为0.1~1μm,其掺杂浓度为1×1015/cm3~2×1017/cm3。
在上述技术方案中,所述本征型In0.52Al0.48As电子扩散阻挡层的厚度为10~200nm。
在上述技术方案中,在所述步骤十一中,减薄和抛光后的半绝缘InP衬底厚度为50~200μm。
上述制备方法获得的单载流子输运的平衡探测器。
本发明的优点和有益效果为:
1.本发明的探测器的吸收层最终为P型In0.53Ga0.47As吸收层,空穴在光吸收层中为多数载流子,光生空穴的产生速度为其介质弛豫速度,在飞秒量级,可以忽略。光生电子在P型In0.53Ga0.47As吸收层中通过扩散和漂移运动至n型InP漂移层。在本发明的探测器中,只有电子一种载流子控制实际的输运速度。相比于传统的PIN型平衡探测器,本发明的平衡探测器不受制于速度较慢的空穴,因此,其响应速度大幅度提高。
2.P型In0.53Ga0.47As吸收层的掺杂浓度从上往下逐步降低,因此其能带从上往下逐步降低,这将辅助电子的扩散,提高扩散速度。
3.In0.52Al0.48As电子扩散阻挡层在In0.53Ga0.47As吸收层和In0.52Al0.48As电子扩散阻挡层的界面处产生较大的导带带阶,阻挡光生电子向P型InP盖层方向扩散,从而进一步控制器件的单载流子输运特性。
4.由于低带宽的In0.53Ga0.47As吸收层在工作电压下没有被耗尽,因此其产生-复合电流很低,从而降低了平衡探测器的整体暗电流。
5.由于本发明的平衡探测器的载流子输运过程只依赖于速度较快的电子,因此,速度较慢的空穴造成的信号拖尾现象可以在本发明的平衡探测器中大大减小,平衡探测器的线性度大大提高。
6.本发明的平衡探测器的Zn扩散深度覆盖整个In0.53Ga0.47As吸收层,可以保证In0.53Ga0.47As吸收层有合适的掺杂浓度,In0.53Ga0.47As吸收层从上至下Zn掺杂浓度逐渐降低,形成的掺杂梯度将在In0.53Ga0.47As吸收层中形成弱电场,这将有助于电子在In0.53Ga0.47As吸收层中的输运,提高探测器的速度。
7.Zn扩散工艺普遍存在拖尾的现象,这对于传统的平衡探测器是不可接受的,而在本发明的平衡探测器中Zn扩散的拖尾现象得到了合理的利用,拖尾的Zn掺杂将在In0.53Ga0.47As吸收层中产生掺杂梯度,有助于电子在In0.53Ga0.47As吸收层中的输运。
8.本发明采用半绝缘InP衬底,通过台阶腐蚀将P型扩散区域限制在台阶区域,既可以实现电学绝缘,又可以最大限度的减小探测器的电容,从而提高探测器的开关速度和带宽。
9.台阶区域的直径大于P型扩散区的直径,而台阶区域的侧壁是半绝缘的高阻材料,通过优化的侧壁钝化可以进一步降低暗电流。
10.本发明的平衡探测器包含两个探测器单元,每个探测器单元包括各自的Zn扩散区域、台阶区域、P金属电极、N金属电极和隔离保护图形。其中探测器单元1的P金属电极与探测器单元2的N金属电极通过互联金属进行连接。
附图说明
图1为本发明的单载流子探测器的制备方法的步骤一的流程示意图。
图2为本发明的单载流子探测器的制备方法的步骤二至步骤三的流程示意图。
图3为本发明的单载流子探测器的制备方法的步骤四的流程示意图。
图4为本发明的单载流子探测器的制备方法的步骤五至步骤七的流程示意图。
图5为本发明的单载流子探测器的制备方法的步骤八的流程示意图。
图6为本发明的单载流子探测器的制备方法的步骤九的流程示意图。
图7为本发明的单载流子探测器的制备方法的步骤十至步骤十一的流程示意图。
其中,
1:半绝缘InP衬底,
2:n型InP缓冲层,
3:n型InP漂移层,
4:n型InGaAsP过渡层,
5:In0.53Ga0.47As吸收层,
6:In0.52Al0.48As电子扩散阻挡层,
7:本征型InP盖层,
8:SiN薄膜,
9:P型扩散区域一,
10:P型扩散区域二,
11:P金属电极一,
12:P金属电极二,
13:N金属电极一,
14:N金属电极二,
15:减反膜,
16:VIA孔洞,
17:互联金属,
18:电学隔离区域。
对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,可以根据以上附图获得其他的相关附图。
具体实施方式
下面结合具体实施例进一步说明本发明的技术方案。
实施例1
如图1和7所示,一种单载流子输运的平衡探测器的制备方法,包括以下步骤:
如图1所示,步骤一,利用MOCVD或者MBE的沉积方式在半绝缘InP衬底1上依次生长n型InP缓冲层2、n型InP漂移层3、n型InGaAsP过渡层4、本征型In0.53Ga0.47As吸收层5、本征型In0.52Al0.48As电子扩散阻挡层6和本征型InP盖层7,其中,所述n型InP漂移层3的厚度为1μm,其掺杂浓度为1×1015/cm3,n型InP漂移层3的在工作电压下完全耗尽,产生电场用于收集光生电子;n型InP缓冲层2的厚度为0.5μm,掺杂浓度为5×1017/cm3为了更好的匹配本绝缘InP衬底和n型InP缓冲层2上面的外延层材料(即,n型InP漂移层3、n型InGaAsP过渡层4、本征型In0.53Ga0.47As吸收层5、本征型In0.52Al0.48As电子扩散阻挡层6和本征型InP盖层7)之间因为生长条件不同所造成的晶格常数的差异,确保外延层的生长质量;所述本征型In0.52Al0.48As电子扩散阻挡层6的厚度为20nm,用于阻挡光生电子向上方扩散,从而保证光生载流子的单项输运特性;在本实施例中,n型InGaAsP过渡层4为三层,各层的带宽自下而上分别为1.05eV、0.95eV和0.85eV,三层带宽渐变层从In0.53Ga0.47As吸收层5的带宽逐步渐变到n型InP漂移层3的带宽,能够有效降低光生载流子在界面处的堆积;所述本征型In0.53Ga0.47As吸收层5的厚度为3μm,其背景掺杂浓度小于1×1015/cm3,该层为光生载流子产生层,设计目的为尽可能吸收1.0~1.7μm的光子能量;所述本征型InP盖层7的厚度为1μm,用于Zn扩散形成P型扩散区域。
如图2所示,步骤二,利用PECVD的沉积方式在所述本征型InP盖层7上表面沉积SiN薄膜8,SiN薄膜8厚度为100nm,利用光刻胶在SiN薄膜8的表面形成2个间隔设置的Zn扩散窗口图形,通过刻蚀的方法去除Zn扩散窗口图形上的SiN薄膜8,使SiN薄膜8下方的本征型InP盖层7暴露出来,刻蚀完成后去除光刻胶,形成2个Zn扩散窗口。
步骤三,利用MOCVD或者炉管法在2个所述Zn扩散窗口区域均进行Zn扩散,形成P型扩散区域一9和P型扩散区域二10以及围绕P型扩散区域的非有源区域,所述P型扩散区域一9和P型扩散区域二10的深度均包含本征型InP盖层7、本征型In0.52Al0.48As电子扩散阻挡层6和本征型In0.53Ga0.47As吸收层5,停在本征型In0.53Ga0.47As吸收层5的下表面,Zn扩散之后,本征型InP盖层7、本征型In0.52Al0.48As电子扩散阻挡层6和本征型In0.53Ga0.47As吸收层5转化为P型,其中,转换成P型的In0.53Ga0.47As吸收层5中Zn浓度从上向下逐渐降低,从而形成具有Zn浓度梯度的P型In0.53Ga0.47As吸收层5,其P型掺杂浓度从2×1018/cm3降至1×1017/cm3,所述P型扩散区域一9和P型扩散区域二10的上表面均为圆形,半径为100μm,所述2个P型扩散区域相邻边缘之间的间距为250μm。
如图3所示,步骤四,利用光刻胶在SiN薄膜8和P型扩散区域一9和P型扩散区域二10的上表面均形成台阶图形,通过台阶腐蚀,形成台阶区域一和台阶区域二和围绕2个台阶区域的N型接触区域,将P型扩散区域一9限制在台阶区域一内,P型扩散区域二10限制在台阶区域二内,每一个台阶区域的半径大于P型扩散区域的半径,二者半径差为10μm,台阶腐蚀的深度包含本征型InP盖层7、本征型In0.52Al0.48As电子扩散阻挡层6和本征型In0.53Ga0.47As吸收层5、n型InGaAsP过渡层4、n型InP漂移层3,直至n型InP缓冲层2,腐蚀完成后去除光刻胶,其中,台阶区域一和台阶区域二二者中心间距为250μm。
如图4所示,步骤五,利用光刻胶在P型扩散区域一9和P型扩散区域二10的上表面的一侧均形成P电极图形,利用电子束或者磁控溅射的方法在P电极图形的外表面蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到P金属电极一11和P金属电极二12。
步骤六,利用光刻胶在台阶区域一和台阶区域二的一侧附近的n型InP缓冲层2的上表面各形成一个N电极图形,利用电子束蒸镀或者磁控溅射的方法在N电极图形的外表面蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到N金属电极一13和N金属电极二14。
步骤七,利用光刻胶形成隔离保护图形,所述隔离保护图形外的其他区域腐蚀至半绝缘InP衬底1处,形成隔离保护图形一、隔离保护图形二和位于二者之间的电学隔离区域18,隔离腐蚀后去除光刻胶,隔离保护图形一形成感光单元一,隔离保护图形二形成感光单元二。
如图5所示,步骤八,利用PECVD的沉积方式在所有暴露在外的上表面沉积SiN减反膜15,所述SiN减反膜15厚度为195nm,SiN减反膜15对于1550nm波长光线的反射率大90%。
如图6所示,步骤九,利用光刻胶在P金属电极一11、P金属电极二12、N金属电极一13和N金属电极二14的上方的SiN减反膜15上各形成金属接触窗口图形,利用刻蚀方法,去除所述金属接触窗口图形内的SiN减反膜15,形成VIA孔洞16,使下方的P金属电极一11、P金属电极二12、N金属电极一13和N金属电极二14暴露出来,所述VIA孔洞16的上表面的面积均小于P金属电极一11、P金属电极二12、N金属电极一13和N金属电极二14上表面的面积。
如图7所示,步骤十,利用光刻胶在P金属电极一11和N金属电极二14的上表面以及二者之间的所有暴露的外表面形成互联金属图形,利用电子束或者磁控溅射的方法蒸镀金属并进行金属剥离,形成互联金属17,所述互联金属17将N金属电极二14和P金属电极一11相连。至此,感光单元一的P金属电极一11和感光单元二的N金属电极二14短路连接,因此,感光单元一和感光单元二成为两个反向连接的探测器。在工作状态下,感光单元一和感光单元二信号相同的部分相互抵消,最终只输出感光单元一和感光单元二信号不同的部分,从而成为平衡探测器。
步骤十一,在半绝缘InP衬底1的背面减薄和抛光,减薄和抛光后的半绝缘InP衬底1的厚度为150μm。
以上对本发明做了示例性的描述,应该说明的是,在不脱离本发明的核心的情况下,任何简单的变形、修改或者其他本领域技术人员能够不花费创造性劳动的等同替换均落入本发明的保护范围。
Claims (9)
1.一种单载流子输运的平衡探测器的制备方法,其特征在于,包括以下步骤:
步骤一,在半绝缘InP衬底上依次生长n型InP缓冲层、n型InP漂移层、n型InGaAsP过渡层、本征型In0.53Ga0.47As吸收层、本征型In0.52Al0.48As电子扩散阻挡层和本征型InP盖层;
步骤二,在所述本征型InP盖层上表面沉积SiN薄膜,利用光刻胶在SiN薄膜的表面形成2个间隔设置的Zn扩散窗口图形,通过刻蚀的方法去除Zn扩散窗口图形上的SiN薄膜,使SiN薄膜下方的InP盖层暴露出来,刻蚀完成后去除光刻胶,形成2个Zn扩散窗口;
步骤三,利用MOCVD或者炉管法在2个所述Zn扩散窗口区域均进行Zn扩散,形成P型扩散区域一和P型扩散区域二以及围绕P型扩散区域的非有源区域,所述P型扩散区域一和P型扩散区域二均包含本征型InP盖层、本征型In0.52Al0.48As电子扩散阻挡层和本征型In0.53Ga0.47As吸收层,停在本征型In0.53Ga0.47As吸收层的下表面;
步骤四,利用光刻胶在SiN薄膜和P型扩散区域一和P型扩散区域二的上表面均形成台阶图形,通过台阶腐蚀,形成台阶区域一和台阶区域二和围绕2个台阶区域的N型接触区域,将P型扩散区域一限制在台阶区域一内,P型扩散区域二限制在台阶区域二内,台阶区域的半径均大于P型扩散区域的半径,二者半径差为5~50μm,台阶腐蚀的深度包含本征型InP盖层、本征型In0.52Al0.48As电子扩散阻挡层和本征型In0.53Ga0.47As吸收层、n型InGaAsP过渡层、n型InP漂移层,直至n型InP缓冲层,腐蚀完成后去除光刻胶;
步骤五,利用光刻胶在P型扩散区域一和P型扩散区域二的上表面的一侧均形成P电极图形,利用电子束或者磁控溅射的方法蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到P金属电极一和P金属电极二;
步骤六,利用光刻胶在台阶区域一和台阶区域二的一侧附近的n型InP缓冲层的上表面各形成一个N电极图形,利用电子束蒸镀或者磁控溅射的方法在N电极图形的外表面蒸镀金属并进行金属剥离,并退火形成欧姆接触,得到N金属电极一和N金属电极二;
步骤七,利用光刻胶形成隔离保护图形,所述隔离保护图形外的其他区域腐蚀至半绝缘InP衬底处,形成隔离保护图形一、隔离保护图形二和位于二者之间的电学隔离区域,隔离腐蚀后去除光刻胶,隔离保护图形一形成感光单元一,隔离保护图形二形成感光单元二;
步骤八,利用PECVD的沉积方式在所有暴露在外的上表面沉积SiN减反膜;
步骤九,利用光刻胶在P金属电极一、P金属电极二、N金属电极一和N金属电极二的上方的SiN减反膜上各形成金属接触窗口图形,利用刻蚀方法,去除所述金属接触窗口图形内的SiN减反膜,形成VIA孔洞,使下方的P金属电极一、P金属电极二、N金属电极一和N金属电极二暴露出来,所述VIA孔洞的上表面的面积均小于P金属电极一、P金属电极二、N金属电极一和N金属电极二上表面的面积;
步骤十,利用光刻胶在P金属电极一和N金属电极二的上表面以及二者之间的所有暴露的外表面形成互联金属图形,利用电子束或者磁控溅射的方法蒸镀金属并进行金属剥离,形成互联金属,所述互联金属将N金属电极二和P金属电极一相连;
步骤十一,在InP衬底的背面减薄和抛光;
在所述步骤二中,所述SiN薄膜厚度大于等于100nm。
2.根据权利要求1所述的制备方法,其特征在于,在所述步骤一中,所述n型InGaAsP过渡层为一层或多层。
3.根据权利要求1所述的制备方法,其特征在于,在所述步骤三中,所述P型扩散区域一和P型扩散区域二的上表面均为圆形,半径为10~100μm,所述P型扩散区域一和P型扩散区域二相邻边缘之间的间距大于等于100μm。
4.根据权利要求1所述的制备方法,其特征在于,在所述步骤八中,所述SiN减反膜对于1310~1700nm波长光线的反射率大于等于70%。
5.根据权利要求1所述的制备方法,其特征在于,在所述步骤三中,In0.53Ga0.47As吸收层的厚度为1~4μm,其P型掺杂浓度从5×1017/cm3~5×1018/cm3降至1×1017/cm3~5×1017/cm3。
6.根据权利要求1所述的制备方法,其特征在于,所述n型InP漂移层的厚度为0.1~1μm,其掺杂浓度为1×1015/cm3~2×1017/cm3。
7.根据权利要求1所述的制备方法,其特征在于,所述本征型In0.52Al0.48As电子扩散阻挡层的厚度为10~200nm。
8.根据权利要求1所述的制备方法,其特征在于,在所述步骤十一中,减薄和抛光后的半绝缘InP衬底的厚度为50~200μm。
9.如权利要求1~8中任意一项所述的制备方法获得的单载流子输运的平衡探测器。
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