CN115274436B - Fast recovery diode and preparation method thereof - Google Patents

Fast recovery diode and preparation method thereof Download PDF

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CN115274436B
CN115274436B CN202211188013.7A CN202211188013A CN115274436B CN 115274436 B CN115274436 B CN 115274436B CN 202211188013 A CN202211188013 A CN 202211188013A CN 115274436 B CN115274436 B CN 115274436B
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CN115274436A (en
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石英学
刘志强
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Risen Semiconductor Technology Hunan Co ltd
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
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    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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    • H01ELECTRIC ELEMENTS
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    • H01L29/66143Schottky diodes
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    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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Abstract

The invention discloses a fast recovery diode and a preparation method thereof, wherein the preparation method of the fast recovery diode comprises the following steps: providing a substrate, wherein an N-type epitaxial layer is formed on the surface of the substrate through epitaxy; boron is injected into the surface of the epitaxial layer to form a P-type doped region, and the P-type doped region is diffused in a region contacting with the epitaxial layer to form a PIN region; injecting phosphorus into the surface of the P-type doped region to form an N-type doped region; and carrying out platinum diffusion lattice treatment on the surface of the N-type doped region to form a platinum doped region distributed in a lattice manner. The present invention aims to effectively adjust the carrier lifetime.

Description

Fast recovery diode and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a fast recovery diode and a preparation method thereof.
Background
At present, researches find that the carrier lifetime adjustment technology can further reduce the dynamic loss of the fast recovery diode, and gradually enable the fast recovery diode to adapt to higher working frequency. And the carrier lifetime adjustment technology widely applied includes two types, particle irradiation and heavy metal diffusion. Wherein, the particle irradiation comprises electron irradiation, hydrogen ion irradiation, helium ion irradiation and the like; heavy metal diffusion includes metal diffusion of gold, platinum, and the like. The electron irradiation process is roughly as follows: the high-energy electron beams are generated by an electron accelerator, lines are formed in a scanning mode to form a surface, an irradiation surface is finally formed, and then the semiconductor chip is subjected to irradiation processing, so that uniform defect distribution is formed inside the chip. Further, for the fast recovery diode chip, the defects generated in the active region range can help to improve the turn-off speed of the fast recovery diode and reduce turn-off loss, but can also improve the conduction voltage drop of the fast recovery diode, so that the service life of a current carrier of the fast recovery diode is reduced.
The invention patent with the prior publication number of CN109638083A discloses a fast recovery diode, which forms a P +/P-/N-composite structure on the front surface of a chip to form approximately symmetrical carrier concentration distribution, thereby generating an effect of adjusting anode emission efficiency, obtaining a more optimized Trr-Vf trade-off relationship, effectively reducing forward turn-off loss, and improving reliability and stability in the reverse recovery process. However, the use of a large-area platinum diffusion process to adjust the carrier lifetime will have limitations in the adjustment range.
Disclosure of Invention
The invention mainly aims to provide a fast recovery diode and a preparation method thereof, and aims to solve the technical problems that the current carrier of the existing fast recovery diode is short in service life and limited in adjustment range.
In order to achieve the above object, the present invention provides a method for preparing a fast recovery diode, the method comprising the steps of:
providing a substrate, wherein an N-type epitaxial layer is formed on the surface of the substrate through epitaxy;
injecting boron into the surface of the epitaxial wafer layer to form a P-type doped region, wherein the P-type doped region is diffused in a region contacting with the epitaxial layer to form a PIN region;
injecting phosphorus into the surface of the P-type doped region to form an N-type doped region;
and carrying out platinum diffusion lattice treatment on the surface of the N-type doped region to form a platinum doped region distributed in a lattice manner.
Optionally, the step of implanting boron into the surface of the epitaxial wafer layer to form a P-type doped region includes:
cleaning and drying the surface of the epitaxial layer in advance;
then, carrying out first oxidation and glue coating treatment, and carrying out exposure, development and corrosion through a P area photoetching plate to form a P type doping injection window;
and injecting boron into the P-type doping injection window to form a P-type doping area.
Optionally, the step of the first oxidation treatment includes:
and growing the surface of the cleaned and dried epitaxial layer in an oxidation furnace at 1000-1150 ℃ to form a first oxide layer with the thickness of 10000A.
Optionally, the step of implanting phosphorus into the surface of the P-type doped region to form a corresponding N-type doped region includes:
carrying out secondary oxidation and glue coating treatment on the surface of the P-type doping area, and carrying out exposure, development and corrosion through an N-area photoetching plate to form an N-type doping injection window;
and then, carrying out phosphorus injection in the N-type doping injection window to form an N-type doping area.
Optionally, the step of second oxidizing comprises:
and growing the surface of the P-type doped region in an oxidation furnace at 1000-1150 ℃ to form a second oxide layer with the thickness of 5000A.
Optionally, the step of performing platinum diffusion lattice treatment on the surface of the N-type doped region to form a platinum doped region in lattice distribution includes:
carrying out third oxidation and gluing treatment on the surface of the N-type doped region, and carrying out exposure, development and corrosion through a platinum region photoetching plate, wherein the platinum region photoetching plate is a lattice-distributed photoetching plate, and a doping injection window in lattice distribution is obtained;
and then carrying out platinum area sputtering on the doping injection windows distributed in the lattice through a sputtering platform to obtain platinum doping areas distributed in the lattice.
Optionally, the step of third oxidizing comprises:
and growing the surface of the N-type doped region in an oxidation furnace at 1000-1150 ℃ to form a third oxidation layer with the thickness of 8000A.
Optionally, the platinum area photolithography mask is in a circular hole, a square hole or a hexagonal array structure with equal distance.
Optionally, the steps further comprise:
sputtering electrodes and gluing the surfaces of the N-type doped region and the platinum doped region, and carrying out exposure, development and corrosion through a metal region photoetching plate to form a target metal lead hole;
and manufacturing a corresponding anode or cathode metal lead in the target metal lead hole.
In order to achieve the above object, the present invention further provides a fast recovery diode, wherein the fast recovery diode is prepared according to any one of the above preparation methods of the fast recovery diode.
The invention provides a fast recovery diode and a preparation method thereof, wherein a substrate is provided, and an N-type epitaxial layer is formed on the surface of the substrate through epitaxy; injecting boron into the surface of the epitaxial wafer layer to form a P-type doped region, wherein the P-type doped region is diffused in a region contacting with the epitaxial layer to form a PIN region; injecting phosphorus into the surface of the P-type doped region to form an N-type doped region; and carrying out platinum diffusion lattice treatment on the surface of the N-type doped region to form a platinum doped region distributed in a lattice manner. In the preparation of the fast recovery diode, a PIN region is formed in a contact region of the P-type doped region and the epitaxial layer by diffusion, and a platinum doped region in lattice distribution is formed on the surface of the N-type doped region, so that the structure distribution has the characteristic of a Schottky diode, the fast recovery diode prepared in the preparation method forms a series structure of the Schottky diode and the PIN diode, the forward switching speed is close to 10ns by experimental verification, and the reverse breakdown voltage can be improved due to the PIN-like structure. And the size of the forward voltage drop can be flexibly adjusted through the platinum doping areas distributed in a lattice manner. In addition, the preparation of the lead electrode process is carried out, and then the passivation of the non-electrode area is carried out, so that the purposes of effectively adjusting the service life of a current carrier and effectively adjusting the softness of a breakdown curve of the diode are finally realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a cross-sectional view of a plurality of groups of fast recovery diodes prepared according to an embodiment of a method for preparing a fast recovery diode according to the present invention;
fig. 2 is a cross-sectional view of a single type of fast recovery diode of the structure shown in fig. 1.
The reference numbers illustrate:
Figure 266049DEST_PATH_IMAGE001
the implementation, functional features and advantages of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive efforts based on the embodiments of the present invention, are within the scope of protection of the present invention.
It should be noted that all the directional indicators (such as upper and lower 8230; etc.) in the embodiments of the present invention are only used for explaining the relative positional relationship between the components in a specific posture (as shown in the drawings), the motion situation, etc., and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are only for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature.
Moreover, the technical solutions in the embodiments of the present invention may be combined with each other, but it is necessary to be able to be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent, and is not within the protection scope of the present invention.
Referring to fig. 1, a cross-sectional view of a plurality of groups of fast recovery diodes prepared in an embodiment of a method for preparing fast recovery diodes of the present invention is shown, wherein the method comprises the following steps:
step 1, providing a substrate 1 with a preset size, and forming an N-type epitaxial layer on the surface of the substrate 1 through epitaxy, wherein the substrate 1 and the epitaxial layer are both made of silicon materials.
Step 2, injecting boron into the surface of the epitaxial wafer layer to form P-type doped regions 3 distributed at intervals, specifically, firstly, cleaning and drying the surface of the epitaxial wafer layer in a cleaning machine; and then growing the surface of the cleaned and dried epitaxial layer in an oxidizing furnace at 1000-1150 ℃ to form a first oxide layer with the thickness of 10000A, gluing the surface of the first oxide layer, exposing, developing and corroding the glued first oxide layer through a P-region photoetching plate to form a P-type doped injection window, and finally injecting boron into the P-type doped injection window to form a P-type doped region 3, wherein each P-type doped region 3 is diffused in a region contacting with the epitaxial layer to form a PIN region 2.
Step 3, respectively carrying out phosphorus injection on the surface of each P-type doped region 3 to form a corresponding N-type doped region 4; specifically, the surface of each P-type doped region 3 is grown in an oxidation furnace at 1000 to 1150 ℃ to form a second oxide layer with the thickness of 5000A, then glue coating treatment is carried out on the surface of the second oxide layer, and the glued second oxide layer is exposed, developed and corroded through an N-region photoetching plate, so that an N-type doped injection window is formed; and finally, injecting phosphorus in the N-type doping injection window to form an N-type doping area 4. Wherein, corresponding PN junctions are also formed in the contact areas of the P-type doped region 3 and the N-type doped region 4.
And 4, performing platinum diffusion lattice treatment on the surface of each N-type doped region 4 to form platinum doped regions 5 distributed in a lattice manner. Specifically, the surface of each N-type doped region is grown in an oxidation furnace at 1000 to 1150 ℃ to form a third oxide layer with the thickness of 8000A, gluing is carried out on the surface of the third oxide layer, and exposure, development and corrosion are carried out on the glued third oxide layer through a platinum region photoetching plate, wherein the platinum region photoetching plate is a photoetching plate distributed in a lattice manner, and then a doped injection window distributed in the lattice manner is obtained; further, the platinum area photoetching plate comprises a circular hole, a square hole or a hexagonal array structure with equal distance. And finally, plating platinum, nickel platinum and titanium platinum on the surface of the corroded third oxidation layer through an evaporation table or a sputtering table on the doping injection window distributed in the lattice, thereby obtaining a platinum doping area distributed in the lattice. In addition, the excess platinum is removed, typically with aqua regia, and platinum annealing is carried out at 800-980 ℃.
Step 6, after the metal doping is finished, preparing electrodes by using the metal photoetching plate again, namely performing electrode sputtering and gluing treatment on the surfaces of the N-type doped region and the platinum doped region, and performing exposure, development and corrosion through the metal region photoetching plate to form a target metal lead hole; manufacturing corresponding anode or cathode metal leads in a target metal lead hole, passivating a non-electrode region, finally completing the preparation of batch fast recovery diodes, and cutting a plurality of groups of diodes into single fast recovery diodes according to corresponding devices, wherein the structure distribution of the single fast recovery diodes is shown in fig. 2, and the fast recovery diodes comprise a substrate 1 positioned at the bottom, and a PIN layer 2, a P-type doped region 3, an N-type doped region 4 and a platinum doped region 5 which are sequentially distributed above the substrate 1.
Specifically, the platinum doping regions 5 are embedded in the N-type doping region 4 in a lattice distribution manner, the PIN layer 2 is a PIN structure formed by diffusing the contact region of the P-type doping region 3 and the epitaxial layer on the surface of the substrate 1, meanwhile, corresponding PN junctions are formed in the contact region of the P-type doping region 3 and the N-type doping region 4, and the platinum doping regions 5 are formed on the surface of the N-type doping region 4 in a lattice distribution manner, so that the structure distribution has the characteristic of a Schottky diode, the fast recovery diode prepared in the method is adopted to form a series structure of the Schottky diode and the PIN diode, the forward switching speed can be close to 10ns through experimental verification, and the reverse breakdown voltage can be improved due to the PIN-like structure. And by arranging the platinum doping regions 5 distributed in a lattice manner, the magnitude of the forward voltage drop can be adjusted more flexibly.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, which are within the spirit of the present invention, are included in the scope of the present invention.

Claims (9)

1. A preparation method of a fast recovery diode is characterized by comprising the following steps:
providing a substrate, wherein an N-type epitaxial layer is formed on the surface of the substrate through epitaxy;
injecting boron into the surface of the epitaxial wafer layer to form a P-type doped region, wherein the P-type doped region is diffused in a region contacting with the epitaxial layer to form a PIN region;
injecting phosphorus into the surface of the P-type doped region to form an N-type doped region;
carrying out oxidation treatment and glue coating treatment on the surface of the N-type doping area, and carrying out exposure, development and corrosion through a platinum area photoetching plate which is a photoetching plate distributed in a dot matrix manner to obtain a doping injection window distributed in the dot matrix manner; and then carrying out platinum area sputtering on the doping injection windows distributed in the lattice through a sputtering platform to obtain platinum doping areas distributed in the lattice, so that the fast recovery diode forms a structure in which a Schottky diode and a PIN diode are connected in series.
2. The method for preparing the fast recovery diode of claim 1, wherein the step of implanting boron into the surface of the epitaxial wafer layer to form the P-type doped region comprises the steps of:
cleaning and drying the surface of the epitaxial layer in advance;
then, carrying out first oxidation and glue coating treatment, and carrying out exposure, development and corrosion through a P area photoetching plate to form a P type doping injection window;
and injecting boron into the P-type doping injection window to form a P-type doping area.
3. The method for preparing a fast recovery diode according to claim 2, wherein the step of the first oxidation treatment comprises:
and growing the surface of the epitaxial layer subjected to cleaning and drying treatment in an oxidation furnace at 1000-1150 ℃ to form a first oxide layer with the thickness of 10000A.
4. The method of claim 1, wherein the step of implanting phosphorus into the surface of the P-type doped region to form the N-type doped region comprises:
carrying out secondary oxidation and glue coating treatment on the surface of the P-type doping area, and carrying out exposure, development and corrosion through an N-area photoetching plate to form an N-type doping injection window;
and then, injecting phosphorus into the N-type doping injection window to form an N-type doping area.
5. The method of claim 4, wherein the step of second oxidizing comprises:
and growing the surface of the P-type doped region in an oxidation furnace at 1000-1150 ℃ to form a second oxide layer with the thickness of 5000A.
6. The method of claim 1, wherein the step of oxidizing comprises:
and growing the surface of the N-type doped region in an oxidation furnace at 1000-1150 ℃ to form a third oxidation layer with the thickness of 8000A.
7. The method of claim 1, wherein the Pt region photolithography mask has a circular, square or hexagonal array structure with equal spacing.
8. The method of fabricating a fast recovery diode according to any of claims 1 to 7, wherein the steps further comprise:
sputtering electrodes and gluing the surfaces of the N-type doped region and the platinum doped region, and performing exposure, development and corrosion through a metal region photoetching plate to form a target metal lead hole;
and manufacturing a corresponding anode or cathode metal lead in the target metal lead hole.
9. A fast recovery diode prepared by the method according to any one of claims 1 to 8.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343068A (en) * 1991-03-28 1994-08-30 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Integrated bipolar power device and a fast diode
CN106876485A (en) * 2017-03-06 2017-06-20 北京世纪金光半导体有限公司 Double trench MOSFET devices of a kind of SiC of integrated schottky diode and preparation method thereof
CN207265065U (en) * 2017-09-13 2018-04-20 张家港意发功率半导体有限公司 A kind of High Voltage Pt Diffused Diode
CN109994383A (en) * 2017-12-18 2019-07-09 英飞凌科技股份有限公司 Semiconductor devices and the method for being used to form semiconductor devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343068A (en) * 1991-03-28 1994-08-30 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Integrated bipolar power device and a fast diode
CN106876485A (en) * 2017-03-06 2017-06-20 北京世纪金光半导体有限公司 Double trench MOSFET devices of a kind of SiC of integrated schottky diode and preparation method thereof
CN207265065U (en) * 2017-09-13 2018-04-20 张家港意发功率半导体有限公司 A kind of High Voltage Pt Diffused Diode
CN109994383A (en) * 2017-12-18 2019-07-09 英飞凌科技股份有限公司 Semiconductor devices and the method for being used to form semiconductor devices

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