CN115244504A - 卷积运算系统和卷积运算方法 - Google Patents

卷积运算系统和卷积运算方法 Download PDF

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Publication number
CN115244504A
CN115244504A CN202080098105.9A CN202080098105A CN115244504A CN 115244504 A CN115244504 A CN 115244504A CN 202080098105 A CN202080098105 A CN 202080098105A CN 115244504 A CN115244504 A CN 115244504A
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China
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format
data
bit
convolution
equal
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Pending
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CN202080098105.9A
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English (en)
Inventor
谢环
董镇江
李震桁
蒋东龙
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication of CN115244504A publication Critical patent/CN115244504A/zh
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/485—Adding; Subtracting

Abstract

本申请实施例公开了一种卷积运算系统，应用于数据处理领域。本申请的卷积运算系统包括第一转换模块和卷积处理模块，第一转换模块用于将具有第一格式的第一数据组转换为具有第二格式的第二数据组；卷积处理模块包括第一处理单元，第一处理单元用于处理第二数据组的卷积运算，以获得具有第二格式的第一卷积数据。其中，通过在卷积运算前，第一转换模块先转换第一数据组的格式，使得第一处理单元进行卷积运算时，无需进行2补码运算。因此可以减少第一处理单元的格式转换硬件，降低第一处理单元的功耗和面积。

Description

PCT国内申请，说明书已公开。

Claims (18)

  1. PCT国内申请，权利要求书已公开。
CN202080098105.9A 2020-03-25 2020-03-25 卷积运算系统和卷积运算方法 Pending CN115244504A (zh)

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PCT/CN2020/081102 WO2021189294A1 (zh) 2020-03-25 2020-03-25 卷积运算系统和卷积运算方法

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CN115244504A true CN115244504A (zh) 2022-10-25

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CN (1) CN115244504A (zh)
WO (1) WO2021189294A1 (zh)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10042607B2 (en) * 2016-08-22 2018-08-07 Altera Corporation Variable precision floating-point multiplier
CN109522254B (zh) * 2017-10-30 2022-04-12 上海寒武纪信息科技有限公司 运算装置及方法
CN110688086A (zh) * 2019-09-06 2020-01-14 西安交通大学 一种可重构的整型-浮点加法器

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