CN115242584B - Method and device for optimizing complexity of MLSE algorithm based on lookup table - Google Patents
Method and device for optimizing complexity of MLSE algorithm based on lookup table Download PDFInfo
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- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
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- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
Abstract
The application discloses a method and a device for optimizing the complexity of an MLSE algorithm based on a lookup table, which relate to the technical field of signal processing, and the method comprises the following steps: in a coherent optical communication system in which a signal at a transmitting end is subjected to narrow-band filtering, receiving a coherent optical signal; generating an N-symbol distortion signal LUT according to the coherent optical signal; calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity; and recovering the original data in the coherent optical signal by utilizing an MLSE algorithm based on the LUT according to the calculated branch metric value. The method solves the problem of higher calculation complexity in the existing MLSE technology, achieves the operation of replacing the calculation Euclidean distance with the calculation of the difference between the received signal and the N-symbol LUT and taking the absolute value, and reduces the calculation complexity required in the digital signal processing process, thereby reducing the complexity and the power consumption of the corresponding optical communication integrated circuit chip.
Description
Technical Field
The application relates to a method and a device for optimizing the complexity of an MLSE algorithm based on a lookup table, belonging to the technical field of signal processing.
Background
Because the optical communication system combining the pre-filtering and the sequence detection has the advantages of high performance, high frequency spectrum efficiency and the like, the method for detecting the sequence at the receiving end is widely applied to the research of the pre-filtering optical communication system. Among them, the sequence detection algorithm is a method of effectively equalizing inter-symbol interference (inter symbol interference, ISI), and thus, in a coherent optical communication system of narrowband filtering, severe ISI introduced by the narrowband filtering can be effectively eliminated by the sequence detection algorithm. The maximum likelihood sequence estimation (Maximum Likelihood Sequence Estimation, MLSE) algorithm is a commonly used sequence detection algorithm, the current MLSE algorithm is implemented based on a Viterbi algorithm, channel estimation is needed at the receiving end firstly, channel impulse response is obtained, the channel response is used as a weight value of a branch metric value in a trellis diagram for estimating a signal expected to be received, and finally the Viterbi algorithm is adopted to sequentially recover the original data.
In the prior art, the N-symbol distortion signal LUT is used for recording multi-symbol related characteristics introduced by narrow-band filtering and guiding the MLSE process of the receiving end, so that ISI introduced by pre-filtering can be effectively balanced. The specific scheme is as follows: LUT-MLSE system, only with LUTThe columns calculate the Euclidean distance, and therefore, the extensive multiplication and addition computation required to estimate the ideal output symbol using N tap coefficients in a conventional MLSE algorithm can be omitted. Therefore, the current LUT-MLSE scheme can effectively reduce the computational complexity compared with the traditional MLSE algorithm. However, the technical complexity of the current scheme still grows exponentially with M as a base and N as a power, and when M and N are large, a large computational complexity is still required.
Disclosure of Invention
The application aims to provide a method and a device for optimizing the complexity of an MLSE algorithm based on a lookup table, which are used for solving the problems in the prior art.
In order to achieve the above purpose, the present application provides the following technical solutions:
according to a first aspect, an embodiment of the present application provides a method for optimizing complexity of a look-up table based MLSE algorithm, the method comprising:
in a coherent optical communication system in which a signal at a transmitting end is subjected to narrow-band filtering, receiving a coherent optical signal;
generating an N-symbol distortion signal LUT according to the coherent optical signal;
calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity;
and recovering the original data in the coherent optical signal according to the calculated branch metric value.
Optionally, the calculating the branch metric value according to the received signal, the N-symbol distortion signal LUT and the calculation scheme of the optimization complexity includes:
acquiring a sampling value of a middle column in the N-symbol distortion signal LUT;
calculating the difference between the real part of the received signal and the real part of the acquired sampling value and taking an absolute value;
calculating the difference between the imaginary part of the received signal and the imaginary part of the acquired sampling value and taking an absolute value;
and taking the sum of the two absolute values obtained by calculation as the branch metric value.
Optionally, the adding the two calculated absolute values as the branch metric value includes:
the branch metric value is:
wherein y is k Andall are plural, y k For the received signal, < >>For the sampled value, real (y k ) For the real part of the received signal, imag (y k ) For the imaginary part of the received signal,for the real part of the sample value, < > for>Is the imaginary part of the sample value.
Optionally, the calculating the branch metric value according to the received signal, the N-symbol distortion signal LUT and the calculation scheme of the optimization complexity includes:
transforming the N-symbol distortion signal LUT into a real LUT;
acquiring a real sampling value of a middle column in the real LUT;
separating the received signal into a real signal and an imaginary signal;
for each signal obtained by separation, calculating the absolute value of the difference value between the real part in each signal and the real sampling value;
and determining the absolute value of the calculated difference value as the branch metric value.
Optionally, the determining the absolute value of the calculated difference value as the branch metric value includes:
the branch metric value is:
wherein y is k Andare all real signals, y k To separate the real part of each signal obtained,to obtain the resulting real sample values.
Optionally, the generating the N-symbol distortion signal LUT according to the coherent optical signal includes:
performing analog-to-digital conversion on the coherent optical signal to obtain a digital signal;
performing digital signal processing on the digital signal;
separating training sequences in the processed digital signals;
and generating the N-symbol distortion signal LUT according to the training sequence and an LUT training generator.
Optionally, the DSP processing includes one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation, and phase offset compensation.
In a second aspect, there is provided an apparatus for optimizing the complexity of a look-up table based MLSE algorithm, the apparatus comprising a memory having stored therein at least one program instruction and a processor for implementing the method as described in the first aspect by loading and executing the at least one program instruction.
Receiving a coherent optical signal in a coherent optical communication system; generating an N-symbol distortion signal LUT according to the coherent optical signal; calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity; and recovering the original data in the coherent optical signal according to the calculated branch metric value. The method solves the problem of higher calculation complexity in the prior art, achieves the operation of replacing the calculated Euclidean distance with the absolute value of the difference value between the real part and the imaginary part of the calculated complex signal and the real LUT, reduces the calculation complexity required in the digital signal processing process, and reduces the complexity and the power consumption of the corresponding optical communication integrated circuit chip.
The foregoing description is only an overview of the present application, and is intended to provide a better understanding of the present application, as it is embodied in the following description, with reference to the preferred embodiments of the present application and the accompanying drawings.
Drawings
FIG. 1 is a flow chart of a method for optimizing the complexity of a lookup table-based MLSE algorithm in accordance with one embodiment of the application;
fig. 2 is a schematic diagram of one possible implementation of generating an N-symbol distortion signal LUT after a transmitting end transmits a signal to a receiving end according to an embodiment of the present application;
FIG. 3 is a schematic diagram of calculating branch metric values according to a first embodiment of the present application;
fig. 4 is a schematic diagram of an overall process of signal processing by a receiving end according to an embodiment of the present application;
FIG. 5 is a schematic diagram of one possible state transition provided by one embodiment of the present application;
FIG. 6 is a state transition diagram from time T1 to time T2 according to an embodiment of the present application;
FIG. 7 is a schematic diagram of one possible logic gate circuit of a full adder provided by one embodiment of the present application;
FIG. 8 is a schematic diagram of one possible logic gate circuit of an array multiplier according to one embodiment of the present application;
FIG. 9 is a schematic diagram showing the comparison of the system performance of the prior art scheme provided by one embodiment of the present application and the first scheme of the present application;
fig. 10 is a schematic diagram showing the comparison of the system performance of the prior art scheme provided by one embodiment of the present application and the second scheme of the present application.
Detailed Description
The following description of the embodiments of the present application will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the application are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present application described below may be combined with each other as long as they do not collide with each other.
Referring to fig. 1, a flowchart of a method for optimizing complexity of a look-up table based MLSE algorithm according to an embodiment of the present application is shown, and the method includes:
step 101, in a coherent optical communication system in which a signal at a transmitting end is subjected to narrow-band filtering, receiving a coherent optical signal;
the method of the application is used in a coherent optical communication system, and the application mainly introduces a signal processing method of a receiving end. The following applies to the receiving end of a coherent optical communication system based on QPSK (Quadrature Phase Shift Keying ) modulation in this way, except for the specific description.
Alternatively, the original binary bit stream is mapped into QPSK symbols at the transmitting end, and the filtered QPSK signals are obtained by a narrowband filter. And obtaining a digital signal to be transmitted through Nyquist sampling, converting the digital signal into an analog signal through a digital-to-analog converter, and carrying out optical modulation to obtain an optical domain transmission signal. The optical domain transmitting signal reaches the receiving end through the optical fiber, and the coherent optical receiving is realized through the coherent receiver, namely, the receiving end can correspondingly receive the coherent optical signal transmitted by the transmitting end.
Step 102, generating an N symbol distortion signal LUT according to the coherent optical signal;
optionally, the step includes:
firstly, carrying out analog-to-digital conversion on the coherent optical signal to obtain a digital signal;
second, digital signal DSP (Digital Signal Processing ) processing the digital signal;
wherein the DSP processing includes one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation, and phase offset compensation.
Thirdly, separating training sequences in the processed digital signals;
fourth, the N-symbol distortion signal LUT is generated according to the training sequence and an LUT training generator.
Optionally, the training sequence is input into a LUT training generator, through which the N-symbol distortion signal LUT is generated.
For example, please refer to fig. 2, which shows a schematic diagram of one possible way of generating the N-symbol distortion signal LUT after the transmitting end transmits the signal to the receiving end.
The application generates the N-symbol distortion signal LUT by using the training sequence at the receiving end, so that the influence of the narrowband filtering of the transmitting end, other comprehensive channel responses and nonlinear damage on the characteristics of the original transmitted signal can be recorded, and the general equalization processing of equalization on various signal damage can be more effectively realized.
Step 103, calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity;
optionally, as a possible implementation manner, the step includes:
firstly, acquiring a sampling value of a middle column in the N-symbol distortion signal LUT;
the sample value of the middle column is obtained as follows:
secondly, calculating a difference value between the real part of the received signal and the real part of the acquired sampling value and taking an absolute value;
the first absolute value is:wherein y is k And->All are plural, y k For the received signal, < >>For the sampled value, real (y k ) For the real part of the received signal,is the real part of the sample value.
Thirdly, calculating a difference value between an imaginary part of the received signal and an imaginary part of the acquired sampling value and taking a second absolute value;
the second absolute value is:and->All are plural, y k For the received signal, < >>For the sampled value, imag (y k ) For the imaginary part of the received signal,is the imaginary part of the sample value.
Fourth, the sum of the two absolute values obtained by calculation is used as the branch metric value.
That is, in a first possible implementation, the branch metric value is:
in summary, in a first possible implementation manner, please refer to fig. 3, the difference is calculated by using the real part and the imaginary part, and then the distances between two right-angle edges in the absolute value calculation diagram are taken, and the difference between two complex points is calculated approximately, so that the use of multipliers can be eliminated and the number of adders can be reduced.
In a second possible implementation manner of this step, this step includes:
first, optimizing the N-symbol distortion signal LUT into a real LUT;
unlike the first possible implementation, in a second possible implementation, the complex N-symbol distortion signal LUT is replaced by a real LUT.
Secondly, acquiring a real sampling value of a middle column in the real LUT;
for example, the obtained real sample value is:
third, separating the received signal into a real signal and an imaginary signal;
the application separates the received signal into two paths, namely a real signal and an imaginary signal, for example, the received signal is a-bi, the separated real signal is a, and the imaginary signal is-b.
Fourth, for each signal obtained by separation, calculating the absolute value of the difference between the real part in each signal and the real sampling value;
in this step, the absolute value of the difference between the real part in each signal and the real sample value is calculated.
Specifically, for one signal, the absolute value obtained by calculation is:wherein y is k Andare all real signals, y k For separating the real part of each signal obtained, < >>To obtain the resulting real sample values.
Fifthly, determining the absolute value of the calculated difference value as the branch metric value.
The calculated score metric values are:
and 104, recovering the original data in the coherent optical signal by adopting an MLSE algorithm based on an N-symbol LUT according to the calculated branch metric value.
After the branch metric value is calculated, the original data in the coherent optical signal can be recovered according to the calculated branch metric value. Specifically, please refer to fig. 4, which illustrates a complete flow chart of the method of the present application, and as shown in fig. 4, the establishment of the transition state and the transition output grid, the accumulation of branch metric values, the comparison and the selection, the surviving path storage and the traceback output may be performed. This is similar to the restoration in the existing scheme and will not be described in detail here.
For example, in a second possible implementation manner, assuming that the modulation format is QPSK and the sequence detection length is 3, when the real and imaginary parts of the received signal are separated, for the LUT-MLSE technical scheme with the sequence detection length of 3, the total number of states of the real part and the imaginary part respectively adopting the MLSE algorithm is 2 2 And each.
As shown in fig. 5, when the input symbol at time T1 is "-1", the current 4 states are all shifted in state by the input of "-1", as indicated by the open arrow between time T1 and time T2. When the input symbol at time T1 is "1", the current 4 states all undergo a state transition due to the input of "1", as indicated by the solid arrow between time T1 and time T2.
For a modulation format of QPSK, an LUT with n=3 is shown in table 1, where epsilon is the pre-filtered symbol amplitude reduction factor and delta is the ISI the symbol receives from the adjacent symbol. As shown in fig. 6, a state transition diagram from time T1 to time T2 is shown. Different states can be calculated according to different input symbols
TABLE 1
Different branch metric values correspond to the first row in table 1 when the state is { -1, -1}, and the input symbol is "-1", and similarly correspond to the eighth row in table 1 when the state is {1,1}, and the input symbol is "1". Thus, the present application uses the sample values recorded in the look-up table as an estimate of the received signal and calculates the branch metric values. Also because of ISI introduced by narrow-band filtering, from the overlap of adjacent pulses, the middle column of the look-up table effectively records the correlation between the current time symbol and the adjacent symbols. In the prior proposal, only the first of LUTThe columns calculate the Euclidean distance, and therefore, the extensive multiplication and addition computation required to estimate the ideal output symbol using N tap coefficients in a conventional MLSE algorithm can be omitted. Therefore, the current LUT-MLSE scheme can effectively reduce the computational complexity compared with the traditional MLSE algorithm. However, this current approach still bases M and exponentiations N, which are exponentiations, still require significant computational complexity when M and N are large. In the application, the operation of calculating the Euclidean distance between the complex received signal and the complex LUT in the original scheme is replaced by the operation of taking the absolute value of the real difference value, thereby omittingThe originally needed real number multiplier greatly reduces the number of real number adders, and therefore, the complexity of the implementation of an integrated circuit chip and the running power consumption of a system are reduced.
At time T2, two branches will point to each state, and the larger branch is removed from the two branch values pointing to the state, and the other smaller branch is reserved, according to the Viterbi algorithm. States S0 to S1 remain as from time T1 to time T2, while the dashed lines of S2 to S1 are discarded. And so on, each state discards the branch with larger branch metric value and accumulates the branch metric value of the reserved branch at each moment. According to statistics and research, when the accumulated length reaches 5 times of the sequence detection length N, decoding performance is hardly lost. Therefore, in the example of the present application, at the time T16, the path with the smallest accumulated value is determined, and the input value at the time T1 is decoded back.
The expression of the branch metric calculation complexity in the existing LUT-MLSE system is as follows:
the number of real multipliers needed per bit is: n (N) rm1 ＝2×(M) N /log 2 M；
The number of real adders required per bit is: n (N) ra1 ＝3×(M) N /log 2 M。
The branch metric computation complexity of the first technical scheme in the application can be expressed as:
the number of real multipliers needed per bit is: n (N) rm2 ＝0；
The number of real adders required per bit is: n (N) ra2 ＝3×(M) N /log 2 M。
The branch metric computation complexity of the second technical scheme of the present application can be expressed as:
the number of real multipliers needed per bit is: n (N) rm3 ＝0；
The number of real adders required per bit is:
wherein in the above expressions, N is a sequence detection length and M is a modulation order.
In one possible implementation, the resulting real multiplication and real addition complexity is further refined to the digital hardware circuit level, specific to the number of PMOS and NMOS tubes, and real addition and real multiplication are implemented using binary adders and array multipliers, respectively. The application adopts a full adder of two input ends of serial binary to realize addition operation, and the expression of a logic function is as follows:
wherein A and B are inputs to the adder, C in Is the low-order advance number, sum is the home Sum, C out To advance to higher order, the symbolRepresenting an exclusive or operation. As shown in fig. 7, a full adder uses 2 xor gates and 3 logic nand gates, while in the logic gate circuit implementation, one xor gate is implemented by 2 transmission gates and 2 logic not gates, one transmission gate uses one NMOS and one PMOS, and one logic not gate uses one NMOS and one PMOS; one logical NAND gate will use 2 NMOS transistors and 2 PMOS transistors, so a full adder will be considered to use 14 NMOS transistors and 14 PMOS transistors. A basic S-bit binary serial carry adder can be composed of S full adders, and (14×S) NMOS transistors and (14×S) PMOS transistors are used.
For the multiplier, the multiplier has various types and various advantages in the implementation process of the digital circuit, the application selects the P multiplied by P array multiplier, and the implementation process of the 4 multiplied by 4 array multiplier is shown in figure 8, Y 0 Is the least significant bit of the multiplier, and is respectively multiplied withThe four bits of the number are 'and' to obtain partial product, then the partial product is input into the adder as the added number of each bit, the adder performs addition operation with the partial product obtained by the next stage, the adder inputs the carry of the previous bit, and then the carry of the current stage is output to the adder of the next bit. By means of a reasonably arranged adder array, the process of the multiplication principle can be simulated, and a multiplication result Z is output. It can be seen from the combination of fig. 8 that the overall circuit structure uses a logic and gate, a full adder and a half adder, one half adder is implemented by a logic and gate and an exclusive or gate, the logic and gate is implemented by 3 NMOS transistors and 3 PMOS transistors, and the aforementioned full adder logic implementation structure is combined, so that the implementation of a p×p array multiplier needs to use 17P 2 -21P NMOS transistors and 17P 2 -21P PMOS tubes.
As can be seen from the above description, the number of NMOS and PMOS corresponding to the calculation complexity of the branch metric in the prior art is shown in table 2, the number of NMOS and PMOS corresponding to the first scheme of the present application is shown in table 3, and the number of NMOS and PMOS corresponding to the second scheme of the present application is shown in table 4.
TABLE 2
TABLE 3 Table 3
TABLE 4 Table 4
In the above distance, when the modulation format is QPSK, the modulation order is m=4, the sequence detection length is n=5, the real multiplier bit number p=16, and the real adder bit number s=12, the computational complexity of the existing scheme and the technical scheme of the present proposal is:
1) The computational complexity of current LUT-MLSE system schemes:
the number of real multipliers needed per bit is: n (N) rm1 ＝1024
The number of real adders required per bit is: n (N) ra1 ＝1536
2) The calculation complexity of the first technical scheme in the application is as follows:
the number of real multipliers needed per bit is: n (N) rm2 ＝0
The number of real adders required per bit is: n (N) ra2 ＝1536
3) The calculation complexity of the second technical scheme in the application is as follows:
the number of real multipliers needed per bit is: n (N) rm3 ＝0
The number of real adders required per bit is: n (N) ra3 ＝32
The number of NMOS and PMOS corresponding to the calculation complexity of the branch metric in the prior art is shown in table 5, the number of NMOS and PMOS corresponding to the first scheme of the present application is shown in table 6, and the number of NMOS and PMOS corresponding to the second scheme of the present application is shown in table 7.
TABLE 5
TABLE 6
TABLE 7
In summary, according to the present application, the real and imaginary parts of the received signal are separated and corresponding real LUTs are generated, and the branch metric value is calculated by calculating the absolute value of the difference between the real and imaginary parts of the complex signal and the real LUTs, respectively, so that the calculation complexity and the number of NMOS and PMOS to be used are greatly reduced.
In addition, as shown in fig. 9, under the LUT-MLSE coherent optical communication system architecture, we have demonstrated in a simulation that 32GBd dual-polarization QPSK signal transmitted through a 4GHz narrowband filter is 800km, and the relationship between the input power of the optical fiber and the Q factor. From the experimental results, it can be seen that the operation of calculating the euclidean distance between complex numbers is replaced by the operation of taking absolute values of the real part and the imaginary part respectively and then adding the absolute values (i.e. the first scheme in the application), so that the system performance is hardly changed.
As shown in fig. 10, we experimentally verify the 400km optical fiber transmission of 32GBd dual-polarization QPSK signal through a 4GHz narrowband filter. Fig. 10 shows that the operation of calculating the euclidean distance between complex numbers in the current LUT-MLSE technical scheme is replaced by a simple operation of taking the absolute value of a real number (i.e. the second scheme in the present application), so that the Q factor performance is hardly degraded, a real number multiplier can be omitted, and meanwhile, the number of real number adders can be greatly reduced, thereby effectively reducing the complexity and the power consumption of the corresponding optical communication integrated circuit chip.
As can be seen from a comparison of fig. 9 and fig. 10, the first technical solution proposed by the present disclosure and the second technical solution further optimized by the present disclosure show that in experimental verification, the system performance is hardly degraded, that is, the complexity of the solution provided by the present disclosure is reduced on the premise that the system is hardly changed.
In summary, in a coherent optical communication system, a coherent optical signal is received; generating an N-symbol distortion signal LUT according to the coherent optical signal; calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity; and recovering the original data in the coherent optical signal by adopting an MLSE algorithm based on N symbols according to the calculated branch metric value. The method solves the problem of higher calculation complexity in the prior art, achieves the operation of replacing the Euclidean distance between complex numbers with the absolute value of the difference between the real numbers, reduces the calculation complexity required by calculating the branch metric value, and effectively reduces the complexity and the power consumption of the corresponding optical communication integrated circuit chip.
The present application also provides an apparatus for optimizing the complexity of a look-up table based MLSE algorithm, said apparatus comprising a memory having stored therein at least one program instruction and a processor for implementing the method as described above by loading and executing said at least one program instruction.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (7)
1. A method of optimizing the complexity of a look-up table based MLSE algorithm, the method comprising:
in a coherent optical communication system in which a signal at a transmitting end is subjected to narrow-band filtering, receiving a coherent optical signal;
generating an N-symbol distortion signal LUT according to the coherent optical signal;
calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT and a calculation scheme of the optimization complexity; the calculating the branch metric value according to the received signal, the N-symbol distortion signal LUT and the calculation scheme of the optimization complexity includes: acquiring a sampling value of a middle column in the N-symbol distortion signal LUT; calculating the difference between the real part of the received signal and the real part of the acquired sampling value and taking an absolute value; calculating the difference between the imaginary part of the received signal and the imaginary part of the acquired sampling value and taking an absolute value; taking the sum of the two absolute values obtained by calculation as the branch metric value;
and recovering the original data in the coherent optical signal by adopting an MLSE algorithm based on an N-symbol LUT according to the calculated branch metric value.
2. The method according to claim 1, wherein said taking the sum of the two calculated absolute values as the branch metric value comprises:
the branch metric value is:
wherein y is k Andall are plural, y k For the received signal, < >>For the sampled value, real (y k ) For the real part of the received signal, imag (y k ) For the imaginary part of the received signal, +.>For the real part of the sample value, < > for>Is the imaginary part of the sample value.
3. The method of claim 1, wherein the calculating branch metric values according to the received signal, the N-symbol distortion signal LUT, and a calculation scheme of an optimization complexity comprises:
optimizing the N-symbol distortion signal LUT to be a real number LUT;
acquiring a real sampling value of a middle column in the real LUT;
separating the received signal into a real signal and an imaginary signal;
for each path of signals obtained through separation, calculating a difference value between a real part in each path of signals and the real sampling value, and calculating an absolute value;
and determining the absolute value of the calculated difference value as the branch metric value.
4. A method according to claim 3, wherein said determining the absolute value of the calculated difference as the branch metric value comprises:
the branch metric value is:
wherein y is k Andare all real signals, y k To separate the real part of each signal obtained,to obtain the resulting real sample values.
5. The method of claim 1, wherein said generating an N-symbol distortion signal LUT from said coherent optical signal comprises:
performing analog-to-digital conversion on the coherent optical signal to obtain a digital signal;
performing digital signal processing on the digital signal;
separating training sequences in the processed digital signals;
and generating the N-symbol distortion signal LUT according to the training sequence and an LUT training generator.
6. The method of claim 5, wherein the DSP processing includes one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation, and phase offset compensation.
7. An apparatus for optimizing the complexity of a look-up table based MLSE algorithm, said apparatus comprising a memory having stored therein at least one program instruction and a processor for implementing the method of any one of claims 1 to 6 by loading and executing said at least one program instruction.
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