CN115242584A - Method and device for optimizing MLSE algorithm complexity based on lookup table - Google Patents
Method and device for optimizing MLSE algorithm complexity based on lookup table Download PDFInfo
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Abstract
The application discloses a method and a device for optimizing MLSE algorithm complexity based on a lookup table, which relate to the technical field of signal processing, and the method comprises the following steps: receiving a coherent optical signal in a coherent optical communication system with a transmitting end signal subjected to narrow-band filtering; generating an N symbol distortion signal LUT according to the coherent optical signal; calculating branch metric values according to the received signals, the N symbol distortion signal LUT and a calculation scheme of optimization complexity; and recovering original data in the coherent optical signal by utilizing an MLSE algorithm based on an LUT according to the branch metric value obtained by calculation. The problem of higher computational complexity in the existing MLSE technology is solved, the operation of replacing the calculation of Euclidean distance with the calculation of the difference value between a received signal and an N symbol LUT and taking an absolute value is achieved, the computational complexity required in the digital signal processing process is reduced, and therefore the complexity and the power consumption of a corresponding optical communication integrated circuit chip are reduced.
Description
Technical Field
The invention relates to a method and a device for optimizing the complexity of an MLSE algorithm based on a lookup table, and belongs to the technical field of signal processing.
Background
Since the optical communication system combining pre-filtering and sequence detection has the advantages of high performance, high spectral efficiency and the like, the method for receiving end sequence detection has been widely applied to the research of the pre-filtering optical communication system. The sequence detection algorithm is a method for effectively equalizing inter-symbol interference (ISI), so that severe ISI introduced by narrow-band filtering in a coherent optical communication system with narrow-band filtering can be effectively eliminated by the sequence detection algorithm. The Maximum Likelihood Sequence Estimation (MLSE) algorithm is a commonly used Sequence detection algorithm, and the current MLSE algorithm is implemented based on a Viterbi (Viterbi) algorithm, and at first, a channel Estimation is required at a receiving end to obtain a channel impulse response, and the channel response is used as a weighted value of a branch metric value calculated in a grid graph to estimate an expected received signal, and finally, the Viterbi algorithm is adopted to sequentially restore original data.
In the existing scheme, by using an N-symbol distortion signal LUT to record multi-symbol correlation characteristics introduced by narrow-band filtering and guiding an MLSE process of a receiving end, ISI introduced by pre-filtering can be effectively equalized. The specific scheme is as follows: LUT-MLSE system, with LUT only the second
The Euclidean distance is calculated by columns, so that a large number of multiplication and addition calculation processes required by the traditional MLSE algorithm for estimating ideal output symbols by adopting N tap coefficients can be omitted. Therefore, compared with the traditional MLSE algorithm, the current LUT-MLSE scheme can effectively reduce the computational complexity. However, the technical complexity of the current scheme is still based on M and exponentially increased by N, and when M and N are larger, a larger computational complexity is still required.
Disclosure of Invention
The invention aims to provide a method and a device for optimizing the complexity of an MLSE algorithm based on a lookup table, which are used for solving the problems in the prior art.
In order to achieve the purpose, the invention provides the following technical scheme:
according to a first aspect, an embodiment of the present invention provides a method for optimizing complexity of a look-up table based MLSE algorithm, where the method includes:
receiving a coherent optical signal in a coherent optical communication system with a transmitting end signal subjected to narrow-band filtering;
generating an N symbol distortion signal LUT according to the coherent optical signal;
calculating branch metric values according to the received signals, the N symbol distortion signal LUT and a calculation scheme of optimization complexity;
and recovering original data in the coherent optical signal according to the branch metric value obtained by calculation.
Optionally, the calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT, and a calculation scheme of optimization complexity includes:
acquiring a sampling value of a middle column in the N-symbol distortion signal LUT;
calculating the difference value between the real part of the received signal and the real part of the obtained sampling value and taking an absolute value;
calculating a difference value between an imaginary part of the received signal and an imaginary part of the obtained sampling value and taking an absolute value;
and taking the sum of the two absolute values obtained by calculation as the branch metric value.
Optionally, the using the sum of the two absolute values obtained by calculation as the branch metric value includes:
the branch metric values are:
wherein, y k And
are all plural, y k In order to be able to receive the signal,
for the sampled value real (y) k ) For the real part of the received signal, imag (y) k ) Is the imaginary part of the received signal,
is the real part of the sample value in question,
is the imaginary part of the sample value.
Optionally, the calculating a branch metric value according to the received signal, the N-symbol distortion signal LUT, and a calculation scheme of optimization complexity includes:
transforming the N-symbol distortion signal LUT into a real LUT;
acquiring a real number sampling value of a middle column in the real number LUT;
separating the received signal into a real part signal and an imaginary part signal;
for each path of signals obtained by separation, calculating the absolute value of the difference value between the real part in each path of signals and the real number sampling value;
and determining the absolute value of the calculated difference value as the branch metric value.
Optionally, the determining an absolute value of the calculated difference as the branch metric value includes:
the branch metric values are:
wherein, y k And
are all real signals, y k To separate the real part of each resulting signal,
to obtain the real number sample value.
Optionally, the generating an N-symbol distortion signal LUT from the coherent optical signal includes:
performing analog-to-digital conversion on the coherent light signal to obtain a digital signal;
performing digital signal processing on the digital signal;
separating the training sequence in the processed digital signal;
and generating the N symbol distortion signal LUT according to the training sequence and the LUT training generator.
Optionally, the DSP processing includes one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation, and phase offset compensation.
In a second aspect, there is provided an apparatus for optimizing complexity of a look-up table based MLSE algorithm, the apparatus comprising a memory and a processor, the memory having at least one program instruction stored therein, the processor implementing the method according to the first aspect by loading and executing the at least one program instruction.
By receiving a coherent optical signal in a coherent optical communication system; generating an N symbol distortion signal LUT according to the coherent optical signal; calculating branch metric values according to the received signals, the N symbol distortion signal LUT and a calculation scheme of optimization complexity; and recovering original data in the coherent optical signal according to the branch metric value obtained by calculation. The problem of higher computational complexity in the prior art is solved, the operation of replacing the calculation of the Euclidean distance with the calculation of the absolute value of the difference value between the real and imaginary parts of the complex signal and the real number LUT is achieved, the required computational complexity in the digital signal processing process is reduced, and therefore the complexity and the power consumption of the corresponding optical communication integrated circuit chip are reduced.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical solutions of the present invention more clearly understood and to implement them in accordance with the contents of the description, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
FIG. 1 is a flowchart of a method for optimizing complexity of a look-up table based MLSE algorithm according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a possible method for generating an N-symbol distortion signal LUT after a signal is transmitted from a transmitting end to a receiving end and received by the receiving end according to an embodiment of the present invention;
fig. 3 is a schematic diagram of calculating branch metric values in a first solution according to an embodiment of the present invention;
fig. 4 is a schematic diagram of the whole process of signal processing at the receiving end according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating one possible state transition provided by an embodiment of the present invention;
fig. 6 is a state transition diagram from time T1 to time T2 according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of one possible logic gate circuit of a full adder according to one embodiment of the invention;
FIG. 8 is a schematic diagram of one possible logic gate circuit of an array multiplier according to one embodiment of the present invention;
FIG. 9 is a schematic diagram illustrating a comparison of system performance between a prior art solution and the first solution of the present application, according to an embodiment of the present invention;
fig. 10 is a schematic diagram showing a comparison of system performance between the prior art solution and the second solution in the present application according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it is to be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in a specific case to those of ordinary skill in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, which shows a flowchart of a method for optimizing complexity of a look-up table based MLSE algorithm according to an embodiment of the present application, as shown in fig. 1, the method includes:
the method of the present application is used in a coherent optical communication system, and the present application mainly introduces a signal processing method at a receiving end. The following method is used in a receiving end of a coherent optical communication system based on QPSK (Quadrature Phase Shift Keying) modulation, unless otherwise specified.
Optionally, the original binary bit stream is mapped into QPSK symbols at the transmitting end, and the filtered QPSK signal is obtained through a narrow-band filter. And then, acquiring a digital signal to be transmitted through Nyquist sampling, converting the digital signal through a digital-to-analog converter to acquire an analog signal, and performing optical modulation to acquire an optical domain transmission signal. The optical domain transmission signal reaches a receiving end through an optical fiber, and coherent light receiving is realized through a coherent receiver, namely the receiving end can correspondingly receive the coherent light signal transmitted by the transmitting end.
102, generating an N symbol distortion signal LUT according to the coherent optical signal;
optionally, this step includes:
firstly, performing analog-to-digital conversion on the coherent optical signal to obtain a digital signal;
secondly, performing Digital Signal DSP (Digital Signal Processing) Processing on the Digital Signal;
the DSP processing comprises one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation and phase offset compensation.
Thirdly, separating training sequences in the processed digital signals;
fourthly, generating the N symbol distortion signal LUT according to the training sequence and the LUT training generator.
Optionally, the training sequence is input into a LUT training generator, and an N-symbol distortion signal LUT is generated by the LUT training generator.
For example, please refer to fig. 2, which shows a possible schematic diagram of generating an N-symbol distortion LUT after a signal is transmitted from a transmitting end to a receiving end and received.
According to the method and the device, the training sequence is used at the receiving end to generate the LUT, so that the influence of narrow-band filtering, other comprehensive channel responses and nonlinear damage of the transmitting end on the characteristics of the original transmitted signal can be recorded, and the general equalization processing of equalization on various signal damages is more effectively realized.
103, calculating branch metric values according to a received signal, the N symbol distortion signal LUT and a calculation scheme of optimization complexity;
optionally, as a possible implementation manner, this step includes:
firstly, obtaining a sampling value of a middle column in the N-symbol distortion signal LUT;
the sampling values obtained in the middle column are:
secondly, calculating a difference value between the real part of the received signal and the real part of the acquired sampling value and taking an absolute value;
the first absolute value is:
wherein, y k And
are all plural, y k In order to be able to receive the signal,
for the sampled value real (y) k ) Is the real part of the received signal,
is the real part of the sample value.
Thirdly, calculating a difference value between the imaginary part of the received signal and the imaginary part of the obtained sampling value and taking a second absolute value;
the second absolute value is:
and
are all plural, y k In order to be able to receive the signal,
for the sampled value imag (y) k ) Is the imaginary part of the received signal,
is the imaginary part of the sample value.
Fourthly, the sum of the two absolute values obtained by calculation is used as the branch metric value.
That is, in a first possible implementation, the branch metric value is:
in summary, in a first possible implementation manner, please refer to fig. 3, the real part and the imaginary part are used to calculate difference values respectively, then the absolute value is taken to calculate the distance between two right-angle sides in the graph, and the difference value between two complex points is calculated approximately, so that the use of the multiplier can be eliminated and the number of adders can be reduced.
In a second possible implementation manner of this step, this step includes:
firstly, optimizing the N symbol distortion signal LUT into a real number LUT;
unlike the first possible implementation, in the second possible implementation, the complex N-symbol distortion signal LUT is replaced by a real LUT.
Secondly, acquiring a real number sampling value of a middle column in the real number LUT;
for example, the obtained real number sampling value is:
thirdly, separating the received signal into a real part signal and an imaginary part signal;
the received signal is a complex signal, and the received signal is separated into a real part signal and an imaginary part signal, for example, if the received signal is a-bi, the separated real part signal is a, and the imaginary part signal is-b.
Fourthly, calculating the absolute value of the difference value between the real part in each path of signals and the real sampling value for each path of signals obtained by separation;
in this step, the absolute value of the difference between the real part in each signal and the real sample value is calculated.
Specifically, for a single-path signal, the absolute value obtained by calculation is as follows:
wherein, y k And
are all real signals, y k To separate the real part in each of the resulting signals,
to obtain the resulting real sample value.
And fifthly, determining the absolute value of the calculated difference value as the branch metric value.
The calculated score metric is:
and step 104, recovering original data in the coherent optical signal by adopting an MLSE algorithm based on an N-symbol LUT according to the branch metric value obtained by calculation.
After the branch metric value is obtained through calculation, the original data in the coherent optical signal can be restored according to the branch metric value obtained through calculation. Specifically, referring to fig. 4, which shows a complete flow chart of the method described in the present application, as shown in fig. 4, establishment of a transition state and a transition output trellis, accumulation of branch metric values + comparison + selection, survivor path storage, and backtracking output may be performed. This is similar to the recovery method in the prior art and will not be described herein.
For example, in a second possible implementation manner, assuming that the modulation format is QPSK and the sequence detection length is 3, after the real and imaginary parts of the received signal are separated, for the LUT-MLSE solution with the sequence detection length of 3, the total number of states in which the real part and the imaginary part respectively use the MLSE algorithm is 2 2 And (4) respectively.
As shown in FIG. 5, when the input symbol at time T1 is "-1", the current 4 states will all have state transitions due to the input "-1", as indicated by the open pointed arrows between time T1 and time T2. When the input symbol at time T1 is "1", the current 4 states will all have state transitions due to the input "1", as indicated by the solid arrowhead between times T1 and T2.
For a QPSK modulation format, a LUT of N =3 is shown in table 1, where epsilon is the pre-filtered symbol amplitude reduction factor and delta is the ISI a symbol is subjected to from adjacent symbols. As shown in fig. 6, a state transition diagram from time T1 to time T2 is shown. Different states, based on different input symbols, can be calculated
TABLE 1
The different branch metric values correspond to the first row in table 1 when the state is { -1, -1} and the input symbol is "-1", and similarly correspond to the eighth row in table 1 when the state is {1,1} and the input symbol is "1". Therefore, the present application utilizes the sampled values recorded in the look-up table as an estimate of the received signal and calculates the branch metric value. Also, because the ISI introduced by narrow-band filtering comes from the overlap of adjacent pulses, the middle column in the look-up table effectively records the correlation between the symbol at the current time and the adjacent symbols. In the prior art, only the second of LUT
The Euclidean distance is calculated by columns, so that a large number of multiplication and addition calculation processes required by the traditional MLSE algorithm for estimating ideal output symbols by adopting N tap coefficients can be saved. Therefore, compared with the traditional MLSE algorithm, the current LUT-MLSE scheme can effectively reduce the computational complexity. However, the current solution is still based on M,n grows exponentially, and when M and N are large, still large computational complexity is required. In the application, the operation of calculating the euclidean distance between the complex number receiving signal and the complex number LUT in the original scheme is replaced by the operation of taking the absolute value of the real number difference, so that the originally required real number multiplier is omitted, the number of real number adders is greatly reduced, and the implementation complexity of the integrated circuit chip and the system operation power consumption are reduced.
At time T2, two branches point to each state, and the larger branch is removed from the two branch values pointing to that state and the other smaller branch is retained according to the Viterbi algorithm. From time T1 to time T2, states S0 to S1 remain, while the dashed lines from S2 to S1 are discarded. And so on, at each moment, each state respectively abandons the branch with larger branch metric value, and accumulates the branch metric values of the retained branches. According to statistics and studies, when the accumulation length reaches 5 times the sequence detection length N, there is almost no loss of decoding performance. Therefore, in the example of the present application, at the time T16, the path with the minimum accumulated value is determined, and the input value at the time T1 is decoded back.
The expression of the computational complexity of branch metrics in the existing LUT-MLSE system is as follows:
the number of real multipliers required per bit is: n is a radical of hydrogen rm1 ＝2×(M) N /log 2 M；
The number of real adders required per bit is: n is a radical of hydrogen ra1 ＝3×(M) N /log 2 M。
The branch metric computation complexity of the first technical solution in this application can be expressed as:
the number of real multipliers required per bit is: n is a radical of rm2 ＝0；
The number of real adders required per bit is: n is a radical of ra2 ＝3×(M) N /log 2 M。
The branch metric computation complexity of the second technical solution of the present application can be expressed as:
the number of real multipliers required per bit is: n is a radical of rm3 ＝0；
The number of real adders required per bit is:
in each expression, N is a sequence detection length, and M is a modulation order.
In a possible implementation manner, the complexity of the obtained real number multiplication and real number addition is further refined to the level of a digital hardware circuit, the complexity is specifically set to the number of PMOS tubes and NMOS tubes, and the real number addition and the real number multiplication are respectively realized by adopting a binary adder and an array multiplier. The application adopts a full adder with a serial binary input end to realize addition operation, and the logic function expression of the full adder is as follows:
where A and B are the inputs to the adder, C in Is a low carry, sum is a local Sum, C out For advancing to higher order, sign
Representing an exclusive or operation. As shown in fig. 7, a full adder may use 2 exclusive or gates and 3 nand gates, and in the implementation of a logic gate circuit, an exclusive or gate is implemented by using 2 transmission gates and 2 not gates, one transmission gate uses one NMOS transistor and one PMOS transistor, and one not gate uses one NMOS transistor and one PMOS transistor; 2 NMOS transistors and 2 PMOS transistors are used for one logic NAND gate, so that 14 NMOS transistors and 14 PMOS transistors are used for one full adder in view of the above. A basic S-bit binary string carry bit adder may be composed of S full adders, which will use (14 × S) NMOS transistors and (14 × S) PMOS transistors.
For the multiplier, the multiplier has various kinds in the implementation process of the digital circuit, and each has advantages and disadvantages, the application selects the array multiplier of P × P, and as shown in fig. 8, the implementation process of a 4 × 4 array multiplier, Y 0 The least significant bit of the multiplier is respectively AND-ed with four bits of the multiplicand to obtain partial products, then the partial products are used as the added number of each bit and input into the adder, the added number is added with the partial product obtained in the next stage, the adder can input the carry of the previous bit, and then the carry of the current stage is output into the adder of the next stage. Through the reasonably arranged adder array, the process of the multiplication principle can be simulated, and the multiplication result Z is output. It can be seen from fig. 8 that the whole circuit structure includes logic and gates, full adders and half adders, one half adder is implemented by one logic and gate and xor gate, the implementation of the logic and gate includes 3 NMOS transistors and 3 PMOS transistors, and the above-mentioned logic implementation structure of the full adder is combined, so that the implementation of a P × P array multiplier requires 17P 2 -21P NMOS transistors and 17P 2 21P PMOS tubes.
As can be seen from the above description, in the prior art, the number of NMOS and PMOS corresponding to the calculation complexity of the branch metric value is shown in table 2, the number of NMOS and PMOS corresponding to the first scheme of the present application is shown in table 3, and the number of NMOS and PMOS corresponding to the second scheme of the present application is shown in table 4.
TABLE 2
TABLE 3
TABLE 4
In the above distance, when the modulation format is QPSK, the modulation order is M =4, the sequence detection length is N =5, the number of bits of the real multiplier is P =16, and the number of bits of the real adder is S =12, the computation complexity of the existing scheme and the technical scheme of the present proposal is:
1) Computational complexity of current LUT-MLSE system schemes:
the number of real multipliers required per bit is: n is a radical of rm1 ＝1024
The number of real adders required per bit is: n is a radical of hydrogen ra1 ＝1536
2) The computational complexity of the first technical solution in this application is:
the number of real multipliers required per bit is: n is a radical of hydrogen rm2 ＝0
The number of real adders required per bit is: n is a radical of ra2 ＝1536
3) The computational complexity of the second technical solution in this application:
the number of real multipliers required per bit is: n is a radical of rm3 ＝0
The number of real adders required per bit is: n is a radical of ra3 ＝32
In the prior art, the number of NMOS and PMOS corresponding to the computational complexity of the branch metric is shown in table 5, the number of NMOS and PMOS corresponding to the first scheme of the present application is shown in table 6, and the number of NMOS and PMOS corresponding to the second scheme of the present application is shown in table 7.
TABLE 5
TABLE 6
TABLE 7
In summary, in the present application, the computation complexity and the number of NMOS and PMOS required to be used are greatly reduced by separating the real and imaginary parts of the received signal and generating the corresponding real LUT, and then calculating the absolute value of the difference between the real and imaginary parts of the complex signal and the real LUT respectively.
In addition, as shown in fig. 9, under the LUT-MLSE coherent optical communication system architecture, we simulated and demonstrated the relationship between the fiber input power and the Q factor for 800km of 32GBd dual-polarization QPSK signal transmission passing through a 4GHz narrow-band filter. From the experimental results, it can be seen that the system performance is hardly changed by replacing the operation of calculating the euclidean distance between the complex number and the real part with the operation of taking absolute values of the real part and the imaginary part respectively and then adding the absolute values (i.e. the first scheme in the present application).
As shown in fig. 10, we experimentally verified the transmission of a 32GBd dual-polarization QPSK signal 400km over a 4GHz narrowband filter. Fig. 10 shows that the operation of calculating the euclidean distance between complex numbers in the current LUT-MLSE solution is replaced by a simple operation of taking the absolute value of a real number (i.e., the second solution in the present application), so that the Q factor performance is hardly degraded, the real number multiplier can be omitted, and the number of real number adders is greatly reduced, thereby effectively reducing the complexity and power consumption of the corresponding optical communication integrated circuit chip.
From the comparison between fig. 9 and fig. 10, it can be found that, in the first technical solution proposed by the present disclosure and the second technical solution further optimized by the present disclosure, in experimental verification, the system performance is hardly degraded, that is, the solution provided by the present disclosure reduces the complexity on the premise that the system is hardly changed.
In summary, in the coherent optical communication system, a coherent optical signal is received; generating an N symbol distortion signal LUT according to the coherent optical signal; calculating branch metric values according to the received signals, the LUT and the calculation scheme of the optimization complexity; and recovering original data in the coherent optical signal by adopting an MLSE algorithm based on N symbols according to the branch metric value obtained by calculation. The problem of higher computational complexity in the prior art is solved, the operation of replacing the Euclidean distance between the complex number and the complex number by the absolute value of the difference value between the real number and the real number is calculated, and the computational complexity required for calculating the branch metric value is reduced, so that the complexity and the power consumption of the corresponding optical communication integrated circuit chip are effectively reduced.
The present application further provides an apparatus for optimizing complexity of a look-up table based MLSE algorithm, the apparatus comprising a memory and a processor, the memory having at least one program instruction stored therein, the processor implementing the method as described above by loading and executing the at least one program instruction.
All possible combinations of the technical features of the above embodiments may not be described for the sake of brevity, but should be considered as within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that various changes and modifications can be made by those skilled in the art without departing from the spirit of the invention, and these changes and modifications are all within the scope of the invention. Therefore, the protection scope of the present patent should be subject to the appended claims.
Claims (8)
1. A method of optimizing complexity of a look-up table based MLSE algorithm, the method comprising:
receiving a coherent optical signal in a coherent optical communication system with a transmitting end signal subjected to narrow-band filtering;
generating an N symbol distortion signal LUT according to the coherent optical signal;
calculating branch metric values according to the received signals, the N symbol distortion signal LUT and a calculation scheme of optimization complexity;
and recovering original data in the coherent light signal by adopting an MLSE algorithm based on an N-symbol LUT according to the branch metric value obtained by calculation.
2. The method of claim 1, wherein the calculating branch metric values based on the received signal, the N-symbol distortion signal LUT, and a computation scheme for optimizing complexity comprises:
acquiring a sampling value of a middle column in the LUT;
calculating the difference value between the real part of the received signal and the real part of the obtained sampling value and taking an absolute value;
calculating a difference value between an imaginary part of the received signal and an imaginary part of the obtained sampling value and taking an absolute value;
and taking the sum of the two absolute values obtained by calculation as the branch metric value.
3. The method of claim 2, wherein said using the sum of the two absolute values as the branch metric value comprises:
the branch metric values are:
wherein, y k And
are all plural, y k In order to be able to receive the signal,
for the sampled value real (y) k ) For the real part of the received signal, imag (y) k ) Is the imaginary part of the received signal,
is the real part of the sample value in question,
is the imaginary part of the sample value.
4. The method of claim 1, wherein calculating branch metric values based on the received signal, the N-symbol distortion signal LUT, and a complexity-optimized calculation scheme comprises:
optimizing the N-symbol distortion signal LUT into a real number LUT;
acquiring a real number sampling value of a middle column in the real number LUT;
separating the received signal into a real part signal and an imaginary part signal;
for each path of signals obtained by separation, calculating a difference value between a real part in each path of signals and the real number sampling value, and calculating an absolute value;
and determining the absolute value of the calculated difference value as the branch metric value.
5. The method of claim 4, wherein determining the absolute value of the calculated difference as the branch metric value comprises:
the branch metric values are:
wherein, y k And
are all real signals, y k To separate the real part in each of the resulting signals,
to obtain the resulting real sample value.
6. The method of claim 1, wherein generating an N-symbol distortion signal LUT from the coherent optical signal comprises:
performing analog-to-digital conversion on the coherent light signal to obtain a digital signal;
performing digital signal processing on the digital signal;
separating the training sequence in the processed digital signal;
and generating the N-symbol distortion signal LUT according to the training sequence and the LUT training generator.
7. The method of claim 6, wherein the DSP processing comprises one or more of dispersion compensation, clock recovery, polarization demultiplexing, polarization mode dispersion compensation, frequency offset compensation, and phase offset compensation.
8. An apparatus for optimizing complexity of a look-up table based MLSE algorithm, the apparatus comprising a memory having at least one program instruction stored therein and a processor that implements the method of any of claims 1 to 7 by loading and executing the at least one program instruction.
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