CN115238616A - Automatic modification method and device for chip netlist and electronic equipment - Google Patents
Automatic modification method and device for chip netlist and electronic equipment Download PDFInfo
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Abstract
The embodiment of the application provides a method, a device and electronic equipment for automatically modifying a chip netlist, wherein a modification path is obtained based on the connection relationship between an abnormal node and a node to be modified in the chip netlist, the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing abnormal output of the abnormal node; analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object in a data dictionary; based on the modification path, querying a data dictionary to obtain a target object to be modified, wherein the target object is a Cell object and/or a Pin object; and modifying the file of the chip netlist according to the modification script aiming at the target object. Compared with the prior art, the method has the advantages that the positions needing to be modified in the files of the chip netlist are automatically identified based on the modification path, the modification of the files of the chip netlist is completed according to the modification script, and the risk and the workload of secondary errors caused by manual modification of the chip netlist can be reduced.
Description
Technical Field
The present application relates to the field of chip design technologies, and in particular, to a method and an apparatus for automatically modifying a chip netlist, and an electronic device.
Background
The chip design process is usually complicated, and can be briefly described as follows: a logic designer uses a hardware description language to complete coding according to business requirements to obtain an RTL (Register Transfer Level, register Transfer) Level circuit, the RTL Level circuit is converted into a netlist according to a basic circuit unit library and constraint conditions (circuit area, time sequence and the like) provided by a chip manufacturer by using a comprehensive tool after continuous simulation, verification and optimization of the RTL Level circuit, and after subsequent verification (such as functional verification and circuit function unchanged in the synthesis process) is completed, a physical designer uses the tool to complete layout and wiring (tapeout) and other works according to a netlist file, and finally a layout is generated for a chip manufacturer to produce.
The complexity of the chip design flow leads to low fault tolerance rate of the whole process, when the chip design is found to have defects, if the design scheme is modified from the beginning, the chip design cost is increased, and the project cycle is prolonged, so that the market opportunity is missed. In this case, an ECO (Engineering Change Order) method is generally adopted: after the chip is changed and the design is not needed to be laid out again, the net list is updated by manually deleting or adding cells (basic modules in the chip design) and nets (connecting lines between two Cell ports). The behaviour of the ECO varies according to the working phase, for example: before tapeout, the limitation is less, and the modification of the netlist does not influence the working propulsion of the subsequent stage; if tapeout is already performed, the problem that whether the number of the newly added cells exceeds the reserved number needs to be considered, and the modification difficulty is increased. Because of manual modification, the whole process of ECO is relatively complicated and complex, and the general process comprises the following steps: 1. analyzing RTL codes needing to be modified; 2. analyzing the corresponding netlist structure and determining a modification scheme; 3. writing an ECO modification script (engineering modification script) manually and modifying the netlist; 4. and (5) formally verifying the modification feasibility, and if the modification feasibility fails, returning to the step 1 until the requirement is met. The ECO modification script refers to a command combination in a format which can be recognized by a netlist modification tool, and the command combination is executed through the tool so as to achieve the purpose of modifying the netlist.
In the existing ECO method, corresponding nodes need to be found from a huge (GB-level capacity) netlist file manually, and then an ECO modification script is compiled manually, if too many modification points exist, the fault tolerance rate of manually modifying a chip netlist is very low, the risk of introducing secondary errors exists, and the workload is very large.
Disclosure of Invention
The embodiment of the application aims to provide a method, a device and electronic equipment for automatically modifying a chip netlist, so as to reduce the risk and workload of secondary errors caused by manually modifying the chip netlist. The specific technical scheme is as follows:
in a first aspect, an embodiment of the present application provides a method for automatically modifying a chip netlist, where the method includes:
acquiring a modification path based on the connection relation between an abnormal node and a node to be modified in a chip netlist, wherein the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing the abnormal node to output abnormally;
analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object in a data dictionary;
inquiring the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object;
and modifying the file of the chip netlist according to the modification script aiming at the target object.
In a possible implementation manner, the obtaining a modification path based on a connection relationship between an abnormal node and a node to be modified in the chip netlist includes:
responding to an abnormal node selection instruction of a user, and determining an abnormal node with abnormal output in the chip netlist;
responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormity in the chip netlist;
in the chip netlist, for each node, according to the sequence from a network connection line to an output port to a Cell to an input port to a network connection line, reverse searching step by step from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
In a possible implementation manner, the parsing the file of the chip netlist to obtain each Cell object and Pin object, and storing the Cell objects and the Pin objects in a data dictionary includes:
determining the name of the module where the node to be modified is located to obtain a target module;
reading the files of the target modules of the chip netlist line by line;
judging whether the currently read row contains a preset ending keyword or not;
if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row;
creating a Pin object of the Cell object based on the port of the Cell object, and adding the Pin object under the Cell object;
acquiring each output port of the Cell object, taking each output port of the Cell object as a keyword key, taking the Cell object as a value, obtaining an analysis file, and storing the analysis file in a data dictionary;
and if the currently read line contains the preset ending keyword, ending the analysis.
In a possible implementation manner, the querying the data dictionary to obtain the target object to be modified based on the modification path includes:
querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried;
acquiring input port Pin objects under the currently inquired Cell object, and selecting the input port Pin object corresponding to the modification path from the input port Pin objects;
taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched;
and determining a target object to be modified aiming at the Cell object of the node to be modified.
In a possible embodiment, the modifying the file of the chip netlist according to the modification script for the target object includes:
integrating modification scripts of all modification paths to obtain an engineering modification script aiming at the chip netlist;
and operating the engineering modification script to modify the file of the chip netlist.
In a second aspect, an embodiment of the present application provides an apparatus for automatically modifying a chip netlist, where the apparatus includes:
the device comprises an acquisition module, a modification module and a processing module, wherein the acquisition module is used for acquiring a modification path based on the connection relation between an abnormal node and a node to be modified in a chip netlist, the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing the abnormal node to output abnormal;
the storage module is used for analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object into a data dictionary;
the query module is used for querying the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object;
and the modification module is used for modifying the file of the chip netlist according to the modification script aiming at the target object.
In a possible implementation manner, the obtaining module is specifically configured to: responding to an abnormal node selection instruction of a user, and determining an abnormal node with abnormal output in the chip netlist; responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormity in the chip netlist; in the chip netlist, for each node, according to the sequence from a network connection line to an output port to a Cell to an input port to a network connection line, reverse searching step by step from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
In a possible implementation manner, the storage module is specifically configured to: determining the name of the module where the node to be modified is located to obtain a target module; reading the files of the target modules of the chip netlist line by line; judging whether the currently read row contains a preset ending keyword or not; if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row; creating a Pin object of the Cell object based on the port of the Cell object, and adding the Pin object under the Cell object; acquiring each output port of the Cell object, taking each output port of the Cell object as a keyword key, taking the Cell object as a value, obtaining an analysis file, and storing the analysis file in a data dictionary; and if the currently read line contains the preset ending keyword, ending the analysis.
In a possible implementation manner, the query module is specifically configured to: querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried; acquiring input port Pin objects under the currently inquired Cell object, and selecting the input port Pin object corresponding to the modification path from the input port Pin objects; taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched; and determining a target object to be modified aiming at the Cell object of the node to be modified.
In a possible implementation, the modifying module is specifically configured to: integrating the modification scripts of all the modification paths to obtain an engineering modification script for the chip netlist; and operating the engineering modification script to modify the file of the chip netlist.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor and the communication interface complete communication between the memory and the processor through the communication bus;
a memory for storing a computer program;
and the processor is used for realizing the automatic chip netlist modifying method when the program stored in the memory is executed.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method for automatically modifying a chip netlist according to any one of the present application is implemented.
The embodiment of the application has the following beneficial effects:
according to the method, the device and the electronic equipment for automatically modifying the chip netlist, a modification path is obtained based on the connection relation between an abnormal node and a node to be modified in the chip netlist, wherein the abnormal node is the node with abnormal output in the chip netlist, and the node to be modified is the node causing the abnormal node to output abnormally; analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object in a data dictionary; inquiring the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object; and modifying the file of the chip netlist according to the modification script aiming at the target object. Compared with the prior art, the method has the advantages that the positions needing to be modified in the files of the chip netlist are automatically identified based on the modification path, the modification of the files of the chip netlist is completed according to the modification script, and the risk and the workload of secondary errors caused by manual modification of the chip netlist can be reduced.
Of course, not all advantages described above need to be achieved at the same time in the practice of any one product or method of the present application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the description below are only some embodiments of the present application, and other embodiments can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a diagram illustrating RTL codes before and after modification in the related art;
FIG. 2 is a schematic view of a related art reticle representation;
FIG. 3 is a schematic diagram of a method for automatically modifying a chip netlist according to an embodiment of the present application;
FIG. 4 is a schematic netlist diagram of a counter according to an embodiment of the present application;
fig. 5 is a schematic diagram of one possible implementation manner of step S101 in the method for automatically modifying a chip netlist according to the embodiment of the present application;
fig. 6 is a schematic diagram of a possible implementation manner of step S102 in the method for automatically modifying a chip netlist according to the embodiment of the present application;
fig. 7 is a schematic diagram of a possible implementation manner of step S103 in the method for automatically modifying a chip netlist according to the embodiment of the present application;
FIG. 8 is a schematic diagram of an apparatus for automatically modifying a chip netlist according to an embodiment of the present application;
fig. 9 is a schematic diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments that can be derived by one of ordinary skill in the art from the description herein are intended to be within the scope of the present disclosure.
For a clearer understanding of the technical solutions of the present application, the terms in the present application are explained first:
ECO: engineering Change Order, engineering amendment.
Netlist: the method is a description mode for describing the connection condition of the digital circuit by using a basic logic gate, and the logic gate array has the same arrangement appearance as a netlist, so the logic gate array is called a netlist.
RTL: register Transfer Level, register Transfer Level description.
Cell: basic blocks in the IC design, such as flip-flops and the like.
And (3) Pin: the port of the Cell.
net: the connection between the two Cell ports.
In the related art, the modification of the chip netlist is realized by a method of manually searching for a modification node and manually writing an ECO modification script, which specifically comprises the following steps: after determining the RTL level circuit modification scheme, the chip netlist needs to be observed manually to determine how the modification should be carried out, then an ECO modification script is written manually, and then the ECO modification script is operated through a special tool to realize the modification of the netlist. For example: referring to fig. 1, comparing the RTL code before modification with the RTL code after modification, the purpose of the modification is to cancel the RD _ LO _ I signal. Through analysis, it is found that canceling the RD _ LO _ I signal does not affect the subsequent cnt _ l signal, and therefore, the corresponding cnt _ l signal is found in the netlist of fig. 2, the previous-stage signal thereof is found, the local netlist where the cnt _ l signal is located in fig. 2 is obtained, and it is found that the port a of g1830 is connected with RD _ LO _ I, in order to implement modification, the modified scheme is to connect the port a with 0, and write a script: detachTerm-module based netif _ port _ be _0 at least g1830} { A0} attachtem-module based netif _ port _ be _0 at g1830} { A0} {1' b0} in the above script, detachTerm indicates disconnection, netif _ port _ be _0 indicates a module name, g1830 indicates a complete Cell instantiation name, and A0 indicates a port of the Cell. The complete definitions are: the A0 port of g1830 in netif _ port _ be _0 is disconnected. attachTerm denotes the link, with the complete definitions: the A0 port of g1830 in netif _ port _ be _0 is connected to 0.
Through the above examples, it is easy to find that, in the related art, by manually searching for the modification node and manually writing the ECO modification script, when the modification logic is simple, the modification can be quickly completed, and when the modification logic is complex, the workload is very large, and the problems of omission, introduction of secondary errors and the like are inevitable.
The modification of the netlist can also be accomplished in the related art by the following methods: modifying the RTL code, locally and comprehensively modifying the module where the RTL code is located, generating a new netlist, comparing the new netlist with the old netlist, and modifying the old netlist according to the difference. The method has strong limitation, and is not essentially different from the whole flow modification in principle, but the modification scale can be compressed through local synthesis, the workload is reduced, if tapeout is carried out, the subsequent work can still be influenced, and in addition, the comprehensive tool can automatically generate the optimal scheme which is considered by the comprehensive tool according to the component library and the constraint condition. And a small RTL modification is possible, the netlist difference detected after synthesis is very large, and the old netlist is difficult to directly modify only by manual comparison.
By combining the above analysis, the problems of the prior art solutions are: firstly, modifying the netlist by a manual method, so that the workload is large, the fault tolerance rate is low, and the risk of introducing secondary errors exists; secondly, the netlist is obtained by modifying the RTL code and then re-synthesizing, local synthesis and integral synthesis cannot be guaranteed to influence the work developed in the next stage, and thirdly, the ECO script needs to be written manually, so that the workload is increased.
In order to reduce the risk and workload of secondary errors introduced by manually modifying a chip netlist, an embodiment of the present application provides an automatic modification method for a chip netlist, and referring to fig. 3, the method includes:
s101, obtaining a modification path based on the connection relation between an abnormal node and a node to be modified in a chip netlist, wherein the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing the abnormal node to output abnormally.
The application can be realized in a python script, but is not limited to the realization form, and can also be realized in other languages (C/C + +). The counter function is taken as an example for illustration in the present application, but the present application is not limited to the modification of the counter function.
For a more convenient and clear description of the principles and steps of the present application, the following cases are introduced and the following steps are all explained in this case: the counter may hold a 32-bit count value, count from 0, hold the value after reaching 0xFFFFFFFF (i.e., the all-F hold function), and automatically clear the value when the count value is read by other units (i.e., the read clear function). If a further count is made during the reading of the count value, resulting in a read count value of less than 1, serious consequences may result if an accurate count value is required. Now the function of the counter needs to be modified, the read clear and full F hold functions are cancelled, and after the count value reaches 0xFFFFFFFF, the next time the count is started from 0. Netlist of counter referring to fig. 4, the output of Cell 1393 in fig. 4 is bit1 of the counter, and analysis and verification find that setting the A0 and A1 ports of Cell g1476 to 0 can remove the all-F hold function, and setting the a port of Cell g979 to 0 can remove the read clear function.
Taking the netlist of the counter shown in fig. 4 as an example, the output of the Cell 1393 is that bit1 of the counter is an abnormal node, and the A0 and A1 ports of the Cell g1476 or the a port of the Cell g979 are nodes to be modified. The direction shown by the arrow in fig. 4 is the connection relationship between the abnormal node without the read function and the node to be modified, that is, a modification path. In one example, the method for obtaining the modification path may be that a developer performs logic analysis on the structure of the chip netlist based on the abnormal node according to the displayed structure of the chip netlist, locates the node to be modified, determines the node to be modified which causes the abnormal node to output an abnormality, and obtains the modification path according to a connection relationship between the abnormal node and the node to be modified in the chip netlist.
And S102, analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object in a data dictionary.
The files of the chip netlist (netlist files for short) correspond to the chip netlist one by one, and the netlist files are codes corresponding to the display form of the chip netlist. Reading and analyzing the netlist file line by line, creating a Cell object and a Pin object, and storing the Cell object and the Pin object into a data dictionary, wherein the data dictionary in the application comprises a list, a database, a key value pair list and other data structure forms.
S103, inquiring the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object.
And sequentially searching each Cell object or Pin object in the dictionary based on the modification path until the position of the node to be modified is found, and obtaining the target object to be modified.
And S104, modifying the file of the chip netlist according to the modification script aiming at the target object.
The developer can determine the modification method for the target object and write the modification script, that is, the modification script is the script file corresponding to the modification method. And based on the modification script of the target object, the modification script is operated by utilizing a special tool to finish the modification of the netlist.
In the embodiment of the application, the position needing to be modified in the file of the chip netlist is automatically identified based on the modification path, the modification of the file of the chip netlist is completed according to the modification script, and the risk and the workload of introducing secondary errors by manually modifying the chip netlist can be reduced.
The modification path can be manually input by a developer (user) or can be automatically obtained based on the chip netlist structure. In a possible implementation, referring to fig. 5, the above S101 includes:
and S1011, responding to the abnormal node selection instruction of the user, and determining the abnormal node with abnormal output in the chip netlist.
And (4) according to the structure of the chip netlist, a developer selects an abnormal node for determining the output abnormality in the chip netlist through an abnormal node selection instruction.
Taking the netlist of the counter shown in fig. 4 as an example, if the output of the Cell 1393 is bit1 of the counter, the output port of the Cell 1393 is an abnormal node.
And S1012, responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormal in the chip netlist.
And the developer performs logic analysis on the structure of the chip netlist based on the abnormal node according to the structure of the chip netlist, positions the node to be modified, and selects the node to be modified which causes the abnormal node to output the abnormality through the selection instruction of the node to be modified.
Taking the netlist of the counter shown in fig. 4 as an example, the A0 and A1 ports of Cell g1476 or the a port of Cell g979 are nodes to be modified.
And S1013, in the chip netlist, for each node, according to the sequence from a network connection to an output port to a Cell to an output port to a network connection, sequentially and reversely searching from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
And obtaining a modification path according to the connection relation between the abnormal node and the node to be modified in the chip netlist. In order to obtain the modified path more conveniently, the modified path can be automatically obtained through a programming method. Specifically, according to the structure of the chip netlist, the sequence of the network connection → the output port → the Cell → the input port → the network connection is adopted, the positions of the nodes to be modified are found by reverse searching step by step from the abnormal nodes, and the connection relationship between the abnormal nodes and the nodes to be modified is obtained to serve as the modification path, so that the automatic acquisition of the modification path is realized. Taking the netlist of the counter shown in fig. 4 as an example, where the a port of the Cell g979 is a node to be modified, the output port of the Cell 1393 is an abnormal node, and the path (modification path) from the output port signal net0 of the Cell 1393 to the a port of the Cell g979 is: net0 → 1393.Y → 1393.B1N → net1 → g _ 1. Q → g _ 1. E → g _ 1. D → net2 → g977.Y → g977.B → net3 → cnt _ n _0.Y → cnt _ n _0 → cnt _ n _0.A → net4 → g979.Y → g979.A, is the direction of the arrow in FIG. 4.
In the embodiment of the application, based on the abnormal node and the node to be modified, the modified path is obtained according to the sequence of the network connection → the output port → the Cell → the input port → the network connection, so that the reverse search is facilitated.
In a possible implementation manner, the S102 includes:
determining the name of the module where the node to be modified is located to obtain a target module;
reading the files of the target modules of the chip netlist line by line;
judging whether the currently read row contains a preset ending keyword or not;
if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row;
creating a Pin object of the Cell object based on a port of the Cell object, and adding the Pin object under the Cell object;
acquiring each output port of the Cell object, taking each output port of the Cell object as a key (key word), taking the Cell object as a value (value), acquiring an analysis file, and storing the analysis file in a data dictionary;
and if the currently read line contains the preset ending keyword, ending the analysis.
The data dictionary is stored in a hash form.
The file of the chip netlist (netlist file) has the following format: module module0 (ctl, in _0, in _1, z);
the above format contains detailed definitions of a number of modules, taking module0 as an example: module0 is the type name of the module, ctl, in _0, in _1, z in parentheses are the connection signals of the module with other modules outside, the input key is followed by the input signal, the output key is followed by the output signal, and the wire key declares the signal connection, including the input and output signals and the signals used inside. MXT2_ X1N _ A9PP96CTS _ C20 is a Cell type and this statement states that a Cell of the type MXT2_ X1N _ A9PP96CTS _ C20, named g26_2005, is asserted with the A port connected with the in _0 signal, the B port connected with the in _1 signal, the S0 port connected with the ctl signal and the Y port connected with the z signal. The endmodule key signifies the end of the module definition.
Before parsing the file of the chip netlist, two classes are defined for storing Pin and Cell, for example:
the Pin class is used for describing the connection relationship between the device interface and the signal line. Wherein the name member represents the device interface name and the wire represents the signal line name.
Cell class describes a device, where name represents the type of the device, instance represents the device name, and _ input represents the set of all input signals of the device, where the element type is Pin, and similarly, and _ output stores the set of all output signals. Signal add self _ output.add(s) and get interface get _ input (self) are also defined. It should be noted that INPUT _ IGNORE and OUTPUT _ SIGNALS are respectively a set of all INPUT and OUTPUT signal types, the specific types need to be defined according to actual requirements, and the subsequent parsing and searching are only performed on SIGNALS contained in the two sets, and are defined as follows:
INPUT_IGNORE＝['S0','CK','E',…]
OUTPUT_SIGNALS＝['Y','Q','QN',…]
in one example, referring to fig. 6, the step of parsing the netlist file to obtain each Cell object and Pin object, and storing the Cell objects and Pin objects in the data dictionary is as follows:
step 1: predetermining the name of a module where the modified node is located to obtain a target module (target module);
step 2: reading a file of a target module of the chip netlist row by row, judging whether a currently read row contains a preset ending keyword endmodule, if not, executing the step 3, and if so, executing the step 7;
and 3, step 3: skipping rows starting with input, output, wire and assign, wherein the rows describe input and output signal lines of the module and connection lines between internal devices, and analysis is not needed;
and 4, step 4: when the current read behavior Cell is described, respectively extracting the device type and the device instance name according to the current read behavior Cell, and creating a Cell object;
and 5: respectively extracting port names and signal line names of input and output signals in the ports of the Cell object in the step 4, creating a Pin object, and sequentially adding the Pin object into a _ input or _ output set of the Cell object in the step 4;
step 6: acquiring each output port of the Cell object, taking each output port of the Cell object as a key and the Cell object as a value to obtain an analysis file, and storing the analysis file in a data dictionary (pin _ map);
and 7: and (6) ending.
The Python implementation code is as follows:
in the embodiment of the application, when the file of the chip netlist is analyzed, statements related to signal line description are skipped after a target module is found, and only the statements related to the Cell and the port of the Cell object in the target module are analyzed, so that rapid analysis can be realized.
In a possible implementation manner, the step S103 includes:
querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried;
acquiring input port Pin objects under the currently inquired Cell object, and selecting the input port Pin object corresponding to the modification path from the input port Pin objects;
taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched;
and determining a target object to be modified aiming at the Cell object of the node to be modified.
In one example, referring to fig. 7, based on the modification path, the step of querying the data dictionary to obtain the target object to be modified is as follows:
step 1: inquiring a data dictionary by taking the abnormal signal as a starting point to obtain a Cell object which takes the abnormal signal as output;
step 2: acquiring input port Pin objects of the Cell objects, and selecting the input port Pin objects corresponding to the modification paths from the input port Pin objects;
and step 3: and taking the currently selected input port Pin object as a key to be queried, and repeating the query process until the Cell object of the node to be modified is searched.
The Python implementation code is as follows:
in the embodiment of the application, based on the modification path, reverse query is performed by using the abnormal signal as a starting point until the Cell object of the node to be modified is searched, and the target object to be modified is determined aiming at the Cell object of the node to be modified.
In a possible implementation manner, the S104 includes:
integrating the modification scripts of all the modification paths to obtain an engineering modification script for the chip netlist;
and operating the engineering modification script to modify the file of the chip netlist.
Taking the netlist of the counter shown in fig. 4 as an example, the A0 and A1 ports of Cell g1476 and the a port of Cell g979 are two nodes to be modified, and correspond to two modification paths. And aiming at each modification path, corresponding to a modification script of the modification path, obtaining the modification scripts of all the modification paths, integrating the modification scripts of all the modification paths to obtain an engineering modification script aiming at the chip netlist, wherein the automatic output method of the engineering modification script comprises the steps of automatically writing engineering according to grammatical features and outputting the engineering modification script to a text file, and then operating the engineering modification script by using a special tool to complete the modification of the file of the chip netlist.
The Python implementation code is as follows:
in the embodiment of the application, the modification scripts of all the modification paths are integrated to obtain the engineering modification script aiming at the chip netlist, and the engineering modification script is operated to complete the modification of the chip netlist.
An embodiment of the present application provides an apparatus for automatically modifying a chip netlist, referring to fig. 8, the apparatus includes:
an obtaining module 701, configured to obtain a modification path based on a connection relationship between an abnormal node and a node to be modified in a chip netlist, where the abnormal node is a node in the chip netlist which outputs an abnormality, and the node to be modified is a node causing the abnormal node to output an abnormality;
a storage module 702, configured to analyze the file of the chip netlist to obtain a Cell object and a Pin object, and store the Cell object and the Pin object in a data dictionary;
a query module 703, configured to query the data dictionary to obtain a target object to be modified based on the modification path, and generate a modification script for the target object, where the target object is a Cell object and/or a Pin object;
and a modifying module 704, configured to modify the file of the chip netlist according to the modification script for the target object.
In a possible implementation manner, the obtaining module is specifically configured to: responding to an abnormal node selection instruction of a user, and determining an abnormal node with abnormal output in the chip netlist; responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormity in the chip netlist; in the chip netlist, for each node, according to the sequence from a network connection line to an output port to a Cell to an input port to a network connection line, reverse searching step by step from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
In a possible implementation manner, the storage module is specifically configured to: determining the name of the module where the node to be modified is located to obtain a target module; reading the files of the target modules of the chip netlist line by line; judging whether the currently read row contains a preset ending keyword or not; if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row; creating a Pin object of the Cell object based on the port of the Cell object, and adding the Pin object under the Cell object; acquiring each output port of the Cell object, taking each output port of the Cell object as a keyword key, taking the Cell object as a value, obtaining an analysis file, and storing the analysis file in a data dictionary; and if the currently read line contains the preset ending keyword, ending the analysis.
In a possible implementation manner, the query module is specifically configured to: querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried; acquiring input port Pin objects under currently inquired Cell objects, and selecting input port Pin objects corresponding to the modified paths from the input port Pin objects; taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched; and determining a target object to be modified aiming at the Cell object of the node to be modified.
In a possible implementation, the modification module is specifically configured to: integrating modification scripts of all modification paths to obtain an engineering modification script aiming at the chip netlist; and operating the engineering modification script to modify the file of the chip netlist.
The embodiment of the present application further provides an electronic device, as shown in fig. 9, which includes a processor 801, a communication interface 802, a memory 803, and a communication bus 804, where the processor 801, the communication interface 802, and the memory 803 complete mutual communication through the communication bus 804,
a memory 803 for storing a computer program;
the processor 801 is configured to implement the method for automatically modifying a chip netlist according to any one of the present applications when executing the program stored in the memory 803.
The communication bus mentioned in the electronic device may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.
The communication interface is used for communication between the electronic equipment and other equipment.
The Memory may include a Random Access Memory (RAM) or a Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.
In yet another embodiment provided by the present application, a computer-readable storage medium is further provided, in which a computer program is stored, and the computer program, when executed by a processor, implements the chip netlist auto-modification method described in any of the present applications.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions described in accordance with the embodiments of the application are all or partially generated when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), among others.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
The embodiments in the present specification are described in a related manner, each embodiment focuses on differences from other embodiments, and the same and similar parts in the embodiments are referred to each other.
The above description is only for the preferred embodiment of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims (12)
1. A method for automatic modification of a chip netlist, the method comprising:
acquiring a modification path based on the connection relation between an abnormal node and a node to be modified in a chip netlist, wherein the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing the abnormal node to output abnormally;
analyzing the file of the chip netlist to obtain each Cell object and a Pin object, and storing the Cell objects and the Pin objects into a data dictionary;
inquiring the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object;
and modifying the file of the chip netlist according to the modification script aiming at the target object.
2. The method according to claim 1, wherein the obtaining a modification path based on a connection relationship from an abnormal node to a node to be modified in the chip netlist comprises:
responding to an abnormal node selection instruction of a user, and determining an abnormal node with abnormal output in the chip netlist;
responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormity in the chip netlist;
in the chip netlist, for each node, according to the sequence from a network connection line to an output port to a Cell to an input port to a network connection line, reverse searching step by step from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
3. The method according to claim 1, wherein the parsing the file of the chip netlist to obtain each Cell object and Pin object, and storing the Cell objects and the Pin objects in a data dictionary comprises:
determining the name of the module where the node to be modified is located to obtain a target module;
reading the files of the target modules of the chip netlist line by line;
judging whether the currently read row contains a preset ending keyword or not;
if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row;
creating a Pin object of the Cell object based on the port of the Cell object, and adding the Pin object under the Cell object;
acquiring each output port of the Cell object, taking each output port of the Cell object as a keyword key, taking the Cell object as a value, obtaining an analysis file, and storing the analysis file in a data dictionary;
and if the currently read row contains the preset ending keyword, ending the analysis.
4. The method of claim 1, wherein querying the data dictionary for a target object to be modified based on the modification path comprises:
querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried;
acquiring input port Pin objects under the currently inquired Cell object, and selecting the input port Pin object corresponding to the modification path from the input port Pin objects;
taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched;
and determining a target object to be modified aiming at the Cell object of the node to be modified.
5. The method of claim 1, wherein modifying the file of the chip netlist according to the modification script for the target object comprises:
integrating modification scripts of all modification paths to obtain an engineering modification script aiming at the chip netlist;
and operating the engineering modification script to modify the file of the chip netlist.
6. An apparatus for automatically modifying a chip netlist, the apparatus comprising:
the device comprises an acquisition module, a modification module and a processing module, wherein the acquisition module is used for acquiring a modification path based on the connection relation between an abnormal node and a node to be modified in a chip netlist, the abnormal node is a node with abnormal output in the chip netlist, and the node to be modified is a node causing the abnormal node to output abnormal;
the storage module is used for analyzing the file of the chip netlist to obtain a Cell object and a Pin object, and storing the Cell object and the Pin object into a data dictionary;
the query module is used for querying the data dictionary to obtain a target object to be modified based on the modification path, wherein the target object is a Cell object and/or a Pin object;
and the modification module is used for modifying the file of the chip netlist according to the modification script aiming at the target object.
7. The apparatus of claim 6, wherein the obtaining module is specifically configured to: responding to an abnormal node selection instruction of a user, and determining an abnormal node with abnormal output in the chip netlist; responding to a node to be modified selection instruction of a user, and determining a node to be modified which causes the abnormal node to output abnormity in the chip netlist; in the chip netlist, for each node, according to the sequence from a network connection line to an output port to a Cell to an input port to a network connection line, reverse searching step by step from the abnormal node until the position of the node to be modified is found, and obtaining the connection relation between the abnormal node and the node to be modified as a modification path.
8. The apparatus of claim 6, wherein the storage module is specifically configured to: determining the module name of the node to be modified to obtain a target module; reading the files of the target modules of the chip netlist line by line; judging whether the currently read row contains a preset ending keyword or not; if the currently read row does not contain the preset ending keyword, and when the currently read behavior Cell is described, a Cell object is created according to the currently read row; creating a Pin object of the Cell object based on the port of the Cell object, and adding the Pin object under the Cell object; acquiring each output port of the Cell object, taking each output port of the Cell object as a keyword key, taking the Cell object as a value, obtaining an analysis file, and storing the analysis file in a data dictionary; and if the currently read line contains the preset ending keyword, ending the analysis.
9. The apparatus of claim 6, wherein the query module is specifically configured to: querying the data dictionary to obtain a corresponding Cell object by taking an abnormal output port of the abnormal node as a keyword key to be queried; acquiring input port Pin objects under the currently inquired Cell object, and selecting the input port Pin object corresponding to the modification path from the input port Pin objects; taking the currently selected input port Pin object as a keyword key to be queried, and repeating the query process until the Cell object of the node to be modified is searched; and determining a target object to be modified aiming at the Cell object of the node to be modified.
10. The apparatus of claim 6, wherein the modification module is specifically configured to: integrating modification scripts of all modification paths to obtain an engineering modification script aiming at the chip netlist; and operating the engineering modification script to modify the file of the chip netlist.
11. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;
a memory for storing a computer program;
a processor for implementing the automatic modification method of the chip netlist as claimed in any one of claims 1 to 5 when executing the program stored in the memory.
12. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method for automatically modifying a chip netlist as claimed in any one of claims 1 to 5 is implemented.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116187270A (en) * | 2023-05-04 | 2023-05-30 | 中科亿海微电子科技（苏州）有限公司 | Method and device for testing identifiers in automatic verification schematic diagram |
| CN116205171A (en) * | 2023-05-06 | 2023-06-02 | 英诺达(成都)电子科技有限公司 | Matching method, device, equipment and storage medium of power switch unit |
| CN118297010A (en) * | 2024-06-06 | 2024-07-05 | 山东启芯软件科技有限公司 | Optimization method, device and computer readable storage medium for updating netlist hierarchy based on incremental computation |
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2022
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116187270A (en) * | 2023-05-04 | 2023-05-30 | 中科亿海微电子科技（苏州）有限公司 | Method and device for testing identifiers in automatic verification schematic diagram |
| CN116187270B (en) * | 2023-05-04 | 2023-08-22 | 中科亿海微电子科技（苏州）有限公司 | Method and device for testing identifiers in automatic verification schematic diagram |
| CN116205171A (en) * | 2023-05-06 | 2023-06-02 | 英诺达(成都)电子科技有限公司 | Matching method, device, equipment and storage medium of power switch unit |
| CN116205171B (en) * | 2023-05-06 | 2023-07-18 | 英诺达(成都)电子科技有限公司 | Matching method, device, equipment and storage medium of power switch unit |
| CN118297010A (en) * | 2024-06-06 | 2024-07-05 | 山东启芯软件科技有限公司 | Optimization method, device and computer readable storage medium for updating netlist hierarchy based on incremental computation |
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