CN115224130A - High-impedance semiconductor resistor structure and manufacturing method thereof - Google Patents
High-impedance semiconductor resistor structure and manufacturing method thereof Download PDFInfo
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- CN115224130A CN115224130A CN202210711972.6A CN202210711972A CN115224130A CN 115224130 A CN115224130 A CN 115224130A CN 202210711972 A CN202210711972 A CN 202210711972A CN 115224130 A CN115224130 A CN 115224130A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 69
- 238000005530 etching Methods 0.000 claims abstract description 33
- 239000002184 metal Substances 0.000 claims abstract description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- 230000004888 barrier function Effects 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 119
- 230000000052 comparative effect Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/8605—Resistors with PN junctions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66166—Resistors with PN junction
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Abstract
The invention discloses a high-impedance semiconductor resistor structure and a manufacturing method thereof, and the high-impedance semiconductor resistor structure comprises a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer, wherein the GaAs-based PN structure comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, two metal electrodes are arranged on the second P-type layer, and the part of the second P-type layer, which is positioned between the two metal electrodes, is recessed to form a groove. The invention solves the problem of application limitation of low impedance of the traditional GaAs-based epitaxial resistor, obtains the semiconductor resistor with high epitaxial resistance and low contact resistance, widens the application of the product on high impedance characteristic, and simultaneously increases the utilization rate of the PN structure of the epitaxial layer of the GaAs device.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a high-impedance semiconductor resistor structure and a manufacturing method thereof.
Background
With the demand for miniaturization and integration of semiconductor devices, the integrated circuit industry, which forms a plurality of semiconductor functional elements in a small-area semiconductor chip, has experienced rapid development. Various types of passive circuit components, such as resistors, may be fabricated on a semiconductor wafer. Currently, semiconductor products generally use ER (EPI Resistor), RER (processed EPI Resistor), TFR (Thin Film Resistor), and the like as a Resistor. For example, a portion of the epitaxial region in the fabrication of an isolated GaAs-based pHEMT device may be used to form a resistor. However, the resistance of the semiconductor resistor formed by the GaAs-based pHEMT EPI is only about 200 Ω/sq, which limits the application of some products in high impedance characteristics.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a high-impedance semiconductor resistor structure and a manufacturing method thereof.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
a high-impedance semiconductor resistor structure comprises a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer, wherein the GaAs-based PN structure comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, two metal electrodes are arranged on the second P-type layer, and a part, located between the two metal electrodes, of the second P-type layer is recessed to form a groove.
Optionally, the bottom of the groove exposes the etching stop layer.
Optionally, the etching stop layer at the bottom of the groove is removed, and the first P-type layer is exposed at the bottom of the groove.
Optionally, the etch stop layer is made of InGaAs, alAs, or InGaP, and has a thickness of 3 to 7nm.
Optionally, the thickness of the first P-type layer is 5 to 15nm, and the thickness of the second P-type layer is 30 to 80nm.
Optionally, the N-type layer includes, from bottom to top, a first N + InGaP layer, an N + GaAs layer, a second N + InGaP layer, and an N-GaAs layer, where the first N + InGaP layer has a thickness of 5-15nm, the N + GaAs layer has a thickness of 300-500 nm, the second N + InGaP layer has a thickness of 3-7nm, and the N-GaAs layer has a thickness of 50-150 nm.
Optionally, the epitaxial layer of the GaAs device includes, from bottom to top, a channel layer, a barrier layer, and a cap layer on the substrate, and the GaAs-based PN structure is disposed on the cap layer.
A method for manufacturing the high-impedance semiconductor resistor structure comprises the following steps:
1) Forming a GaAs-based PN epitaxial layer on the GaAs device epitaxial layer, wherein the GaAs-based PN epitaxial layer comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, and manufacturing two metal electrodes on the second P-type layer of a preset resistor area;
2) Coating a photoresist on the structure formed in the step 1), and exposing and developing to obtain a display window positioned between the two metal electrodes;
3) Etching to remove the second P-type layer in the display window, and stripping the photoresist;
4) And etching and removing the GaAs-based PN epitaxial layer outside the preset resistor area to obtain the resistor based on the GaAs-based PN structure.
Optionally, in step 3), after the second P-type layer within the display window is removed by etching, a step of removing the etching stop layer within the display window by etching is further included, and then the photoresist is stripped.
Optionally, in step 1), the metal electrode is made of a Pt/Ti/Pt/Au stacked layer, and forms ohmic contact with the second P-type layer.
The beneficial effects of the invention are as follows:
the problem of low application limit of the traditional GaAs-based epitaxial resistor is solved, the semiconductor resistor with high epitaxial resistance and low contact resistance is obtained, the application of the product on high-impedance characteristics is widened, and meanwhile, the utilization rate of a PN structure of the epitaxial layer of the GaAs device is increased.
Drawings
Fig. 1 is a schematic view of the structure of a high-impedance semiconductor resistor according to embodiment 1;
fig. 2 is a process flow diagram of a method for fabricating a high-impedance semiconductor resistor structure according to embodiment 1, in which the structure obtained in each step is shown;
fig. 3 is a schematic view of the structure of a high-impedance semiconductor resistor according to embodiment 2;
FIG. 4 is a schematic view of a semiconductor resistor structure of comparative example 1;
fig. 5 is a schematic view of the structure of the semiconductor resistor of comparative example 2.
Detailed Description
The invention is further explained below with reference to the figures and the specific embodiments. The drawings are only schematic and can be easily understood, and the specific proportion can be adjusted according to design requirements. The definitions of the top and bottom relationships of the relative elements and the front and back sides of the figures described herein are understood by those skilled in the art to refer to the relative positions of the components and thus all of the components may be flipped to present the same components and still fall within the scope of the present disclosure.
Example 1
Referring to fig. 1, a high-impedance semiconductor resistor structure 100 of embodiment 1 includes a GaAs device epitaxial layer 1 and a GaAs-based PN structure 2 disposed on the GaAs device epitaxial layer 1, where the GaAs-based PN structure 2 includes, from bottom to top, an N-type layer 21, a first P-type layer 22, an etching stop layer 23, and a second P-type layer 24, two metal electrodes 3 are disposed on the second P-type layer 24, and a portion of the second P-type layer 24 located between the two metal electrodes 3 is recessed to form a groove a.
The GaAs device epitaxial layer 1 is a pHEMT device epitaxial layer, and comprises a conventional functional layer structure such as a buffer layer, a nucleation layer and a channel layer which are arranged on a substrate 11 and replaced by ellipses from bottom to top, a barrier layer 12 formed by an AlGaAs material, a barrier layer 13 formed by an InGaP material and a cover layer 14, wherein the cover layer 14 consists of an i-GaAs cover layer 141 and an n + GaAs cover layer 142, and a GaAs-based PN structure 2 is arranged on the n + GaAs cover layer 142. Wherein, the thickness range of the barrier layer 12 is 7.5-10nm, the thickness range of the barrier layer 13 is 26-36nm, the thickness range of the i-GaAs cover layer 141 is 25-35nm, and the thickness range of the n + GaAs cover layer 142 is 40-50nm.
The N-type layer 21 includes, from bottom to top, a first N + InGaP layer 211, an N + GaAs layer 212, a second N + InGaP layer 213, and an N-GaAs layer 214, wherein the first N + InGaP layer 211 and the second N + InGaP layer 213 serve as etching stoppers. The thickness of the first n + InGaP layer 211 is 5 to 15nm, for example 10nm; the thickness of the n + GaAs layer 212 is 300 to 500nm, for example 400nm; the thickness of the second n + InGaP layer 213 is 3 to 7nm, for example, 5nm; the n-GaAs layer 214 has a thickness of 50 to 150nm, for example 100nm.
The first P-type layer 22 and the second P-type layer 24 are P + GaAs layers doped the same, wherein the thickness of the first P-type layer 22 is 5 to 15nm, for example, 10nm; the thickness of the second P-type layer 24 is 30-80 nm, for example 50nm. The material of the etch stop layer 23 is P-type or undoped In x Ga 1-x As, alAs or InGaP, with a thickness of 3 to 7nm, for example 5nm. The groove a is formed by etching away the second P-type layer 24 in this region to expose the bottom of the groove a to the etching stopper layer 23. Specifically, the distance between the two metal electrodes 3 is 5um, and the groove a is located between the two metal electrodes 3 and has a width of 4-5 um. Therefore, the thickness of the P-type layer below the two metal electrodes 3 is the sum of the thicknesses of the first P-type layer and the second P-type layer, and a smaller contact resistance is obtained; the thickness of the P-type layer in the region between the two metal electrodes 3 is equal to that of the first P-type layer, so that a larger epitaxial resistance is obtained, and a high-impedance and high-performance resistor structure is obtained.
Referring to fig. 2, the method for manufacturing the high-impedance semiconductor resistor structure includes the following steps:
step 1: forming a GaAs-based PN epitaxial layer 2' on the GaAs device epitaxial layer 1, and manufacturing two metal electrodes 3 on a second P type layer 24 of a preset resistor area; the two metal electrodes 3 are made of Pt/Ti/Pt/Au laminated layers and form ohmic contact with the second P-type layer 24;
step 2: coating a photoresist R, and exposing and developing to obtain a display window R1 positioned between the two metal electrodes 3;
and step 3: etching to remove the second P-type layer in the display window R1, etching until the etching stop layer 23 stops, and stripping the photoresist to obtain a groove a;
and 5: and continuously etching to remove the GaAs-based PN epitaxial layer outside the preset resistor area until the first n + InGaP layer 211 is removed, and obtaining the resistor based on the GaAs-based PN structure 2. The two etching steps of step 4 and step 5 are divided here in order to obtain the PIN diode and the HEMT device which can be made subsequently.
The resistance value of the resistor based on the GaAs-based PN structure obtained by the embodiment is more than 1200 omega/sq.
Example 2
Referring to fig. 3, a difference between the high-impedance semiconductor resistor structure 200 of embodiment 2 and embodiment 1 is that, in step 3) of embodiment 1, after the second P-type layer within the open window is removed by etching, a step of removing the etch stop layer within the open window by etching is further included, so as to obtain a groove b, and a bottom surface of the groove b exposes the first P-type layer 22.
The resistance of the resistor 200 based on the GaAs-based PN structure obtained in the embodiment is more than 1200 omega/sq.
Comparative example 1
Referring to fig. 4, the semiconductor resistor based on the GaAs-based PN structure of comparative example 1 differs from that of example 1 in that the structure thereof including the N-type layer 21 and the P-type layer 4,P has a layer 4 of 10nm in thickness, and two metal electrodes 3 are provided on the P-type layer 4 without providing a groove.
The obtained resistor has large contact resistance due to the small thickness of the P-type layer 4 below the metal electrode 3, and the metal Pt at the bottom layer of the metal electrode 3 can seep into the N-type layer, so that the current between the two metal electrodes 3 is increased, and the resistance value of the finally obtained resistor is only 40-50 omega/sq.
Comparative example 2
Referring to fig. 5, the semiconductor resistor based on the GaAs-based PN structure of comparative example 2 differs from that of example 1 in that the structure thereof including the N-type layer 21 and the P-type layer 5,P has a layer 5 of 60nm in thickness, and two metal electrodes 3 are provided on the P-type layer 5 without providing a groove.
The obtained resistor has small epitaxial resistance due to the large thickness of the P-type layer, and the resistance value of the finally obtained resistor is not more than 100 omega/sq.
In addition, for the embodiment of the present invention, according to actual requirements, the GaAs-based PN epitaxial layer outside the preset resistor region is removed by etching to obtain a semiconductor resistor based on a GaAs-based PN structure, and after device isolation is performed, other known resistor structures, such as an ER resistor, a TFR resistor, etc., are continuously fabricated on the GaAs device epitaxial layer 1.
The above embodiments are only used to further illustrate the high impedance semiconductor resistor structure and the manufacturing method thereof of the present invention, but the present invention is not limited to the embodiments, and any simple modification, equivalent change and modification made to the above embodiments according to the technical spirit of the present invention fall within the protection scope of the technical solution of the present invention.
Claims (10)
1. A high impedance semiconductor resistor structure, characterized by: the GaAs-based PN structure comprises a GaAs device epitaxial layer and a GaAs-based PN structure arranged on the GaAs device epitaxial layer, wherein the GaAs-based PN structure comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, two metal electrodes are arranged on the second P-type layer, and a part, located between the two metal electrodes, of the second P-type layer is recessed to form a groove.
2. The high impedance semiconductor resistor structure of claim 1, wherein: the bottom of the groove exposes the etching stop layer.
3. The high impedance semiconductor resistor structure of claim 1, wherein: and removing the etching stop layer at the bottom of the groove, wherein the first P-type layer is exposed at the bottom of the groove.
4. The high impedance semiconductor resistor structure of claim 1, wherein: the etching stop layer is made of InGaAs, alAs or InGaP and has the thickness of 3-7 nm.
5. The high impedance semiconductor resistor structure of claim 1, wherein: the thickness of the first P type layer is 5-15 nm, and the thickness of the second P type layer is 30-80 nm.
6. The high impedance semiconductor resistor structure of claim 1, wherein: the N-type layer comprises a first N + InGaP layer, an N + GaAs layer, a second N + InGaP layer and an N-GaAs layer from bottom to top, wherein the thickness of the first N + InGaP layer is 5-15nm, the thickness of the N + GaAs layer is 300-500 nm, the thickness of the second N + InGaP layer is 3-7nm, and the thickness of the N-GaAs layer is 50-150 nm.
7. The high impedance semiconductor resistor structure of claim 1, wherein: the GaAs device epitaxial layer comprises a channel layer, a barrier layer and a cover layer which are arranged on a substrate from bottom to top, and the GaAs-based PN structure is arranged on the cover layer.
8. A method for fabricating a high impedance semiconductor resistor structure according to any one of claims 1 to 7, comprising the steps of:
1) Forming a GaAs-based PN epitaxial layer on the GaAs device epitaxial layer, wherein the GaAs-based PN epitaxial layer comprises an N-type layer, a first P-type layer, an etching stop layer and a second P-type layer from bottom to top, and manufacturing two metal electrodes on the second P-type layer of a preset resistor area;
2) Coating a photoresist on the structure formed in the step 1), and exposing and developing to obtain a display window positioned between the two metal electrodes;
3) Etching to remove the second P-type layer in the display window, and stripping the photoresist;
4) And etching and removing the GaAs-based PN epitaxial layer outside the preset resistor area to obtain the resistor based on the GaAs-based PN structure.
9. The method of claim 8, wherein the step of forming the high impedance semiconductor resistor further comprises: in the step 3), after the second P-type layer in the display window is removed by etching, a step of removing the etching stop layer in the display window by etching is further included, and then the photoresist is stripped.
10. The method of claim 8, wherein the step of forming the high impedance semiconductor resistor further comprises: in the step 1), the metal electrode is made of a Pt/Ti/Pt/Au laminated layer and forms ohmic contact with the second P type layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210711972.6A CN115224130A (en) | 2022-06-22 | 2022-06-22 | High-impedance semiconductor resistor structure and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210711972.6A CN115224130A (en) | 2022-06-22 | 2022-06-22 | High-impedance semiconductor resistor structure and manufacturing method thereof |
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| CN115224130A true CN115224130A (en) | 2022-10-21 |
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| CN202210711972.6A Pending CN115224130A (en) | 2022-06-22 | 2022-06-22 | High-impedance semiconductor resistor structure and manufacturing method thereof |
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