CN1152215A - Setter of system resetting state - Google Patents
Setter of system resetting state Download PDFInfo
- Publication number
- CN1152215A CN1152215A CN 95119891 CN95119891A CN1152215A CN 1152215 A CN1152215 A CN 1152215A CN 95119891 CN95119891 CN 95119891 CN 95119891 A CN95119891 A CN 95119891A CN 1152215 A CN1152215 A CN 1152215A
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- stability
- power supply
- testing circuit
- reset
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- 230000010355 oscillation Effects 0.000 claims description 22
- 238000012430 stability testing Methods 0.000 claims description 20
- 238000012360 testing method Methods 0.000 claims description 17
- 238000001514 detection method Methods 0.000 claims description 11
- 238000001914 filtration Methods 0.000 claims description 3
- 230000007257 malfunction Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Abstract
The setter includes a power source stability detecting circuit, a delay circuit, a vibrator stability detecting circuit and a level controller. After receiving the signal of expressing the stable state of system power source and vibration freq, the level controller has its output change from high level to low level so as to end the system resetting state. The setter ensures that the system operates at stable state and prevent system from producing malfunction due to unstable system state parameters.
Description
The present invention relates to a kind of setting device of system mode, refer to a kind of setting device of system reset state especially.
The stable end of distinguishing of General System relies on a reset signal, that is, when reset signal is in high potential (High) state, expression system still end is stable, be in Reset Status, when reset signal when high potential becomes electronegative potential (Low), the expression Reset Status finishes, system mode is stable can to begin operate as normal.
By and large, whether system stability need consider following several factor:
1. the stability of supply voltage:
When system just started shooting, supply voltage is mostly non-to be a stationary value, but has the state of fluctuation, did not stablize this reset signal and promptly became Low by High if treat supply voltage, and system is started working, and then the fluctuation of supply voltage will cause the error of system acting.
2. initial value is set:
When system starts working, the setting of initial value must be done, because of system program when carrying out, beginning to rely on this initial value is that the numerical basis of system is carried out control action, reset signal does not promptly become Low from High if the setting of initial value is finished as yet, then system often obtains the initial value of a mistake, and influence various computings and control action thereafter.
3. the stability of system oscillator frequency:
Starting of oscillation when oscillator is just started shooting in system fails to reach double amplitude in the starting of oscillation initial stage more, that is, the frequency at starting of oscillation initial stage will be greater than normal system oscillation frequency, if in frequency stable as yet in, Reset Status promptly finishes, then this too high frequency will influence the normal operating conditions of system.
4. the immunity of power supply clutter:
In the start initial stage, supply voltage is mingled with the part clutter unavoidably, if after Reset Status finishes, this clutter does not disappear yet, and then the operating state of system can produce error.
The setting of the Reset Status of prior art system directly a reset signal of the single pulse of generation (
) give system; when pulse signal becomes Low (" low ") by High (" height "); system promptly starts working; yet; because when the reset signal of prior art becomes Low by High; the stability that does not have the various parameters of first detection system is so when regular meeting had the various parameters of system not tend towards stability as yet, Reset Status promptly finished.Like this then influenced the correctness of system works.The influence that the setting of the reset signal of this kind prior art is produced when being applied in microprocessor is obvious especially, because of the action of microprocessor is that built-in program cooperates the hardware configuration of itself to form, promptly do not move if the parameter of hardware is stablized built-in program as yet, then influenced the correctness of its action widely.
Main purpose of the present invention is to provide the setting device of a system reset state, and it makes the power supply of system and the Reset Status that frequency of oscillation is in stable state rear ends with system, in case the error of locking system work.
The present invention is a kind of setting device of system reset state, and it is used to set the Reset Status of a system, comprising: a stability of power supply testing circuit, in order to the stability of the power supply that detects this system; One oscillator stability testing circuit is in order to the stability of detection system frequency of oscillation; One potentiometric controller, be electrically connected on this stability of power supply testing circuit and this oscillator stability testing circuit, it receives a reset signal, and keep its output and make this system be in the current potential of Reset Status at this reset signal, in this power supply and this frequency of oscillation be all stable after, the side changes the potential state of its output, and finishes the Reset Status of this system.
The setting device of this system reset state further comprises: a delay circuit, be electrically connected on this potentiometric controller, the variation that detects power supply in this stability of power supply testing circuit is during less than certain value, be subjected to the startup of this stability of power supply testing circuit, and the set time that picks up counting, and when in this set time, no longer being started, confirm that this power supply is really stable, give this potentiometric controller and send a high potential signal.
This potentiometric controller comprises: one or the door, its input receives the output of this reset signal and this stability of power supply testing circuit respectively; One with the door, its input receives the output of this delay circuit and the output of this oscillator stability testing circuit respectively; One R-S latch circuit, be electrically connected on this or door and should and door, the current potential of this reset signal is kept in its output, and when this was output as high potential with door, the side changed the potential state of this output, made the system finishing Reset Status.
Certainly, the present invention also can make this oscillator stability testing circuit be electrically connected on this delay circuit, make delay circuit confirm that this power supply is really stable after, the side triggers the stability of this oscillator stability testing circuit detection system frequency of oscillation
This oscillator stability testing circuit comprises: a schmitt trigger, in order to the less amplitude signal in the filtering appts oscillator signal; One frequency eliminator is electrically connected on this schmitt trigger, in order to strengthen and to stablize the amplitude of this frequency of oscillation.
The present invention makes and is understood in depth by following accompanying drawing and detailed description:
Fig. 1: be a preferred embodiment schematic diagram of this device.
See also Fig. 1, apparatus of the present invention comprise: a stability of power supply testing circuit 1, a delay circuit 2, an oscillator stability testing circuit 3, and a potentiometric controller 4; In present embodiment, this oscillator stability testing circuit 3 can be made up of a schmitt trigger 31 and a frequency eliminator 32, and this potentiometric controller 4 comprises: one or door 41, one and 42, and a S-R latch unit 43.
The present invention moves as follows: when system is reset, have a reset signal R
IN1Produce, make or an input S1 of door 41 is in " height " (High) state,, make the output R of potentiometric controller 4 again because the effect of S-R internal lock device 43
IN2Also be in " high " state, that is system is in Reset Status, whether 1 detection system supply voltage of stability of power supply testing circuit is stable, if the variation of power supply surpasses certain value, then produces a pulse signal, makes S2 be in high potential state, then R
IN2Can still be maintained at " high " state, system be remained be in Reset Status; When stability of power supply testing circuit 1 generation pulse signal gives potential controlling apparatus 4, can start delay circuit 2 simultaneously, make delay circuit 2 produce the delay of a set time, if stability of power supply testing circuit 1 does not start delay circuit 2 once more in this set time, the expression power supply is stable, then delay circuit 2 will make its output R1 be in " high " state, if and stability of power supply testing circuit 1 still continues to start this delay circuit 2 in this time of delay, represent that then system power supply stability testing circuit 1 still continues to start this delay circuit 2, represent that then system is unstable as yet, then delay circuit will be in being subjected to when mobile the reclocking should time of delay at every turn, and do not make output R1 be in " high " state; Oscillator stability testing circuit 3 can be in order to the stability of detection system frequency of oscillation, when it receives the oscillator signal of system, the oscillator signal of this system is filtered through a schmitt trigger 31, make the too small oscillator signal of amplitude earlier by filtering, make this system oscillation signal lag with a frequency eliminator 32 again, after amplitude of oscillation is tended towards stability, send its output of pulse enable signal R2 again and be " height "; And potentiometric controller 4 must be waited until when R1, R2 all are in " height ", and it exports R
IN2Just can transfer " low " (Low) state to, the Reset Status of system is finished; That is, in reset signal R
IN1After the input, need wait until that stability of power supply testing circuit 1 detects power supply and has been in stable state, and the stable state of power supply also must be through delay circuit 2 affirmations, after oscillator stability testing circuit 3 also makes frequency of oscillation stable simultaneously, the output R of potentiometric controller 4
IN2Just can transfer " low " to, Reset Status is finished by " height ".
Subsidiary one carry be, when system stable and after Reset Status is finished, if stability of power supply testing circuit 1 detects power supply again in operating state unsettled situation is arranged, then it is also by the potential state that changes S2, make the output of potentiometric controller 4 transfer high potential to, and reset system once more, till power supply is stable.
In addition, among the embodiment of above-mentioned Fig. 1, oscillator stability testing circuit 3 there is no with delay circuit 2 and connects, and this has represented that the stable detection of detection that power supply is stable and frequency of oscillation can independently carry out.But, the present invention also can make this oscillator stability testing circuit 3 be electrically connected on this delay circuit 2, make delay circuit 2 confirm that these power supplys are really stable after, trigger the stability of these oscillator stability testing circuit 3 detection system frequencies of oscillation again.
So, when the present invention produces in reset signal, the stability of while detection system power supply and frequency of oscillation, after treating that each parameter is all stable, just make reset signal reduce to " low " and end Reset Status, make anti-locking system because of the power supply instability, system's error that power supply clutter or frequency of oscillation instability are promptly started working and caused.
Though the present invention can make various modifications by the personnel that are familiar with this skill, do not break away from the protection of asking as attached claim.
Claims (5)
1. the setting device of a system reset state, it comprises in order to set the Reset Status of a system:
One stability of power supply testing circuit is in order to the stability of the power supply that detects this system;
One oscillator stability testing circuit is in order to the stability of detection system frequency of oscillation;
One potentiometric controller, be electrically connected on this stability of power supply testing circuit and this oscillator stability testing circuit, it receives a reset signal, and make its output maintain this reset signal to make this system be in the current potential of Reset Status, in this power supply and this frequency of oscillation be all stable after, the side changes its potential state, and finishes the Reset Status of this system.
2. the setting device of the system as claimed in claim 1 Reset Status, the setting device of this system reset state further comprises:
One delay circuit, be electrically connected on this potentiometric controller, the variation that detects power supply in this stability of power supply testing circuit is during less than certain value, be subjected to the startup of this stability of power supply testing circuit, and the set time that picks up counting, and when in this set time, no longer being started, confirm that this power supply is really stable, give this potentiometric controller and send a high potential signal.
3. the setting device of system reset state as claimed in claim 2, this potentiometric controller comprises:
One or the door, its input receives the output of this reset signal and this stability of power supply testing circuit respectively;
One with the door, its input receives the output of this delay circuit and the output of this oscillator stability testing circuit respectively;
One R-S latch circuit, be electrically connected on this or door and should and door, the current potential of this reset signal is kept in its output, and in this during with the output high potential of door, the side changes the potential state of this output, makes the system finishing Reset Status.
4. the setting device of system reset state as claimed in claim 3, wherein this oscillator stability testing circuit is for being electrically connected on this delay circuit, after making delay circuit confirm that this power supply is really stable, the side triggers the stability of this oscillator stability testing circuit detection system frequency of oscillation.
5. the setting device of system reset state as claimed in claim 3, this oscillator stability testing circuit comprises:
One schmitt trigger is in order to the less amplitude signal in the filtering appts oscillation frequency signal;
One frequency eliminator is electrically connected on this schmitt trigger, in order to strengthen and to stablize the amplitude of this frequency of oscillation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN95119891A CN1077988C (en) | 1995-12-15 | 1995-12-15 | Setter of system resetting state |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN95119891A CN1077988C (en) | 1995-12-15 | 1995-12-15 | Setter of system resetting state |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1152215A true CN1152215A (en) | 1997-06-18 |
| CN1077988C CN1077988C (en) | 2002-01-16 |
Family
ID=5082214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN95119891A Expired - Lifetime CN1077988C (en) | 1995-12-15 | 1995-12-15 | Setter of system resetting state |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1077988C (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100351738C (en) * | 2004-07-29 | 2007-11-28 | 中兴通讯股份有限公司 | Automatic power down rebooting device |
| CN101465635B (en) * | 2009-01-06 | 2012-07-04 | 苏州达方电子有限公司 | Reset method and electronic system applying the same |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3886529T2 (en) * | 1988-08-27 | 1994-06-30 | Ibm | Establishment in a data processing system for system initialization and reset. |
| US5109506A (en) * | 1989-06-19 | 1992-04-28 | International Business Machines Corp. | Microcomputer system including a microprocessor reset circuit |
-
1995
- 1995-12-15 CN CN95119891A patent/CN1077988C/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100351738C (en) * | 2004-07-29 | 2007-11-28 | 中兴通讯股份有限公司 | Automatic power down rebooting device |
| CN101465635B (en) * | 2009-01-06 | 2012-07-04 | 苏州达方电子有限公司 | Reset method and electronic system applying the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1077988C (en) | 2002-01-16 |
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| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C53 | Correction of patent for invention or patent application | ||
| CB02 | Change of applicant information |
Applicant after: Shengqun Semiconductor Co., Ltd. Applicant after: Hsinchu, China Taiwan Industrial Park, two new road, No. three Applicant before: Hetai Semiconductor Co., Ltd. Applicant before: Hsinchu, China Taiwan Industrial Park, two new road, No. five |
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| COR | Change of bibliographic data |
Free format text: CORRECT: APPLICANT; FROM: HETAI SEMICONDUCTOR CO., LTD. TO: SHENGQUN SEMICONDUCTOR CO., LTD. |
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| C14 | Grant of patent or utility model | ||
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Granted publication date: 20020116 |
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| EXPY | Termination of patent right or utility model |