CN115208505A - Time synchronization method and time synchronization device - Google Patents
Time synchronization method and time synchronization device Download PDFInfo
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- CN115208505A CN115208505A CN202211113537.XA CN202211113537A CN115208505A CN 115208505 A CN115208505 A CN 115208505A CN 202211113537 A CN202211113537 A CN 202211113537A CN 115208505 A CN115208505 A CN 115208505A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
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Abstract
The application discloses a time synchronization method and a time synchronization device, and belongs to the field of communication. The time synchronization method provided by the application comprises the following steps: receiving a target message for time synchronization, wherein the target message comprises a first timestamp, and the first timestamp is used for indicating the time of sending the target message by a master clock device; acquiring the first timestamp from the target message; acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message; acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value; determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency; and carrying out time synchronization according to the time deviation.
Description
Technical Field
The present application belongs to the field of communications, and in particular, relates to a time synchronization method and a time synchronization apparatus.
Background
In the communication network, after the master clock device is determined, the master clock device and the slave clock device can exchange messages and record the receiving and sending time of the messages, calculate the time deviation between the master clock device and the slave clock device, and the slave clock device adjusts the local time according to the time deviation, so that the time synchronization of the slave clock device and the master clock device can be realized.
However, in the related art, each time the master clock device and the slave clock device are synchronized, in the process of calculating the time deviation between the master clock device and the slave clock device, the time delay between the master clock device and the slave clock device needs to be measured in real time, which results in a slow time synchronization speed.
Disclosure of Invention
The embodiment of the application aims to provide a time synchronization method and a time synchronization device, and the problem that the time synchronization speed is low due to the fact that the time delay is dynamically measured in real time by the time synchronization method in the related art can be solved.
In a first aspect, an embodiment of the present application provides a time synchronization method, which is applied to a slave clock device, and includes:
receiving a target message for time synchronization, wherein the target message comprises a first timestamp, and the first timestamp is used for indicating the time of sending the target message by a master clock device;
acquiring the first timestamp from the target message;
acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value;
determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
and carrying out time synchronization according to the time deviation.
In a second aspect, an embodiment of the present application provides a time synchronization apparatus, including:
a receiving module, an obtaining module, a determining module and a time synchronizing module,
the receiving module is configured to receive a target packet for time synchronization, where the target packet includes a first timestamp, and the first timestamp is used to indicate a time when a master clock device sends the target packet;
the obtaining module is configured to obtain the first timestamp from the target packet;
the obtaining module is further configured to obtain a second timestamp, where the second timestamp is used to indicate a time when the target packet is received from a clock device;
the obtaining module is further configured to obtain a target time delay between the slave clock device and the master clock device, where the target time delay is a fixed value;
the determining module is configured to determine a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
and the time synchronization module is used for carrying out time synchronization according to the time deviation.
In the embodiment of the application, a target message for time synchronization is received, where the target message includes a first timestamp, and the first timestamp is used to indicate a time when a master clock device sends the target message; acquiring the first timestamp from the target message; acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message; acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value; determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency; and carrying out time synchronization according to the time deviation. Therefore, the target time delay is a fixed value, the target time delay does not need to be dynamically measured, the slave clock device does not need to send any message but can receive one message or at most two messages, and in this case, the time deviation of the slave clock device relative to the master clock device can be determined by using the time stamps (such as the first time stamp and the second time stamp) and the fixed time delay of the received target message, so that the calculation flow of the time deviation is simplified, and the time synchronization can be rapidly completed when the time synchronization is performed according to the time deviation.
Drawings
Fig. 1 is a schematic diagram of messages exchanged between master and slave clock devices in a time synchronization process in the related art;
fig. 2 is a schematic flowchart of a time synchronization method provided in an embodiment of the present application;
FIG. 3 is a schematic flow chart diagram of another time synchronization method provided by an embodiment of the present application;
FIG. 4 is a schematic flow chart diagram of another time synchronization method provided by an embodiment of the present application;
FIG. 5-1 is a schematic flow chart diagram of another time synchronization method provided by an embodiment of the present application;
FIG. 5-2 is a schematic flow chart diagram of another time synchronization method provided in an embodiment of the present application;
FIG. 6 is a schematic flow chart diagram of another time synchronization method provided in an embodiment of the present application;
fig. 7 is a schematic structural diagram of a time synchronization apparatus according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below clearly with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived from the embodiments in the present application by a person skilled in the art, are within the scope of protection of the present application.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application are capable of operation in sequences other than those illustrated or described herein, and that the terms "first," "second," etc. are generally used in a generic sense and do not limit the number of terms, e.g., a first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/", and generally means that the former and latter related objects are in an "or" relationship.
The applicant has noted that in the related art, as shown in fig. 1, the calculation principle of the time deviation of the slave clock device with respect to the master clock device is described as follows:
t4-t3= t-sm-offset; \8230; \ 8230; \ 8230; '8230; \8230; \ 8230; \ 8230;' 8230; \8230;, 8230;, 82308230;, formula (1)
t2-t1= t-ms + offset; \8230; \8230; '8230'; (2)
In equations (1) and (2) above, the offset may be a time offset of the slave clock device relative to the master clock device, the time delay from the master clock device to the slave clock device may be t-ms, and the time delay from the slave clock device to the master clock device may be t-sm. For the slave clock device, the first timestamp t1 may be a timestamp of a synchronization packet sent by the master clock device, and is encapsulated in the synchronization packet or a following packet; the second timestamp t2 may be a timestamp obtained when the synchronization packet is received from the clock device; and the slave clock equipment stamps a third time stamp t3 when sending the delay request message, and the master clock equipment stamps a fourth time stamp t4 when receiving the delay request message and transmits the third time stamp t3 and the fourth time stamp t4 back to the slave clock equipment through a delay response message.
Based on the above equations (1) and (2), the time offset (offset) of the slave clock device from the master clock device is calculated by the following equation:
offset = [ (t 2-t 1) - (t 4-t 3) + (t-sm-t-ms) ]/2; \8230;, 8230;, formula (3)
As can be seen from the above equation (3), the time synchronization method and the one-way delay measurement specified in the related art are performed simultaneously and mutually affected. If bi-directional delay symmetry is assumed, t-sm is equal to t-ms, so equation (3) above can be further simplified as:
offset = [ (t 2-t 1) - (t 4-t 3) ]/2; \8230;, 8230;, 823030, 8230;, 8230, and 4)
As can be seen from equation (4) above, in the related art, the slave clock device calculates the time deviation between the local clock of the slave clock device and the master clock device, and t1, t2, t3, and t4 need to be measured. In order to obtain t1, t2, t3 and t4, before calculating the time deviation in real time, the slave clock equipment at least needs to use three types of messages, namely a synchronous message, a delay request message and a delay response message; moreover, when the first timestamp t1 is encapsulated in the following message, the following message is also required to be utilized. And then, calculating the time deviation of the slave clock equipment relative to the master clock equipment in real time by adopting the acquired t1, t2, t3 and t4, wherein the time deviation needs to be calculated in real time every time of time synchronization, so that the problem of low time synchronization speed exists.
Based on this, the embodiments of the present application provide a time synchronization method, which does not need to dynamically measure the time delay every time of time synchronization as described in the related art, but can perform time synchronization of devices by regarding the time delay as a fixed value. Because the time delay is a fixed value, the time delay does not need to be dynamically measured, and under the condition, the time deviation of the slave clock equipment relative to the master clock equipment can be determined only by utilizing the first time stamp, the second time stamp and the fixed time delay, so that the calculation process of the time deviation is simplified, and the time synchronization can be quickly completed when the time synchronization is carried out according to the time deviation.
The time synchronization method provided by the embodiment of the application can be used for equipment in an Ethernet system. For example, in a scenario where the ethernet system is an automobile ethernet system, for a type of vehicle, the ethernet network architecture and physical topology of the vehicle are actually fixed during shipment or even during design, and the connection between network node devices in the automobile ethernet system is unchanged from the shipment of the vehicle to the end of the life cycle of the vehicle. Therefore, the time delay between two node devices in the automobile Ethernet system does not need to be dynamically measured every time synchronization as described in the related technology, and the time synchronization can be realized by calculating the time deviation by taking the time delay as an input constant.
The time synchronization method provided by the embodiment of the present application is described in detail below with reference to the accompanying drawings through specific embodiments and application scenarios thereof.
Fig. 2 is a schematic flowchart of a time synchronization method according to an embodiment of the present application.
As shown in fig. 2, the time synchronization method provided in the embodiment of the present application is applied to a slave clock device, and may include:
step 210: receiving a target message for time synchronization, wherein the target message comprises a first timestamp, and the first timestamp is used for indicating the time of sending the target message by a master clock device;
in step 210, the target packet for performing time synchronization may include a synchronization packet, and the synchronization packet may carry a first timestamp, where the first timestamp is used to indicate a time when the master clock device sends the synchronization packet. Or, the target packet for performing time synchronization may include a synchronization packet and a following packet, where the following packet carries a first timestamp, and the first timestamp is used to indicate a time when the master clock device sends the synchronization packet.
Step 220: acquiring the first timestamp from the target message;
in step 220, the target packet may include a synchronization packet, and in a scenario where the synchronization packet carries the first timestamp, the first timestamp may be obtained from the synchronization packet in the embodiment of the present application. Or the target packet may include a synchronization packet and a following packet, and in a scenario where the following packet carries the first timestamp, the first timestamp may be obtained from the following packet in the embodiment of the present application.
Step 230: acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
in step 230, the target message may include a sync message, and the second timestamp may be used to indicate a time at which the sync message was received from the clock device. The embodiment of the application may specifically generate the second timestamp by using a local clock of the slave clock device when the synchronization packet is received.
Step 240: acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value;
in step 240, the target time delay may be a predetermined fixed value, so that in the process of obtaining the target time delay, the target time delay does not need to be obtained by real-time dynamic measurement, but the predetermined fixed value may be obtained at one time as the target time delay.
Step 250: determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
in step 250, since the target time delay in the embodiment of the present application is a fixed value, it is not necessary to dynamically measure the target time delay each time synchronization is performed as described in the related art, and the target time delay may be used as an input constant to calculate the time offset, so as to perform time synchronization. It can be understood that, since the target delay does not need to be dynamically measured, the slave clock device does not need to initiate a delay request message to the master clock device, and the master clock device does not need to reply a delay response message to dynamically measure the target delay. In this case, only the time stamps (e.g., the first time stamp and the second time stamp mentioned above) of the target packet are used, so that the time deviation of the slave clock device relative to the master clock device can be determined, and the speed of time synchronization based on the time deviation is increased.
Step 260: and carrying out time synchronization according to the time deviation.
In step 260, the time of the slave clock device is adjusted according to the time offset of the slave clock device relative to the master clock device to achieve time synchronization between the slave clock device and the master clock device. The specific adjustment process may be to increase or decrease the time of the slave clock device according to the time deviation, and the application is not limited specifically.
According to the time synchronization method provided by the embodiment of the application, a target message for time synchronization is received, wherein the target message comprises a first timestamp, and the first timestamp is used for indicating the time for a master clock device to send the target message; acquiring the first timestamp from the target message; acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message; acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value; determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency; and carrying out time synchronization according to the time deviation. Therefore, the target time delay is a fixed value, the target time delay does not need to be dynamically measured, the slave clock device does not need to send any message but can receive one message or at most two messages, and in this case, the time deviation of the slave clock device relative to the master clock device can be determined by using the time stamps (such as the first time stamp and the second time stamp) and the fixed time delay of the received target message, so that the calculation flow of the time deviation is simplified, and the time synchronization can be rapidly completed when the time synchronization is performed according to the time deviation.
In a specific embodiment, in order to quickly acquire the target time delay, the target time delay may be stored in a target memory in advance, and the target time delay is acquired directly from the target memory when the time offset is determined. The following description will be made by taking fig. 3 as an example.
Fig. 3 is a schematic flowchart of another time synchronization method provided in an embodiment of the present application.
As shown in fig. 3, the time synchronization method provided in the embodiment of the present application is applied to a slave clock device, and may include:
step 310: receiving a target message for time synchronization, wherein the target message comprises a first timestamp which is used for indicating the time of a master clock device for sending the target message;
in step 310, reference may be made to the specific content of step 210, which is not described herein again.
Step 320: acquiring the first timestamp from the target message;
in step 320, reference may be made to the specific content of step 220, which is not described herein again.
Step 330: acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
in step 330, reference may be made to the specific contents of step 230, which is not described herein again.
Step 340: acquiring a prestored target time delay from a target memory, wherein the target time delay is a fixed value;
wherein step 340 may be a sub-step of step 240.
Step 350: determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
in step 350, reference may be made to the specific content in step 250, which is not described herein again.
Step 360: and carrying out time synchronization according to the time deviation.
In step 360, reference may be made to the specific content of step 260, which is not described herein again.
It can be understood that, in step 340, since the target latency is a fixed value, the target latency does not need to be dynamically measured, and the target latency can be prepared in advance, for example, the target latency is stored in the target memory in advance. The specific value of the target time delay can be related to the position of the slave clock device in the ethernet system and the link line. In practical application, in a scenario where the slave clock device is a device in an automobile ethernet system, the position and the link line of the slave clock device in the ethernet system may be fixed, and further, the target time delay may also be regarded as a fixed value.
Therefore, before the time deviation is determined, the target time delay stored in advance can be directly and quickly acquired from the target memory, the speed of acquiring the target time delay is improved, and the speed of determining the time deviation according to the target time delay is further improved.
In practical applications, the target storage may be a storage that is external to the clock device. For example, the target memory may be an Electrically Erasable Programmable Read Only Memory (EEPROM) or other types of memory, and the step 340 may include: and acquiring the target time delay stored in advance from a memory hung on the clock device.
Therefore, the target time delay is stored in the memory which is externally hung from the clock device, the target time delay is directly and quickly obtained from the memory when the memory which is externally hung from the clock device is electrified and loaded, the target time delay can be obtained from the target memory without depending on the time when the memory is electrified and loaded from the clock device, and the speed of obtaining the target time delay is further improved.
Of course, in other embodiments, the target memory may also be a memory in the slave clock device, or the target latency may also be obtained from the target memory when the slave clock device is powered on and loaded, or the target latency may be obtained from the slave clock device by a software method when the slave clock device is powered on and loaded, and the like, which is not limited in this application.
In a specific embodiment, the time offset can be calculated by taking the first time stamp, the second time stamp and the target time delay as source data, so that the calculation principle of the time offset is simplified. The following is an example of fig. 4.
Fig. 4 is a schematic flowchart of another time synchronization method provided in an embodiment of the present application.
As shown in fig. 4, the time synchronization method provided in the embodiment of the present application is applied to a slave clock device, and may include:
step 410: receiving a target message for time synchronization, wherein the target message comprises a first timestamp which is used for indicating the time of a master clock device for sending the target message;
in step 410, reference may be made to the specific content of step 210, which is not described herein again.
Step 420: acquiring the first timestamp from the target message;
in step 420, reference may be made to the specific content of step 220, which is not described herein again.
Step 430: acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
in step 430, reference may be made to the specific content of step 230, which is not described herein again.
Step 440: acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value;
step 440 may refer to the details of step 240 or step 340, which are not described herein again.
Step 450: calculating a result obtained by subtracting the first timestamp and the target time delay from the second timestamp in sequence; taking the result as the time offset;
wherein step 450 may be a sub-step of step 250.
Step 460: and carrying out time synchronization according to the time deviation.
In step 460, reference may be made to the specific content of step 260, which is not described herein again.
In step 450, the calculation formula of the time offset may be: offset = t2-t 1-t-ms.
Where offset represents the time offset, t2 represents the second timestamp, t1 represents the first timestamp, and t-ms represents the target delay.
It can be understood that, since the target delay is a fixed value, the target delay may be regarded as a constant, in this case, it is not necessary to dynamically measure the target delay, and it is naturally not necessary for the slave clock device to initiate a delay request message to the master clock device, and it is not necessary for the master clock device to reply a delay response message to dynamically measure the target delay. In this case, the time offset may be obtained by sequentially subtracting the first time stamp and the target time delay from the second time stamp, so that the time offset of the slave clock device with respect to the master clock device may be determined only by using the time stamps (e.g., the first time stamp and the second time stamp mentioned above) of the target packet and a constant (i.e., the target time delay), thereby increasing the speed of performing time synchronization based on the time offset.
In practical applications, the value of the target delay may be 0. For example, in an application scenario where the slave clock device is a device in an automobile ethernet system, the length of a connection line between any two devices in the automobile ethernet system is estimated to be within 10 meters, and the length of the connection line within 10 meters corresponds to the estimated time delay within 50ns, since the time accuracy requirement of time synchronization of the devices in the automobile ethernet system may be 1us, that is, the time delay between the slave clock device and the master clock device is much lower than the time accuracy requirement of the automobile ethernet. At this time, the delay may be ignored, that is, the delay may be defaulted to 0.
In this case, the calculation formula of the time offset may be: offset = t2-t 1. Where offset represents the time offset, t2 represents the second timestamp, and t1 represents the first timestamp. In this way, since the target latency is defaulted to 0, the embodiment of the application may consider not to provide a target memory for storing the target latency, thereby further reducing the hardware cost.
In another embodiment, in order to improve the stability and the anti-interference capability of the slave clock device, a process of filtering jitter may be performed, for example, in the embodiment of the present application, a plurality of time deviation values may be determined, an average value or a root mean square value of the plurality of time deviation values may be calculated, and the time of the slave clock device may be adjusted by using the average value or the root mean square value of the time deviation. The following is an example of FIGS. 5-1 and 5-2.
Fig. 5-1 is a schematic flow chart of another time synchronization method provided in an embodiment of the present application.
As shown in fig. 5-1, the time synchronization method provided in the embodiment of the present application is applied to a slave clock device, and may include:
step 510: receiving a target message for time synchronization, wherein the target message comprises a first timestamp, and the first timestamp is used for indicating the time of sending the target message by a master clock device;
in step 510, reference may be made to the specific content of step 210, which is not described herein again.
Step 520: acquiring the first timestamp from the target message;
in step 520, reference may be made to the specific content of step 220, which is not described herein again.
Step 530: acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
in step 530, reference may be made to the specific content of step 230, which is not described herein again.
Step 540: acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value;
in step 540, reference may be made to specific contents of step 240 or step 340, which are not described herein again.
Step 550: determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
in step 550, reference may be made to specific contents of step 240 or step 440, which are not described herein again.
Step 560: under the condition that a target condition is met, determining the time deviation of the slave clock equipment relative to the master clock equipment aiming at each target message in the N target messages received by the slave clock equipment to obtain N time deviations;
in step 560, 1 time offset can be calculated for 1 target packet received from the clock device by using the time offset calculation method described in steps 510 to 550; accordingly, N time offsets may be calculated for N target packets received from the clock device.
In practical application, N is greater than or equal to 2, or N is greater than or equal to 3, or N is greater than or equal to 4, and the like, and the application is not particularly limited.
In step 560, the target condition includes any one of: the slave clock equipment carries out time synchronization for the first time; the time deviation is determined M consecutive times greater than a threshold, where M is greater than or equal to 2.
In the scene of time synchronization of the slave clock equipment for the first time, N time deviations are obtained through calculation, and the time of the slave clock equipment is adjusted by adopting the average value of the N time deviations subsequently, so that the rapid convergence of the time synchronization can be realized.
The method comprises the steps that N time deviations are obtained through calculation under the condition that the slave clock equipment does not perform time synchronization for the first time and the time deviation determined for M times is larger than a threshold value, the time of the slave clock equipment is adjusted by the aid of the average value of the N time deviations, and the jitter performance of the slave clock equipment can be kept after time synchronization. Where retention is understood to be the ability of the slave clock device to retain a time offset over a period of time when time synchronization information is lost.
Therefore, the method for adjusting the time of the slave clock equipment by adopting the average value of the N time deviations can combine the rapid convergence of the time synchronization under the scene of time asynchronization and the jitter performance of the slave clock equipment maintained after the time synchronization.
Of course, for a scenario where the slave clock device does not perform time synchronization for the first time and the determined time deviation is smaller than the threshold, another embodiment of the present application may still adjust the time of the slave clock device by using an average value or a root mean square value of the N time deviations, which is not limited herein.
Step 570: determining an average of the N time deviations; wherein N is greater than or equal to 2;
step 580: adjusting the time of the slave clock device based on the average of the N time offsets.
Step 580 may be a substep of step 260, among others.
It can be understood that, in practical applications, the clock source of the master clock device and the clock source of the slave clock device are susceptible to external interference (e.g., environmental changes) to show clock frequency drift and jitter, resulting in jitter of the first time stamp and the second time stamp. Based on this, in step 580, since the calculated average value of the N time deviations can filter jitter of the timestamp, the time of the slave clock device is adjusted based on the average value of the N time deviations, and the stability and the interference rejection of the slave clock device can be improved.
The time synchronization method provided by the embodiment of the present application is described below with reference to an actual application scenario. As shown in fig. 5-2, a flow of a time synchronization method provided in an embodiment of the present application may include:
when the target equipment is powered on and loaded, acquiring the local clock grade of the target equipment;
determining that the target equipment is slave clock equipment according to the local clock grade of the target equipment and a clock source selection algorithm; and obtaining the time delay (t-ms) of the slave clock equipment relative to the master clock equipment;
the slave port of the slave clock device may be determined according to a clock source selection algorithm, and the target delay may specifically be a delay (t-ms) of the slave port of the slave clock device relative to a master port node (i.e., a master clock device) upstream of the slave port.
Receiving a synchronous message, acquiring a first timestamp t1 and a second timestamp t2, and calculating time deviation, wherein offset = t2-t1-t-ms;
the synchronous message may carry a first timestamp t1, and a local clock may be used to mark a second timestamp t2 when the synchronous message is received from the clock device;
judging whether the slave clock equipment carries out time synchronization for the first time;
under the condition that the slave clock equipment carries out time synchronization for the first time, N time deviations are obtained through calculation, and the time of the slave clock equipment is adjusted based on the average value of the N time deviations;
or, under the condition that the slave clock equipment does not perform time synchronization for the first time but the time deviation determined for M times is greater than the threshold value, calculating to obtain N time deviations, and subsequently adjusting the time of the slave clock equipment by adopting the average value of the N time deviations;
storing offset-i under the condition that the slave clock device does not perform time synchronization for the first time and the determined time deviation is smaller than a threshold value; within the time window T, an algorithm such as root mean square, average, etc. is used to calculate the offset-x for a plurality of stored offset-i values, and the offset-x is used to adjust the time of the slave clock device.
The offset-i may represent a time offset value calculated from the received sync packet i time, where i is a positive integer. The offset-x may be a value calculated by applying an algorithm such as root mean square, average, etc. to a plurality of calculated offset-i values within a certain time window T. Wherein, the time of the slave clock device can be temporarily not adjusted in a time window T, and the offset-x corresponding to the time window T is obtained by calculation; the slave clock device is adjusted in time at the end of the time window T using the calculated offset-x. Once the slave clock is timed using the calculated offset-x, the next time window can be entered, a number of offset-i are recollected in the next time window T and the offset-x in the next time window T is calculated. In practical application, the value of the time window T can be adaptively adjusted according to the deviation between the multiple offset-x, for example, the more the offset-x tends to zero, the larger the value of T can be, so as to lengthen the adjustment period for adjusting the time of the slave clock device. If the master clock device is fully synchronized with the slave clock device, the time of the slave clock device may not be adjusted for a long period of time. Thus, the accuracy and stability of time synchronization are higher.
Therefore, the time of the slave clock equipment is adjusted by adopting the average value or the root mean square of the N time deviations, and the rapid convergence of the time synchronization under the scene of time asynchronization and the jitter performance of the slave clock equipment maintained after the time synchronization can be considered.
It is noted that the above-mentioned time synchronization method embodiment determines the time offset according to the first time stamp, the second time stamp and the target time delay, and adjusts the time of the slave clock device based on the time offset. In fact, the embodiment of the present application may also provide another time synchronization method, which may adjust the time of the slave clock device based on the first time stamp (instead of the time offset) directly. The following is an example of fig. 6.
Fig. 6 is a schematic flow chart of another time synchronization method provided in the embodiment of the present application.
As shown in fig. 6, the time synchronization method provided in the embodiment of the present application is applied to a slave clock device, and may include:
step 610: receiving a target message for time synchronization, wherein the target message carries a first timestamp used for indicating the time of sending the target message by a main clock device;
in step 610, reference may be made to the specific content of step 210, which is not described herein again.
Step 620: acquiring the first timestamp from the target message;
step 620 may refer to the details of step 220, which are not described herein again.
Step 630: time synchronization is performed by any of the following: updating the time of the slave clock device to the time indicated by the first timestamp before receiving the next target message; or, obtaining a target time delay between the master clock device and the slave clock device; and before the next target message is received, updating the time of the slave clock equipment to the sum of the first timestamp and the target time delay.
In step 630, there are two ways of time synchronization: the first way is that the time of the slave clock device can be adjusted based on the first time stamp, and the time of the slave clock device is directly updated to the time indicated by the first time stamp, so as to realize the time synchronization of the slave clock device and the master clock device. The second way can adjust the time of the slave clock device based on the first timestamp and the target delay, and directly update the time of the slave clock device to the sum of the first timestamp and the target delay, so as to realize the time synchronization of the slave clock device and the master clock device. In both modes, the second time stamp does not need to be considered, only one message is adopted, and the time synchronization can be carried out by utilizing the first time stamp of the target message, so that the time synchronization can be completed quickly. Specifically, since the time offset does not need to be determined, the time synchronization can be completed more quickly than the method for performing time synchronization based on the time offset as described in any of the embodiments of fig. 2 to 5-2.
In addition, for the two time synchronization methods described in step 630, the first method does not need to consider the factor of the target delay, and can complete the time synchronization more quickly than the second method. Compared with the first mode, the second mode considers the target time delay and can more accurately adjust the time of the slave clock equipment on the premise of quickly completing the time synchronization.
According to the time synchronization method provided by the embodiment of the application, a target message for time synchronization is received, wherein the target message carries a first timestamp, and the first timestamp is used for indicating the time for a master clock device to send the target message; acquiring the first timestamp from the target message; time synchronization is performed by any of the following: updating the time of the slave clock equipment to the time indicated by the first timestamp before receiving the next target message; or, obtaining a target time delay between the master clock device and the slave clock device; and before the next target message is received, updating the time of the slave clock equipment to the sum of the first timestamp and the target time delay. Therefore, in the time synchronization process, the second time stamp does not need to be considered, the time synchronization can be carried out by utilizing the first time stamp of the target message, and the time synchronization can be completed quickly.
In a specific embodiment, in the step 630, when the time synchronization is performed specifically by updating the time of the slave clock device to the sum of the first timestamp and the target time delay, the time synchronization method provided in this embodiment of the present application may further include: before time synchronization, a target time delay between the master clock device and the slave clock device is obtained. In the case of acquiring the target time delay between the master clock device and the slave clock device, the target time delay is a fixed value. The specific obtaining process may refer to the specific content of step 240 or step 340, which is not described herein again. Thus, when the time of the slave clock device is adjusted based on the first timestamp and the target time delay, the target time delay is a fixed value, so that the target time delay does not need to be dynamically measured, and the time synchronization can be quickly completed.
Furthermore, the applicant needs to point out that, since the time adjustment of the slave clock device is based on the first time stamp generated by the clock source of other device (such as the master clock device), the time of the slave clock device is completely dependent on the first time stamp, and in the case that the first time stamp generated by the master clock device is jittered by external interference, the time accuracy and stability of the slave clock device are easily affected by the jitter of the first time stamp of the master clock device. Compared with the embodiment shown in fig. 6, which can perform time synchronization based on the first timestamp of the target packet, the stability of time synchronization based on the time offset is better in any of the embodiments of fig. 2 to 5-2.
In addition, the applicant needs to point out that, in practical applications, in a scenario where a clock device receives a target packet for time synchronization, the sending frequency of the target packet may refer to the sending frequency of a fast packet, so as to increase the sending frequency of the target packet, shorten the time for receiving the target packet from the clock device, and further increase the speed for implementing time synchronization by the clock device.
It should be noted that in the time synchronization method provided in the embodiment of the present application, the execution main body may be a time synchronization device, or a control module in the time synchronization device for executing the time synchronization method. In the embodiment of the present application, a time synchronization method performed by a time synchronization apparatus is taken as an example to describe the time synchronization apparatus provided in the embodiment of the present application.
Fig. 7 is a schematic structural diagram of a time synchronization apparatus according to an embodiment of the present application.
As shown in fig. 7, a time synchronization apparatus 700 provided in an embodiment of the present application may include:
a receiving module 710, an obtaining module 720, a determining module 730, and a time synchronizing module 740,
the receiving module is configured to receive a target packet for time synchronization, where the target packet includes a first timestamp, and the first timestamp is used to indicate a time when a master clock device sends the target packet;
the obtaining module is configured to obtain the first timestamp from the target packet;
the obtaining module is further configured to obtain a second timestamp, where the second timestamp is used to indicate a time when the target packet is received from a clock device;
the obtaining module is further configured to obtain a target time delay between the slave clock device and the master clock device, where the target time delay is a fixed value;
the determining module is configured to determine a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
and the time synchronization module is used for carrying out time synchronization according to the time deviation.
The time synchronization device provided by the embodiment of the application comprises a receiving module, a sending module and a receiving module, wherein the receiving module is used for receiving a target message for time synchronization, the target message comprises a first timestamp, and the first timestamp is used for indicating the time for sending the target message by a master clock device; an obtaining module, configured to obtain the first timestamp from the target packet; the obtaining module is further configured to obtain a second timestamp, where the second timestamp is used to indicate a time when the slave clock device receives the target packet; the acquisition module is further used for acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value; a determining module for determining a time offset of the slave clock device relative to the master clock device based on the first time stamp, the second time stamp, and the target latency; and the time synchronization module is used for carrying out time synchronization according to the time deviation. Therefore, the target time delay is a fixed value, the target time delay does not need to be dynamically measured, the slave clock equipment does not need to send any message but can receive one message or at most two messages, and under the condition, the time deviation of the slave clock equipment relative to the master clock equipment can be determined by utilizing the time stamps (such as the first time stamp and the second time stamp) and the fixed time delay of the received target message, so that the calculation process of the time deviation is simplified, and the time synchronization can be quickly completed when the time synchronization is carried out according to the time deviation.
Optionally, in the time synchronization apparatus provided in this embodiment of the present application, in the process of acquiring the target time delay, the acquiring module is specifically configured to: and acquiring the target time delay stored in advance from the target memory.
Therefore, the target time delay can be prepared in advance, for example, the target time delay is stored in the target memory in advance, and before the time deviation is determined, the target time delay stored in advance can be directly and quickly acquired from the target memory, so that the speed of acquiring the target time delay is increased, and the speed of determining the time deviation according to the target time delay is increased.
Optionally, in the time synchronization apparatus provided in this embodiment of the present application, the target storage is a storage attached to a slave device.
Therefore, the target time delay is stored in the memory which is externally hung from the clock device, the target time delay is directly and quickly obtained from the memory when the memory which is externally hung from the clock device is electrified and loaded, the target time delay can be obtained from the target memory without depending on the time when the memory is electrified and loaded from the clock device, and the speed of obtaining the target time delay is further improved.
Optionally, in the time synchronization apparatus provided in the embodiment of the present application, the determining module is specifically configured to:
calculating a result obtained by subtracting the first timestamp and the target time delay from the second timestamp in sequence;
taking the result as the time offset.
In this way, the time offset may be obtained by sequentially subtracting the first time stamp and the target time delay from the second time stamp, and the time offset of the slave clock device with respect to the master clock device may be determined only by using the time stamp (e.g., the first time stamp and the second time stamp mentioned above) of the target packet and a constant (i.e., the target time delay), thereby increasing the speed of performing time synchronization based on the time offset.
Optionally, in the time synchronization apparatus provided in the embodiment of the present application, a value of the target time delay is 0.
In this way, since the target latency is defaulted to 0, the embodiment of the application may consider not to provide a target memory for storing the target latency, thereby further reducing the hardware cost.
Optionally, in the time synchronization apparatus provided in the embodiments of the present application,
the determining module is further configured to determine, for each target packet of the N target packets received by the slave clock device, a time offset of the slave clock device with respect to the master clock device to obtain N time offsets when a target condition is satisfied;
the determining module is further configured to determine an average of the N time offsets; wherein N is greater than or equal to 2;
the time synchronization module is specifically configured to: adjusting the time of the slave clock device based on the average of the N time offsets.
Therefore, jitter of the time stamp can be filtered by the average value of the N time deviations obtained through calculation, and the stability and the anti-interference capability of the slave clock equipment can be improved by adjusting the time of the slave clock equipment based on the average value of the N time deviations.
In another specific embodiment, the time synchronization apparatus provided in the embodiment of the present application may include: the device comprises a receiving module, an acquisition module and a time synchronization module;
the receiving module is used for: receiving a target message for time synchronization, wherein the target message carries a first timestamp used for indicating the time of sending the target message by a main clock device;
the acquisition module is configured to: acquiring the first timestamp from the target message;
the time synchronization module is configured to: time synchronization is performed by any of the following: updating the time of the slave clock device to the time indicated by the first timestamp before receiving the next target message; or, obtaining a target time delay between the master clock device and the slave clock device; and before the next target message is received, updating the time of the slave clock equipment to the sum of the first time stamp and the time delay.
Therefore, in the time synchronization process, the second time stamp does not need to be considered, the time synchronization can be carried out by utilizing the first time stamp of the target message, and the time synchronization can be completed quickly.
The time synchronization device in the embodiment of the present application may be a device, or may be a component, an integrated circuit, or a chip in a terminal. The device can be mobile electronic equipment or non-mobile electronic equipment. By way of example, the mobile electronic device may be a mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and the non-mobile electronic device may be a server, a Network Attached Storage (NAS), a Personal Computer (PC), a Television (TV), a teller machine or a self-service machine, and the like, and the embodiment of the present application is not particularly limited.
The time synchronization apparatus in the embodiment of the present application may be an apparatus having an operating system. The operating system may be an Android operating system, an ios operating system, or other possible operating systems, which is not specifically limited in the embodiment of the present application.
The time synchronization device provided in the embodiment of the present application can implement each process implemented by the above method embodiment, and is not described here again to avoid repetition.
Optionally, an embodiment of the present application further provides an electronic device, including a processor, a memory, and a program or an instruction stored in the memory and capable of running on the processor, where the program or the instruction is executed by the processor to implement each process of the foregoing method embodiment, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.
It should be noted that the electronic device in the embodiment of the present application includes the mobile electronic device and the non-mobile electronic device described above.
The embodiment of the present application further provides a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or the instruction is executed by a processor, the program or the instruction implements the processes of the foregoing method embodiments, and can achieve the same technical effects, and in order to avoid repetition, details are not repeated here.
The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and so on.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one of 8230, and" comprising 8230does not exclude the presence of additional like elements in a process, method, article, or apparatus comprising the element. Further, it should be noted that the scope of the methods and apparatus of the embodiments of the present application is not limited to performing the functions in the order illustrated or discussed, but may include performing the functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application or portions thereof that contribute to the prior art may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (which may be a mobile phone, a computer, a server, or a network device, etc.) to execute the method according to the embodiments of the present application.
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the present embodiments are not limited to those precise embodiments, which are intended to be illustrative rather than restrictive, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope of the appended claims.
Claims (10)
1. A time synchronization method applied to a slave clock device comprises the following steps:
receiving a target message for time synchronization, wherein the target message comprises a first timestamp which is used for indicating the time of a master clock device for sending the target message;
acquiring the first timestamp from the target message;
acquiring a second timestamp, wherein the second timestamp is used for indicating the time when the slave clock equipment receives the target message;
acquiring a target time delay between the slave clock equipment and the master clock equipment, wherein the target time delay is a fixed value;
determining a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
and carrying out time synchronization according to the time deviation.
2. The method of claim 1, wherein obtaining the target latency between the slave clock device and the master clock device comprises:
and acquiring the prestored target time delay from the target memory.
3. The method of claim 2, wherein the target memory is a memory that is external to the clock device.
4. The method of any of claims 1-3, wherein determining the time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency comprises:
calculating a result obtained by subtracting the first timestamp and the target time delay from the second timestamp in sequence;
taking the result as the time offset.
5. The time synchronization method according to claim 4, wherein the target delay is 0.
6. The method for time synchronization of claim 1, further comprising:
under the condition that a target condition is met, determining the time deviation of the slave clock equipment relative to the master clock equipment aiming at each target message in the N target messages received by the slave clock equipment to obtain N time deviations;
determining an average of the N time offsets; wherein N is greater than or equal to 2;
the performing time synchronization according to the time offset includes: adjusting the time of the slave clock device based on the average of the N time offsets.
7. The time synchronization method according to claim 6, wherein the target condition includes any one of:
the slave clock equipment carries out time synchronization for the first time;
the time deviation is determined M consecutive times greater than a threshold, where M is greater than or equal to 2.
8. A time synchronization method applied to a slave clock device comprises the following steps:
receiving a target message for time synchronization, wherein the target message carries a first timestamp, and the first timestamp is used for indicating the time of sending the target message by a master clock device;
acquiring the first timestamp from the target message;
time synchronization is performed by any of the following:
updating the time of the slave clock device to the time indicated by the first timestamp before receiving the next target message;
or, obtaining a target time delay between the master clock device and the slave clock device; and before the next target message is received, updating the time of the slave clock equipment into the sum of the first timestamp and the target time delay.
9. The time synchronization method according to claim 8, wherein in a case where the target time delay between the master clock device and the slave clock device is obtained, the target time delay is a fixed value.
10. A time synchronization apparatus, comprising: a receiving module, an obtaining module, a determining module and a time synchronizing module,
the receiving module is configured to receive a target packet for time synchronization, where the target packet includes a first timestamp, and the first timestamp is used to indicate a time when a master clock device sends the target packet;
the obtaining module is configured to obtain the first timestamp from the target packet;
the obtaining module is further configured to obtain a second timestamp, where the second timestamp is used to indicate a time when the target packet is received from the clock device;
the obtaining module is further configured to obtain a target time delay between the slave clock device and the master clock device, where the target time delay is a fixed value;
the determining module is configured to determine a time offset of the slave clock device relative to the master clock device based on the first timestamp, the second timestamp, and the target latency;
and the time synchronization module is used for carrying out time synchronization according to the time deviation.
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| CN106162860A (en) * | 2015-04-27 | 2016-11-23 | 华为技术有限公司 | The method and system of a kind of time synchronized, the network equipment |
| WO2020103540A1 (en) * | 2018-11-21 | 2020-05-28 | 华为技术有限公司 | Synchronization method and apparatus |
| CN113411157A (en) * | 2021-08-20 | 2021-09-17 | 浙江国利信安科技有限公司 | Method, slave clock device, master clock device and system for clock synchronization |
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| CN106162860A (en) * | 2015-04-27 | 2016-11-23 | 华为技术有限公司 | The method and system of a kind of time synchronized, the network equipment |
| WO2020103540A1 (en) * | 2018-11-21 | 2020-05-28 | 华为技术有限公司 | Synchronization method and apparatus |
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Application publication date: 20221018 |