CN115206776A - Semiconductor and preparation method and application thereof - Google Patents

Semiconductor and preparation method and application thereof Download PDF

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Publication number
CN115206776A
CN115206776A CN202210652894.7A CN202210652894A CN115206776A CN 115206776 A CN115206776 A CN 115206776A CN 202210652894 A CN202210652894 A CN 202210652894A CN 115206776 A CN115206776 A CN 115206776A
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silicon substrate
semiconductor
gallium nitride
quadrangular prism
prism structure
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Inventor
宋伟东
郭越
孙一鸣
罗幸君
李述体
何鑫
张弛
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Wuyi University
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Wuyi University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

The invention discloses a semiconductor and a preparation method and application thereof. The semiconductor includes: a silicon substrate; the surface of the silicon substrate is provided with a plurality of independently arranged masks, and the masks are square; a quadrangular prism structure is formed between the mask and the silicon substrate; gallium nitride micro prisms grow on four side walls of the quadrangular prism structure, and the gallium nitride micro prisms are distributed in an array mode. The gallium nitride micro-prism structure has controllable and uniform size and is distributed in an array manner, has larger specific surface area, lower light reflectivity and stronger light capture capacity compared with a planar film, and has application potential in high-integration micro-nano photoelectric devices.

Description

Semiconductor and preparation method and application thereof
Technical Field
The invention relates to the technical field of semiconductor materials, in particular to a semiconductor and a preparation method and application thereof.
Background
Gallium nitride is used as a third-generation semiconductor material, has a band gap of 3.4eV, high electron mobility, high electron saturation velocity and excellent physical and chemical properties, and is widely applied to blue light, green light and ultraviolet light emitting devices. In addition, gallium nitride is also an ideal material for developing high-temperature, high-frequency and high-power devices. Compared with a planar thin film structure, the semiconductor can effectively release stress, inhibit polarization effect existing in the gallium nitride material, and compensate thermal stress and mismatch stress of the substrate and the gallium nitride, thereby obtaining a high-quality crystal material. However, the semiconductors reported at present have the problems of non-uniformity, uncontrollable property, disorder and the like, and the development of integrated micro-nano photoelectric devices is limited.
Therefore, there is a need to develop a semiconductor structure with controllable size, uniformity and large area order.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. To this end, a first aspect of the present invention provides a semiconductor.
The second aspect of the present invention also provides a method for manufacturing a semiconductor.
The third aspect of the present invention also provides a use of a semiconductor.
Embodiments of the first aspect of the present invention provide a semiconductor, comprising:
a silicon substrate;
the surface of the silicon substrate is provided with a plurality of independently arranged masks, and the masks are square;
a quadrangular prism structure is formed between the mask and the silicon substrate;
gallium nitride micro prisms grow on four side walls of the quadrangular prism structure, and the gallium nitride micro prisms are distributed in an array mode.
The semiconductor provided by the embodiment of the invention has at least the following beneficial effects:
the semiconductor structure has controllable and uniform size and is distributed in an array form, has larger specific surface area, lower light reflectivity and stronger light capture capacity compared with a planar film, and has application potential in high-integration micro-nano photoelectric devices.
According to some embodiments of the invention, the silicon substrate is n-type silicon or p-type silicon with a crystal orientation of <001 >.
According to some embodiments of the invention, the resistivity of the silicon in the silicon substrate is between 0.01 Ω · cm and 10000 Ω · cm.
According to some embodiments of the invention, the silicon substrate has a thickness of 300 μm to 500 μm.
According to some embodiments of the invention, the mask has a thickness of 100nm to 200nm.
According to some embodiments of the invention, the mask comprises silicon dioxide.
According to some embodiments of the invention, the gallium nitride microprisms are of a quadrangular prism structure having a trapezoidal cross-section.
According to some embodiments of the invention, the gallium nitride microprisms have a minimum structural unit size of 5 μm to 20 μm.
In a second aspect, an embodiment of the present invention provides a method for manufacturing a semiconductor, including the following steps:
s1, preparing a mask on the surface of a silicon substrate with a mask layer through photoetching;
s2, performing wet etching on the silicon substrate processed in the step S1 to form the quadrangular prism structure, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces;
and S3, growing the gallium nitride micro-prism on the side wall of the quadrangular prism by a metal organic vapor deposition method.
The preparation method of the semiconductor according to some embodiments of the invention has at least the following beneficial effects:
by utilizing the heteroepitaxial characteristics of gallium nitride material on different crystal faces of silicon and combining wet chemical etching and metal organic compound chemical vapor deposition technology, the semiconductor with ordered horizontal and vertical directions is prepared on the silicon substrate. The method can prepare large-area, high-order and high-quality crystals without a catalyst, and the microstructure density and size of the crystals can be flexibly controlled by the design of substrate patterns and epitaxial growth parameters.
According to some embodiments of the invention, in step S1, the lithography step is as follows:
s101, homogenizing the silicon substrate with the mask layer, and drying at 70-150 ℃ for 15-30 min;
s102, exposing the silicon substrate in the step S101, wherein the exposure parameters are as follows: the ultraviolet light power is 10 mW-30 mW, and the exposure time is 15 s-30 s;
s103, placing the silicon substrate processed in the step S102 in a developing solution to remove photoresist, wherein the developing time is 2-10 min; hardening the film at 80-100 deg.c for 5-15 min;
and S104, placing the silicon substrate processed in the step S103 in a buffer oxide etching solution, soaking for 2-10 min, cleaning for 5-15 min, and removing the photoresist to obtain the square mask.
According to some embodiments of the invention, in step S2, the wet etching comprises the following steps:
and S105, performing wet etching on the silicon substrate processed in the step S104 in an alkaline solution to obtain a quadrangular prism array pattern, wherein four side walls of the quadrangular prism array pattern are silicon (111) crystal faces.
According to some embodiments of the invention, the alkaline solution comprises at least one of a potassium hydroxide solution or a sodium hydroxide solution.
According to some embodiments of the invention, in step S3, the step of epitaxially growing the gallium nitride microprisms comprises:
s201, depositing an AlN insert layer with the thickness of 5nm to 50nm on a silicon substrate at the temperature of 800 ℃ to 900 ℃;
s202, growing the gallium nitride microprism under the pressure of 400-600 mbar and the temperature of 1000-1050 ℃, wherein the flow rates of the gallium source and the ammonia gas are 50-70 sccm and 2500-4000 sccm respectively.
According to some embodiments of the invention, the gallium source comprises trimethylgallium.
The third aspect of the invention provides an application of the semiconductor in micro-nano photoelectric devices.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a mask diagram of embodiment 1 of the present invention;
FIG. 2 is a schematic cross-sectional view of a semiconductor fabricated in example 2 of the present invention;
FIG. 3 is a schematic view of a semiconductor unit fabricated in example 1 of the present invention;
FIG. 4 is a SEM image of a semiconductor fabricated in example 1 of the present invention;
FIG. 5 is an SEM image of a semiconductor fabricated in accordance with example 2 of the present invention;
FIG. 6 is a PL spectrum of a semiconductor fabricated in example 2 of the present invention.
Wherein, 100: silicon substrate, 200: gallium nitride microprisms, 300: mask, 400: representing a lithographic pattern.
Detailed Description
The following are specific examples of the present invention, and the technical solutions of the present invention will be further described with reference to the examples, but the present invention is not limited to the examples.
The reagents, methods and equipment adopted by the invention are conventional in the technical field if no special description is given.
Example 1
Embodiment 1 provides a semiconductor, and referring to fig. 1 to 3, fig. 1 shows a mask 300 and a lithographic pattern 400; FIG. 2 shows the resulting gallium nitride microprisms 200 on a patterned substrate comprising a silicon substrate 100 and a silicon dioxide mask 300; fig. 3 shows gallium nitride microprisms 200 grown on the four sidewall surfaces of a quadrangular prism structure formed by a silicon substrate 100 and a mask 300.
The semiconductor includes:
a silicon substrate 100;
the surface of the silicon substrate 100 is provided with a plurality of independently arranged masks 300, and the masks 300 are square;
a quadrangular prism structure is formed between the mask 300 and the silicon substrate 100;
gallium nitride micro prisms 200 are grown on four side walls of the quadrangular prism structure, and the gallium nitride micro prisms 200 are distributed in an array manner.
The preparation method of the semiconductor of the present example is as follows:
s1, preparing a mask layer on an n-type silicon (with the crystal orientation of <001>, the resistivity of 1000 omega-cm and the thickness of 430 micrometers) substrate by utilizing PECVD, respectively ultrasonically cleaning the mask layer in sequence (acetone, isopropanol and deionized water), blow-drying the mask layer by using nitrogen, and drying the substrate in a hot stage at 150 ℃ for 15min; obtaining a silicon substrate with a mask layer, and preparing the mask through photoetching, wherein the steps are as follows:
s101, homogenizing the silicon substrate with the mask layer by using a homogenizer, and then drying at 150 ℃ for 30 min;
s102, placing the film in an ultraviolet exposure machine for exposure, wherein the exposure parameters are as follows: the ultraviolet power is 30mW, and the exposure time is 30s;
s103, soaking in a developing solution to remove photoresist, and developing for 10min; taking out, and hardening at 80 deg.C for 15min;
s104, soaking in a buffered oxide etching solution (BOE) for 10min, taking out and cleaning for 15min, and removing the photoresist to obtain a square mask;
s2, performing wet etching on the silicon substrate 100 processed in the step S1 to form a quadrangular prism structure, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces; the specific steps are as follows,
and S105, performing wet etching in KOH aqueous solution (30 wt.%), and obtaining the quadrangular prism structure by utilizing the principle that the KOH aqueous solution selectively etches different crystal faces of silicon, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces.
S3, selectively and epitaxially growing a gallium nitride micro-prism array structure on silicon (111) crystal faces of four side walls of the silicon substrate with the quadrangular array by adopting a metal organic vapor deposition process, wherein trimethyl gallium, trimethyl aluminum and ammonia gas are respectively used as a gallium source, an aluminum source and a nitrogen source, and nitrogen is used as a carrier gas; the process of epitaxial growth of the gallium nitride microprism array comprises the following steps:
s201, depositing an AlN insert layer with the thickness of 30nm on a silicon substrate at the temperature of 900 ℃;
s202, growing the gallium nitride microprism at the cavity pressure of 300mbar and the temperature of 1050 ℃, wherein the flow rates of trimethyl gallium and ammonia gas are respectively 50sccm and 4000sccm, and the growth time is 1800S.
As a result, as shown in fig. 4, fig. 4 is an SEM image of the semiconductor prepared in this example, and it can be seen that the semiconductor structures are distributed in an array.
Example 2
Embodiment 2 provides a semiconductor, including:
a silicon substrate 100;
the surface of the silicon substrate 100 is provided with a plurality of independently arranged masks 300, and the masks 300 are square;
a quadrangular prism structure is formed between the mask 300 and the silicon substrate 100;
gallium nitride micro prisms 200 are grown on four side walls of the quadrangular prism structure, and the gallium nitride micro prisms 200 are distributed in an array form.
The preparation method of the semiconductor of the present embodiment is as follows:
s1, preparing a mask layer on an n-type silicon (with the crystal orientation of <001>, the resistivity of 1000 omega cm and the thickness of 430 microns) substrate by utilizing PECVD (plasma enhanced chemical vapor deposition), respectively ultrasonically cleaning the mask layer according to the sequence (acetone, isopropanol and deionized water), blow-drying the mask layer by using nitrogen, and drying the substrate on a hot table at 150 ℃ for 15min; obtaining a silicon substrate with a mask layer, and preparing the mask by photoetching, wherein the steps are as follows:
s101, homogenizing the silicon substrate with the mask layer by using a homogenizer, and then drying at 150 ℃ for 30 min;
s102, placing the film in an ultraviolet exposure machine for exposure, wherein the exposure parameters are as follows: the ultraviolet power is 30mW, and the exposure time is 30s;
s103, soaking in a developing solution to remove photoresist, and developing for 10min; taking out, and hardening at 80 deg.C for 15min;
s104, soaking in a BOE solution for 10min, taking out and cleaning for 15min, and removing the photoresist to obtain a square mask;
s2, performing wet etching on the silicon substrate 100 processed in the step S1 to form a quadrangular prism structure, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces; specifically, the method comprises the following steps of,
and S105, finally, performing wet etching in KOH aqueous solution (30 wt.%), and obtaining the quadrangular prism structure by utilizing the principle that the KOH aqueous solution selectively etches different crystal faces of silicon, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces.
And S3, selectively and epitaxially growing a gallium nitride micro-prism array structure on silicon (111) crystal faces of four side walls of the silicon substrate 100 with the quadrangular prism array by adopting a metal organic vapor deposition process, wherein trimethyl gallium, trimethyl aluminum and ammonia are respectively used as a gallium source, an aluminum source and a nitrogen source, and nitrogen is used as a carrier gas. The process of epitaxial growth of the gallium nitride microprism array comprises the following steps:
s201, depositing an AlN insert layer with the thickness of 30nm on the silicon substrate 100 at the temperature of 900 ℃;
and S202, growing the gallium nitride micro-prism array at the temperature of 1050 ℃ under the pressure of the cavity of 300mbar, wherein the flow rates of trimethyl gallium and ammonia gas are 40sccm and 4000sccm respectively, and the growth time is 3600S.
The prepared semiconductor is shown in fig. 5, and fig. 5 is a semiconductor SEM image, and it can be seen that the semiconductor structures are distributed in an array.
The PL test was performed on the semiconductor prepared in example 2, and the test results are shown in fig. 6. It can be seen from the figure that the PL emission peak is consistent with the theoretical band gap of GaN, the emission intensity is high and the half-peak width is narrow, indicating that the quality of the prepared GaN crystal is very high.
While the present invention has been described in detail with reference to the embodiments thereof, the present invention is not limited to the embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.

Claims (10)

1. A semiconductor, characterized in that the semiconductor comprises:
a silicon substrate (100);
the surface of the silicon substrate (100) is provided with a plurality of independently arranged masks (300), and the masks (300) are square;
a quadrangular prism structure is formed between the mask (300) and the silicon substrate (100);
gallium nitride micro prisms (200) grow on four side walls of the quadrangular prism structure, and the gallium nitride micro prisms (200) are distributed in an array mode.
2. A semiconductor according to claim 1, characterized in that the silicon substrate (100) is n-type silicon or p-type silicon with a crystal orientation <001 >.
3. A semiconductor according to claim 1 or 2, characterized in that the thickness of the silicon substrate (100) is 300 μm to 500 μm.
4. The semiconductor of claim 1 or 2, wherein the mask (300) has a thickness of 100nm to 200nm.
5. The semiconductor according to claim 1 or 2, wherein the gallium nitride microprism (200) has a quadrangular prism structure with a trapezoidal cross-section.
6. The semiconductor of claim 1 or 2, wherein the gallium nitride microprisms (200) have a minimum structural unit size of 5 μm to 20 μm.
7. A method for producing a semiconductor according to any one of claims 1 to 6, comprising the steps of:
s1, preparing a mask (300) on the surface of a silicon substrate (100) with a mask layer through photoetching;
s2, performing wet etching on the silicon substrate (100) processed in the step S1 to form the quadrangular prism structure, wherein four side walls of the quadrangular prism structure are silicon (111) crystal faces;
and S3, growing the gallium nitride micro-prisms (200) on the four side walls of the quadrangular prism structure through a metal organic vapor deposition method.
8. The method for manufacturing a semiconductor according to claim 7, wherein in step S1, the photolithography step is as follows:
s101, homogenizing the silicon substrate (100) with the mask layer, and drying at 70-150 ℃ for 15-30 min;
s102, exposing the silicon substrate (100) in the step S101, wherein the exposure parameters are as follows: the ultraviolet light power is 10 mW-30 mW, and the exposure time is 15 s-30 s;
s103, placing the silicon substrate (100) processed in the step S102 in a developing solution to remove photoresist, wherein the developing time is 2-10 min; hardening the film at 80-100 deg.c for 5-15 min;
s104, placing the silicon substrate (100) processed in the step S103 in a buffer oxide etching solution, soaking for 2-10 min, cleaning for 5-15 min, and removing the photoresist to obtain a square mask (300);
preferably, in step S2, the wet etching includes the following steps:
and S105, carrying out wet etching on the silicon substrate (100) processed in the step S104 in an alkaline solution to obtain a quadrangular prism array pattern, wherein four side walls of the quadrangular prism array pattern are silicon (111) crystal faces.
9. The method for manufacturing a semiconductor according to claim 7, wherein the step of growing the gallium nitride microprisms (200) in step S3 comprises:
s201, depositing an AlN insert layer with the thickness of 5nm to 50nm on a silicon substrate (100) at the temperature of 800 ℃ to 900 ℃;
s202, growing the gallium nitride microprism (200) under the pressure of 400-600 mbar and the temperature of 1000-1050 ℃, wherein the flow rates of the gallium source and the ammonia gas are 50-70 sccm and 2500-4000 sccm respectively.
10. Use of the semiconductor of any one of claims 1 to 6 in micro-nano optoelectronic devices.
CN202210652894.7A 2022-06-10 2022-06-10 Semiconductor and preparation method and application thereof Pending CN115206776A (en)

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CN202210652894.7A CN115206776A (en) 2022-06-10 2022-06-10 Semiconductor and preparation method and application thereof

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