CN115202949A - Chip signal monitoring device and method, computer equipment and storage medium - Google Patents
Chip signal monitoring device and method, computer equipment and storage medium Download PDFInfo
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- CN115202949A CN115202949A CN202211125876.XA CN202211125876A CN115202949A CN 115202949 A CN115202949 A CN 115202949A CN 202211125876 A CN202211125876 A CN 202211125876A CN 115202949 A CN115202949 A CN 115202949A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
Abstract
The application discloses a device and a method for monitoring chip signals, computer equipment and a storage medium. The apparatus is integrated on a chip, comprising: the verification module is used for receiving a verification instruction and verifying the target monitoring signal determination module and/or the reference signal determination module and/or the signal comparison module according to the verification instruction; the target monitoring signal determining module is used for receiving a first monitoring instruction and determining a target monitoring signal according to the first monitoring instruction; the reference signal determining module is used for receiving the second monitoring instruction and determining a reference signal according to the second monitoring instruction; and the signal comparison module is used for receiving the target monitoring signal sent by the target monitoring signal determination module, receiving the reference signal sent by the reference signal determination module, comparing the target monitoring signal with the reference signal to obtain a comparison result, and when the comparison result is the same, continuing to acquire a new monitoring instruction and monitoring the new target monitoring signal.
Description
Technical Field
The present disclosure relates to the field of chip signal monitoring technologies, and in particular, to a device and a method for monitoring a chip signal, a computer device, and a storage medium.
Background
With the development of science and technology, the chip becomes the core of a microprocessor or a multi-core processor, which can control everything from a computer to a mobile phone to an automobile. Meanwhile, modern computing, communication, manufacturing and transportation systems, including the internet, all rely on the presence of a chip. In order to meet the requirements of the functional safety level of the chip, the correctness of the input signal or the output signal of the chip needs to be ensured.
In the prior art, in order to ensure the correctness of chip signals, a monitoring device is mainly built outside a chip or monitoring software is used for monitoring the chip signals. However, the method of building the monitoring device on the periphery of the chip needs a lot of manpower and material resources, and the monitoring efficiency is low; monitoring the chip signals by using monitoring software can increase the development difficulty, increase the workload of developers and have certain influence on the running speed of the chip.
Therefore, how to ensure the correctness of the chip signal and how to improve the monitoring efficiency of the chip signal are technical problems to be solved urgently by those skilled in the art.
Disclosure of Invention
Based on the above problems, the present application provides a device and a method for monitoring a chip signal, a computer device, and a storage medium, so as to improve the monitoring efficiency of the chip signal and save labor time.
The embodiment of the application discloses the following technical scheme:
in a first aspect, an embodiment of the present application provides an apparatus for monitoring a chip signal, which is integrated on a chip, and includes: the device comprises a verification module, a target monitoring signal determination module, a reference signal determination module and a signal comparison module;
the verification module is used for receiving a verification instruction; and is used for verifying the target monitoring signal determination module and/or the reference signal determination module and/or the signal comparison module according to the verification instruction;
the target monitoring signal determining module is used for receiving a first monitoring instruction; the target monitoring signal is determined according to the first monitoring instruction;
the reference signal determining module is used for receiving a second monitoring instruction; and is used for determining a reference signal according to the second monitoring instruction;
the signal comparison module is used for receiving the target monitoring signal sent by the target monitoring signal determination module; and is used for receiving the reference signal sent by the reference signal determining module; the target monitoring signal is compared with the reference signal to obtain a comparison result, wherein the comparison result comprises the same or different comparison results; when the comparison results are the same, continuously acquiring a new monitoring instruction, and monitoring a new target monitoring signal;
the verification module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively; the target monitoring signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the reference signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the signal comparison module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively.
Optionally, the apparatus further comprises:
the configuration register module is used for receiving a user command; and is used for sending a verification instruction to the verification module according to the user command; the target monitoring signal determining module is used for sending a target monitoring signal to the target monitoring signal determining module according to the user command; and is used for sending a second monitoring instruction to the reference signal determination module according to the user command; the first monitoring instruction and the second monitoring instruction are determined and obtained according to the same user command;
the configuration register module is electrically connected with the target monitoring signal determining module, the verifying module, the reference signal determining module and the signal comparing module respectively.
Optionally, the signal comparison module is further configured to:
when the comparison results are different, sending a signal error message to the configuration register module; wherein the signal error message includes a target monitoring signal and a reference signal corresponding to the comparison result when the comparison result is different.
Optionally, the configuration register module is further configured to receive a signal error message; and is used for sending an operating instruction to a processing register module according to the signal error message.
Optionally, the apparatus further comprises:
the processing register module is used for receiving the operation instruction sent by the configuration register module; and is used for forwarding the operation instruction to a signal processing module;
the processing register module is electrically connected with the configuration register module and the signal processing module respectively.
Optionally, the apparatus further comprises:
the signal processing module is used for receiving the operation instruction forwarded by the processing register module; and is used for executing the corresponding operation module according to the operation instruction;
the signal processing module is electrically connected with the signal comparison module, the processing register module and the operation module respectively.
Optionally, the operation module is an interrupt processing module, an alarm processing module, or a reset processing module.
In a second aspect, an embodiment of the present application provides a method for monitoring a chip signal, where the method includes:
receiving a verification instruction;
verifying a module for monitoring signals according to the verification instruction;
if the verification is passed, respectively receiving a first monitoring instruction and a second monitoring instruction;
determining a target monitoring signal according to the first monitoring instruction;
determining a reference signal according to the second monitoring instruction;
comparing the target monitoring signal with the reference signal to obtain comparison results, wherein the comparison results are the same or different; and if the target monitoring signals are the same, receiving a new first monitoring command and a new second monitoring command, and monitoring the new target monitoring signals.
In a third aspect, an embodiment of the present application provides a computer device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the chip signal monitoring method according to the second aspect.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and when the instructions are executed on a terminal device, the instructions cause the terminal device to perform the chip signal monitoring method according to the second aspect.
Compared with the prior art, the method has the following beneficial effects:
the apparatus of the present application is integrated on a chip, comprising: the device comprises a verification module, a target monitoring signal determination module, a reference signal determination module and a signal comparison module; the verification module is used for receiving a verification instruction and verifying the target monitoring signal determination module and/or the reference signal determination module and/or the signal comparison module according to the verification instruction; the target monitoring signal determining module is used for receiving the first monitoring instruction and determining a target monitoring signal according to the first monitoring instruction, and the reference signal determining module is used for receiving the second monitoring instruction and determining a reference signal according to the second monitoring instruction; the signal comparison module is used for receiving the target monitoring signal sent by the target monitoring signal determination module, receiving the reference signal sent by the reference signal determination module, comparing the target monitoring signal with the reference signal to obtain a comparison result, wherein the comparison result comprises the same or different results, and when the comparison result is the same, continuously acquiring a new monitoring instruction and monitoring the new target monitoring signal; the verification module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively; the target monitoring signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the reference signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the signal comparison module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively.
Based on the above, utilize the verification module to verify the module for monitoring, guarantee the exactness of the module for monitoring, avoid leading to the problem of chip signal error because of certain module inefficacy, compare target monitoring signal and reference signal through utilizing signal comparison module, if the comparison result is the same, then think the chip signal is correct, and simultaneously, through continuously receiving new monitoring instruction, continuously monitor the chip signal, guarantee the exactness of chip signal, stability and reliability, in addition, the device that this application provided is integrated on the chip, need not again the chip periphery build monitoring devices, manpower and materials have been saved, and need not utilize monitoring software to monitor, avoided software monitoring to cause the influence to chip functioning speed.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the description below are only some embodiments of the present application, and for those skilled in the art, other drawings may be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a device for monitoring a chip signal according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another chip signal monitoring apparatus according to an embodiment of the present disclosure;
fig. 3 is a flowchart of a method for monitoring a chip signal according to an embodiment of the present disclosure.
Detailed Description
As described above, in the research on monitoring of chip signals, it is found that in the prior art, in order to ensure the correctness of the chip signals, monitoring of the chip signals is mainly performed by building a monitoring device outside the chip or by monitoring software. However, the method of building the monitoring device on the periphery of the chip needs a lot of manpower and material resources, and the monitoring efficiency is low; monitoring the chip signals by using monitoring software can increase the development difficulty, increase the workload of developers, and have certain influence on the running speed of the chip.
In order to solve the above problem, an embodiment of the present application provides a device for monitoring a chip signal. The device includes: the device comprises a verification module, a target monitoring signal determination module, a reference signal determination module and a signal comparison module; the verification module is used for receiving a verification instruction and verifying the target monitoring signal determination module and/or the reference signal determination module and/or the signal comparison module according to the verification instruction; the device comprises a target monitoring signal determining module, a reference signal determining module and a monitoring signal processing module, wherein the target monitoring signal determining module is used for receiving a first monitoring instruction and determining a target monitoring signal according to the first monitoring instruction; the signal comparison module is used for receiving the target monitoring signal sent by the target monitoring signal determination module, receiving the reference signal sent by the reference signal determination module, comparing the target monitoring signal with the reference signal to obtain a comparison result, wherein the comparison result comprises the same or different results, and when the comparison result is the same, continuously acquiring a new monitoring instruction and monitoring the new target monitoring signal; the verification module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively; the target monitoring signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the reference signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the signal comparison module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively.
So, verify the module that is used for monitoring through utilizing the verification module, guarantee the exactness of the module that is used for monitoring, avoid leading to the wrong problem of chip signal because of certain module inefficacy, compare target monitoring signal and reference signal through utilizing signal comparison module, if the comparison result is the same, then think the chip signal is correct, and simultaneously, through continuously receiving new monitoring instruction, continuously monitor the chip signal, guarantee the exactness of chip signal, stability and reliability, furthermore, the device that this application provided is integrated on the chip, need not again the chip periphery build monitoring devices, manpower and materials have been saved, and need not utilize monitoring software to monitor, avoided software monitoring to cause the influence to chip functioning speed.
In order to make the technical solutions of the present application better understood, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The chips referred to in the following embodiments may be car chips and other chips, and the protection scope of the chips is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the chip types described in the present application should be covered within the protection scope of the present application.
The chip signals related to the following embodiments may be input signals or output signals, such as on-chip digital output signals, external pin input signals, communication peripheral module output signals, and the like, including but not limited to the three signals, and any chip-related signals are intended to be covered by the scope of the present application.
The following embodiments relate to electrical connections as electrical connections that refer to physical contacts, rather than wireless communication signal connections.
Referring to fig. 1, which is a schematic structural diagram of a device for monitoring a chip signal according to an embodiment of the present disclosure, and with reference to fig. 1, the device 100 is integrated on a chip, and specifically may include: the device comprises: a verification module 101, a target monitoring signal determination module 102, a reference signal determination module 103 and a signal comparison module 104.
The verification module 101 is electrically connected to the target monitoring signal determination module 102 and the reference signal determination module 103 respectively; the target monitoring signal determination module 102 is electrically connected to the verification module 101 and the signal comparison module 104 respectively; the reference signal determination module 103 is electrically connected to the verification module 101 and the signal comparison module 104 respectively; the signal comparison module 104 is electrically connected to the target monitoring signal determination module 102 and the reference signal determination module 103, respectively.
The monitoring device of the chip signal is integrated on the chip, the integration is not limited to the chip at any position of the chip, no specific limitation is made on which position the monitoring device of the chip signal is specifically integrated on the chip, and the meaning of the above-mentioned "on the chip" is the integration on the chip, not the other positions unrelated to the chip. The specific integration position can be adjusted according to actual conditions.
The verification module 101 is configured to receive a verification instruction; and is used for verifying the target monitoring signal determination module 102 and/or the reference signal determination module 103 and/or the signal comparison module 104 according to the verification instruction.
As an optional implementation manner, on the basis of the connection relationship, the verification process of the verification module 101 may be:
the verification module receives a verification instruction, wherein the verification instruction is used for verifying the target monitoring signal determination module, the reference signal determination module and the signal comparison module.
The verification module inputs a preset monitoring signal A to the target monitoring signal determination module and inputs a preset reference signal B to the reference signal determination module; the signal comparison module compares the received preset monitoring signal A1 sent by the target monitoring signal determination module with the preset reference signal B1 sent by the reference signal determination module to obtain a comparison result C.
Sending the A1, the B1 and the C to a register, judging whether the A1 is equal to the A or not, judging whether the B1 is equal to the B or not, judging whether the C is equal to a preset result C1 in the register or not, if the three judgment results are yes, proving that the target monitoring signal determining module, the reference signal determining module and the signal comparing module are normal in function, and if the judgment result is no, judging that the module corresponding to the judgment result is in fault.
As an optional implementation manner, the verification module may verify each module before the chip operates, and if the verification instruction is not received before the chip operates, the verification is not performed, and the normal operation of the subsequent chip is not affected.
As another alternative, the verification module may set a verification period by itself, and each functional module in the apparatus 100 may be verified at regular intervals, where the verification period may be set according to an actual situation, and is not limited in this respect.
The verification module 101 is used for ensuring normal operation of each functional module, and once a fault is found, the fault can be processed in time, so that stability and reliability of a chip signal are ensured.
The target monitoring signal determination module 102 is configured to receive a first monitoring instruction; and the target monitoring signal is determined according to the first monitoring instruction.
In the practical application process, the chip may include a plurality of signal modules with different types and different channel numbers, such as an input signal module 1, an input signal module 2, an output signal module 1, an output signal module 2, a communication peripheral module signal module 1, and the like, so that a plurality of chip signals received by the target monitoring signal determination module exist.
The first monitoring instruction comprises the type of the chip signal, the channel type and the channel label, so that the target monitoring signal determining module can determine the target monitoring signal according to the type of the chip signal, the channel type and the channel label in the first monitoring instruction.
The first monitoring instruction includes, but is not limited to, the three kinds of data, and may include other data, which is not limited herein.
The reference signal determination module 103 is configured to receive a second monitoring instruction; and is used for determining a reference signal according to the second monitoring instruction.
The first monitoring instruction and the second monitoring instruction may include the same data type but different data content, for example, the first monitoring instruction includes a channel 1, the second monitoring instruction includes a channel 2, and the data types included in the two instructions are both channel numbers but different data content. That is, the reference signal is determined by selecting the same type as the target monitoring signal, but using a channel known to operate normally as a reference channel and outputting a standard chip signal as the reference signal.
The signal comparison module 104 is configured to receive the target monitoring signal sent by the target monitoring signal determination module 102; and is configured to receive the reference signal sent by the reference signal determining module 103; the target monitoring signal and the reference signal are compared to obtain a comparison result, wherein the comparison result comprises the same or different; and when the comparison result is the same, continuously acquiring a new monitoring instruction and monitoring a new target monitoring signal.
The utility model provides a monitoring devices of chip signal, verify the module that is used for monitoring through utilizing the verification module, guarantee the exactness of the module that is used for monitoring, avoid leading to the problem of chip signal mistake because of certain module inefficacy, compare target monitoring signal and reference signal through utilizing signal comparison module, if the comparison result is the same, then think the chip signal is correct, and simultaneously, through continuously receiving new monitoring instruction, continuously monitor the chip signal, guarantee the exactness of chip signal, stability and reliability, furthermore, the device that this application provided is integrated on the chip, need not set up monitoring devices in chip periphery again, manpower and materials have been saved, and need not utilize monitoring software to monitor, it causes the influence to chip functioning speed to have avoided software monitoring.
Based on the chip signal monitoring device provided in the foregoing embodiment, in order to further explain or introduce the device and further ensure the correctness, stability and reliability of the chip signal, the present application further provides a chip signal monitoring device, and in detail, see fig. 2, and fig. 2 is a schematic structural diagram of another chip signal monitoring device according to an embodiment of the present application.
Fig. 2 is a further development based on fig. 1, and therefore, the same modules in fig. 2 as those in fig. 1 have the same effects or functions as those in the above-described embodiment, and are not described again in this embodiment. The same reference numerals are used for the same modules in fig. 2 as those in fig. 1 to show that the modules are the same and have the same functions or functions.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another chip signal monitoring apparatus provided in the embodiment of the present application, and on the basis of the apparatus 100 provided in the foregoing embodiment, the apparatus may further include:
a configuration register module 201 for receiving user commands; and is configured to send a verification instruction to the verification module 101 according to the user command; and is used for sending a first monitoring instruction to the target monitoring signal determination module 102 according to the user command; and is configured to send a second monitoring instruction to the reference signal determination module 103 according to the user command; and the first monitoring instruction and the second monitoring instruction are determined according to the same user command.
The user command is a command sent by a user to the register, and the user command may include a type of a chip signal, including but not limited to the type of the chip signal, and is not limited in this respect.
The type of the user command may be an authentication type or a monitoring type, including but not limited to the two types, which is not limited herein.
The configuration register module 201 is electrically connected to the target monitoring signal determining module 102, the verifying module 101, the reference signal determining module 103, and the signal comparing module 104, respectively.
As an implementation manner, the configuration register module 201 may be further configured to perform parameter configuration on each functional module according to a user command.
As an implementation manner, based on the above configuration register module 201, the signal comparison module 104 may be further configured to:
when the comparison results are different, sending a signal error message to the configuration register module 201; wherein the signal error message includes a target monitoring signal and a reference signal corresponding to the comparison result when the comparison result is different.
The signal error message comprises a target monitoring signal and a reference signal, so that the signal modules corresponding to the target monitoring signal and the reference signal can be respectively determined, and which signal module has a fault can be determined, and the accuracy and the stability of the chip signal are ensured.
As an optional implementation, the configuration register module 201 is further configured to receive a signal error message; and is used to send operating instructions to the processing register module 202 according to the signal error message.
According to the received signal error message, a corresponding decision is made, and an operation instruction is sent to the processing register module 202 according to the decision. For example, if the received signal error message is a channel 1 fault, the corresponding decision may be to reset the channel 1, and then, according to the decision to reset the channel 1, a reset operation instruction is sent to the processing register module 202. The examples are given solely for the purpose of illustration and are not to be construed as a limitation on the scope of the present application.
As an optional implementation, the apparatus 200 may further include:
a processing register module 202, configured to receive an operation instruction sent by the configuration register module 201; and for forwarding the operation instructions to the signal processing module 203.
The processing register module 202 is electrically connected to the configuration register module 201 and the signal processing module 203, respectively.
As an implementation manner, the processing register module 202 may be further configured to perform corresponding parameter configuration according to a user command.
As an optional implementation, the apparatus 200 may further include:
the signal processing module 203 is configured to receive the operation instruction forwarded by the processing register module 202; and is configured to execute the corresponding operation module 204 according to the operation instruction.
The signal processing module 203 is electrically connected to the signal comparing module 104, the processing register module 202, and the operating module 204, respectively.
As an alternative embodiment, the operation module 204 may be an interrupt processing module 2041, an alarm processing module 2042, or a reset processing module 2043.
The operation module 204 is not limited to the three modules, and may also be other modules, such as a conversion processing module, a stop processing module, and the like, and is not limited herein.
As an alternative embodiment, on the basis of the apparatus 200, referring to fig. 2, the modules related to the apparatus 200 may further include:
a chip signal module 301 electrically connected to the target monitoring signal determination module 102 and the reference signal determination module 103, respectively; for transmitting chip signals; and is used for inputting chip signals to the target monitoring signal determination module 102 and the reference signal determination module 103, respectively.
The chip signal module 301 includes a plurality of signal modules with different types and different labels, such as on-chip digital quantity output modules 1,2, \ 8230;, n; a general purpose input/output module; communication peripheral modules 1,2, \ 8230;, n. Including but not limited to the three signal modules, which are only examples in the embodiments of the present application and fig. 2.
As an implementation manner, on the basis of the apparatus 200, referring to fig. 2, the modules related to the apparatus 200 may further include:
and the on-chip clock unit 302 is electrically connected with the target monitoring signal determination module 102 and is used for monitoring the frequency of the target monitoring signal.
The on-chip bus interface unit 303 is electrically connected to the configuration register module 201 and the processing register module 202, respectively, and is configured to perform initial value configuration on the configuration register module 201 and the processing register module 202 through an on-chip bus.
In FIG. 2 provided herein, also included are input pin sets 1,2, \8230;, n, and input channels 1,2, \8230;, n; the input pin group and the input channel have a one-to-one correspondence relationship, for example, the input pin group 1 corresponds to the input channel 1. The combined effect of the two is that the signal quantity which needs to be monitored in practical application of the chip can be instantiated (similar to copy and paste) in the same set of monitoring device, wherein the instantiations are greater than or equal to 1. Each input channel comprises a verification module, a target monitoring signal determination module, a reference signal determination module, a signal comparison module and a configuration register module.
According to the monitoring device for the chip signal provided by the embodiment of the application, on the basis of the beneficial effects of the monitoring device for the chip signal provided by the embodiment of the application, the signal modules corresponding to the target monitoring signals with different comparison results can be processed, and the accuracy, stability and reliability of the chip signal can be further ensured.
Based on the apparatus for monitoring a chip signal provided in the foregoing embodiment, an embodiment of the present application further provides a method for monitoring a chip signal, referring to fig. 3, where fig. 3 is a flowchart of the method for monitoring a chip signal provided in the embodiment of the present application, and with reference to fig. 3, the method may include:
s301: a validation instruction is received.
S302: and verifying the module for monitoring the signal according to the verification instruction.
As an alternative embodiment, if the verification instruction is not received, steps S301 and S302 may be skipped, and step S303 is directly performed.
The module for monitoring the signal is verified through the steps S301 and S302, so that the normal function of the module can be ensured, and the correctness and stability of the chip signal are further ensured.
S303: if the verification is passed, receiving a signal monitoring instruction; wherein the signal monitoring instructions include a first monitoring instruction and a second monitoring instruction.
S304: and determining a target monitoring signal according to the first monitoring instruction.
S305: and determining a reference signal according to the second monitoring instruction.
S306: comparing the target monitoring signal with the reference signal to obtain comparison results, wherein the comparison results are the same or different; and if the target monitoring signals are the same, receiving a new signal monitoring command and monitoring a new target monitoring signal.
As an optional implementation manner, the step S306 may further include: if the comparison result is different, an error signal message is sent to the configuration register.
As an optional implementation manner, after sending the error signal message to the configuration register, the method may further include:
s307: and receiving an operation instruction.
The operation instruction may include an operation type and/or a module for performing an operation.
S308: and executing a corresponding operation module according to the operation instruction to perform operation processing.
The chip signal monitoring method provided by the embodiment of the present application has the same beneficial effects as the chip signal monitoring device provided by the above embodiment, and therefore, the details are not repeated.
The embodiment of the application also provides corresponding equipment and a computer storage medium, which are used for realizing the scheme provided by the embodiment of the application.
The device comprises a memory and a processor, wherein the memory is used for storing instructions or codes, and the processor is used for executing the instructions or codes so as to enable the device to execute the chip signal monitoring method in any embodiment of the application.
The computer storage medium stores codes, and when the codes are executed, the device running the codes realizes the chip signal monitoring method according to any embodiment of the application.
It should be noted that, in the present specification, all the embodiments are described in a progressive manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the apparatus embodiment, since it is substantially similar to the method embodiment, it is relatively simple to describe, and reference may be made to some descriptions of the method embodiment for relevant points. The above-described device embodiments are merely illustrative, and the units described as separate components may or may not be physically separate, and the components suggested as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement without inventive effort.
In the embodiments of the present application, the names "first" and "second" (if present) in the names "first" and "second" are used merely for name identification, and do not represent the first and second in sequence.
As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the above embodiment methods can be implemented by software plus a general hardware platform. Based on such understanding, the technical solution of the present application may be embodied in the form of a software product, which may be stored in a storage medium, such as a read-only memory (ROM)/RAM, a magnetic disk, an optical disk, or the like, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network communication device such as a router) to execute the method according to the embodiments or some parts of the embodiments of the present application.
The above description is only one specific embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A device for monitoring signals on a chip, the device being integrated on the chip, the device comprising: the device comprises a verification module, a target monitoring signal determination module, a reference signal determination module and a signal comparison module;
the verification module is used for receiving a verification instruction; the target monitoring signal determining module and/or the reference signal determining module and/or the signal comparing module are/is verified according to the verification instruction;
the target monitoring signal determining module is used for receiving a first monitoring instruction; the target monitoring signal is determined according to the first monitoring instruction;
the reference signal determining module is used for receiving a second monitoring instruction; and is used for determining a reference signal according to the second monitoring instruction;
the signal comparison module is used for receiving the target monitoring signal sent by the target monitoring signal determination module; and is used for receiving the reference signal sent by the reference signal determining module; the target monitoring signal and the reference signal are compared to obtain a comparison result, wherein the comparison result comprises the same or different; when the comparison results are the same, continuously acquiring a new monitoring instruction, and monitoring a new target monitoring signal;
the verification module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively; the target monitoring signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the reference signal determining module is electrically connected with the verifying module and the signal comparing module respectively; the signal comparison module is electrically connected with the target monitoring signal determination module and the reference signal determination module respectively.
2. The apparatus for monitoring chip signals according to claim 1, further comprising:
the configuration register module is used for receiving a user command; and is used for sending a verification instruction to the verification module according to the user command; the target monitoring signal determining module is used for sending a target monitoring signal to the monitoring device according to the user command; and is used for sending a second monitoring instruction to the reference signal determination module according to the user command; the first monitoring instruction and the second monitoring instruction are determined and obtained according to the same user command;
the configuration register module is electrically connected with the target monitoring signal determining module, the verifying module, the reference signal determining module and the signal comparing module respectively.
3. The apparatus for monitoring chip signals according to claim 2, wherein the signal comparison module is further configured to:
when the comparison results are different, sending a signal error message to the configuration register module; wherein the signal error message includes a target monitoring signal and a reference signal corresponding to the comparison result when the comparison result is different.
4. The apparatus for monitoring chip signals according to claim 3, wherein the configuration register module is further configured to receive a signal error message; and is used for sending an operation instruction to the processing register module according to the signal error message.
5. The apparatus for monitoring chip signals according to claim 4, further comprising:
the processing register module is used for receiving the operation instruction sent by the configuration register module; and is used for forwarding the operation instruction to a signal processing module;
the processing register module is electrically connected with the configuration register module and the signal processing module respectively.
6. The apparatus for monitoring chip signals according to claim 5, further comprising:
the signal processing module is used for receiving the operation instruction forwarded by the processing register module; and is used for executing the corresponding operation module according to the operation instruction;
the signal processing module is electrically connected with the signal comparison module, the processing register module and the operation module respectively.
7. The apparatus for monitoring chip signals according to claim 6, wherein the operation module is an interrupt processing module, an alarm processing module, or a reset processing module.
8. A method for monitoring a chip signal, the method comprising:
receiving a verification instruction;
verifying a module for monitoring signals according to the verification instruction;
if the verification is passed, respectively receiving a first monitoring instruction and a second monitoring instruction;
determining a target monitoring signal according to the first monitoring instruction;
determining a reference signal according to the second monitoring instruction;
comparing the target monitoring signal with the reference signal to obtain comparison results, wherein the comparison results are the same or different; and if the target monitoring signals are the same, receiving a new first monitoring command and a new second monitoring command, and monitoring the new target monitoring signals.
9. A computer device, comprising: a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the chip signal monitoring method according to claim 8 when executing the computer program.
10. A computer-readable storage medium, having stored therein instructions, which, when run on a terminal device, cause the terminal device to execute the chip signal monitoring method according to claim 8.
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