CN115185880A - Data storage method and device - Google Patents
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Abstract
The application discloses a data storage method, a device, a computer readable storage medium, a heterogeneous integrated system on a chip, a semiconductor integrated panel, an electronic component and a vehicle, wherein the method comprises the following steps: firstly, converting first data access requests from different hardware domains on the heterogeneous on-chip integrated system into second data access requests comprising identifiers of the hardware domains, target data and data access operations; and then, sending the second data access request to a data storage manager with access to the storage device, and uniformly processing the data access requests from each hardware domain by the data storage manager, thereby realizing a virtualized data storage scheme applicable to the heterogeneous on-chip integrated system.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a data storage method, an apparatus, a computer-readable storage medium, a heterogeneous integrated system on a chip, a semiconductor integrated panel, an electronic component, and a vehicle.
Background
The System-On-a-Chip (SOC) data storage virtualization scheme commonly used in the industry is mainly based On a block device managed by a virtual machine manager in a homogeneous SOC, for example, a virtio-blk. The above scheme requires running on the client and host under the management of the virtual machine manager, and requires that the CPUs on the client and host are homogeneous CPUs, and a specific mode, such as the EL2 virtualization mode of the ARM Cortex-a 64bit CPU, needs to be supported in general to virtualize the storage device on the SOC into the hard disk on the virtual machine for use.
This results in the above scheme not being applicable on heterogeneous SOCs.
Disclosure of Invention
The application creatively provides a data storage method, a device, a computer readable storage medium, a heterogeneous integrated system on a chip, a semiconductor integrated panel, an electronic component and a vehicle.
According to a first aspect of embodiments of the present application, there is provided a data storage method, including: converting a first data access request into a second data access request, wherein the first data access request comprises data access requests from different hardware domains on a heterogeneous integrated system on chip, the heterogeneous integrated system on chip comprises at least two hardware domains, hardware resources of the different hardware domains in the at least two hardware domains are isolated from each other, and the second data access request comprises an identifier of the hardware domain and target data and data access operation requested by the first data access request; determining a target data storage manager according to the target data, wherein the target data storage manager is deployed in a first hardware domain of the at least two hardware domains, and a storage device is distributed in the first hardware domain; and sending the second data access request to the target data storage manager.
According to a second aspect of the embodiments of the present application, there is provided an apparatus for storing data, the apparatus including: the data access request conversion module is used for converting a first data access request into a second data access request, the first data access request comprises data access requests from different hardware domains on the heterogeneous integrated system on chip, the heterogeneous integrated system on chip comprises at least two hardware domains, hardware resources of the different hardware domains in the at least two hardware domains are isolated from each other, and the second data access request comprises an identifier of the hardware domains and target data and data access operation requested by the first data access request; the data storage manager determining module is used for determining a target data storage manager according to target data, wherein the target data storage manager is deployed in a first hardware domain of at least two hardware domains, and storage equipment is arranged in the first hardware domain; and the data access request sending module is used for sending the second data access request to the target data storage manager.
According to a third aspect of the embodiments of the present application, there is provided a computer-readable storage medium storing computer instructions, where the computer instructions are configured to cause a computer to execute the data storage method.
According to a fourth aspect of embodiments of the present application, there is provided a heterogeneous integrated system on a chip, including: at least two hardware domains, wherein the hardware domains run independent operating systems on mutually isolated hardware resources and are used for executing the data storage method for sending the second data access request; the storage device is arranged in a first hardware domain of the at least two hardware domains, and the data storage manager is deployed and used for executing the data storage method for uniformly processing the data access requests from different hardware domains on the heterogeneous on-chip integrated system.
According to a fifth aspect of the embodiments of the present application, there is provided a chip, where the chip runs a heterogeneous integrated system on a chip, where the heterogeneous integrated system on a chip includes at least two hardware domains, each of the hardware domains runs an independent operating system on a hardware resource that is isolated from each other, and the chip is configured to execute the data storage method.
According to a sixth aspect of the embodiments of the present application, there is provided a semiconductor integrated panel provided with the above chip.
According to a seventh aspect of embodiments of the present application, there is provided an electronic component provided with the above-described semiconductor integrated panel.
According to an eighth aspect of embodiments of the present application, there is provided a vehicle provided with the electronic component described above.
The application provides a data storage method, a device, a computer readable storage medium, a heterogeneous integrated system on a chip, a semiconductor integrated panel, an electronic component and a vehicle, wherein the method comprises the following steps: firstly, converting first data access requests from different hardware domains on the heterogeneous on-chip integrated system into second data access requests comprising identifiers of the hardware domains, target data and data access operations; and then, sending the second data access request to a data storage manager with access to the storage device, and uniformly processing the data access requests from each hardware domain by the data storage manager, thereby realizing a virtualized data storage scheme applicable to the heterogeneous on-chip integrated system.
It is to be understood that not all of the above advantages need to be achieved in the present application, but that a specific technical solution may achieve a specific technical effect, and that other embodiments of the present application may also achieve advantages not mentioned above.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present application will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present application are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
Fig. 1 is a schematic diagram of a heterogeneous SOC architecture adopted in implementing a data storage method according to an embodiment of the present application;
FIG. 2 is a flowchart illustrating a method for performing data storage in a hardware domain according to the embodiment shown in FIG. 1;
FIG. 3 is a flowchart illustrating a method for performing data storage in a virtual device management domain according to the embodiment shown in FIG. 1;
fig. 4 is a schematic diagram of a heterogeneous SOC architecture adopted in another embodiment of the present application to implement a data storage method;
FIG. 5 is a flowchart illustrating the hardware domain and the virtual device management domain of FIG. 4 communicating via a customized communication protocol;
FIG. 6 is a state transition diagram of the state machine of the memory device of the embodiment shown in FIG. 4;
FIG. 7 is a flowchart illustrating the processing of the second data access requests one by one according to the embodiment shown in FIG. 4;
FIG. 8 is a block diagram of a data storage system architecture employed in a hardware domain for data access according to another embodiment of the present application;
fig. 9 is a schematic structural diagram of a data storage device according to an embodiment of the present application.
Detailed Description
In order to make the objects, features and advantages of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Currently, a traditional virtual machine manager needs a SOC based on a homogeneous CPU, which is generally required to have a specific hardware mode to support hardware virtualization, such as: the ARM Cortex-A64 bit CPU supports virtualization mode EL2.
In a conventional system with a virtual machine manager, storage virtualization is usually based on a block device virtualization approach (VIRTIO-BLK), where the front end of each virtual block device is at each client and the back end of the virtual block device is at the host (where the storage device is located). The client and the host run on a virtual machine manager, which runs in a specific hardware mode.
Different from a traditional virtual machine manager, the SOC to which the data storage method is applied is a heterogeneous SOC, the SOC is provided with a plurality of heterogeneous CPU cores, and the heterogeneous CPU cores and other hardware resources such as an interrupt controller, a Timer (Timer) controller, an input/output (IO) controller and a memory controller form different hardware domains. And each hardware domain locks the resources through access authority control, so that each hardware domain can only access the hardware resources distributed to the hardware domain, and the distribution and isolation of the hardware resources are realized.
Therefore, in the heterogeneous SOC, the storage device on the SOC cannot be virtualized into a block device by the virtual machine manager, and the block device cannot be virtualized into a hard disk on the virtual machine for use.
On a heterogeneous SOC, if a hardware domain needs to store data, a separate storage device is usually allocated to the hardware domain, and once a storage device is allocated to the hardware domain, other hardware domains cannot use the storage device. This results in multiple storage devices being required to meet the needs of each hardware domain if there are multiple hardware domains that require the use of storage devices. When a storage device is used by only one hardware domain, the idle rate is usually high, and resource waste is also generated. Therefore, the hardware cost and the use space of the whole SOC are not saved, and the utilization rate of each storage device is not improved.
To this end, an embodiment of the present application employs a heterogeneous SOC architecture as shown in fig. 1. As shown in fig. 1, in the heterogeneous SOC, the hardware access right controller 104 allocates hardware resources to a plurality of hardware domains, such as the hardware domain 101, the virtual device management domain 102, and the hardware domain 103 shown in fig. 1, in the SOC start-up phase, and performs resource locking through right control, so that the hardware resources of each hardware domain can only be accessed and used by the processor of the hardware domain, but cannot be accessed and used by other hardware domains.
The hardware access right controller 104 may implement right control on a certain hardware resource through the following configuration policy, assuming that the hardware resource is a segment of "DDR" memory area:
hardware domain identification:
ID =1 (representing the hardware domain that can access the resource, all devices in this hardware domain that can access the address space, all with the same ID on the bus when initiating the address space access);
DDR address space (representing the address space allowed to be accessed);
read/write (representing operations allowed to proceed).
Further, the configuration policy may be added to a configuration file of the firewall, so that the following operations are performed by the firewall to implement isolation between hardware:
1) Setting a hardware domain allowing access to the resource;
2) Setting an address space allowing access;
3) A mode is set that allows access to the resource.
Thus, only devices whose hardware domain is identified as "1" can use the address space specified by the "DDR" memory region and allow the hardware domain to read or write on the address space specified by the "DDR" memory region.
After the hardware access right controller 104 allocates the hardware resources to multiple hardware domains in the SOC start-up stage, the resource allocation situation shown in fig. 1 is obtained:
the hardware domain 101 is distributed with a central Processing unit (CPU-1), a graphic Processing unit (GPU-1), a display Processing unit (DPU-1), a Digital Signal Processing (DSP) module and an Artificial Intelligence (AI) module;
the hardware domain 103 is distributed with a central processing unit (CPU-2), a graphic processing unit (GPU-2), a data processing unit (DPU-2), a Direct Memory Access (DMA) module and a CANFD module group;
the virtual device management domain 102 is allocated with a central processing unit (CPU-3) and a plurality of storage devices: multimedia MMC card (eMMC), unified flash UFS memory card (UFS), TF memory card (TF), and SD memory card (SD).
The hardware domain 101, the virtual device management domain 102, and the hardware domain 103 may all be installed with independent operating systems, and the installed operating systems manage and schedule respective hardware resources.
In the above heterogeneous SOC, no storage device is allocated to either the hardware domain 101 or the hardware domain 103, but a plurality of storage devices are allocated to the virtual device management domain 102, and a data storage manager is deployed on the virtual device management domain 102, and data access requests from the respective hardware domains (for example, the hardware domain 101 and the hardware domain 103) are handled collectively by the data storage manager.
For each hardware domain (e.g., hardware domain 101 or hardware domain 103), the data storage method shown in fig. 2 may be applied to implement the data storage process. As shown in fig. 2, the method includes:
operation S210, converting the first data access request into a second data access request, where the first data access request includes data access requests from different hardware domains on the heterogeneous integrated system on chip, the heterogeneous integrated system on chip includes at least two hardware domains, hardware resources of the different hardware domains in the at least two hardware domains are isolated from each other, and the second data access request includes an identifier of the hardware domain and target data and data access operations requested by the first data access request;
the first data access request is a data access request initiated locally by a hardware domain, mainly comes from a local operating system, and adopts a data format which can be identified by the local operating system.
The second data access request is a data access request to be sent to the data storage manager in a data format recognizable by the data storage manager.
Since the data storage manager needs to process data access requests from different hardware domains and needs to return response information of the data access requests to the hardware domain sending the data access requests, in the second data access request, in addition to converting a data format which can be recognized by a local hardware module or an operating system into a data format which can be recognized by a target data storage manager, an identifier of the hardware domain is also added.
The identifier of the hardware domain may be a unique name, address, or number set for distinguishing from other hardware domains when the hardware domain is established.
Operation S220, determining a target data storage manager according to the target data, where the target data storage manager is deployed in a first hardware domain of the at least two hardware domains, and a storage device is allocated in the first hardware domain;
wherein the target data storage manager is a data storage manager that manages the target data. The first hardware domain deployed by the target data storage manager is one of a plurality of hardware domains in a heterogeneous SOC.
In the embodiment of the present application shown in fig. 1, the first hardware domain is the virtual device management domain 102, and the virtual device management domain 102 is a hardware domain that is newly created to handle data access requests from different hardware domains, so that a processor (CPU-3) and a plurality of storage devices are allocated to the virtual device management domain 102. Thus, a plurality of storage devices can be managed in a centralized manner, and data access requests from different hardware domains can be processed in a centralized manner through the centrally managed storage devices.
In other implementations of the present application, the first hardware domain may also be a hardware domain that has a data storage manager deployed on an existing hardware domain to which storage devices are assigned. In this manner, the virtual device management domain 102 can be implemented based on the hardware domain to which the storage device has been allocated, without having to create a new hardware domain.
In other implementations of the present application, it may also occur that both the data storage client and the data storage manager are located in the first hardware domain. In this case, centralized management of data storage can still be achieved through front-end and back-end access.
In the heterogeneous SOC of the embodiment of the present application, one or more data storage managers may be provided.
A virtual device management domain may contain only one storage device. For example, assume that the virtual device management domain 102 contains only one storage device: the multimedia MMC card may set a data storage manager in the virtual device management domain 102, set a virtualization front end of the storage device in an operating system of a hardware domain (e.g., the hardware domain 101 or the hardware domain 103) for data storage, and set a virtualization front end back end of the storage device in the operating system of the virtual device management domain 102. In this manner, the hardware domain that stores data is secured, and the storage devices in the virtual device management domain 102 can be accessed through the data storage manager.
A virtual device management domain may also contain multiple storage devices. For example, assume that the virtual device management domain 102 may contain multiple storage devices: multimedia MMC card, unified flash UFS memory card, TF memory card, SD memory card, etc. For the different storage devices (memory cards), a plurality of data storage managers may be set in the virtual device management domain 102, and virtualization is performed for each different storage device, including: in an operating system of a hardware domain (for example, hardware domain 101 or hardware domain 103) for data storage, setting a virtualization front end of each storage device; in the operating system of the virtual device management domain 102, the virtualization front-end and back-end of each storage device are set, and each storage device in the virtual device management domain 102 is accessed through a plurality of data storage managers.
If only one data storage manager is arranged in the heterogeneous SOC, the only data storage manager is the target data storage manager; if a plurality of data storage managers are arranged in the heterogeneous SOC, and different data are managed by different data storage managers in a classified mode according to different sources, types and purposes, a mapping relation can be established between the data and the data storage managers, and the data storage manager for managing target data is determined as a target data storage manager according to the mapping relation; if multiple data storage managers are provided in the heterogeneous SOC and the data storage managers are in a master-slave relationship with each other as backups, the master data storage manager in an active state may be determined as the target data storage manager.
Operation S230 sends the second data access request to the target data storage manager.
In this embodiment, the second data access request is placed in the shared memory shared with the first hardware domain, and then the second data access request is communicated with the first hardware domain where the target data storage manager is located through a communication module in the hardware domain, for example, a mailbox (mailbox), so as to notify the target data storage manager to read the second data access request from the shared memory. The target data storage manager, upon receiving the notification, reads a second data access request from the shared memory.
The shared memory shared with the first hardware domain is set at the SOC starting stage through a hardware access authority controller; accordingly, sending the second data access request to the target data storage manager includes: and sending the second data access request to the shared memory, and waiting for the target data storage manager to acquire the second data access request from the shared memory.
After the target data storage manager receives the second data access request, the following operations shown in FIG. 3 may then be performed in response to the second data access request:
operation S310, receiving a second data access request;
as described above, in the embodiment of the present application, the target data storage manager obtains the second data access request from the shared memory.
Operation S320, executing a data access operation according to the second data access request to obtain an operation result;
after receiving the second data access request, the target data storage manager may obtain the target data, the data access operation, and the identification of the hardware domain that sent the second data access request from the second data access request.
If the data access operation is used for reading data, the target data storage manager firstly determines a target storage device where the target data is located in the first hardware domain, and then reads the target data from the target storage device;
if the data access operation is for writing data, the target data storage manager determines a target storage device that can be used for storing the target data in the first hardware domain, then writes the target data into the target storage device (specifically, the target storage device may be read and written by the data storage manager after being transferred from the client to the first hardware domain via the shared memory), and obtains and records a storage location of the target data in the target storage device and an operation result (for example, success or failure);
and so on.
Operation S330 returns the operation result to the hardware domain.
In this embodiment, the target data storage manager may send the operation result (the read target data, or whether the write target data is successful, etc.) to the mailbox of the hardware domain according to the identifier of the hardware domain carried in the second data access request.
In other embodiments of the present application, the target data storage manager may also send the operation result (the read target data, or whether the write target data is successful, etc.) and the hardware domain identifier carried in the second data access request to the shared memory together, and notify the corresponding hardware domain through the mailbox to read the shared memory.
In this way, data access requests from various hardware domains can be uniformly processed by the data storage manager, so that a centralized data storage scheme applicable to heterogeneous on-chip integrated systems is realized. The scheme can realize the device virtualization function of the isomorphic SOC on the heterogeneous SOC, which is the same as the hard disk of the virtual machine through virtualizing the block device: each hardware domain can share the storage device and is not influenced mutually, even only one storage device can be used by a plurality of hardware domains, thereby greatly reducing the hardware cost and the use space of the storage device and further improving the utilization rate of the storage device.
Fig. 4 illustrates a heterogeneous SOC used in implementing a data storage method according to another embodiment of the present application.
As shown in fig. 4, in the embodiment of the present application shown in fig. 4, a virtual storage device driver front end is deployed in the hardware domain 401 and the hardware domain 402, respectively, and the virtual storage device driver front end converts the first data access request into the second data access request. In order to facilitate data communication between the hardware domain 401 and the hardware domain 402 and the virtual device management domain 403, a dedicated communication protocol stack is also established for data communication.
Accordingly, in the embodiment of the present application shown in fig. 4, converting the first data access request into the second data access request by the virtual storage device driver front end includes: and packaging the first data access request according to a self-defined communication protocol to obtain a second data access request.
In addition, the virtual device management domain 403 also sets a "ring buffer" as a buffer queue in the shared memory shared with the hardware domain, and places the second data access request into the buffer queue after receiving the second data access request. And then, the IO request scheduler acquires the next to-be-processed second data access request from the buffer queue based on the set scheduling rule. And after acquiring a next second data access request to be processed, unpacking the second data access request through a communication protocol stack to obtain target data to be accessed, data access operation and a hardware domain identifier. On one hand, the data access request is ensured not to be interrupted until the execution is finished through the storage device state transition state machine; on the other hand, the virtual storage device driver backend accesses the storage device allocated in the virtual device management domain 403, for example: multimedia MMC cards, unified flash UFS cards, TF and SD memory cards, and the like.
The scheduling policy based on which the IO request scheduler is based includes: a round robin (round robin) policy, a fair scheduling (CFQ) policy, or a Priority (Priority) policy.
Further, fig. 5 shows a flow of the hardware domain (taking the hardware domain 401 as an example) shown in fig. 4 communicating with the virtual device management domain 403 through a self-defined communication protocol according to the embodiment of the present application. As shown in fig. 5, the hardware domain 401 sends a request message 501 to the virtual device management domain 403, where the request message 501 includes three parts, "REQidentification" (request identifier), "REQCMD" (request command), and "REQARGS" (request parameter). After receiving the request message 501, the virtual device management domain 403 returns a response message 502, and the response message 502 includes "rspitentification" (response identifier), "RSPCMD" (request command), and "RSPARGS" (response parameter).
The following are some examples of definitions for this custom communication protocol:
1）REQ Identification
mainly comprises a hardware domain identifier of which hardware domain the next CMD/ARGS sent is sent by, and is used for representing the identity of a sender. For specific definitions, see table 1 below:
TABLE 1
2）REQ CMD
Mainly includes the command to be sent, the specific definition can be seen in table 2 below:
TABLE 2
3）REQ ARGS
The method mainly comprises parameters for sending commands, and can comprise a plurality of continuous args 1-argsN parameters. For specific definitions, reference is made to table 3 below.
TABLE 3
4）RSP Identification
Corresponding to the REQ Identification, the same command format as the REQ Identification. The representation is the response to which sender (hardware domain) command it came from.
5）RSP CMD
Corresponding to REQ CMD, there is the same command format as REQ CMD. Representing the response to which type of command.
6）RSP ARGS
Is data returned in response to REQ CMD.
FIG. 6 illustrates the state transition process of the storage device state machine used in the embodiment shown in FIG. 4. As shown in FIG. 6, after the last data access request command is processed, the state of the storage device state machine changes to "the next data access request processable state 601"; thereafter, the next data access request command 1 may be processed.
When processing the data access request command 1, the data storage manager first detects the storage device state machine, and starts to execute the data access request command 1 if the storage device state machine is "the next data access request processable state 601".
The execution process of the data access request command 1 includes: sending a data operation starting command to the storage equipment, and waiting for a response; after receiving the response, performing a specific operation of data, for example, sending a read/write command of a plurality of block data to the storage device according to the starting address and size of the data, which may last for a period of time and perform multiple reads and writes; and after the data reading and writing are finished, sending a data operation stop command to the storage equipment.
On the storage device side, the storage device may modify the state of the storage device state machine according to the execution process of the data access request command 1, for example: preparing for reading and writing data after receiving a data operation starting command; then, when a data-specific operation is performed, for example, a read/write operation command for a plurality of block data is performed, the state of the storage device state machine is set to the "send/receive data state 602"; after receiving the data operation stop command, the state of the storage device state machine is reset to "next data access request processable state 601" to process the next data access request command 2 (not shown in fig. 6).
In addition, the state of the storage device state machine will typically correspond to a set of executable commands, i.e., only a particular command or commands can be executed when the storage device state machine is in a certain state. For example, when the state of the storage device state machine is "send/receive data state 602," new data access requests cannot be received, but only read/write stop commands, or suspend commands.
Therefore, the next data access request can be processed after the data access request is processed, so that data errors or program errors caused by accidents when a plurality of data access request commands are processed simultaneously can be avoided.
FIG. 7 shows a flow of the embodiment shown in FIG. 4, which obtains the second data access request from the "ring buffer" through the IO request scheduler and the storage device state machine and processes the second data access request one by one. As shown in fig. 7, includes:
operation S710, the state of the state machine is shown as being capable of processing a next data access request;
operation S720, determining whether there is a next data access request in the queue, if yes, continuing operation S730, and if not, circularly waiting until there is a next data access request in the queue;
operation S730, acquiring a data access request from the data access request queue;
operation S740, processing the data access request;
operation S750, determining that the next request queue can be processed according to the state of the state machine, if yes, continuing to operate S760, and if no, returning to operation S720;
in operation S760, the next request queue is selected based on the IO scheduler, and then the process returns to operation S720 to process the next request queue.
FIG. 8 illustrates a data storage system architecture in which another embodiment of the present application implements a data storage method in a hardware domain. As shown in fig. 8, the data storage system is located in a certain hardware domain that needs to use a storage device for file storage, and the hardware domain is a client of a data storage manager, wherein a virtual file system 801 is used for providing a file storage service, and includes a plurality of subfile systems, for example: file system-1, file system-2, and file system-3; file system-2 interacts with IO Schedule layer 803 through generic Block layer 802 (GenericBlockLayer); then, the data storage process is implemented by interacting with a virtualized MMC front end (virtual storage device driver front end) of the MMC card or a virtualized UFS front end (virtual storage device driver front end) of the UFS card through the IO scheduling layer 803.
In this way, a storage device (e.g., an MMC card) in a virtual device management domain can be virtualized into a virtualized storage device front-end in the hardware domain (e.g., a virtualized MMC front-end of an MMC card), so that the virtualized storage device front-end can be accessed in the same way as a local device without knowing the specific storage location of the storage device, thereby greatly simplifying the use and access of the storage device by upper-layer applications in the hardware domain.
Further, the embodiment of the application also provides a data storage device. As shown in fig. 9, the apparatus 90 includes: a data access request conversion module 901, configured to convert a first data access request into a second data access request, where the first data access request includes data access requests from different hardware domains on a heterogeneous integrated system on chip, the heterogeneous integrated system on chip includes at least two hardware domains, hardware resources of the different hardware domains in the at least two hardware domains are isolated from each other, and the second data access request includes an identifier of the hardware domain and target data and a data access operation requested by the first data access request; a data storage manager determining module 902, configured to determine a target data storage manager according to target data, where the target data storage manager is deployed in a first hardware domain of the at least two hardware domains, and a storage device is disposed in the first hardware domain; a data access request sending module 903, configured to send the second data access request to the target data storage manager.
According to an embodiment of the present application, the apparatus 90 further comprises: the hardware resource allocation module is used for allocating storage equipment for the first hardware domain; a data storage manager deployment module to deploy a target data storage manager on a first hardware domain.
According to an embodiment of the present application, the data access request conversion module 901 is specifically configured to package the first data access request according to a customized communication protocol to obtain the second data access request.
According to an embodiment of the present application, the apparatus 90 further comprises: the shared memory setting module is used for setting a shared memory shared with the first hardware domain; correspondingly, the data access request sending module 903 is specifically configured to send the second data access request to the shared memory, and wait for the target data storage manager to obtain the second data access request from the shared memory.
According to an embodiment of the present application, the apparatus 90 further comprises: a second data access request receiving module, configured to receive a second data access request; the data access operation execution module is used for executing data access operation according to the second data access request to obtain an operation result; and the operation result returning module is used for returning the operation result to the hardware domain.
According to an embodiment of the present application, the apparatus 90 further comprises: and the data access request buffer module is used for putting the second data access request into the buffer queue.
According to an embodiment of the present application, the apparatus 90 further comprises: and the data access request scheduling module is used for acquiring the next second data access request to be processed from the buffer queue based on the set scheduling rule.
According to an embodiment of the present application, the apparatus 90 further comprises: and the data access request execution completion determining module is used for determining that the last data access request is executed completely.
According to an embodiment of the present application, the data access operation execution module includes: the analysis submodule is used for unpacking the second data access request according to a self-defined communication protocol to obtain target data and data access operation requested by the first data access request; and the execution submodule is used for executing the data access operation according to the target data and the data access operation.
The embodiment of the application also provides a computer-readable storage medium storing computer instructions, wherein the computer instructions are used for causing a computer to execute any one of the data storage methods.
An embodiment of the present application further provides a heterogeneous integrated system on a chip, as shown in fig. 1, including: at least two hardware domains (for example, hardware domain 101 and hardware domain 103), the hardware domains run with independent operating systems on mutually isolated hardware resources, and the hardware domains are used for executing the data storage method for sending the second data access request; a storage device (e.g., UFS card) is disposed in a first hardware domain (e.g., virtual device management domain 102) of the at least two hardware domains, and a data storage manager (not shown in fig. 1) is deployed and configured to execute the above-described data storage method for uniformly processing data access requests from different hardware domains on the heterogeneous integrated system on a chip.
The embodiment of the present application further provides a chip, where the chip runs on a heterogeneous integrated system on chip, where the heterogeneous integrated system on chip includes at least two hardware domains, the hardware domains run on mutually isolated hardware resources with independent operating systems, and the chip is configured to execute any one of the above data storage methods.
The embodiment of the application also provides a semiconductor integrated panel which is provided with the chip.
The embodiment of the application also provides an electronic component which is provided with the semiconductor integrated panel.
The embodiment of the application also provides a vehicle which is provided with the electronic component.
Here, it should be noted that: the above description of the data storage device according to the embodiment, the above description of the heterogeneous SOC embodiment, the above description of the computer storage medium embodiment, the above description of the chip embodiment, the above description of the semiconductor integrated panel embodiment, the above description of the electronic component embodiment, and the above description of the vehicle embodiment are similar to the description of the foregoing method embodiment, and have similar beneficial effects as the foregoing method embodiment, and therefore, the description is not repeated. For the technical details that have not been disclosed yet in the description of the data storage device of the embodiment of the present application, the above description of the heterogeneous SOC embodiment, the above description of the computer storage medium embodiment, the above description of the chip embodiment, the above description of the semiconductor integrated panel embodiment, the above description of the electronic component embodiment, and the above description of the vehicle embodiment, please refer to the description of the foregoing method embodiment of the present application for understanding, and therefore, for brevity, will not be described again.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of a unit is only one logical function division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another device, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units; can be located in one place or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be separately regarded as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Those of ordinary skill in the art will understand that: all or part of the steps of implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer-readable storage medium, and when executed, executes the steps including the method embodiments; and the aforementioned storage medium includes: various media capable of storing program codes, such as a removable storage medium, a Read Only Memory (ROM), a magnetic disk, and an optical disk.
Alternatively, the integrated units described above in the present application may be stored in a computer-readable storage medium if they are implemented in the form of software functional modules and sold or used as independent products. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially implemented or portions thereof that contribute to the prior art may be embodied in the form of a software product stored in a storage medium, and including several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a removable storage medium, a ROM, a magnetic disk, an optical disk, or the like, which can store the program code.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (17)
1. A method of data storage, comprising:
converting the first data access request into a second data access request,
the first data access request comprises a data access request from a different hardware domain on a heterogeneous integrated system on a chip,
the heterogeneous integrated-on-chip system includes at least two hardware domains,
the hardware resources of different ones of the at least two hardware domains are isolated from each other,
the second data access request comprises an identification of the hardware domain and target data and data access operations requested by the first data access request;
determining a target data storage manager according to the target data, wherein the target data storage manager is deployed in a first hardware domain of the at least two hardware domains, and a storage device is allocated in the first hardware domain;
and sending the second data access request to the target data storage manager.
2. The method of claim 1, further comprising:
allocating the storage device for the first hardware domain;
deploying the target data storage manager on the first hardware domain.
3. The method of any of claims 1 or 2, wherein the first hardware domain is dedicated to handling the data access requests from different hardware domains on a heterogeneous integrated system on a chip.
4. The method of claim 1, wherein said converting the first data access request into the second data access request comprises:
and packaging the first data access request according to a self-defined communication protocol to obtain a second data access request.
5. The method of claim 1, further comprising:
setting a shared memory shared with the first hardware domain;
accordingly, sending the second data access request to the target data storage manager includes:
and sending the second data access request to the shared memory, and waiting for the target data storage manager to acquire the second data access request from the shared memory.
6. The method of claim 1, further comprising, in response to the second data access request, performing by the target data storage manager:
receiving the second data access request;
executing the data access operation according to the second data access request to obtain an operation result;
and returning the operation result to the hardware domain.
7. The method of claim 6, further comprising, after said receiving the second data access request:
and putting the second data access request into a buffer queue.
8. The method of claim 7, further comprising:
and acquiring the next second data access request to be processed from the buffer queue based on the set scheduling rule.
9. The method of claim 8, further comprising, prior to said obtaining a next second data access request to be processed:
it is determined that the last second data access request has been executed.
10. The method of claim 6, the performing the data access operation according to the second data access request, comprising:
unpacking the second data access request according to a self-defined communication protocol to obtain target data and data access operation requested by the first data access request;
and executing the data access operation according to the target data and the data access operation.
11. A data storage device, comprising:
a data access request conversion module for converting the first data access request into a second data access request,
the first data access request comprises a data access request from a different hardware domain on a heterogeneous integrated system on a chip,
the heterogeneous integrated-on-chip system includes at least two hardware domains,
the hardware resources of different hardware domains of the at least two hardware domains are isolated from each other,
the second data access request comprises an identification of the hardware domain and target data and data access operations requested by the first data access request;
a data storage manager determining module, configured to determine a target data storage manager according to the target data, where the target data storage manager is deployed in a first hardware domain of the at least two hardware domains, and a storage device is disposed in the first hardware domain;
and the data access request sending module is used for sending the second data access request to the target data storage manager.
12. A computer-readable storage medium having computer instructions stored thereon for causing the computer to perform the method of any one of claims 1-10.
13. A heterogeneous integrated-on-a-chip system, comprising:
at least two hardware domains running independent operating systems on mutually isolated hardware resources, the hardware domains being configured to perform the method of any of claims 1-5;
a storage device is disposed in a first hardware domain of the at least two hardware domains, and a data storage manager is disposed, and is configured to perform the method of any one of claims 6 to 10, and uniformly process data access requests from different hardware domains on the heterogeneous integrated system on a chip.
14. A chip having a heterogeneous integrated system on a chip running thereon,
the heterogeneous integrated-on-chip system includes at least two hardware domains,
the hardware domain runs independent operating systems on mutually isolated hardware resources,
the chip is for performing the method of any one of claims 1-10.
15. A semiconductor integrated panel provided with the chip of claim 14.
16. An electronic component provided with the semiconductor integrated panel according to claim 15.
17. A vehicle provided with the electronic component of claim 16.
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