CN115185129B - Etching method of dielectric film via hole, liquid crystal display panel and liquid crystal display - Google Patents
Etching method of dielectric film via hole, liquid crystal display panel and liquid crystal display Download PDFInfo
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- CN115185129B CN115185129B CN202210635691.7A CN202210635691A CN115185129B CN 115185129 B CN115185129 B CN 115185129B CN 202210635691 A CN202210635691 A CN 202210635691A CN 115185129 B CN115185129 B CN 115185129B
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- 238000005530 etching Methods 0.000 title claims abstract description 116
- 238000000034 method Methods 0.000 title claims abstract description 35
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 34
- 239000007789 gas Substances 0.000 claims abstract description 91
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 239000011265 semifinished product Substances 0.000 claims abstract description 13
- 239000000460 chlorine Substances 0.000 claims abstract description 10
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 8
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 5
- 239000011737 fluorine Substances 0.000 claims abstract description 5
- 239000001301 oxygen Substances 0.000 claims abstract description 5
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 238000002360 preparation method Methods 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 claims description 3
- 229910018503 SF6 Inorganic materials 0.000 claims description 3
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims description 3
- 239000005049 silicon tetrachloride Substances 0.000 claims description 3
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 3
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 3
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 3
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims description 3
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 claims description 3
- 239000005052 trichlorosilane Substances 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 abstract description 6
- 239000000126 substance Substances 0.000 description 9
- 238000012876 topography Methods 0.000 description 7
- 238000001020 plasma etching Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000001105 regulatory effect Effects 0.000 description 4
- 239000003054 catalyst Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910000583 Nd alloy Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- UBSJOWMHLJZVDJ-UHFFFAOYSA-N aluminum neodymium Chemical compound [Al].[Nd] UBSJOWMHLJZVDJ-UHFFFAOYSA-N 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- ZPZCREMGFMRIRR-UHFFFAOYSA-N molybdenum titanium Chemical compound [Ti].[Mo] ZPZCREMGFMRIRR-UHFFFAOYSA-N 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The application relates to the technical field of etching processes, and particularly discloses an etching method of a dielectric film via hole, a liquid crystal display panel and a liquid crystal display. The etching method of the dielectric film via hole comprises the following steps: depositing a dielectric film on a substrate to obtain a semi-finished product of the substrate; placing the semi-finished product into an etcher chamber; and after the first gas, the second gas and the third gas are introduced into the etching machine chamber, etching the dielectric film on the substrate, wherein the first gas is fluorine-based gas, the second gas is oxygen, and the third gas is chlorine-based gas. The method solves the problem that the existing etching method of the dielectric film via hole is easy to cause etching chamfer at the interface of the dielectric film and other film layers.
Description
Technical Field
The present disclosure relates to the field of etching technologies, and in particular, to a method for etching a dielectric film via hole, a liquid crystal display panel, and a liquid crystal display.
Background
Liquid crystal displays have become one of the mainstream display devices because of their high definition, light and thin appearance, low power consumption, and low radiation. The liquid crystal display panel is used as an important component of the liquid crystal display, etching of the dielectric film via hole in the preparation process is a key factor influencing the product yield and the service performance of the liquid crystal display panel, and the etching method of the conventional dielectric film via hole often causes etching chamfer at the interface of the dielectric film and other film layers, so that the product yield and the service performance of the liquid crystal display panel are reduced.
Disclosure of Invention
The main purpose of the application is to provide a dielectric film via etching method, a liquid crystal display panel and a liquid crystal display, and aims to solve the problem that the conventional dielectric film via etching method is easy to cause etching chamfer at the interface of a dielectric film and other film layers.
In a first aspect, the present application provides a method for etching a dielectric film via, where the method includes:
depositing a dielectric film on a substrate to obtain a semi-finished product of the substrate;
placing the semi-finished product into a plasma etcher chamber;
and after the first gas, the second gas and the third gas are introduced into the plasma etching machine chamber, etching the dielectric film on the substrate, wherein the first gas is fluorine-based gas, the second gas is oxygen, and the third gas is chlorine-based gas.
In one possible implementation, the etching the dielectric film includes:
plasma-forming the first gas, the second gas and the third gas;
and etching the dielectric film on the substrate by adopting the plasma.
In one possible embodiment, the first gas includes at least any one of sulfur hexafluoride, carbon tetrafluoride, and nitrogen trifluoride.
In one possible embodiment, the third gas includes at least any one of chlorine, boron trichloride, silicon tetrachloride, and trichlorosilane.
In one possible embodiment, the ratio of the flow rate of the first gas to the flow rate of the third gas is 5 to 10.
In one possible embodiment, the ratio of the flow rate of the first gas to the flow rate of the second gas is 1.8 to 2.4.
In one possible embodiment, the dielectric film is silicon nitride.
In one possible implementation manner, the etching conditions for etching the substrate on the dielectric film include:
the etching pressure is 80-150 mTorr;
and/or the power of the radio frequency signal source is 4000-6000W;
and/or the radio frequency bias power is 2000-6000W.
In a second aspect, the present application provides a liquid crystal display panel, where the preparation of the liquid crystal display panel uses the etching method of the dielectric film via hole described in any one of the above.
In a third aspect, the present application provides a liquid crystal display, which includes the liquid crystal display panel described above.
The embodiment of the application discloses an etching method of a dielectric film via hole, a liquid crystal display panel and a liquid crystal display, wherein the etching method of the dielectric film via hole is specifically as follows, firstly, after a dielectric film is deposited on a substrate, a semi-finished product of the substrate is obtained, the semi-finished product is placed into a chamber of an etcher, then fluorine-based gas, oxygen and chlorine-based gas are introduced into the chamber of the etcher to etch the dielectric film on the substrate, and the etching method of the dielectric film via hole is used for weakening isotropic etching and increasing anisotropic etching, so that the problem that the existing etching method of the dielectric film via hole is easy to cause etching chamfer at an interface of the dielectric film and other film layers is solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for etching a dielectric film via hole according to an embodiment of the present application;
FIG. 2 is a simplified schematic diagram of a semi-finished substrate provided in an embodiment of the present application;
FIG. 3 is a simplified schematic diagram of a semi-finished substrate provided in accordance with an embodiment of the present application;
fig. 4 is a microscopic morphology diagram of a dielectric film via hole obtained under a scanning electron microscope according to an embodiment of the present application;
fig. 5 is a micro-topography of a dielectric film via obtained under a scanning electron microscope according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It is also to be understood that the terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
The flow diagrams depicted in the figures are merely illustrative and not necessarily all of the elements and operations/steps are included or performed in the order described. For example, some operations/steps may be further divided, combined, or partially combined, so that the order of actual execution may be changed according to actual situations.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for etching a dielectric film via according to an embodiment of the present application, where the method for etching a dielectric film via includes steps S100 to S300.
And step S100, depositing a dielectric film on the substrate to obtain a semi-finished product of the substrate.
Referring to fig. 2 and 3, the substrate 10 includes a substrate 101 and a gate 102, where the substrate 101 is made of a material with higher hardness, for example, glass, a flexible steel plate, a rigid steel plate, diamond, silicon carbide (chemical formula: siC), gallium arsenide (chemical formula: gaAs), etc., and the shape, size, and thickness of the substrate 10 are not limited in this application, and may be selected according to actual needs, for example, any one of a cylindrical sheet, a rectangular sheet, a triangular prism sheet, a square sheet, etc.; the gate electrode 102 is made of a conductive material such as any one of tungsten, molybdenum, aluminum, titanium, copper, aluminum neodymium alloy, molybdenum titanium alloy, or the like, or a stacked combination of several materials.
The deposition of the dielectric film 20 on the substrate 10 specifically refers to depositing the dielectric film 20 on the upper surface of the gate electrode 102, specifically, the dielectric film 20 includes at least one layer, and the method for depositing the dielectric film 20 may be a chemical vapor deposition method or a physical vapor deposition method. The dielectric film 20 in the present application uses an insulating material, and specifically includes silicon nitride (chemical formula: si 3 N 4 ) Silica (chemical formula: siO (SiO) 2 ) At least one of the following.
Illustratively, the Si is deposited by chemical vapor deposition on a substrate 101 of glass and a gate 102 of Mo/Al/Mo 3 N 4 After the layer 20, a semi-finished substrate as shown in FIG. 2 was obtained, and the base material 101 in this example was a circular sheet having a radius of 15cm and a thickness of 5mm.
Illustratively, si is deposited by chemical deposition on a substrate 101 of silicon nitride and a gate 102 of Mo/Al/Mo 3 N 4 Layer 21 and Si 3 N 4 After the layer 22, a semi-finished product of the substrate shown in FIG. 3 was obtained, and the base material 101 in this example was a square silicon nitride sheet having a side length of 20cm and a thickness of 5mm.
Step 200, placing the semi-finished product into an etcher chamber.
And step S300, after the first gas, the second gas and the third gas are introduced into the plasma etching machine chamber, etching the dielectric film on the substrate, wherein the first gas is fluorine-based gas, the second gas is oxygen, and the third gas is chlorine-based gas.
The first gas is a main gas for etching the dielectric film via hole, the second gas is used for regulating and controlling the concentration of the first gas, so that etching chamfer is prevented from being generated at the interface of the dielectric film and other film layers due to too high etching rate caused by too high concentration of the first gas in the etching process, the third gas is used for regulating and controlling etching reaction so as to weaken isotropic etching and increase anisotropic etching, and therefore the etching chamfer is prevented from being generated at the interface of the dielectric film and other film layers due to fluctuation of the dielectric film and fluctuation of the etching rate in the etching process.
In some embodiments, the first gas comprises sulfur hexafluoride (formula: SF 6 ) Carbon tetrafluoride (chemical formula: CF (compact flash) 4 ) And nitrogen trifluoride (chemical formula: NF (NF) 4 ) At least one of them.
In some embodiments, the third gas comprises chlorine (formula: cl) 2 ) Boron trichloride (chemical formula: BCl (binary coded decimal) 3 ) Silicon tetrachloride (chemical formula: siCl 4 ) And trichlorosilane (chemical formula: siHCl (SiHCl) 3 ) At least any one of them.
In some embodiments, the ratio of the flow rate of the first gas to the flow rate of the third gas is 5-10, when the ratio of the flow rate of the first gas to the flow rate of the third gas is less than 5, the third gas can be caused to weaken isotropic etching, the effect of increasing anisotropic etching is insignificant, and further, etching chamfer occurs at the interface of the dielectric film and other film layers, and when the ratio of the flow rate of the first gas to the flow rate of the third gas is greater than 10, the etching rate is too slow, and further, the time required for etching is too long.
In some embodiments, the ratio of the flow rate of the first gas to the flow rate of the third gas is 5-10, the flow rate of the first gas is 1000-2000 sccm, and the flow rate of the second gas is 100-400 sccm, so that the etching speed can be better controlled and etching chamfers at the interface of the dielectric film and other film layers can be prevented.
In some embodiments, the ratio of the flow rate of the first gas to the flow rate of the second gas is 1.8-2.4, which when the ratio of the flow rate of the first gas to the flow rate of the second gas is less than 1.8, results in an etching rate that is too slow and thus results in a long time required for etching, and when the ratio of the flow rate of the first gas to the flow rate of the second gas is greater than 2.4, results in an etching rate that is too fast and thus results in etching chamfers at the interface of the dielectric film and other film layers.
In some embodiments, the ratio of the flow rate of the first gas to the flow rate of the second gas is 1.8-2.4, the flow rate of the first gas is 1000-2000 sccm, and the flow rate of the second gas is 500-1000 sccm, so that the etching speed can be better controlled and etching chamfers at the interface of the dielectric film and other film layers can be prevented.
In some embodiments, the etching pressure is 80-150 mTorr when etching the dielectric film 20 on the substrate 10, and when the etching pressure is less than 80mTorr, the etching speed is too slow to cause the etching to take too long, and when the etching pressure is more than 150mTorr, the etching speed is too fast to cause the etching chamfer to occur at the interface of the dielectric film and other film layers.
In some embodiments, the rf signal source power during etching the dielectric film 20 on the substrate 10 is 4000-6000W, which may result in too slow etching speed and thus too long etching time when the rf signal source power is less than 4000W, and too fast etching speed and thus etching chamfer at the interface of the dielectric film and other film layers when the rf signal source power is greater than 6000W.
In some embodiments, the rf bias power during etching the dielectric film 20 on the substrate 10 is 2000-6000W, and when the rf bias power is less than 2000W, the etching speed is too slow to cause the etching to take too long, and when the rf bias power is greater than 6000W, the etching speed is too fast to cause the etching chamfer to occur at the interface of the dielectric film and other film layers.
It will be appreciated that in actual operation, the appropriate etching time is selected according to the thickness of the dielectric film 20, specifically, the etching rate of the etching machine used may be measured first, the etching rate is the thickness that the etching machine can etch in a unit time, and then the specific etching time is determined by dividing the thickness of the dielectric film 20 by the etching rate.
In some embodiments, step S300 is performed in a plasma etcher, and step S300 includes steps S301 to S302, in which the etching efficiency is improved.
Step S301, plasma-forming the first gas, the second gas and the third gas.
And step S302, etching the dielectric film on the substrate by adopting the plasma.
To further illustrate that the third gas in this application has the effect of preventing the occurrence of etch chamfers at the interface of the dielectric film with other film layers, we have conducted the following experiments:
first, si is reacted with a third gas 3 N 4 Layer 21 and Si 3 N 4 Layer 22 is etched and etched to obtain Si 3 N 4 Layer 21 and Si 3 N 4 The micro-topography of the dielectric film via of layer 22 is shown as follows:
placing the semi-finished product of the substrate shown in fig. 3 into a plasma etching chamber, and introducing SF into the plasma etching chamber 6 And O 2 Regulating the SF 6 The flow rate of the catalyst is 1500sccm, the O 2 Is 800sccm, the etching pressure is 100Torr, the RF signal source power is 5000W, the RF bias power is 3500W to Si 3 N 4 Layer 21 and Si 3 N 4 Etching the layer 22, and obtaining Si under a scanning electron microscope after etching 3 N 4 Layer 21 and Si 3 N 4 The micro-topography of the dielectric film via of layer 22 is shown in FIG. 4 for Si under this etching condition 3 N 4 Layer 21 and Si 3 N 4 Microcosmic topography of dielectric film vias of layer 22.
Then, under the condition of containing a third gas, si 3 N 4 Layer 21 and Si 3 N 4 Layer 22 is engravedEtching and obtaining Si after etching 3 N 4 Layer 21 and Si 3 N 4 The micro-topography of the dielectric film via of layer 22 is shown as follows:
placing the semi-finished product of the substrate shown in fig. 3 into a plasma etching chamber, and introducing SF into the plasma etching chamber 6 、O 2 And Cl 2 Regulating the SF 6 The flow rate of the catalyst is 1500sccm, the O 2 The flow rate of the catalyst is 800sccm, the Cl 2 Is 380sccm, the etching pressure is 100Torr, the RF signal source power is 5000W, the RF bias power is 3500W to Si 3 N 4 Layer 21 and Si 3 N 4 Etching the layer 22, and obtaining Si under a scanning electron microscope after etching 3 N 4 Layer 21 and Si 3 N 4 The micro-topography of the dielectric film via of layer 22 is shown in FIG. 5 for Si under this etching condition 3 N 4 Layer 21 and Si 3 N 4 Microcosmic topography of dielectric film vias of layer 22.
As shown in FIG. 4, si is reacted with a third gas without containing 3 N 4 Layer 21 and Si 3 N 4 Dielectric film via hole obtained after etching layer 22 is formed on Si 3 N 4 Layer 21 and Si 3 N 4 A sharp etch chamfer occurs at the interface 200 of layer 22, as shown in fig. 5, for Si under conditions containing a third gas 3 N 4 Layer 21 and Si 3 N 4 Dielectric film via hole obtained after etching layer 22 is formed on Si 3 N 4 Layer 21 and Si 3 N 4 No etch chamfer is present at the interface 200 of layer 22, indicating that the third gas has the effect of preventing a chamfer from being present at the interface of the dielectric film with other film layers during the etching of the dielectric film via.
The embodiment of the application also provides a liquid crystal display panel, wherein the preparation of the liquid crystal display panel uses the etching method of the dielectric film via hole, and the preparation of the liquid crystal display panel uses the etching method of the dielectric film via hole, so that the liquid crystal display panel has high yield and good usability.
The embodiment of the application also provides a liquid crystal display, which comprises the liquid crystal display panel, a shell for fixing the liquid crystal display panel and a circuit board for electrifying the liquid crystal display panel.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any equivalent modifications or substitutions will be apparent to those skilled in the art within the scope of the present invention, and are intended to be included within the scope of the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.
Claims (8)
1. The etching method of the dielectric film via hole is characterized by comprising the following steps:
after a dielectric film is deposited on a substrate, a semi-finished product of the substrate is obtained, the substrate comprises a base material and a grid electrode, and the dielectric film is positioned on the upper surface of the grid electrode;
placing the semi-finished product into an etcher chamber;
after a first gas, a second gas and a third gas are introduced into the etching machine chamber, etching a dielectric film on the substrate, wherein the first gas is fluorine-based gas, the second gas is oxygen, the third gas is chlorine-based gas, the third gas regulates etching reaction so as to weaken isotropic etching, anisotropic etching is increased, the flow ratio of the first gas to the second gas is 1.8-2.4, and the flow ratio of the first gas to the third gas is 5-10;
the etching conditions for etching the substrate on the dielectric film comprise: the power of the radio frequency signal source is 4000-6000W;
and/or the radio frequency bias power is 2000-6000W.
2. The method of etching a dielectric film via of claim 1, wherein the etching the dielectric film comprises:
plasma-forming the first gas, the second gas and the third gas;
and etching the dielectric film on the substrate by adopting the plasma.
3. The method of claim 1, wherein the first gas comprises at least one of sulfur hexafluoride, carbon tetrafluoride, and nitrogen trifluoride.
4. The method of claim 1, wherein the third gas comprises at least any one of chlorine, boron trichloride, silicon tetrachloride, and trichlorosilane.
5. The method of claim 1, wherein the dielectric film is silicon nitride.
6. The method for etching a dielectric film via according to claim 1, wherein the etching conditions for etching the substrate on the dielectric film include:
the etching pressure is 80-150 mTorr.
7. A liquid crystal display panel, characterized in that the preparation of the liquid crystal display panel uses the etching method of the dielectric film via hole according to any one of claims 1 to 6.
8. A liquid crystal display, characterized in that the liquid crystal display comprises the liquid crystal display panel of claim 7.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210635691.7A CN115185129B (en) | 2022-06-07 | 2022-06-07 | Etching method of dielectric film via hole, liquid crystal display panel and liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210635691.7A CN115185129B (en) | 2022-06-07 | 2022-06-07 | Etching method of dielectric film via hole, liquid crystal display panel and liquid crystal display |
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| CN115185129A CN115185129A (en) | 2022-10-14 |
| CN115185129B true CN115185129B (en) | 2024-02-09 |
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
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