CN115132872A

CN115132872A - Photodiode device, photodetector and detection device

Info

Publication number: CN115132872A
Application number: CN202210867717.0A
Authority: CN
Inventors: 冯宏庆; 陈恒
Original assignee: Hangzhou Hikvision Digital Technology Co Ltd
Current assignee: Hangzhou Hikmicro Sensing Technology Co Ltd
Priority date: 2022-07-21
Filing date: 2022-07-21
Publication date: 2022-09-30
Anticipated expiration: 2042-07-21
Also published as: CN115132872B

Abstract

The embodiment of the application provides a photodiode device, a photosensitive detector and a detection device. The device comprises a semiconductor substrate, a first doped region, a second doped region, a third doped region and a first electrode. The semiconductor substrate includes opposing first and second surfaces. The first doping region is located in the semiconductor substrate, and the first doping region and the semiconductor substrate form a first PN junction. The second doped region is located in the first doped region. The second doped region is of a different conductivity type than the first doped region. The third doped region is located in the second doped region. The third doped region and the second doped region form a second PN junction. The first electrode is arranged on one side of the third doped region far away from the second surface and is electrically connected with the third doped region, and the first electrode is used for forming a first electric field with the semiconductor substrate. The first electric field is distributed between the first electrode and the semiconductor substrate, so that the electric field force on electrons and holes is large, the drift speed is relatively high, and the carrier collection efficiency is improved.

Description

Photodiode device, photosensitive detector and detection device

Technical Field

The application relates to the technical field of semiconductors, in particular to a photodiode device, a photosensitive detector and a detection device.

Background

A photodiode device is an optoelectronic device that converts an optical signal into an electrical signal based on the fundamental physical phenomenon of photogenerated carriers. The ability of a photodiode device to convert an optical signal into an electrical signal is closely related to the carrier collection efficiency. The carrier collection efficiency refers to the efficiency of collecting electron-hole pairs generated inside the device by the positive and negative electrodes. However, the current photodiode devices have relatively low carrier collection efficiency.

Disclosure of Invention

The embodiment of the application provides a photodiode device, a photosensitive detector and a detection device, which are used for improving the collection efficiency of carriers of the photodiode device.

In order to achieve the purpose, the following technical scheme is adopted in the application:

in a first aspect of the embodiments of the present application, a photodiode device is provided, which includes a semiconductor substrate, a first doped region, a second doped region, a third doped region, and a first electrode. The semiconductor substrate includes opposing first and second surfaces. The first doped region is located in the semiconductor substrate, and a part of the first doped region is exposed on the first surface. The second doped region is located in the first doped region, and a portion of the second doped region is exposed on the first surface. The second doped region is of a different conductivity type than the first doped region. The third doped region is located in the second doped region, and a portion of the third doped region is exposed on the first surface. The third doped region and the second doped region form a second PN junction. The first electrode is arranged on one side of the third doped region far away from the second surface and is electrically connected with the third doped region, the first electrode is used for forming a first electric field with the semiconductor substrate, and the direction of the first electric field is the same as that of a built-in electric field of the second PN junction.

In the photodiode device, the third doped region and the second doped region form a second PN junction. When light is incident on the third doped region, a large number of electron-hole pairs are excited. A voltage is applied through the first electrode and the semiconductor substrate such that the first electrode is operative to form a first electric field with the semiconductor substrate. The first electric field and the built-in electric field of the second PN junction have the same direction. The electron-hole pairs are separated under the action of the built-in electric field and the first electric field. Because the first electric field is distributed between the first electrode and the semiconductor substrate and is closer to the second PN junction, and the first doping region avoids the influence of the voltage of the semiconductor substrate on the second PN junction, the electric field force of electrons and holes is larger, the drift speed is relatively higher, and the collection efficiency of current carriers is improved.

Optionally, the photodiode device further comprises at least one fourth doped region. The fourth doping region is located in the semiconductor substrate, a part of the fourth doping region is exposed out of the second surface, the conductivity type of the fourth doping region is the same as that of the semiconductor substrate, and the doping concentration of the fourth doping region is greater than that of the semiconductor substrate. Any one of the first doped region, the second doped region and the third doped region overlaps with at least one fourth doped region in the vertical projection of the second surface. Therefore, when the thickness of the semiconductor substrate is larger, the carriers can reach the second surface, and the carrier collection efficiency can be improved.

Optionally, the photodiode device includes a plurality of fourth doping regions, and the plurality of fourth doping regions are arranged at intervals. Therefore, the photodiode device is provided with a channel for generating and collecting carriers, the carriers can be guided out and collected in time, the loss of the carriers caused by rapid recombination of the carriers is avoided, and the carrier collection efficiency is improved.

Optionally, the photodiode device further comprises a first lead and a second lead. The first end of the first lead is electrically connected with the first electrode, and the second end of the first lead is used for receiving a first voltage. The first end of the second lead is electrically connected with the semiconductor substrate, and the second end of the second lead is used for receiving a second voltage. Therefore, the voltage of the photodiode device is convenient to access.

Optionally, the semiconductor substrate is a P-type substrate, the first doped region and the third doped region are N-type doped regions, and the second doped region is a P-type doped region. Wherein the first voltage is greater than the second voltage. Therefore, the collection of the carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region. Wherein the first voltage is less than the second voltage. Therefore, the collection of the carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, the photodiode device further comprises a first lead and a second lead. The first end of the first lead is electrically connected with the first electrode, and the second end of the first lead is used for receiving a first voltage. The first end of the second lead is electrically connected with the fourth doped region, and the second end of the second lead is used for receiving a third voltage. Therefore, the voltage of the photodiode device is convenient to access.

Optionally, the semiconductor substrate is a P-type substrate, the first doped region and the third doped region are N-type doped regions, and the second doped region is a P-type doped region. Wherein the first voltage is greater than the third voltage. Therefore, the collection of the carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region. Wherein the first voltage is less than the third voltage. Therefore, the collection of the carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, the photodiode device further comprises a second electrode. The second electrode is arranged on one side of the second doping region far away from the second surface and is electrically connected with the second doping region. Therefore, the collecting mode and the collecting efficiency of the carriers can be adjusted according to the needs, and the method is more flexible.

In a second aspect of embodiments of the present application, there is provided a photosensitive detector including a photodiode array including photodiode devices. Due to the adoption of the photodiode device, the photosensitive detector has high sensitivity.

In a third aspect of the embodiments of the present application, a detection apparatus is provided, which includes an emitter and a photosensitive detector. The emitter is used for emitting detection light to the object to be detected. The photosensitive detector is used for receiving the reflected light of the detection light after the detection light is reflected by the object to be detected. Due to the adoption of the photosensitive detector, the detection device has high reliability.

Drawings

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

FIG. 2 is a schematic structural diagram of the photodiode array of FIG. 1;

fig. 3a is a schematic structural diagram of a photodiode device according to an embodiment of the present application;

FIG. 3b is a diagram illustrating the built-in electric field of the PN junction;

FIG. 4a is a schematic diagram of a first doped region formed in a semiconductor substrate;

FIG. 4b is a schematic diagram of a second doped region formed in the first doped region;

FIG. 4c is a schematic diagram of a third doped region formed in the second doped region;

FIG. 4d is a schematic diagram illustrating an included angle between the first electric field and the built-in electric field;

fig. 5 is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

fig. 6a is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

FIG. 6b is a schematic cross-sectional view taken along the line M-M of FIG. 6 a;

fig. 6c is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

FIG. 6d is a graph of the electric field distribution of the photodiode device of FIG. 6 c;

fig. 7 is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

fig. 8 is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

fig. 9 is a schematic structural diagram of a photodiode device according to another embodiment of the present application;

fig. 10 is a schematic structural diagram of a photodiode device according to another embodiment of the present application.

Reference numerals:

01. an electronic device; 02. a transmitter; 03. a photosensitive detector; 31. an array of photodiodes; 100. a photodiode device; 04. an object to be measured; 110. a semiconductor substrate; 111. a first surface; 112. a second surface; 120. a first doped region; 130. a second doped region; 140. a third doped region; 150. a first electrode; 160. a fourth doped region; 170. a first lead; 180. a second lead; 190. a second electrode; 210. a first PN junction; 220. a second PN junction;

e1, first electric field; e0, built-in electric field; s1, detecting light; s2, reflecting light;

1a, an intrinsic semiconductor; a2, PN junction; 1d, a first end; 2d, a second end.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

In the following, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or as implying any indication of the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified.

Further, in the present application, the terms "upper", "lower", and the like may include, but are not limited to, being defined relative to the orientation in which the components in the drawings are schematically disposed, and it is to be understood that these directional terms may be relative concepts that are used for descriptive and clarifying purposes relative to the orientation in which the components in the drawings are disposed, and that will vary accordingly.

In the present application, unless expressly stated or limited otherwise, the term "coupled" is to be construed broadly, e.g., "coupled" may be a fixed connection, a removable connection, or an integral part; may be directly connected or indirectly connected through an intermediate. Furthermore, the term "coupled" may be a manner of making electrical connections that communicate signals. "coupled" may be a direct electrical connection or an indirect electrical connection through intervening media.

The embodiment of the application provides a detection device. The detection device can comprise products such as a security inspection machine and a camera. The embodiment of the present application does not specifically limit the specific form of the electronic device.

In some embodiments of the present application, referring to fig. 1, the electronic device 01 may be a security check machine. In this case, the above-mentioned electronic device 01 mainly comprises an emitter 02 and a photosensitive detector 03. The emitter 02 is used for emitting a detection light ray S1 to the object 04 to be detected. The photosensitive detector 03 is configured to receive the reflected light of the detection light S1 after being reflected by the object 04 to be detected. The emitter 02 emits a detection light ray S1, such as an infrared ray, to the object 04 to be measured, and after the detection light ray S1 irradiates the object 04 to be measured, the intensity and angle of the detection light ray may be blocked, absorbed or reflected by the object 04 to be measured and may change, so as to form a reflected light ray S2. The photosensitive detector 03 receives the reflected light ray S2, generates different electrical signals according to the difference in intensity and angle of the reflected light ray S2 to form an image, and thus detects the object 04 to be detected. The detection device can effectively detect the object 04 to be detected, such as a processed product, or subway and high-speed rail luggage.

The photosensitive detector 03 used in the security inspection machine may include a photodiode array 31 as shown in fig. 2. The photodiode array 31 may include a plurality of photodiode devices 100 arranged in an array. Of course, in order to increase the integration and reduce the volume of the photosensitive detector 03, the photodiode device 100 may be integrated on one substrate a. That is, the photodiode devices 100 share one substrate a, and the substrate a is configured with a plurality of area sections arranged in an array, and each area section of the substrate a is used as the semiconductor substrate 110 of a single photodiode device 100.

The photodetector 03 can convert an optical signal incident on the photodiode array 31 from the light sensing surface of the photodetector 03 into an electrical signal by using the photoelectric conversion function of the photodiode array 31. Each photodiode device 100 may act as a photosensitive element. Wherein the electrical signal received by each photodiode device 100 may be in a corresponding proportional relationship with the optical signal. For example, the electrical signal may be proportional or approximately proportional to the optical signal. Specifically, when the light signal incident on the photodiode device 100 is large, for example, the incident light is strong, the electrical signal output by the photodiode device 100 has a large current, and conversely, the current is small. The above description is given by taking an example that the electrical signal may be proportional to the optical signal, and certainly, the electrical signal may also be inversely proportional or approximately inversely proportional to the optical signal, which is not described herein again.

That is, the photosensitive detector 03 divides the light on the photosensitive surface into a plurality of small cells. The light of each small cell is projected onto one photodiode device 100 and converted into a usable electrical signal. It can be understood that, when the quantum efficiency of the photodiode array 31 is high, the signal intensity of the photosensitive detector 03 is high.

The collection efficiency of carriers of the photodiode device 100 may affect the quantum efficiency of the photodiode array 31 to a large extent. An aspect of the present application thus provides a photodiode device 100 that may improve the collection efficiency of carriers.

In a first aspect of the embodiments of the present application, referring to fig. 3a, a photodiode device 100 is provided, which includes a semiconductor substrate 110, a first doped region 120, a second doped region 130, a third doped region 140, and a first electrode 150. The semiconductor substrate 110 includes opposing first and

second surfaces

111 and 112. The first doped region 120 is located in the semiconductor substrate 110, and a portion of the first doped region is exposed at the first surface 111, and the first doped region 120 and the semiconductor substrate 110 form a first PN junction 210. The second doped region 130 is located in the first doped region 120, and a portion of the second doped region is exposed on the first surface 111. The second doped region 130 has a different conductivity type from the first doped region 120. The third doped region 140 is located in the second doped region 130, and a portion of the third doped region is exposed on the first surface 111. The third doped region 140 and the second doped region 130 form a second PN junction 220. The first electrode 150 is disposed on a side of the third doped region 140 away from the second surface 112, and is electrically connected to the third doped region 140, the first electrode 150 is used for forming a first electric field E1 with the semiconductor substrate 110, and the first electric field E1 has the same direction as the built-in electric field E0 of the second PN junction 220.

As shown in fig. 3B, if two sides of an intrinsic semiconductor 1a, such As silicon, are doped with different elements, one side is doped with a P-type impurity, such As boron (B), by ion implantation or diffusion to form a P-type region, and the other side is doped with an N-type impurity, such As antimony (Sb) or arsenic (As), by ion implantation or diffusion to form an N-type region. Meanwhile, the doped region can be marked according to the doping concentration of the impurity, if the impurity concentration is 1 multiplied by 17cm ^-3 High impurity concentration above the left and right, the addition of "+" to the conductivity type, as shown in the P + region tableThe doped region is doped with P-type impurities of high impurity concentration. If the impurity concentration is 1X 15cm ^-3 The low impurity concentration below the left and right indicates that "-" is added to the conductivity type, and the P-region indicates that the doped region is doped with a P-type impurity having a low impurity concentration.

As shown in fig. 3b, a special thin layer called PN junction, a2 in fig. 3a, is formed near both sides of the interface between the P-type region and the N-type region. Since the carrier properties and concentrations of both sides of the P-type region and the N-type region are different, the hole concentration of the P-type region is large, and the electron concentration of the N-type region is large, so that diffusion movement is generated at the interface. Holes in the P-type region diffuse to the N-type region and are negatively charged due to the loss of the holes; electrons in the N-type region diffuse to the P-type region and become positively charged due to the loss of electrons, thus forming an electric field at the interface between the P-type region and the N-type region, i.e., a built-in electric field E0. The direction of the built-in electric field E0 is from the N-type region to the P-type region.

In the present application, the first doped region 120 and the semiconductor substrate 110 have different conductivity types, and a first PN junction 210 is formed therebetween. The third doped region 140 and the second doped region 130 are of different conductivity types and form a second PN junction 220. Meanwhile, the second doped region 130 has a different conductivity type from the first doped region 120. That is, the semiconductor substrate 110 and the second doped region 130 are of one conductivity type, such as P-type, and the first doped region 120 and the third doped region 140 are of the other conductivity type, such as N-type. Exemplarily, referring to fig. 3a, the sequential arrangement (e.g., from top to bottom) of the third doped region 140, the second doped region 130, the first doped region 120 and the semiconductor substrate 110 may form a four-layer doped structure of an N-P-N-P type as shown in fig. 3 a. The semiconductor substrate 110 and the second doped region 130 are of one conductivity type, e.g., N-type, and the first doped region 120 and the third doped region 140 are of another conductivity type, e.g., P-type. Also illustratively, the third doped region 140, the second doped region 130, the first doped region 120, and the semiconductor substrate 110 are sequentially disposed (e.g., from top to bottom) to form a four-layer doped structure of P-N-P-N type.

In the first embodiment of the photodiode device 100 of the present application, the semiconductor substrate 110 is a P-type substrate; the first doped region 120 is an N-type doped region, and the second doped region 130 is a P-type doped region; the third doped region 140 is an N-type doped region. The formation of the doped regions of the photodiode device 100 is described below.

Referring to fig. 4a, the semiconductor substrate 110 has two opposite surfaces, such as a first surface 111 and a second surface 112. P-type impurity doping is performed on the first surface 111 of the semiconductor substrate 110 to form a P-type first doped region 120 located in the semiconductor substrate 110. At this time, one surface of the first doped region 120, such as the surface a, is exposed on the first surface 111. A surface exposed to another surface is understood to mean that the surface is not covered by another surface, e.g., the surface is flush with the other surface. Next, referring to fig. 4B, N-type impurity doping is performed on the surface a of the first doped region 120 to form an N-type second doped region 130 located in the first doped region 120, and a surface B of the second doped region 130 is exposed on the surface a of the first doped region 120. Thus, the surface a of the first doped region 120 except the surface B of the second doped region 130 is an aa region. The aa region is a portion of the first doped region 120 exposed on the first surface 111.

Similarly, referring to fig. 4C, P-type impurity doping is performed on the surface B of the second doped region 130 to form a P-type third doped region 140 located in the second doped region 130, and the surface C of the third doped region 140 is exposed on the surface B of the second doped region 130. Thus, the portion of the surface B of the second doped region 130 excluding the surface C region of the third doped region 140 is the bb region. The bb region is the portion of the second doped region 130 exposed at the first surface 111. The surface C of the third doped region 140 is exposed at the first surface 111.

In this embodiment, referring to fig. 3a, a first PN junction 210 is formed near the contact surface between the first doped region 120 of N-type and the semiconductor substrate 110 of P-type, and a second PN junction 220 is formed between the third doped region 140 of N-type and the second doped region 130 of P-type. It should be noted that the interface between two adjacent doped regions with different conductivity types includes an interface in the thickness direction of the doped region and an interface in the plane of the doped region. Corresponding PN junctions are formed near the interfaces, and the formed PN junctions are not shown in the figures because the thickness of the doped regions is relatively small, and thus the formed PN junctions are not easy to mark in the figures.

The electric field direction of the built-in electric field E0 of the second PN junction 220 is directed from the third doped region 140 to the second doped region 130. The first electric field E1 is in the same direction as the built-in electric field E0 of the second PN junction 220. It should be noted that the two electric field directions are the same, which means that the orientations of the first electric field E1 and the built-in electric field E0 of the second PN junction 220 are the same, and thus the direction of the first electric field E1 and the direction of the built-in electric field E0 of the second PN junction 220 are the same, such that the electric field directions of the two are parallel (as shown in fig. 3 a), and the direction of the first electric field E1 and the electric field direction of the built-in electric field E0 of the second PN junction 220 are the same, and the electric field directions of the two have a certain included angle, as shown in fig. 4d, the electric field directions of the two are both directed from the third doped region 140 to the second doped region 130, and the included angle θ between the electric field of the first electric field E1 and the dotted line (the extension line of the electric field direction of the built-in electric field E0 of the second PN junction 220) may be different angles, such as 10 °, 15 °, 30 °.

With continued reference to fig. 3a, the first surface 111 of the semiconductor substrate 110 is a light receiving surface. The second PN junction 220 is located above the first PN junction 210, closer to the light receiving surface than the first PN junction 210. Thus, in the photodiode device 100, the second PN junction 220 is a main field where the photoelectric effect occurs. When light irradiates the second PN junction 220, photons carrying energy enter the second PN junction 220, transferring the energy to bound electrons on the covalent bonds, causing a portion of the electrons to break loose from the covalent bonds, thereby generating electron-hole pairs. In one aspect, the second PN junction 220 has a built-in electric field E0 pointing from N-type to P-type. On the other hand, the first electric field E1 can be formed between the first electrode 150 and the semiconductor substrate 110 by applying different voltages. The first electric field E1 and the built-in electric field E0 of the second PN junction 220 have the same electric field direction, and both are directed from the third doped region 140 to the second doped region 130, which corresponds to the reverse bias voltage externally connected to the second PN junction 220. The electron-hole pairs are thus separated under the action of the built-in electric field E0 and the first electric field E1, and photogenerated carriers, i.e., electrons and holes, are generated.

A first electric field E1 is formed through the first electrode 150 and the semiconductor substrate 110. The first electric field E1 is distributed between the first electrode 150 and the semiconductor substrate 110 at a short distance from the second PN junction 220, and thus the electric field force to which the electrons and holes are subjected is large. Furthermore, the semiconductor substrate 110 and the transistor formed by the third doped region 140 and the second doped region 130 are isolated from the semiconductor substrate 110 by the first doped region 120, so that the bias voltage of the semiconductor substrate 110 is prevented from being directly applied to the transistor, the transistor is prevented from being influenced by the bias voltage of the semiconductor substrate 110, and the bias voltage is prevented from hindering the drift of electrons and holes. In this way, the electrons can drift toward the first electrode 150 and gather on the surface of the third doped region 140 close to the first electrode 150, and the holes drift toward the semiconductor substrate 110 and gather on the semiconductor substrate 110, so as to facilitate the collection of the carriers and improve the collection efficiency of the carriers.

Referring to fig. 5, in a second embodiment of the photodiode device 100 of the present application, the semiconductor substrate 110 is an N-type substrate; the first doped region 120 is a P-type doped region, and the second doped region 130 is an N-type doped region; the third doped region 140 is a P-type doped region. The forming process of each doped region of the photodiode device 100 is similar to that in the first embodiment, and each doped region selects a corresponding type of doping impurities according to its own conductivity type, and the specific doping process is not described again.

In this embodiment, referring to fig. 5, a first PN junction 210 is formed near a contact surface between the P-type first doped region 120 and the N-type semiconductor substrate 110, and a second PN junction 220 is formed between the P-type third doped region 140 and the N-type second doped region 130. The electric field direction of the built-in electric field E0 of the second PN junction 220 is directed from the second doped region 130 to the third doped region 140. The first electric field E1 is in the same direction as the built-in electric field E0 of the second PN junction 220. The electric field direction of the first electric field E1 is substantially directed from the semiconductor substrate 110 to the first electrode 150. The electric field of the first electric field E1 may be parallel to the electric field direction of the built-in electric field E0 or have a certain included angle, such as 10 °, 15 °, 30 °, and so on.

In a specific operation principle, similar to the first embodiment, when the second PN junction 220 is irradiated with light, electron-hole pairs are generated. The electron-hole pairs are separated under the action of the built-in electric field E0 and the first electric field E1, and photogenerated carriers, namely electrons and holes, are generated. The first doped region 120 also has the effect of protecting the transistor from the bias of the semiconductor substrate 110. In contrast, in the present embodiment, holes drift toward the first electrode 150 and are collected on the surface of the third doped region 140 close to the first electrode 150, and electrons drift toward the semiconductor substrate 110 and are collected on the semiconductor substrate 110, which also facilitates the collection of carriers and improves the carrier collection efficiency.

In the photodiode device 100, the third doped region 140 and the second doped region 130 form a second PN junction 220. When light is incident on the third doped region 140, a large number of electron-hole pairs are excited. A voltage is applied through the first electrode 150 and the semiconductor substrate 110 such that a first electric field E1 is formed between the first electrode 150 and the semiconductor substrate 110. The first electric field E1 is in the same direction as the built-in electric field E0 of the second PN junction 220. The electron-hole pairs are separated under the action of the built-in electric field E0 and the first electric field E1. Because the first electric field E1 is distributed between the first electrode 150 and the semiconductor substrate 110 and is closer to the second PN junction 220, and the first doped region 120 prevents the voltage of the semiconductor substrate 110 from affecting the second PN junction 220, the electric field force on the electrons and holes is larger, the drift speed is faster, and the carrier collection efficiency is improved.

To accommodate the larger thickness of the semiconductor substrate 110, the photodiode device 100 further comprises at least one fourth doped region 160, see fig. 6 a. The fourth doped region 160 is located in the semiconductor substrate 110, and a portion of the fourth doped region is exposed at the second surface 112, a conductivity type of the fourth doped region 160 is the same as that of the semiconductor substrate 110, and a doping concentration of the fourth doped region 160 is greater than that of the semiconductor substrate 110. A perpendicular projection of any one of the first doped region 120, the second doped region 130 and the third doped region 140 on the second surface 112 overlaps with a perpendicular projection of at least one fourth doped region 160 on the second surface 112.

Taking the structure of the photodiode device 100 in the first embodiment as an example, if the semiconductor substrate 110 has a large thickness, referring to fig. 6a, the outermost first electric field E1 may not reach the bottom of the semiconductor substrate 110, i.e. the second surface 112, and thus carriers may not reach the second surface 112 for collection. At least one fourth doped region 160 is provided, the type of the fourth doped region 160 is also the same as the conductivity type of the semiconductor substrate 110, and is also P-type. As shown in fig. 6a, a vertical projection of any one of the first doped region 120, the second doped region 130 and the third doped region 140 on the second surface 112 overlaps with a vertical projection of at least one fourth doped region 160 on the second surface 112, so that the position of the fourth doped region 160 can be aligned with the positions of the first doped region 120, the second doped region 130 and the third doped region 140.

The fourth doping region 160 has a doping concentration greater than that of the semiconductor substrate 110 and is P + type. The semiconductor substrate 110 has a relatively low doping concentration and thus a high resistance and a relatively poor conductivity. The fourth doping region 160 has a high doping concentration and a high conductivity. Carriers tend to flow to the region of higher conductivity.

A first electric field E1 is present within the semiconductor substrate 110, wherein the first electric field E1 extends from the third doped region 140 to an area of the semiconductor substrate 110 proximate the second surface 112. In this way, the carriers reach the region of the semiconductor substrate 110 close to the second surface 112 under the action of the first electric field E1, and then flow to the fourth doping region 160 with higher conductivity to reach the second surface 112. The carriers may reach the second surface 112, and thus the carrier collection efficiency may be improved.

It is understood that, referring to fig. 6b, the total area of all the fourth doping regions 160 on the second surface 112 may occupy a relatively large area of the second surface 112, for example, occupy more than 60% of the area of the second surface 112, so that the area of the photodiode device 100 that can receive carriers on the second surface 112 is relatively large, thereby increasing the carrier collection efficiency.

Alternatively, referring to fig. 6c, the photodiode device 100 includes a plurality of fourth doping regions 160, and the plurality of fourth doping regions 160 are disposed at intervals.

Referring to fig. 6d, a plurality of fourth doping regions 160 are disposed at intervals on the second surface 112 of the semiconductor substrate 110, and a certain interval L is left between two adjacent fourth doping regions 160, so that a convergent electric field, that is, a second electric field E2, can be generated between the fourth doping regions 160 and the second surface 112, and a path for generating and collecting carriers is reserved, so that the carriers are guided out in time for collection, thereby avoiding reduction of carrier loss caused by rapid recombination of the carriers, improving carrier collection efficiency, and further improving quantum efficiency. Of course, the plurality of spacings L may be identical, partially identical or completely different. It can be understood that the structure can be adopted for either a back-illuminated photoelectric device or a front-illuminated photoelectric device, so that the quantum efficiency of the photoelectric device is improved.

It should be noted that, the above description is given by taking the structure of the photodiode device 100 in the first embodiment as an example, and the function, the arrangement position, and the arrangement manner of the fourth doping region 160 are exemplified. In other embodiments of the present application, the structure of the photodiode device 100 in the second embodiment may also be provided with the fourth doping region 160, and the function, the disposing position and the disposing manner of the fourth doping region 160 are similar to those in the first embodiment and are not described again.

Optionally, referring to fig. 7, the photodiode device 100 further includes a first lead 170 and a second lead 180. The first lead 170 has a first end 1d electrically connected to the first electrode 150 and a second end 2d for receiving a first voltage V1. The second lead 180 has a first end 1d electrically connected to the semiconductor substrate 110 and a second end 2d for receiving a second voltage V2.

In order to facilitate the voltage access of the photodiode device 100, the photodiode device 100 is further provided with a first lead 170 and a second lead 180. The first end 1d of the first lead 170 is electrically connected to the first electrode 150, such as directly fixed on the first electrode 150, and the second end 2d is used for receiving a first voltage V1 from the outside. The first end 1d of the second lead 180 is electrically connected to the semiconductor substrate 110, such as directly fixed to the semiconductor substrate 110, and the second end 2d is used for receiving a second voltage V2 from the outside. The first voltage V1 and the second voltage V2 are applied to the first electrode 150 and the semiconductor substrate 110, respectively, so that a first electric field E1 is generated therebetween.

Alternatively, referring to fig. 7, the semiconductor substrate 110 is a P-type substrate, the first doped region 120 and the third doped region 140 are N-type doped regions, and the second doped region 130 is a P-type doped region. The first voltage V1 is greater than the second voltage V2.

In this case, as shown in fig. 7, the direction of the built-in electric field E0 of the second PN junction 220 is directed from the third doped region 140 to the second doped region 130. In this way, a first voltage V1 is impressed across the first electrode 150 via the first lead 170, and a second voltage V2 is impressed across the semiconductor substrate 110 via the second lead 180, wherein V1 > V2, so that a first electric field E1 is generated which is directed from the first electrode 150 to the semiconductor substrate 110. V1 can be 12V, 6V, 3V and other voltages, V2 < V1 can be 2V, 1V, 0V, -1V and other voltages. When V2 is 0V, the semiconductor substrate 110 is grounded.

The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220, and thus the electrons and holes are subjected to a larger electric force. The electrons rapidly drift toward the first electrode 150 and are collected on the surface of the third doped region 140 close to the first electrode 150, and the holes drift toward the semiconductor substrate 110 and are collected on the semiconductor substrate 110, so that the collection of carriers is facilitated, and the collection efficiency of the carriers is improved.

Alternatively, referring to fig. 8, the semiconductor substrate 110 is an N-type substrate, the first doped region 120 and the third doped region 140 are P-type doped regions, and the second doped region 130 is an N-type doped region. The first voltage V1 is less than the second voltage V2.

In this case, as shown in fig. 8, the direction of the built-in electric field E0 of the second PN junction 220 is directed from the second doped region 130 to the third doped region 140. In this way, a first voltage V1 is impressed across the first electrode 150 via the first lead 170, and a second voltage V2 is impressed across the semiconductor substrate 110 via the second lead 180, wherein V1 < V2, so that a first electric field E1 is generated which is directed from the semiconductor substrate 110 to the first electrode 150. V2 can be 12V, 6V, 3V and other voltages, V1 < V2 can be 2V, 1V, 0V, -1V and other voltages. When V1 is 0V, the first electrode 150 is grounded.

The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220, and thus, the electrons and holes are subjected to a large electric force. The holes rapidly drift toward the first electrode 150 and are gathered on the surface of the third doped region 140 close to the first electrode 150, and the electrons drift toward the semiconductor substrate 110 and are gathered on the semiconductor substrate 110, so that the collection of carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, referring to fig. 9, the photodiode device 100 further includes a first lead 170 and a second lead 180. The first lead 170 has a first end 1d electrically connected to the first electrode 150 and a second end 2d for receiving a first voltage V1. The first end 1d of the second lead 180 is electrically connected to the fourth doped region 160, and the second end 2d is used for receiving a third voltage V3.

In order to facilitate the voltage access of the photodiode device 100, the photodiode device 100 is further provided with a first lead 170 and a second lead 180. The first end 1d of the first lead 170 is electrically connected to the first electrode 150, such as directly fixed to the first electrode 150, and the second end 2d is used for receiving a first voltage V1 from the outside. The first end 1d of the second lead 180 is electrically connected to the fourth doped region 160, such as directly fixed on the fourth doped region 160, and the second end 2d is used for receiving a second voltage V2 from the outside. The first voltage V1 and the second voltage V2 act on the first electrode 150 and the fourth doped region 160, respectively, thereby generating a first electric field E1 therebetween.

Alternatively, with continued reference to fig. 9, the semiconductor substrate 110 is a P-type substrate, the first doped region 120 and the third doped region 140 are N-type doped regions, and the second doped region 130 is a P-type doped region. Wherein the first voltage V1 is greater than the third voltage V3.

In this case, the direction of the built-in electric field E0 of the second PN junction 220 is directed from the third doped region 140 to the second doped region 130. In this way, a first voltage V1 is introduced via the first lead 170 onto the first electrode 150, and a third voltage V3 is introduced via the second lead 180 onto the fourth doped region 160, wherein V1 > V3, so that a first electric field E1 is generated which is directed from the first electrode 150 to the fourth doped region 160. V1 can be 12V, 6V, 3V and other voltages, V3 < V1 can be 2V, 1V, 0V, -1V and other voltages. When V3 is 0V, the fourth doped region 160 is grounded.

The fourth doped region 160 is located at the second surface 112 of the semiconductor substrate 110, and thus the first electric field E1 actually covers a region of the semiconductor substrate 110 as well. The direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220, and thus the electrons and holes are subjected to a larger electric force. The electrons rapidly drift toward the first electrode 150 and are collected on the surface of the third doped region 140 close to the first electrode 150, and the holes drift toward the semiconductor substrate 110 and are collected on the semiconductor substrate 110, so that the collection of carriers is facilitated, and the collection efficiency of the carriers is improved.

Alternatively, referring to fig. 10, the semiconductor substrate 110 is an N-type substrate, the first doped region 120 and the third doped region 140 are P-type doped regions, and the second doped region 130 is an N-type doped region. Wherein the first voltage V1 is less than the third voltage V3.

In this case, the direction of the built-in electric field E0 of the second PN junction 220 is directed from the second doped region 130 to the third doped region 140. In this way, a first voltage V1 is applied to the first electrode 150 via the first lead 170, and a third voltage V3 is applied to the fourth doped region 160 via the second lead 180, wherein V1 < V3, so that a first electric field E1 directed from the semiconductor substrate 110 to the first electrode 150 is generated. V3 can be 12V, 6V, 3V and other voltages, V1 < V2 can be 2V, 1V, 0V, -1V and other voltages. When V1 is 0V, the third doped region 140 is grounded. The fourth doped region 160 is located at the second surface 112 of the semiconductor substrate 110, and thus the first electric field E1 actually covers a region of the semiconductor substrate 110 as well. And the direction of the first electric field E1 is the same as the direction of the built-in electric field E0 of the second PN junction 220, so that the electrons and holes are subjected to a larger electric force. The holes rapidly drift toward the first electrode 150 and are gathered on the surface of the third doped region 140 close to the first electrode 150, and the electrons drift toward the semiconductor substrate 110 and are gathered on the semiconductor substrate 110, so that the collection of carriers is facilitated, and the collection efficiency of the carriers is improved.

Optionally, referring to fig. 10, the photodiode device 100 further includes a second electrode 190. The second electrode 190 is disposed on a side of the second doped region 130 away from the second surface 112, and is electrically connected to the second doped region 130.

The second electrode 190 is disposed on a side of the second doped region 130 away from the second surface 112, i.e., on the surface B. The second electrode 190 may be used to form an electric field between the third doped region 140 and the second doped region 130, or to form an electric field between the second doped region 130 and the semiconductor substrate 110. E.g., the second electrode 190, may receive a fourth voltage. The voltage value of the fourth voltage may be between the first voltage V1 and the second voltage V2 or between the first voltage V1 and the third voltage V3. Therefore, the first electric field E1 can be adjusted to a certain extent, so that the carrier collection mode and the carrier collection efficiency can be adjusted as required, and the method is more flexible. Of course, the second electrode 190 can also be used to conduct away some of the carriers generated at the second PN junction 220.

The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A photodiode device, comprising:

a semiconductor substrate comprising opposing first and second surfaces;

the first doping area is positioned in the semiconductor substrate, one part of the first doping area is exposed out of the first surface, and the first doping area and the semiconductor substrate form a first PN junction;

the second doping area is positioned in the first doping area, and part of the second doping area is exposed out of the first surface; the second doped region is of a different conductivity type than the first doped region;

a third doped region located in the second doped region and partially exposed from the first surface; the third doped region and the second doped region form a second PN junction; and the number of the first and second groups,

the first electrode is arranged on one side, far away from the second surface, of the third doping area and is electrically connected with the third doping area, the first electrode is used for forming a first electric field between the first electrode and the semiconductor substrate, and the direction of the first electric field is the same as that of a built-in electric field of the second PN junction.

2. The photodiode device of claim 1, further comprising:

at least one fourth doped region located in the semiconductor substrate and partially exposed on the second surface, wherein the conductivity type of the fourth doped region is the same as that of the semiconductor substrate, and the doping concentration of the fourth doped region is greater than that of the semiconductor substrate;

any one of the first doped region, the second doped region and the third doped region has a vertical projection on the second surface overlapping with a vertical projection on the second surface of the at least one fourth doped region.

3. The photodiode device according to claim 2, wherein the photodiode device comprises a plurality of the fourth doping regions, and the plurality of fourth doping regions are arranged at intervals.

4. The photodiode device according to any one of claims 1 to 3, further comprising:

a first lead having a first end electrically connected to the first electrode and a second end for receiving a first voltage; and the number of the first and second groups,

and a second lead having a first end electrically connected to the semiconductor substrate and a second end for receiving a second voltage.

5. The photodiode device according to claim 4,

the semiconductor substrate is a P-type substrate, the first doped region and the third doped region are N-type doped regions, and the second doped region is a P-type doped region;

wherein the first voltage is greater than the second voltage.

6. The photodiode device according to claim 4,

the semiconductor substrate is an N-type substrate, the first doped region and the third doped region are P-type doped regions, and the second doped region is an N-type doped region;

wherein the first voltage is less than the second voltage.

7. The photodiode device of claim 3, further comprising:

and a first end of the second lead is electrically connected with the fourth doped region, and a second end of the second lead is used for receiving a third voltage.

8. The photodiode device according to claim 7,

the semiconductor substrate is a P-type substrate, the first doping region and the third doping region are N-type doping regions, and the second doping region is a P-type doping region;

wherein the first voltage is greater than the third voltage.

9. The photodiode device according to claim 7,

wherein the first voltage is less than the third voltage.

10. The photodiode device of claim 1, further comprising:

and the second electrode is arranged on one side of the second doping region far away from the second surface and is electrically connected with the second doping region.

11. A photosensitive detector, comprising:

an array of photodiodes comprising a photodiode device as claimed in any one of claims 1 to 10.

12. A detection device, comprising:

the emitter is used for emitting detection light to the object to be detected;

the photosensitive detector according to claim 11, for receiving the reflected light after the detection light is reflected by the object to be measured.