CN115132747A - Display panel and display device - Google Patents
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- CN115132747A CN115132747A CN202210700195.5A CN202210700195A CN115132747A CN 115132747 A CN115132747 A CN 115132747A CN 202210700195 A CN202210700195 A CN 202210700195A CN 115132747 A CN115132747 A CN 115132747A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
Abstract
The invention discloses a display panel and a display device, wherein the display panel comprises: a substrate; the scanning driving circuit is arranged on one side of the substrate and comprises a first driving transistor, and the first driving transistor comprises a first active layer and a first grid which are arranged in a stacked mode; the pixel driving circuit comprises a second driving transistor, the second driving transistor comprises a second active layer and a second grid electrode which are arranged in a stacked mode, the second active layer and the first active layer are arranged on the same layer, the first active layer and the second active layer respectively comprise at least two sub active layers which are arranged in a stacked mode, and the mobility of a sub active layer, close to the first grid electrode, in the at least two sub active layers is larger than that of a sub active layer, close to the second grid electrode, in the at least two sub active layers. The first active layer and the second active layer respectively comprise at least two layers of sub active layers which are arranged in a stacked mode, so that balance between mobility and stability is achieved, and the requirements of high driving capacity of the scanning driving circuit and long service life of the pixel driving circuit are met.
Description
Technical Field
The invention belongs to the technical field of electronic products, and particularly relates to a display panel and a display device.
Background
An AMOLED (Active-matrix Organic Light Emitting Diode) display panel is widely used in the display field because of its advantages of self-luminescence, high contrast, low power consumption, etc. At present, the Oxide backplane technology is adopted in the AMOLED display panel, and the AMOLED display panel has the advantages of simple process, good uniformity, easy production of large generation lines, low cost and the like. However, the requirements of mobility and stability of the driving device cannot be satisfied simultaneously due to the limitations of the existing metal oxide material ratio and the manufacturing process.
Therefore, a new display panel and a new display device are needed.
Disclosure of Invention
The embodiment of the invention provides a display panel and a display device, wherein a sub-active layer close to a first grid electrode of a first driving transistor has higher mobility, so that the driving current influenced by the mobility is improved, and the requirement of a scanning driving circuit on high driving capability is met; meanwhile, the sub-active layer close to the second grid electrode has lower mobility so as to realize better device stability of the pixel driving circuit and be beneficial to ensuring the service life and reliability of the display panel.
An embodiment of the present invention provides a display panel, including: a substrate; the scanning driving circuit is arranged on one side of the substrate and comprises a first driving transistor, and the first driving transistor comprises a first active layer and a first grid electrode which are arranged in a stacked mode along the thickness direction of the display panel; the pixel driving circuit and the scanning driving circuit are arranged on the same side of the substrate, the pixel driving circuit comprises a second driving transistor, the second driving transistor comprises a second active layer and a second grid electrode which are arranged in a stacked mode along the thickness direction of the display panel, the second active layer and the first active layer are arranged on the same layer, the first active layer and the second active layer respectively comprise at least two sub active layers which are arranged in a stacked mode, and the mobility of the sub active layer, close to the first grid electrode, in the at least two sub active layers is larger than that of the sub active layer, close to the second grid electrode, in the at least two sub active layers.
According to an aspect of the invention, the first driving transistor further includes a third gate disposed on a side of the first active layer close to the substrate, and the third gate and the second gate are disposed on the same layer.
According to an aspect of the invention, the second driving transistor further includes a fourth gate disposed on a side of the second active layer facing away from the substrate, and the fourth gate is arranged in a floating manner.
According to an aspect of the invention, the second driving transistor further includes a second source electrode and a second drain electrode disposed on a side of the second active layer facing away from the substrate, and a fourth gate electrode electrically connected to the second source electrode.
According to an aspect of the invention, the device further comprises a first shielding layer, the first shielding layer is arranged on one side of the fourth gate electrode, which is far away from the substrate, and the first shielding layer is respectively and electrically connected with the fourth gate electrode and the second source electrode.
According to an aspect of the present invention, the semiconductor device further includes an insulating layer including at least a first insulating layer and a second insulating layer, the first insulating layer being at least partially disposed between the third gate and the first active layer, the second insulating layer being at least partially disposed between the first gate and the first active layer; preferably, the thickness of the first insulating layer is greater than the thickness of the second insulating layer.
According to one aspect of the invention, the capacitor structure comprises a first electrode and a second electrode, the second grid is used for the first electrode, the second electrode is arranged between the second grid and the substrate, and the orthographic projection of the first electrode on the substrate and the orthographic projection of the second electrode on the substrate are at least partially overlapped; preferably, the area of the second electrode is larger than the area of the first electrode. Preferably, a capacitance insulating layer is provided between the first electrode and the second electrode.
According to one aspect of the invention, the sub-active layers include a first sub-active layer and a second sub-active layer stacked in a thickness direction of the display panel, and the first sub-active layer is disposed on a side of the second sub-active layer facing away from the substrate; preferably, the material of the first sub-active layer comprises indium gallium zinc oxide, and the material of the second sub-active layer comprises at least one of indium tin zinc oxide, indium zinc oxide), zinc oxide, indium lanthanum zinc oxide, and gallium zinc oxide.
According to an aspect of the present invention, the pixel driving circuit further includes a switching transistor, the switching transistor includes a fifth gate electrode and a third active layer stacked in a thickness direction of the display panel, the fifth gate electrode and the first gate electrode are disposed in the same layer, and the third active layer and the first active layer are disposed in the same layer; preferably, the switching transistor further includes a sixth gate electrode, the sixth gate electrode is disposed between the third active layer and the substrate, and the sixth gate electrode and the second gate electrode are disposed on the same layer.
Another aspect of the embodiments of the present invention provides a display device, including the display panel in any one of the above embodiments.
Compared with the prior art, the display panel provided by the embodiment of the invention comprises a substrate, a scanning driving circuit and a pixel driving circuit, wherein a first driving transistor of the scanning driving circuit comprises a first active layer and a first grid electrode which are arranged in a stacked manner, a second driving transistor of the pixel driving circuit comprises a second active layer and a second grid electrode which are arranged in a stacked manner, the first active layer and the second active layer respectively comprise at least two sub-active layers which are arranged in a stacked manner, and the mobility of the sub-active layer close to the first grid electrode in the at least two sub-active layers is larger than that of the sub-active layer close to the second grid electrode in the at least two sub-active layers, namely the sub-active layer close to the first grid electrode of the first driving transistor has higher mobility, so that the driving current influenced by the mobility is improved, and the requirement of the scanning driving circuit for high driving capability is met; meanwhile, the sub-active layer close to the second grid electrode has lower mobility so as to obtain better device stability of the pixel driving circuit, and the service life and reliability of the display panel are favorably ensured. By having the first active layer and the second active layer each comprise at least two sub-active layers arranged in a stack, a proper balance of mobility and stability of the first and second active layers is achieved. In addition, the first active layer and the second active layer in the embodiment of the invention are arranged on the same layer and can be formed by the same process, so that the production cost is reduced, the production process is reduced, and the production efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a diagram illustrating a film structure of a display panel according to an embodiment of the invention;
FIG. 2 is a diagram of a film structure of a display panel according to another embodiment of the present invention;
FIG. 3 is a diagram of a film structure of a display panel according to another embodiment of the present invention;
fig. 4 is a film structure diagram of a display panel according to still another embodiment of the invention.
In the drawings:
1-a substrate; 2-an insulating layer; 21-a first insulating layer; 22-a second insulating layer; 3-an interlayer insulating layer; 4-a planarization layer; 41-a first planarizing layer; 42-a second planarization layer; 5-a pixel defining layer; 6-an anode; 7-a buffer layer; 8-a first shielding layer; 9-a capacitor insulating layer; a Y-sub active layer; y1 — first sub active layer; y2-second sub active layer; g1-first gate; g2 — second gate; g3-third gate; g4-fourth gate; g5-fifth gate; s1 — a first source; s2 — a second source; d1 — first drain; d2 — second drain; j1 — first electrode; j2 — second electrode; t1 — first drive transistor; t2 — second drive transistor; g-scan driving circuit; a P-pixel drive circuit; z-thickness direction of the display panel.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. It should be noted that the embodiments provided in the embodiments of the present invention can be combined with each other without contradiction.
Embodiments of the display panel and the display device will be described below with reference to fig. 1 to 4.
Referring to fig. 1, fig. 1 is a film structure diagram of a display panel according to an embodiment of the invention.
An embodiment of the present invention provides a display panel, including: a substrate 1; the scanning driving circuit G is arranged on one side of the substrate 1, and comprises a first driving transistor T1, and the first driving transistor T1 comprises a first active layer and a first grid electrode G1 which are arranged in a stacked mode along the thickness direction Z of the display panel; the pixel driving circuit P and the scan driving circuit G are disposed on the same side of the substrate 1, the pixel driving circuit P includes a second driving transistor T2, and along the thickness direction Z of the display panel, the second driving transistor T2 includes a second active layer and a second gate G2, the second active layer and the first active layer are disposed on the same layer, the first active layer and the second active layer both include at least two sub-active layers Y, and the mobility of a sub-active layer Y close to the first gate G1 in the at least two sub-active layers Y is greater than the mobility of a sub-active layer Y close to the second gate G2 in the at least two sub-active layers Y.
The display panel provided by the embodiment of the invention comprises a substrate 1, a scanning driving circuit G and a pixel driving circuit P, wherein a first driving transistor T1 of the scanning driving circuit G comprises a first active layer and a first gate electrode G1 which are arranged in a stacked manner, a second driving transistor T2 of the pixel driving circuit P comprises a second active layer and a second gate electrode G2 which are arranged in a stacked manner, by having the first active layer and the second active layer each comprise at least two sub-active layers Y arranged in a stack, and mobility of the sub-active layer Y of the at least two sub-active layers Y near the first gate electrode G1 is greater than mobility of the sub-active layer Y of the at least two sub-active layers Y near the second gate electrode G2, that is, the sub-active layer Y near the first gate electrode G1 of the first driving transistor T1 has higher mobility, further improving the driving current influenced by the mobility and meeting the requirement of the scanning driving circuit G on high driving capability; meanwhile, the sub-active layer Y close to the second gate G2 has a lower mobility to obtain a better device stability of the pixel driving circuit P, which is beneficial to ensuring the lifetime and reliability of the display panel. By making both the first active layer and the second active layer include at least two sub-active layers Y arranged in a stack, a proper balance of mobility and stability of the first active layer and the second active layer is achieved. In addition, the first active layer and the second active layer in the embodiment of the invention are arranged on the same layer and can be formed by the same process, so that the production cost is reduced, the production process is reduced, and the production efficiency is improved.
In this embodiment, the scan driving circuit G may adopt a Gate IC in Panel (Gate IC in Panel) technology, and the scan driving circuit G may be configured to sequentially supply scan pulses to a plurality of scan lines to realize display of the display Panel.
And the pixel driving circuit P is used for driving the light emitting unit of the display panel to emit light for display.
In the embodiment of the invention, the balance between the mobility and the stability is realized by fully utilizing the fact that the first active layer and the second active layer both comprise at least two sub-active layers Y which are arranged in a stacked manner, and the requirements of high driving capability of the scanning driving circuit G and long service life of the pixel driving circuit P are further realized.
In the embodiment of the present invention, the first driving transistor T1 of the scan driving circuit G may adopt a top gate structure, that is, only the first gate G1 is provided, and the first gate G1 is located on a side of the first active layer away from the substrate 1, in order to meet the requirement of the scan driving circuit G for high driving capability, an active layer material with high mobility, such as Indium Gallium Zinc Oxide (IGZO), is adopted in the first active layer and the sub-active layer Y opposite to the first gate G1, so as to simultaneously realize the requirement of the pixel driving circuit P for stability; the second driving transistor T2 of the pixel driving circuit P may have a bottom gate structure, the second gate G2 is located at a side of the second active layer close to the substrate 1, and in the second active layer, the sub active layer Y opposite to the second gate G2 is made of an active layer material with low mobility, such as indium tin zinc oxide (IGZO), Indium Zinc Oxide (IZO), zinc oxide (ZnO), indium lanthanum zinc oxide (Ln-IZO), gallium zinc oxide (IGO), etc., to ensure stability, and since the first driving transistor T1 and the second driving transistor T2 respectively have a top gate structure and a bottom gate structure, they may respectively use the sub active layers Y with different mobilities, and will not interfere with each other.
Of course, depending on the relative positions of the first gate electrode G1 and the first active layer and the second gate electrode G2 and the second active layer, the first driving transistor T1 may have a bottom gate structure, and correspondingly, the second driving transistor T2 may have a top gate structure, or at least one of the first driving transistor T1 and the second driving transistor T2 may have a double gate structure, without any particular limitation, as long as the active layer opposite to the first gate electrode G1 is made of an active layer material with high mobility, and the active layer opposite to the second gate electrode G2 is made of an active layer material with low mobility.
Alternatively, the substrate 1 may be a hard substrate, such as a glass substrate; the flexible substrate 1 may be made of polyimide, polystyrene, polyethylene terephthalate, parylene, polyethersulfone, or polyethylene naphthalate. The substrate 1 is mainly used to support devices disposed thereon. The substrate 1 may have a single-layer structure or a double-layer structure, that is, a double-layer substrate, and may be selected according to actual needs, and is not particularly limited. Optionally, a buffer layer 7 is further disposed between the substrate 1 and the first active layer.
Referring to fig. 2, in some alternative embodiments, the first driving transistor T1 further includes a third gate G3 disposed on a side of the first active layer close to the substrate 1, and the third gate G3 and the second gate G2 are disposed on the same layer.
It can be understood that, in the implementation of the present invention, when the first driving transistor T1 includes the first gate G1 and the third gate G3, and the first gate G1 and the third gate G3 are connected to the same gate control signal, the first driving transistor T1 adopts a dual-gate structure, the first gate G1 is used as a top gate, and the third gate G3 and the second gate G2 are disposed in the same layer and used as a bottom gate, and of course, in the scan driving circuit G, the first gate G1, i.e., the top gate, is mainly used, and the active layer opposite to the first gate G1 adopts an active layer material with high mobility, so that the mobility and stability are effectively balanced, and the requirement of the scan driving circuit G for high driving capability is met.
Optionally, the first driving transistor T1 further includes a first gate G1 and a first source S1 on a side of the first gate G1 facing away from the first active layer.
In some optional embodiments, the second driving transistor T2 further includes a fourth gate G4 disposed on a side of the second active layer facing away from the substrate 1, and the fourth gate G4 is in a floating configuration.
In this embodiment, the floating fourth gate G4 may be used to shield an interference electrical signal or an optical signal to prevent static electricity, a transition voltage, or an optical signal from adversely affecting the driving of the second driving transistor T2. In addition, the fourth gate G4 may be disposed on the same layer as the first gate G1, so that the fourth gate G4 and the first gate G1 are formed simultaneously by using the same process, i.e., the same conductive layer, to simplify the manufacturing process of the display panel.
In some optional embodiments, the second driving transistor T2 further includes a second source S2 and a second drain D2 disposed on a side of the second active layer facing away from the substrate 1, and a fourth gate G4 electrically connected to the second source S2. The fourth gate G4 may be shorted to the second drain D2, or may be in a floating configuration, when the fourth gate G4 and the second drain D2 are shorted or in a floating configuration, the fourth gate G4 may not receive the same gate control signal as the second gate G2, that is, the fourth gate G4 may not affect the bottom gate structure of the second driving transistor T2, and the fourth gate G4 may prevent the second active layer from accumulating charges, and at the same time, shield the display panel from emitting light or external light from affecting the second active layer, so as to prevent the second active layer from changing electrical characteristics due to light.
Optionally, the display panel further includes a first shielding layer 8, the first shielding layer 8 is disposed on a side of the fourth gate G4 facing away from the substrate 1, and the first shielding layer 8 is electrically connected to the fourth gate G4 and the second source S2, respectively.
It should be noted that the first shielding layer 8 may be specifically formed by extending the second source S2, the first shielding layer 8 may be made of a low-resistance material such as Ti (titanium) or W (tungsten), and the hydrogen shielding layer is formed by a stacked layer design to shield hydrogen ion contamination of other layers, for example, the encapsulation layer may further improve the stability of the driving and process.
Referring to fig. 3, in some alternative embodiments, the display panel further includes a capacitor structure, the capacitor structure includes a first electrode J1 and a second electrode J2, a second gate G2 is reused for the first electrode J1, the second electrode J2 is disposed between the second gate G2 and the substrate 1, and an orthographic projection of the first electrode J1 on the substrate 1 and an orthographic projection of the second electrode J2 on the substrate 1 at least partially coincide.
It can be understood that, in the embodiment, the second gate G2 is multiplexed with the first electrode J1, and the first electrode J1 does not need to be additionally formed, so that the manufacturing process can be effectively reduced, and the manufacturing cost can be reduced. By adding the second electrode J2, the potential of the second electrode J2 is utilized to shield signal interference or external electromagnetic signal interference from a trace on the side of the substrate 1 departing from the second gate G2 when the pixel driving circuit P is driven, so that poor display effect caused by possible crosstalk is effectively weakened, and meanwhile, due to the high compactness of the second electrode J2, ion pollution or water-oxygen corrosion from the direction of the substrate 1 can be prevented, and the stability of device characteristics and the reliability of products are effectively improved.
Optionally, the area of the second electrode J2 is larger than that of the first electrode J1, so as to increase the shielding area of the second electrode J2, and achieve optimal shielding and protecting effects.
The area of the second electrode J2 can be specifically understood as the size of the forward projection area of the second electrode J2 on the substrate 1, and similarly, the area of the first electrode J1 can be specifically understood as the size of the forward projection area of the first electrode J1 on the substrate 1, that is, the size of the forward projection area of the second gate G2 on the substrate 1.
Optionally, a capacitance insulating layer 9 is disposed between the first electrode J1 and the second electrode J2. The problem of short circuit or signal interference between the first electrode J1 and the second electrode J2 is avoided by the capacitor insulating layer 9. The capacitor insulating layer 9 may be made of silicon nitride, silicon oxide, silicon oxynitride, or the like.
In order to avoid mutual interference between the film layers transmitting different signals, in some alternative embodiments, the display panel further includes an insulating layer 2, the insulating layer 2 includes at least a first insulating layer 21 and a second insulating layer 22, the first insulating layer 21 is at least partially disposed between the third gate electrode G3 and the first active layer, and the second insulating layer 22 is at least partially disposed between the first gate electrode G1 and the first active layer.
In the present embodiment, the first insulating layer 21 and the second insulating layer 22 are disposed to isolate the third gate G3 and the first active layer, and the first gate G1 and the first active layer, respectively, so as to avoid the short circuit, and optionally, the thickness of the first insulating layer 21 is greater than that of the second insulating layer 22, and the inventors have found through research that the process control capability of the driving current and the sub-threshold swing (s.s. factor) can be effectively improved by adjusting the thickness of the first insulating layer 21, and since the first insulating layer 21 is disposed between the third gate G3 and the first active layer and is closer to the substrate 1, the adjustment of the thickness of the first insulating layer 21 does not affect the conductor formation and the subsequent Profile (cross-sectional Profile shape) control.
Alternatively, the first insulating layer 21 may have a single-layer structure or a multi-layer structure, for example, two layers, and specifically, materials such as silicon nitride, silicon oxide, and silicon oxynitride may be used without any particular limitation.
In some alternative embodiments, the sub-active layer Y includes a first sub-active layer Y1 and a second sub-active layer Y2 stacked in the thickness direction Z of the display panel, and the first sub-active layer Y1 is disposed on a side of the second sub-active layer Y2 facing away from the substrate 1.
It can be understood that the sub-active layer Y includes two film layers of the first sub-active layer Y1 and the second sub-active layer Y2, and since the first sub-active layer Y1 is disposed at a side of the second sub-active layer Y2 facing away from the substrate 1, that is, the first sub-active layer Y1 is closer to the first gate electrode G1, mobility of the first sub-active layer Y1 needs to be greater than mobility of the second sub-active layer Y2, that is, the first sub-active layer Y1 and the first gate electrode G1 are disposed opposite to each other, and the second sub-active layer Y2 and the second gate electrode G2 are disposed opposite to each other.
Of course, the sub active layer Y is not limited to two layers, and three or more layers may be provided as long as it is satisfied that the active layer opposite to the first gate electrode G1 uses an active layer material with high mobility, and the active layer opposite to the second gate electrode G2 uses an active layer material with low mobility.
Referring to fig. 4, in some alternative embodiments, the pixel driving circuit P further includes a switching transistor, and the switching transistor includes a fifth gate G5 and a third active layer stacked along the thickness direction Z of the display panel, the fifth gate G5 and the first gate G1 are disposed at the same layer, and the third active layer and the first active layer are disposed at the same layer.
Note that the pixel driving circuit P may specifically adopt a pixel circuit including seven transistors (TFTs) and one capacitor C, that is, a 7T1C circuit. Specifically, the pixel driving circuit P may include a second driving transistor T2 and six switching transistors, and the specific number and type of the transistors may be adjusted according to different actual requirements, and are not particularly limited.
In this example, the fifth gate G5 and the first gate G1 are formed in the same layer, that is, the fifth gate G5 and the first gate G1 can be formed in the same process to reduce the manufacturing cost, and similarly, the third active layer and the first active layer are formed in the same layer and can be formed in the same process. When the switching transistor includes only one fifth gate G5, the switching transistor is in a top gate structure or a bottom gate structure. Of course, the switch transistor may also have a double gate structure, for example, the switch transistor further includes a sixth gate disposed between the third active layer and the substrate 1, and the sixth gate and the second gate G2 are disposed on the same layer. The fifth gate G5 and the sixth gate receive the same gate control signal to form a dual gate structure.
Optionally, according to the different adopted compositions of the pixel driving circuit P, specifically, the second driving transistor T2 in the pixel driving circuit P may be directly connected to the light emitting unit, or the switching transistor in the pixel driving circuit P may be connected to the light emitting unit. Optionally, the light emitting unit includes an anode 6, the display panel includes a pixel defining layer 5, the pixel defining layer 5 includes a pixel opening, and the pixel opening exposes a portion of the anode 6.
Optionally, the display panel further includes an interlayer insulating layer 3 disposed between the first gate G1 and the first source S1 and the first drain D1, and a planarization layer 4 disposed on a side of the first source S1 and the first drain D1 facing away from the first gate G1, the planarization layer 4 includes a first planarization layer 41 and a second planarization layer 42, and the second driving transistor T2 or the switching transistor is connected to the anode 6 through a via hole penetrating through the first planarization layer 41 and the second planarization layer 42.
The embodiment of the invention also provides a display device which comprises the display panel in any one of the embodiments.
The display device provided by the embodiment of the invention has the technical effects of the technical solutions of the display panel in any of the embodiments, and the explanations of the structures and terms identical to or corresponding to those in the embodiments are not repeated herein.
The display device provided by the embodiment of the invention can be applied to a mobile phone and can also be any electronic product with a display function, including but not limited to the following categories: the touch screen display device comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited to this.
As will be apparent to those skilled in the art, for convenience and brevity of description, the specific working processes of the systems, modules and units described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.
It should also be noted that the exemplary embodiments mentioned in this patent describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed simultaneously.
Claims (10)
1. A display panel, comprising:
a substrate;
the scanning driving circuit is arranged on one side of the substrate and comprises a first driving transistor, and the first driving transistor comprises a first active layer and a first grid electrode which are arranged in a stacked mode along the thickness direction of the display panel;
the pixel driving circuit and the scanning driving circuit are arranged on the same side of the substrate, the pixel driving circuit comprises a second driving transistor, the second driving transistor comprises a second active layer and a second grid electrode which are arranged in a stacked mode along the thickness direction of the display panel, the second active layer and the first active layer are arranged on the same layer, the first active layer and the second active layer respectively comprise at least two sub-active layers which are arranged in a stacked mode, and the mobility of the sub-active layer, close to the first grid electrode, in the at least two sub-active layers is larger than that of the sub-active layer, close to the second grid electrode, in the at least two sub-active layers.
2. The display panel according to claim 1, wherein the first driving transistor further comprises a third gate disposed on a side of the first active layer adjacent to the substrate, and the third gate and the second gate are disposed on the same layer.
3. The display panel according to claim 1, wherein the second driving transistor further comprises a fourth gate disposed on a side of the second active layer facing away from the substrate, and the fourth gate is disposed in a floating manner.
4. The display panel according to claim 1, wherein the second driving transistor further comprises a second source electrode and a second drain electrode disposed on a side of the second active layer facing away from the substrate, and a fourth gate electrode electrically connected to the second source electrode.
5. The display panel according to claim 4, further comprising a first shielding layer disposed on a side of the fourth gate electrode facing away from the substrate, wherein the first shielding layer is electrically connected to the fourth gate electrode and the second source electrode, respectively.
6. The display panel according to claim 2, further comprising an insulating layer, wherein the insulating layer comprises at least a first insulating layer and a second insulating layer, wherein the first insulating layer is at least partially disposed between the third gate electrode and the first active layer, and wherein the second insulating layer is at least partially disposed between the first gate electrode and the first active layer;
preferably, the thickness of the first insulating layer is greater than the thickness of the second insulating layer.
7. The display panel according to claim 1, further comprising a capacitor structure, wherein the capacitor structure comprises a first electrode and a second electrode, the second gate is applied to the first electrode, the second electrode is disposed between the second gate and the substrate, and an orthographic projection of the first electrode on the substrate and an orthographic projection of the second electrode on the substrate at least partially coincide;
preferably, the area of the second electrode is larger than that of the first electrode;
preferably, a capacitance insulating layer is provided between the first electrode and the second electrode.
8. The display panel according to claim 1, wherein the sub-active layers comprise a first sub-active layer and a second sub-active layer stacked in a thickness direction of the display panel, and the first sub-active layer is disposed on a side of the second sub-active layer facing away from the substrate;
preferably, the material of the first sub-active layer includes indium gallium zinc oxide, and the material of the second sub-active layer includes at least one of indium tin zinc oxide, indium zinc oxide, indium lanthanum zinc oxide, and gallium zinc oxide.
9. The display panel according to claim 1, wherein the pixel driving circuit further comprises a switching transistor, and the switching transistor comprises a fifth gate electrode and a third active layer which are stacked in a thickness direction of the display panel, wherein the fifth gate electrode and the first gate electrode are disposed in the same layer, and the third active layer and the first active layer are disposed in the same layer;
preferably, the switching transistor further includes a sixth gate electrode, the sixth gate electrode is disposed between the third active layer and the substrate, and the sixth gate electrode and the second gate electrode are disposed on the same layer.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210700195.5A CN115132747A (en) | 2022-06-20 | 2022-06-20 | Display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210700195.5A CN115132747A (en) | 2022-06-20 | 2022-06-20 | Display panel and display device |
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| Publication Number | Publication Date |
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| CN115132747A true CN115132747A (en) | 2022-09-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210700195.5A Pending CN115132747A (en) | 2022-06-20 | 2022-06-20 | Display panel and display device |
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| Country | Link |
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| CN (1) | CN115132747A (en) |
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2022
- 2022-06-20 CN CN202210700195.5A patent/CN115132747A/en active Pending
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