CN115132679A - Wafer level packaging structure with thermoelectric refrigeration system - Google Patents
Wafer level packaging structure with thermoelectric refrigeration system Download PDFInfo
- Publication number
- CN115132679A CN115132679A CN202211047324.1A CN202211047324A CN115132679A CN 115132679 A CN115132679 A CN 115132679A CN 202211047324 A CN202211047324 A CN 202211047324A CN 115132679 A CN115132679 A CN 115132679A
- Authority
- CN
- China
- Prior art keywords
- heat
- thermoelectric
- thermoelectric cooling
- wafer
- cooling system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005057 refrigeration Methods 0.000 title abstract description 25
- 238000004806 packaging method and process Methods 0.000 title abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 41
- 229910052751 metal Inorganic materials 0.000 claims abstract description 41
- 229910000679 solder Inorganic materials 0.000 claims abstract description 32
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000003381 stabilizer Substances 0.000 claims abstract description 10
- 238000010248 power generation Methods 0.000 claims abstract description 9
- 238000003466 welding Methods 0.000 claims abstract description 8
- 238000001816 cooling Methods 0.000 claims description 26
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 6
- BYFGZMCJNACEKR-UHFFFAOYSA-N aluminium(i) oxide Chemical compound [Al]O[Al] BYFGZMCJNACEKR-UHFFFAOYSA-N 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 239000012811 non-conductive material Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 230000017525 heat dissipation Effects 0.000 abstract description 30
- 238000010438 heat treatment Methods 0.000 description 8
- 238000012536 packaging technology Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/38—Cooling arrangements using the Peltier effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
- H10N10/13—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the heat-exchanging means at the junction
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention relates to the technical field of semiconductor packaging heat dissipation application, in particular to a wafer-level packaging structure with a thermoelectric refrigerating system, which comprises a semiconductor substrate, a welding pad and a corresponding welding ball on the upper surface of the semiconductor substrate, a solder mask, a metal heat conduction layer surrounding the solder mask and the thermoelectric refrigerating system arranged on the lower surface of the semiconductor substrate, and comprises: paste the first thermoelectric refrigeration piece of leaning on the lower surface, the face that generates heat of first thermoelectric refrigeration piece pastes and leans on a heat conduction metal sheet, and heat conduction metal sheet divide into heat dissipation section and power generation section, and the heat dissipation section pastes and leans on the face that generates heat of first thermoelectric refrigeration piece, and the power generation section is pasted and is leaned on second thermoelectric refrigeration piece, and the positive negative end of second thermoelectric refrigeration piece is connected with the stabiliser through the wire, and the output of stabiliser is connected with the radiator. The invention utilizes the metal heat conduction layer to carry out the first step of heat dissipation, and then utilizes the thermoelectric refrigeration system to carry out the second step of heat dissipation, thereby converting the heat energy dissipated by the system into electric energy, improving the utilization efficiency of the energy, and reducing the heat dissipation cost and the volume of the whole system.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging and heat dissipation application, in particular to a wafer level packaging structure with a thermoelectric cooling system.
Background
Among the numerous new packaging technologies, the wafer level packaging technology is the most innovative and attractive to the world, and is a mark for revolutionary breakthrough of the packaging technology. The wafer level packaging technology takes a wafer as a processing object, packages, ages and tests a plurality of chips on the wafer at the same time, and finally cuts the chips into single devices.
Wafer level packaging offers several obvious benefits:
1. and (3) interconnection bandwidth improvement: the distance is short, the impedance loss is small, the material property is smaller than the dielectric loss of the PCB organic material, and the linear speed is improved; the line width and the line distance are reduced, the interconnection density is improved, and the signal bit width is greatly improved;
2. the calculation density is greatly improved, and the scale effect is calculated: a large enough computation-connection topology can emerge a new programming mode, reducing the overhead of repeated access, branch control, and the like;
3. breaking the ecological barrier of the relatively closed chip industry: the traditional integrated complex computing system needs authorized IP and is expensive; based on the unified interconnection standard and the interconnection substrate, an integrator only needs to purchase bare chips, and a new industry ecology is created.
The advantages of wafer level packaging technology have led to great interest in its emergence and have rapidly gained tremendous development and widespread adoption. In portable products such as mobile phones, devices such as EPROM, IPD (integrated passive device), and analog chips of wafer level package type have been widely used. The number of devices adopting wafer level packaging is increasing, and the wafer level packaging technology is a new technology which is developing rapidly. In order to improve the applicability of wafer level packaging and expand the application range thereof, people are researching and developing various novel technologies, solving the problems occurring in the industrialization process, and developing technical researches on related aspects of systems, power supply, heat dissipation and the like of the wafer level packaging technology.
For some special industries, a 12-inch Wafer is only used as a system-on-chip (Wafer-on-Wafer) SOW, and a large amount of heat (15 kw) is generated on a Wafer substrate of a high-density device, and when the heat is too large and the temperature is too high, the failure of the device is caused, so that the heat dissipation performance after packaging is also a problem to be considered.
Disclosure of Invention
In order to solve the technical problems in the prior art, the invention provides a wafer level packaging structure with a thermoelectric cooling system, which has the following specific technical scheme:
a wafer level package structure having a thermoelectric cooling system, comprising:
the semiconductor device comprises a semiconductor substrate, a plurality of welding pads and a plurality of welding balls, wherein the upper surface of the semiconductor substrate is provided with the plurality of welding pads;
the solder mask covers the upper surface and the positions where the solder balls are exposed, and the solder mask covers the edge position of the upper surface;
the metal heat conduction layer is positioned at the edge position of the upper surface and surrounds the solder mask;
the lower surface of the semiconductor substrate is provided with a thermoelectric refrigerating system, and the thermoelectric refrigerating system comprises: the semiconductor substrate comprises a first thermoelectric refrigerating piece attached to the lower surface of the semiconductor substrate, a heat-conducting metal plate attached to the heating surface of the first thermoelectric refrigerating piece, a heat-radiating section and a power-generating section, wherein the heat-radiating section is attached to the heating surface of the first thermoelectric refrigerating piece, and the power-generating section is attached to a second thermoelectric refrigerating piece; the positive end and the negative end of the second thermoelectric refrigeration piece are connected with a voltage stabilizer through wires, and the output end of the voltage stabilizer is connected with a radiator.
Preferably, the first thermoelectric refrigerating piece and the second thermoelectric refrigerating piece are both multi-stage refrigerating pieces.
Preferably, the first thermoelectric refrigeration piece is attached to the heat-conducting metal plate through the heat-conducting coating, and the second thermoelectric refrigeration piece is attached to the power generation section of the heat-conducting metal plate through the heat-conducting coating.
Preferably, the radiator is a fan.
Preferably, the thickness of metal heat-conducting layer is less than the thickness of solder mask, the edge of solder mask has the structure setting of a ladder, the thickness of ladder does half of solder mask thickness, the ladder encircle by the array that the solder ball is constituteed, the metal heat-conducting layer hug closely in the edge of ladder, the thickness of metal heat-conducting layer is not more than the thickness of ladder.
Preferably, the material of the metal heat conduction layer is at least one selected from Cu and Ni.
Preferably, a plurality of heat conduction through holes are formed in the metal heat conduction layer and the first thermoelectric refrigerating sheet in a penetrating mode.
Preferably, when the heat conducting through hole is filled with a conductive material, the heat conducting through hole is preferably Cu or Au; when the heat conducting through hole is filled with a non-conductive material, Al2O3 is preferable.
Compared with the prior art, the invention has the following beneficial effects:
according to the wafer-level packaging structure with the thermoelectric refrigeration system, the metal heat conduction layer on the periphery of the upper surface is utilized for carrying out first-step heat dissipation, and then a part of heat is conducted to the heat dissipation layer on the lower surface through the heat conduction through hole, so that the area of the heat dissipation layer is large, the heat dissipation efficiency is high, the influence on devices on the upper surface is not easily caused, the heat dissipation efficiency is greatly improved, and the packaging reliability is ensured; the second step of heat dissipation after encapsulation is carried out by utilizing a thermoelectric refrigeration system, a thermoelectric refrigeration piece is adopted to produce a low-temperature environment for a system on a chip (SOW), and a part of heat of the hot surface of the thermoelectric refrigeration piece is transferred to another thermoelectric refrigeration piece to produce temperature difference for power generation; the electric energy is adopted to drive the fans and other radiators to form a closed temperature control loop, and the temperature of the hot surface of the thermoelectric refrigerating sheet can be controlled to fluctuate within a certain range.
Drawings
FIG. 1 is a schematic diagram of a wafer level package with a thermoelectric cooling system according to the present invention.
In the figure: the thermoelectric cooling module comprises a semiconductor substrate 1, a bonding pad 2, a welding ball 3, a welding resistance layer 4, a metal heat conduction layer 5, a first thermoelectric cooling piece 6, a heating surface 7, a heat conduction metal plate 8, a heat dissipation section 8-1, a power generation section 8-2, a second thermoelectric cooling piece 9, a voltage stabilizer 10, a radiator 11, a heat conduction coating 12, a ladder 13 and a heat conduction through hole 14.
Detailed Description
In order to make the objects, technical solutions and technical effects of the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and examples.
As shown in fig. 1, a wafer level package structure with a thermoelectric cooling system of the present invention includes:
the semiconductor device comprises a semiconductor substrate 1, wherein a plurality of bonding pads 2 are arranged on the upper surface of the semiconductor substrate 1, and corresponding solder balls 3 are arranged on the bonding pads 2;
the solder mask layer 4 covers the upper surface, specifically the positions of the solder balls 3 are leaked during covering, and the solder mask layer 4 covers the edge position of the upper surface;
the metal heat conduction layer 5 is positioned at the edge position of the upper surface and surrounds the solder mask layer 4;
the lower surface of the semiconductor substrate 1 is provided with a thermoelectric cooling system.
Specifically, the thermoelectric refrigeration system includes: the semiconductor device comprises a first thermoelectric refrigerating sheet 6 attached to the lower surface of a semiconductor substrate 1, wherein a heating surface 7 of the first thermoelectric refrigerating sheet 6 is attached to a heat-conducting metal plate 8, the heat-conducting metal plate 8 is divided into a heat dissipation section 8-1 and a power generation section 8-2, the heat dissipation section 8-1 is attached to the heating surface 7 of the first thermoelectric refrigerating sheet 6, and a second thermoelectric refrigerating sheet 9 is attached to the power generation section 8-2; the positive end and the negative end of the second thermoelectric refrigerating sheet 9 are connected with a voltage stabilizer 10 through leads, and the output end of the voltage stabilizer 10 is connected with a radiator 11 for radiating the radiating section 8-1; the heat radiator 11 is a fan, the fan adopts a heat dissipation air duct designed by an air guide cover and the like, so that the heat dissipation effect is improved, and meanwhile, the fan can convert the heat energy of the heat dissipation section 8-1 into mechanical energy, so that the heat dissipation of the heat dissipation section 8-1 is accelerated.
The first thermoelectric refrigerating piece 6 and the second thermoelectric refrigerating piece 9 are both multistage refrigerating pieces, and the multistage refrigerating pieces can improve the refrigerating efficiency of the first thermoelectric refrigerating piece 6 and the generating efficiency of the second thermoelectric refrigerating piece 9. First thermoelectric refrigeration piece 6 pastes through heat conduction coating 12 with heat conduction metal sheet 8 and leans on, second thermoelectric refrigeration piece 9 pastes through heat conduction coating 12 with heat conduction metal sheet 8 and leans on, heat conduction coating 12 has higher heat transfer performance, has further improved the generating efficiency of the face 7 radiating efficiency that generates heat of first thermoelectric refrigeration piece 6 and second thermoelectric refrigeration piece 9.
The first thermoelectric refrigerating sheet 6 is used for producing a low-temperature environment for single photons, part of heat of a heating surface 7 of the first thermoelectric refrigerating sheet is conducted to the second thermoelectric refrigerating sheet 9 through the heat conducting metal plate 8, so that temperature difference is produced for the second thermoelectric refrigerating sheet 9 for power generation, and electric energy can be converted into stable direct-current voltage after passing through the voltage stabilizer 10 and then output to drive a fan and the like. The heat that the face 7 that generates heat of first thermoelectric refrigeration piece 6 produced is big more, the electric energy that second thermoelectric refrigeration piece 9 generated is also more, also can provide more electric currents simultaneously and be used for the fan etc. to the fan rotational speed is also fast more, the radiating effect to the face 7 that generates heat of first thermoelectric refrigeration piece 6 is better, just so formed a dynamic homothermal temperature control system, the recycle of heat energy has been realized simultaneously, can make original heat abstractor size and power also can set up less specification.
In a wafer level packaging part, the thickness of the metal heat conduction layer 5 is smaller than that of the solder mask layer 4, so that the height of a solder ball can be more protruded, and when other electronic components or substrates are connected, the short circuit between the metal heat conduction layer 5 and the solder ball or the short circuit between the metal heat conduction layer 5 and the other electronic components or substrates can be avoided.
The edge of the solder mask layer 4 is provided with a step 13, the metal heat conduction layer 5 is tightly attached to the edge of the step 13, the step 13 surrounds an array formed by the solder balls 3, the thickness of the metal heat conduction layer 5 is not larger than that of the step 13, and in some more preferred schemes, the thickness of the metal heat conduction layer 5 is equal to that of the step 13. The thickness of the step 13 is half of the thickness of the solder mask layer 4, for example, the thickness of the solder mask layer 4 is 100-200 microns, the thickness of the step 13 is 50-100 microns, and the thickness of the metal heat conduction layer 5 is also 50-100 microns. The provision of the step 13 prevents excess metal material from spilling over to the upper surface of the solder resist layer to cause shorting of the solder balls when depositing or electroplating the metallic heat conductive layer 5.
In addition, the material of the metal heat conduction layer 5 is at least one selected from Cu and Ni, and a plurality of heat conduction through holes are formed through the metal heat conduction layer and the first thermoelectric cooling sheet. The heat conducting through hole 14 may be filled with an electrically conductive material, preferably Cu or Au; the thermally conductive vias 14 may also be filled with a non-conductive material, preferably Al2O 3.
According to the structure of the wafer-level packaging structure with the thermoelectric refrigeration system, the metal heat conduction layer 5 on the periphery of the upper surface is utilized for carrying out first-step heat dissipation, and then a part of heat is conducted to the heat dissipation layer on the lower surface through the heat conduction through hole 14, so that the area of the heat dissipation layer is large, the heat dissipation efficiency is high, the device on the upper surface is not easily affected, the heat dissipation efficiency is greatly improved, and the packaging reliability is ensured; the thermoelectric refrigerating system is utilized to perform second-step heat dissipation after packaging, a thermoelectric refrigerating sheet is adopted to manufacture a low-temperature environment for a system on a crystal (SOW), a part of heat of a heating surface of the thermoelectric refrigerating sheet is conducted to another thermoelectric refrigerating sheet to be used for manufacturing temperature difference to generate electricity, the electric energy is adopted to drive radiators such as a fan and the like, a closed temperature control loop is formed, and the temperature fluctuation of the heating surface of the thermoelectric refrigerating sheet in a certain range can be controlled. And the heat energy required to be dissipated by the system is converted into electric energy, so that the utilization efficiency of the energy is improved, and the heat dissipation cost and the volume of the whole system are reduced.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way. Although the foregoing has described the practice of the present invention in detail, it will be apparent to those skilled in the art that modifications may be made to the practice of the invention as described in the foregoing examples, or that certain features may be substituted in the practice of the invention. All changes, equivalents and modifications which come within the spirit and scope of the invention are desired to be protected.
Claims (8)
1. A wafer level package structure having a thermoelectric cooling system, comprising:
the semiconductor device comprises a semiconductor substrate (1), wherein a plurality of bonding pads (2) are arranged on the upper surface of the semiconductor substrate (1), and corresponding welding balls (3) are arranged on the bonding pads (2);
the solder mask layer (4) covers the upper surface and the positions of the solder balls (3) are exposed, and the solder mask layer (4) covers the edge position of the upper surface;
a metal heat conduction layer (5) which is positioned at the edge position of the upper surface and surrounds the solder mask layer (4);
the lower surface of the semiconductor substrate (1) is provided with a thermoelectric cooling system, and the thermoelectric cooling system comprises: the semiconductor device comprises a first thermoelectric refrigerating sheet (6) attached to the lower surface of a semiconductor substrate (1), a heat-conducting metal plate (8) is attached to a heat-generating surface (7) of the first thermoelectric refrigerating sheet (6), the heat-conducting metal plate (8) is divided into a heat-radiating section (8-1) and a power-generating section (8-2), the heat-radiating section (8-1) is attached to the heat-generating surface (7) of the first thermoelectric refrigerating sheet (6), the power-generating section ((8-2) is attached to a second thermoelectric refrigerating sheet (9), the positive end and the negative end of the second thermoelectric refrigerating sheet (9) are connected with a voltage stabilizer (10) through leads, and the output end of the voltage stabilizer (10) is connected with a radiator (11).
2. The wafer-level package structure with the thermoelectric cooling system as claimed in claim 1, wherein the first thermoelectric cooling plate (6) and the second thermoelectric cooling plate (9) are both multi-stage cooling plates.
3. The wafer-level package structure with the thermoelectric cooling system as claimed in claim 2, wherein the first thermoelectric cooling plate (6) is attached to the heat-conducting metal plate (8) through the heat-conducting coating (12), and the second thermoelectric cooling plate (9) is attached to the power generation section (8-2) of the heat-conducting metal plate (8) through the heat-conducting coating (12).
4. The wafer-level package structure with a thermoelectric cooling system as recited in claim 1, wherein said heat sink (11) is a fan.
5. The wafer level package structure with the thermoelectric cooling system as claimed in claim 1, wherein the thickness of the metal heat conducting layer (5) is smaller than the thickness of the solder mask layer (4), the edge of the solder mask layer (4) has a step (13) structure, the thickness of the step (13) is half of the thickness of the solder mask layer (4), the step (13) surrounds the array composed of the solder balls (3), the metal heat conducting layer (5) is tightly attached to the edge of the step (13), and the thickness of the metal heat conducting layer (5) is not larger than the thickness of the step (13).
6. A wafer level package structure with thermoelectric cooling system as recited in claim 1, wherein the material of said metallic heat conducting layer (5) is selected from at least one of Cu and Ni.
7. The wafer-level package structure with a thermoelectric cooling system as recited in claim 1, wherein the metal heat conducting layer (5) and the first thermoelectric cooling plate (6) are penetrated by a plurality of heat conducting through holes (14).
8. The wafer-level package structure with the thermoelectric cooling system as claimed in claim 7, wherein when the thermal via (14) is filled with the conductive material, the conductive material is Cu or Au; when the heat conduction through hole (14) is filled with the non-conductive material, the non-conductive material is alumina Al2O 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211047324.1A CN115132679A (en) | 2022-08-30 | 2022-08-30 | Wafer level packaging structure with thermoelectric refrigeration system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211047324.1A CN115132679A (en) | 2022-08-30 | 2022-08-30 | Wafer level packaging structure with thermoelectric refrigeration system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115132679A true CN115132679A (en) | 2022-09-30 |
Family
ID=83387654
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211047324.1A Pending CN115132679A (en) | 2022-08-30 | 2022-08-30 | Wafer level packaging structure with thermoelectric refrigeration system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115132679A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1873973A (en) * | 2006-06-19 | 2006-12-06 | 朱建钦 | Envelope for luminous elements of semiconductor in large power |
| CN106449561A (en) * | 2016-11-27 | 2017-02-22 | 南通沃特光电科技有限公司 | Wafer package with heat radiating structure |
| CN207991020U (en) * | 2018-03-19 | 2018-10-19 | 云南天衢量子科技有限公司 | A kind of refrigerating plant based on manufacture single-photon detector low temperature environment |
| CN110931439A (en) * | 2019-11-22 | 2020-03-27 | 上海无线电设备研究所 | Radiator of electronic equipment |
| CN112242480A (en) * | 2020-09-30 | 2021-01-19 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Thermoelectric refrigeration method for chip-level electronic equipment |
| CN113945024A (en) * | 2020-07-16 | 2022-01-18 | 厦门稀土材料研究所 | Semiconductor local refrigeration equipment based on thermoelectric effect and refrigeration method and application thereof |
-
2022
- 2022-08-30 CN CN202211047324.1A patent/CN115132679A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1873973A (en) * | 2006-06-19 | 2006-12-06 | 朱建钦 | Envelope for luminous elements of semiconductor in large power |
| CN106449561A (en) * | 2016-11-27 | 2017-02-22 | 南通沃特光电科技有限公司 | Wafer package with heat radiating structure |
| CN207991020U (en) * | 2018-03-19 | 2018-10-19 | 云南天衢量子科技有限公司 | A kind of refrigerating plant based on manufacture single-photon detector low temperature environment |
| CN110931439A (en) * | 2019-11-22 | 2020-03-27 | 上海无线电设备研究所 | Radiator of electronic equipment |
| CN113945024A (en) * | 2020-07-16 | 2022-01-18 | 厦门稀土材料研究所 | Semiconductor local refrigeration equipment based on thermoelectric effect and refrigeration method and application thereof |
| CN112242480A (en) * | 2020-09-30 | 2021-01-19 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Thermoelectric refrigeration method for chip-level electronic equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20080278917A1 (en) | Heat dissipation module and method for fabricating the same | |
| US20070090517A1 (en) | Stacked die package with thermally conductive block embedded in substrate | |
| CN107305875B (en) | Bidirectional semiconductor packaging part | |
| US20100295172A1 (en) | Power semiconductor module | |
| US7232710B2 (en) | Method of making cascaded die mountings with springs-loaded contact-bond options | |
| CN102683302A (en) | Heat radiation structure for single chip package and system-in-package | |
| CN112018049B (en) | Chip packaging structure and electronic equipment | |
| CN103871982A (en) | Chip heat radiation system | |
| CN218918850U (en) | Integrated circuit element with high-efficiency heat dissipation package | |
| CN111261598A (en) | Packaging structure and power module applicable to same | |
| US20090015134A1 (en) | Heat dissipation arrangement of a light emitting module | |
| Liu et al. | Direct liquid cooling For IGBT power module | |
| US7310224B2 (en) | Electronic apparatus with thermal module | |
| JP2000156439A (en) | Power semiconductor module | |
| CN115132679A (en) | Wafer level packaging structure with thermoelectric refrigeration system | |
| RU190135U1 (en) | MULTI CRYSTAL MEMORY MODULE | |
| CN111430327B (en) | High-heat-dissipation fan-out type packaging structure and packaging method | |
| CN113675093B (en) | Packaging design and preparation method of double-sided plastic packaging heat dissipation structure | |
| Gottwald et al. | Minimizing Form Factor and Parasitic Inductances of Power Electronic Modules: The p 2 Pack Technology | |
| CN221687527U (en) | Packaging structure | |
| CN214672591U (en) | Power device packaging structure | |
| CN219959039U (en) | Device for improving heat dissipation of high-power LED chip based on COB packaging | |
| CN217933772U (en) | Heat radiation structure of power semiconductor device and power semiconductor device | |
| CN220326092U (en) | Hardware heat radiation structure | |
| CN217280846U (en) | Multi-chip module packaging structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20220930 |