CN115116332A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
- Publication number
- CN115116332A CN115116332A CN202210767702.7A CN202210767702A CN115116332A CN 115116332 A CN115116332 A CN 115116332A CN 202210767702 A CN202210767702 A CN 202210767702A CN 115116332 A CN115116332 A CN 115116332A
- Authority
- CN
- China
- Prior art keywords
- display area
- sub
- pixel circuit
- area
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2085—Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application discloses a display panel and a display device, wherein the display panel is provided with a hole digging area and a display area; the display area comprises a first display area and a second display area which are adjacently arranged, and the first display area is positioned between the hole digging area and the second display area; the display panel comprises a substrate positioned in the display area, a plurality of signal lines positioned in the first display area and arranged on the substrate, a plurality of first light-emitting units positioned in the first display area and positioned on the plurality of signal lines, a plurality of pixel circuit units positioned in the second display area and adjacent to each other on the substrate, and a plurality of second light-emitting units positioned in the second display area and positioned on the plurality of pixel circuit units; the plurality of pixel circuit units are respectively electrically connected with the plurality of first light-emitting units and the plurality of second light-emitting units in a one-to-one correspondence mode, and the size of one part of pixel circuit units in the plurality of pixel circuit units is smaller than that of the other part of pixel circuit units. This application can reduce the frame width of digging the hole district, promotes display panel's screen and accounts for the ratio.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a display device.
Background
The mobile electronic terminals (especially mobile phones) at present pursue the dual advantages of portability and large screen display, which requires electronic products with the highest possible screen ratio. The design of a hole digging camera is one of methods for improving the screen ratio, wherein a hole digging area designed on a screen for placing a front camera is an objective area. The edge of the eye area usually contains dozens of signal lines, packaging structures and the like, so that the frame width of the eye area is not easy to narrow. If the width of the frame of the eye area is too large, a circle of black edge appears around the camera, so that the visual experience of a user is poor.
Disclosure of Invention
The application provides a display panel and display device can reduce the frame width of digging the hole district, promotes display panel's screen and accounts for the ratio to user visual experience has been promoted.
The application provides a display panel, which is provided with a hole digging area and a display area positioned at the periphery of the hole digging area; the display area comprises a first display area and a second display area which are adjacently arranged, and the first display area is positioned between the hole digging area and the second display area;
the display panel comprises a substrate positioned in the display area, a plurality of signal lines positioned in the first display area and sequentially arranged on the substrate side by side, a plurality of first light-emitting units positioned in the first display area and positioned on one side, far away from the substrate, of the plurality of signal lines, a plurality of pixel circuit units positioned in the second display area and adjacent to each other on the substrate, and a plurality of second light-emitting units positioned in the second display area and positioned on one side, far away from the substrate, of the plurality of pixel circuit units;
the pixel circuit units are respectively and correspondingly electrically connected with the first light-emitting units and the second light-emitting units one by one, and the orthographic projection area of one part of the pixel circuit units on the substrate in the pixel circuit units is smaller than that of the other part of the pixel circuit units on the substrate.
Optionally, the second display area includes a first sub-display area and a second sub-display area which are adjacently arranged; the first sub-display area is positioned between the second sub-display area and the first display area;
the orthographic projection area of each pixel circuit unit located in the first sub-display area on the substrate is smaller than that of the pixel circuit unit located in the second sub-display area on the substrate, and the orthographic projection areas of the pixel circuit units located in the second sub-display area on the substrate are the same.
Optionally, the forward projection areas of the pixel circuit units on the substrate in the first sub-display area are the same.
Optionally, the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first sub-display area and the first display area are arranged side by side in the row direction;
the width of each pixel circuit unit in the column direction is the same, and the width of the pixel circuit unit in the first sub-display area in the row direction is smaller than the width of the pixel circuit unit in the second sub-display area in the row direction.
Optionally, the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first sub-display area and the first display area are arranged side by side in the column direction;
the width of each pixel circuit unit in the row direction is the same, and the width of the pixel circuit unit in the first sub-display area in the column direction is smaller than the width of the pixel circuit unit in the second sub-display area in the column direction.
Optionally, the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first display area is arranged around the digging hole area; the first sub-display area includes first areas located on both sides of the first display area in the row direction and second areas located on both sides of the first display area in the column direction;
the width of the pixel circuit units in the first area in the row direction is smaller than that of the pixel circuit units in the second sub-display area in the row direction, and the widths of the pixel circuit units in the first area and the second sub-display area in the column direction are the same; the width of the pixel circuit unit located in the second area in the column direction is smaller than the width of the pixel circuit unit located in the second sub-display area in the column direction, and the widths of the pixel circuit units in the second area and the second sub-display area in the row direction are the same.
Optionally, the size and shape of the orthographic projection of the first light-emitting unit on the substrate are respectively the same as the size and shape of the orthographic projection of the second light-emitting unit on the substrate, and the arrangement period and density of the first light-emitting unit and the second light-emitting unit are the same.
Optionally, the plurality of first light emitting units and the plurality of second light emitting units are distributed in a plurality of rows and a plurality of columns;
the plurality of second light-emitting units positioned in the second sub-display area are in one-to-one correspondence with the plurality of pixel circuit units which are correspondingly and electrically connected, and the plurality of second light-emitting units positioned in the first sub-display area are arranged in a staggered manner with the plurality of pixel circuit units which are correspondingly and electrically connected.
Optionally, the first display area is arranged around the hole digging area; the display panel further comprises a first routing part and a second routing part which are separated by the digging hole area; the signal wire extends at least partially along the edge direction of the digging hole area and is electrically connected with the first routing part and the second routing part respectively.
The application also provides a display device which comprises the display panel and the optical sensor arranged in the hole digging area.
According to the display panel and the display device, the plurality of signal lines and the plurality of first light-emitting units positioned above the plurality of signal lines are arranged in the first display area which is close to the hole digging area, and the size of part of pixel driving circuits is compressed in the second display area which is far away from the hole digging area so as to add the plurality of pixel driving circuits which are correspondingly and electrically connected with the plurality of first light-emitting units; the frame width of digging the hole area has been reduced when increase display area, has promoted display panel's screen area and has promoted user visual experience.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic top view of a display panel in the prior art.
Fig. 2 is a schematic view of a partial structure of the display panel provided in fig. 1.
Fig. 3 is a schematic top view structure diagram of a display panel according to an embodiment of the present disclosure.
Fig. 4 is a partially enlarged view of a portion a in fig. 3.
Fig. 5 is a schematic distribution diagram of a first sub-display area of a display panel according to an embodiment of the present disclosure.
Fig. 6 is a schematic distribution diagram of a first sub-display area of another display panel according to an embodiment of the present disclosure.
Fig. 7 is a schematic distribution diagram of a first sub-display area of another display panel according to an embodiment of the present disclosure.
Fig. 8 is a schematic distribution diagram of a first sub-display area of another display panel according to an embodiment of the present disclosure.
Fig. 9 is a schematic diagram of a partial top view structure of a display area of a display panel according to an embodiment of the present disclosure.
Fig. 10 is a schematic cross-sectional structure diagram of a display device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Fig. 1 and 2 provide an exemplary display panel 1 ', the display panel 1 ' having a dug hole area (i.e., an ocul area) 2 ' for placing a front camera and a display area 3 ' disposed around the dug hole area 2 '; the display area 3 'of the display panel 1' is provided with a plurality of pixel circuit units 4 'which are distributed in a plurality of rows and a plurality of columns and are sequentially arranged adjacently in the row direction and the column direction, and light-emitting units 5' which are arranged on the pixel circuit units 4 'and are electrically connected with the pixel circuit units 4' in a one-to-one correspondence manner; the area of the orthographic projection of each pixel circuit unit 4 'in the direction perpendicular to the display panel 1' is the same. Because the frame region 7 ' for accommodating the packaging structure and the plurality of signal lines (e.g. data line winding lines) 6 ' is further included between the hole digging region 2 ' and the display region 3 ', the frame of the hole digging region 2 ' is too wide, a circle of black edges appears around the camera, and the user visual experience is poor.
In order to solve the above technical problem, the present application provides a new display panel and a display device, and specifically refers to the description of the following embodiments.
As shown in fig. 3 and 4, the present embodiment provides a display panel 1, the display panel 1 having a cut-out region (i.e., an eye region) 2 and a display region 3 located at the periphery of the cut-out region 2; the display area 3 includes a first display area 4 and a second display area 5 which are adjacently arranged, and the first display area 4 is located between the dug-hole area 2 and the second display area 5.
As shown in fig. 4, the display panel 1 includes a substrate (not shown) in the display area 3, a plurality of signal lines (e.g., data line winding lines) 7 in the first display area 4 and sequentially arranged side by side on the substrate, a plurality of first light-emitting units 8 in the first display area 4 and on a side of the plurality of signal lines 7 away from the substrate, a plurality of pixel circuit units 9 in the second display area 5 and adjacent to each other on the substrate, and a plurality of second light-emitting units 10 in the second display area 5 and on a side of the plurality of pixel circuit units 9 away from the substrate.
The plurality of pixel circuit units 9 are respectively electrically connected with the plurality of first light emitting units 8 and the plurality of second light emitting units 10 in a one-to-one correspondence manner, and an orthographic projection area of a part of the pixel circuit units 9 on the substrate in the plurality of pixel circuit units 9 is smaller than that of another part of the pixel circuit units 9 on the substrate.
Specifically, the first display area 4 is arranged around the hole digging area 2; the display panel 1 further comprises a first routing portion and a second routing portion (not shown in the figure) separated by the excavated area 2; the signal line 7 extends at least partially along the edge direction of the hole digging area and is electrically connected with the first routing portion and the second routing portion respectively. It is understood that the signal line 7 in the embodiment of the present application is a connection line for connecting two routing portions separated by the excavated area 2. In one embodiment, the first and second routing parts are data lines extending in the same direction and used for transmitting the same data signal, and the corresponding signal line 7 is a data line winding used for communicating the first and second routing parts. In other embodiments, the signal line 7 may also be a scan line winding; of course, the specific winding type is not limited thereto.
Note that, the fact that the forward projection area of a part of the pixel circuit units 9 in the plurality of pixel circuit units 9 on the substrate is smaller than the forward projection area of another part of the pixel circuit units 9 on the substrate means the size comparison between the forward projection areas of the individual pixel circuit units 9 on the substrate. For convenience of description, the projection area will be represented by a size in some places hereinafter.
It can be understood that the embodiment of the present application is an improvement on the display panel 1 shown in fig. 1 and 2, and on the basis of not changing the positional relationship between the hole digging region 2 and the signal lines 7, a plurality of first light emitting units 8 are additionally arranged on the plurality of signal lines 7, and the size of a part of the pixel circuit units 9 in the second display region 5 is reduced to additionally arrange the pixel circuit units 9 which are correspondingly and electrically connected with the first light emitting units 8.
Specifically, the sizes of a part of the pixel circuit units 9 in the second display area 5 are compressed so that the area of the orthographic projection of the part of the pixel circuit units 9 on the substrate is smaller than the area of the orthographic projection of the other part of the pixel circuit units 9 on the substrate. It is understood that the size of the pixel circuit unit 9 that is not compressed may be the size of the pixel circuit unit in a display panel in the related art (e.g., the display panel 1' shown in fig. 1 and 2).
It should be noted that the size of the partial pixel circuit unit 9 is reduced within the allowable range of the process capability, so as to avoid affecting the normal function of the pixel circuit unit 9.
Specifically, when the accommodating space required for adding the pixel circuit units 9 electrically connected to the first light emitting units 8 in the second display area 5 is a fixed value, a certain number of the pixel circuit units 9 may be selected for compression, and the larger the number of the compressed pixel circuit units 9 is, the smaller the influence on the pixel circuit units 9 is.
As shown in fig. 2, the width of the visual frame of the hole digging region 2 'of the display panel 1' in the prior art is equal to the distance D1 between the display region 3 'and the hole digging region 2', which is equivalent to the distance between the second display region 5 and the hole digging region 2 in the present application; as shown in fig. 4, in the embodiment of the present application, the visual frame width of the cutout region 2 of the display panel 1 is equal to the distance D2 between the first display region 4 and the cutout region 2; it is clear that D2 is less than D1. Therefore, the frame width of the digging hole area can be visually reduced according to the embodiment of the application.
Specifically, as shown in fig. 4, the second display area 5 includes a first sub-display area 11 and a second sub-display area 12 which are adjacently disposed; the first sub display area 11 is located between the second sub display area 12 and the first display area 4; the orthographic projection area of each pixel circuit unit 9 positioned in the first sub-display area 11 on the substrate is smaller than that of the pixel circuit unit 9 positioned in the second sub-display area 12 on the substrate, and the orthographic projection areas of the plurality of pixel circuit units 9 positioned in the second sub-display area 12 on the substrate are the same.
It is understood that the present application only compresses the size of the pixel circuit unit 9 in the first sub-display region 11 disposed close to the first display region 4, and does not compress the size of the pixel circuit unit 9 located in the second sub-display region 12 (i.e., away from the first display region 4).
Specifically, the forward projection areas of the plurality of pixel circuit units 9 in the first sub-display area 11 on the substrate are the same, that is, the compressed sizes of each pixel circuit unit 9 in the first sub-display area 11 are the same, which is beneficial to simplifying the process. Of course, the orthographic projections of the plurality of pixel circuit units 9 on the substrate in the first sub-display area 11 may also gradually decrease in one direction, but this may lead to a complicated process.
Specifically, the plurality of pixel circuit units 9 are arranged in a plurality of rows and columns in the first sub-display region 11 and the second sub-display region 12.
In one embodiment, as shown in fig. 5 and 6, the first sub-display area 11 is arranged side by side with the first display area 4 in the row direction; as shown in fig. 4, each pixel circuit unit 9 has the same width in the column direction, and the width W1 in the row direction of the pixel circuit unit 9 located in the first sub-display section 11 is smaller than the width W2 in the row direction of the pixel circuit unit 9 located in the second sub-display section 12. It is to be understood that, in this embodiment, the pixel circuit units 9 in the first sub-display section 11 are compressed in size in the row direction.
Of course, in another embodiment, the first sub-display area and the first display area may also be arranged side by side in the column direction; the width of each pixel circuit unit in the row direction is the same, and the width of the pixel circuit unit positioned in the first sub-display area in the column direction is smaller than the width of the pixel circuit unit positioned in the second sub-display area in the column direction. It is to be understood that, in this embodiment, the pixel circuit units in the first sub-display section are compressed in size in the column direction.
In another embodiment, as shown in fig. 7 and 8, the first display area 4 is disposed around the dug-hole area 2; the first sub display area 11 includes first areas 13 located at both sides of the first display area 4 in the row direction and second areas 14 located at both sides of the first display area 4 in the column direction. Specifically, the width of the pixel circuit unit 9 located in the first region 13 in the row direction is smaller than the width of the pixel circuit unit 9 located in the second sub-display region 12 in the row direction, and the widths of the pixel circuit units 9 in the first region 13 and the second sub-display region 12 in the column direction are the same; the width in the column direction of the pixel circuit unit 9 located in the second region 14 is smaller than the width in the column direction of the pixel circuit unit 9 located in the second sub display area 12, and the widths in the row direction of the pixel circuit units 9 in the second region 14 and the second sub display area 12 are the same. It is to be understood that, in this embodiment, the pixel circuit cells 9 in the first region 13 are compressed in size in the row direction, and the pixel circuit cells 9 in the second region 14 are compressed in size in the column direction.
Specifically, as shown in fig. 5 and 6, when the first sub-display section 11 is arranged side by side with the first display section 4 in the row direction, the second sub-display section 12 is adjacent to the first sub-display section 11 at least in the column direction; as shown in fig. 7 and 8, when the first sub-display section 11 and the first display section 4 are arranged side by side in the column direction, the second sub-display section 12 is adjacent to the first sub-display section 11 at least in the row direction. It is understood that when the first sub display area 11 is disposed side by side with the first display area 4 in the row direction, the second sub display area 12 may also be partially disposed side by side with the first sub display area 11 in the row direction, and when the first sub display area 11 is disposed side by side with the first display area 4 in the column direction, the second sub display area 12 may also be partially disposed side by side with the first sub display area 11 in the column direction.
Specifically, as shown in fig. 4, the size and shape of the orthographic projection of the first light-emitting unit 8 on the substrate are respectively the same as those of the orthographic projection of the second light-emitting unit 10 on the substrate, and the arrangement period and density of the first light-emitting unit 8 and the second light-emitting unit 10 are the same.
It is understood that the structure and arrangement of the first light emitting unit 8 additionally provided in the first display region 4 are the same as those of the second light emitting unit 10 positioned in the second display region 5. That is, the present application does not need to change the structural size, arrangement period, and arrangement density of the light emitting cells, and only needs to increase the number of the light emitting cells.
Specifically, each of the first light emitting units 8 and each of the second light emitting units 10 includes at least two sub-light emitting units emitting light of different colors; the pixel driving unit comprises at least two sub-pixel driving units which are respectively and correspondingly and electrically connected with the at least two sub-light emitting units. It can be understood that, in different pixel arrangements, each light-emitting unit includes different numbers of sub light-emitting units.
In one embodiment, as shown in fig. 4 and 9, each of the first light-emitting units 8 includes two sub-light-emitting units for emitting light of different colors, such as a first sub-light-emitting unit 15 and a second sub-light-emitting unit 15'; and each of the second light emitting cells 10 includes two sub-light emitting cells for emitting light of different colors. In this embodiment, each adjacent two of the first light-emitting units 8 (or the second light-emitting units 10) in the row direction and in the column direction is one arrangement unit 17, one of the light-emitting units in each arrangement unit 17 includes one blue sub-light-emitting unit (B) and one green sub-light-emitting unit (G), the other light-emitting unit includes one red sub-light-emitting unit (R) and one green sub-light-emitting unit (G), and the adjacent blue sub-light-emitting units (B), green sub-light-emitting units (G) and red sub-light-emitting units (R) are distributed in a triangular shape. Since the second light emitting unit 10 is identical to the first light emitting unit 8, the arrangement of the second light emitting unit 10 will not be described herein.
In another embodiment, each of the first light emitting units (second light emitting units) may further include three sub-light emitting units for emitting light of different colors, for example, a red sub-light emitting unit (R), a green sub-light emitting unit (G), and a blue sub-light emitting unit (B).
Specifically, the first light emitting unit (the second light emitting unit) includes an anode layer, a pixel defining layer, a supporting layer, a light emitting material layer, and a cathode layer, which are sequentially disposed.
Specifically, as shown in fig. 4, the plurality of first light emitting units 8 and the plurality of second light emitting units 10 are distributed in a plurality of rows and a plurality of columns; the second light emitting units 10 located in the second sub-display region 12 are disposed in one-to-one correspondence with the pixel circuit units 9 electrically connected correspondingly, and the second light emitting units 10 located in the first sub-display region 11 are disposed in a staggered manner with the pixel circuit units 9 electrically connected correspondingly.
Specifically, as shown in fig. 9, the display panel 1 further includes a connection trace 18 connected between each first light-emitting unit 8 and the corresponding pixel circuit unit 9. Since each of the first light emitting units 8 includes at least a first sub light emitting unit 15 and a second sub light emitting unit 15 ', and correspondingly, the pixel circuit unit 9 corresponding to the first light emitting unit 8 includes at least a first sub pixel circuit unit 16 and a second sub pixel circuit unit 16 ' electrically connected to the first sub light emitting unit 15 and the second sub light emitting unit 15 ' correspondingly; and each of the first sub-light emitting units 15 and the corresponding first sub-pixel circuit unit 16, and the second sub-light emitting unit 15 'and the corresponding second sub-pixel circuit unit 16' are electrically connected through a connection trace 18.
In fig. 9, lines with arrows are used to illustrate connection objects of the connection traces 18, and the specific arrangement manner is not limited.
In the embodiment of the present application, on the basis of not changing the position of the winding (e.g., the plurality of signal lines 7) on the frame of the hole digging region 2 and not changing the overall area of the pixel circuit units 9 of the display region 3, the plurality of first light emitting units 8 are disposed above the plurality of signal lines 7 to form the first display region 4, and the size of a part of the pixel circuit units 9 in the second display region 5 adjacent to the first display region 4 is compressed to add the plurality of pixel circuit units 9 electrically connected to the plurality of first light emitting units 8, so as to avoid disposing the pixel circuit units 9 in the first display region 4; the problem that 4 spaces in first display area are not enough can be solved to this application on the one hand, and on the other hand has reduced the frame width of digging hole district 2 in the increase display area, has promoted display panel 1's screen proportion and has promoted user visual experience.
As shown in fig. 10, the present application also provides a display device 19, and the display device 19 includes the display panel 1 according to the above embodiment and the optical sensor 20 disposed in the dug-hole area 2.
Specifically, the optical sensor 20 includes a camera, a fingerprint sensor, a face recognition sensor, or other sensors.
Specifically, the display device 19 further includes a protective layer 21 disposed on the light-emitting surface of the display panel 1 for protecting the display panel 1.
In the embodiment of the application, a plurality of signal lines 7 and a plurality of first light-emitting units 8 positioned above the plurality of signal lines 7 are arranged in a first display area 4 arranged close to a hole digging area 2, and the size of part of pixel driving circuits is compressed in a second display area 5 arranged far away from the hole digging area 2 so as to add a plurality of pixel driving circuits correspondingly and electrically connected with the plurality of first light-emitting units 8; the frame width of digging hole district 2 has been reduced when increase display area, has promoted display panel 1's screen and has occupied the ratio, avoids optical sensor (for example camera) 20 peripheral round black border to appear, has promoted user's visual experience.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel and the display device provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are explained herein by applying specific examples, and the description of the embodiments above is only used to help understand the technical solutions and the core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A display panel is characterized by comprising a hole digging area and a display area positioned at the periphery of the hole digging area; the display area comprises a first display area and a second display area which are adjacently arranged, and the first display area is positioned between the hole digging area and the second display area;
the display panel comprises a substrate positioned in the display area, a plurality of signal lines positioned in the first display area and sequentially arranged on the substrate side by side, a plurality of first light-emitting units positioned in the first display area and positioned on one side, far away from the substrate, of the plurality of signal lines, a plurality of pixel circuit units positioned in the second display area and adjacent to each other on the substrate, and a plurality of second light-emitting units positioned in the second display area and positioned on one side, far away from the substrate, of the plurality of pixel circuit units;
the pixel circuit units are respectively and correspondingly electrically connected with the first light-emitting units and the second light-emitting units one by one, and the orthographic projection area of one part of the pixel circuit units on the substrate in the pixel circuit units is smaller than that of the other part of the pixel circuit units on the substrate.
2. The display panel according to claim 1, wherein the second display region comprises a first sub-display region and a second sub-display region which are adjacently disposed; the first sub-display area is positioned between the second sub-display area and the first display area;
the orthographic projection area of each pixel circuit unit located in the first sub-display area on the substrate is smaller than that of the pixel circuit unit located in the second sub-display area on the substrate, and the orthographic projection areas of the pixel circuit units located in the second sub-display area on the substrate are the same.
3. The display panel according to claim 2, wherein an orthographic projection area of the plurality of pixel circuit units on the substrate in the first sub-display region is the same.
4. The display panel according to claim 3, wherein the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first sub-display area and the first display area are arranged side by side in the row direction;
the width of each pixel circuit unit in the column direction is the same, and the width of the pixel circuit unit in the first sub-display area in the row direction is smaller than the width of the pixel circuit unit in the second sub-display area in the row direction.
5. The display panel according to claim 3, wherein the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first sub-display area and the first display area are arranged side by side in the column direction;
the width of each pixel circuit unit in the row direction is the same, and the width of the pixel circuit unit in the first sub-display area in the column direction is smaller than the width of the pixel circuit unit in the second sub-display area in the column direction.
6. The display panel according to claim 3, wherein the plurality of pixel circuit units are distributed in a plurality of rows and a plurality of columns in the first sub-display area and the second sub-display area; the first display area is arranged around the digging hole area; the first sub-display area includes first areas located on both sides of the first display area in the row direction and second areas located on both sides of the first display area in the column direction;
the width of the pixel circuit unit in the row direction in the first area is smaller than the width of the pixel circuit unit in the second sub-display area in the row direction, and the widths of the pixel circuit units in the first area and the second sub-display area in the column direction are the same; the width of the pixel circuit unit located in the second area in the column direction is smaller than the width of the pixel circuit unit located in the second sub-display area in the column direction, and the widths of the pixel circuit units in the second area and the second sub-display area in the row direction are the same.
7. The display panel according to claim 2, wherein the size and shape of an orthographic projection of the first light-emitting unit on the substrate are the same as those of an orthographic projection of the second light-emitting unit on the substrate, respectively, and wherein the arrangement period and density of the first light-emitting unit and the second light-emitting unit are the same.
8. The display panel according to claim 7, wherein the plurality of first light emitting cells and the plurality of second light emitting cells are arranged in a plurality of rows and a plurality of columns;
the plurality of second light-emitting units positioned in the second sub-display area are in one-to-one correspondence with the plurality of pixel circuit units which are correspondingly and electrically connected, and the plurality of second light-emitting units positioned in the first sub-display area are arranged in a staggered manner with the plurality of pixel circuit units which are correspondingly and electrically connected.
9. The display panel according to claim 1, wherein the first display region is provided around the perforated region; the display panel further comprises a first routing part and a second routing part which are separated by the digging hole area; the signal wire extends at least partially along the edge direction of the digging hole area and is electrically connected with the first routing part and the second routing part respectively.
10. A display device comprising the display panel according to any one of claims 1 to 9 and an optical sensor provided in the cutout region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210767702.7A CN115116332B (en) | 2022-06-30 | 2022-06-30 | Display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210767702.7A CN115116332B (en) | 2022-06-30 | 2022-06-30 | Display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115116332A true CN115116332A (en) | 2022-09-27 |
| CN115116332B CN115116332B (en) | 2023-09-01 |
Family
ID=83330953
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210767702.7A Active CN115116332B (en) | 2022-06-30 | 2022-06-30 | Display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115116332B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115116332B (en) * | 2022-06-30 | 2023-09-01 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110215329A1 (en) * | 2010-03-05 | 2011-09-08 | Samsung Mobile Display Co., Ltd. | Organic light-emitting display device |
| CN109119447A (en) * | 2018-08-29 | 2019-01-01 | 武汉天马微电子有限公司 | A kind of display panel and display device |
| CN109377882A (en) * | 2018-11-29 | 2019-02-22 | 武汉华星光电技术有限公司 | A kind of flexible display panels |
| CN112542092A (en) * | 2020-12-08 | 2021-03-23 | 合肥维信诺科技有限公司 | Display panel and display device |
| CN112599580A (en) * | 2020-12-14 | 2021-04-02 | 合肥维信诺科技有限公司 | Display panel and display device |
| US20210201721A1 (en) * | 2019-12-31 | 2021-07-01 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co.,Ltd | Foldable display panel and foldable display device |
| WO2021244228A1 (en) * | 2020-06-02 | 2021-12-09 | 京东方科技集团股份有限公司 | Display panel, display device, and manufacturing method for display panel |
| CN113994419A (en) * | 2020-05-27 | 2022-01-28 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN114335069A (en) * | 2020-09-29 | 2022-04-12 | 京东方科技集团股份有限公司 | Display panel and display device |
| WO2022088030A1 (en) * | 2020-10-30 | 2022-05-05 | 京东方科技集团股份有限公司 | Display substrate, display panel, and display device |
| CN114464658A (en) * | 2022-01-29 | 2022-05-10 | 昆山国显光电有限公司 | Display panel and display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115116332B (en) * | 2022-06-30 | 2023-09-01 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
-
2022
- 2022-06-30 CN CN202210767702.7A patent/CN115116332B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110215329A1 (en) * | 2010-03-05 | 2011-09-08 | Samsung Mobile Display Co., Ltd. | Organic light-emitting display device |
| CN109119447A (en) * | 2018-08-29 | 2019-01-01 | 武汉天马微电子有限公司 | A kind of display panel and display device |
| CN109377882A (en) * | 2018-11-29 | 2019-02-22 | 武汉华星光电技术有限公司 | A kind of flexible display panels |
| US20210201721A1 (en) * | 2019-12-31 | 2021-07-01 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co.,Ltd | Foldable display panel and foldable display device |
| CN113994419A (en) * | 2020-05-27 | 2022-01-28 | 京东方科技集团股份有限公司 | Display panel and display device |
| WO2021244228A1 (en) * | 2020-06-02 | 2021-12-09 | 京东方科技集团股份有限公司 | Display panel, display device, and manufacturing method for display panel |
| CN114335069A (en) * | 2020-09-29 | 2022-04-12 | 京东方科技集团股份有限公司 | Display panel and display device |
| WO2022088030A1 (en) * | 2020-10-30 | 2022-05-05 | 京东方科技集团股份有限公司 | Display substrate, display panel, and display device |
| CN112542092A (en) * | 2020-12-08 | 2021-03-23 | 合肥维信诺科技有限公司 | Display panel and display device |
| CN112599580A (en) * | 2020-12-14 | 2021-04-02 | 合肥维信诺科技有限公司 | Display panel and display device |
| CN114464658A (en) * | 2022-01-29 | 2022-05-10 | 昆山国显光电有限公司 | Display panel and display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115116332B (en) * | 2022-06-30 | 2023-09-01 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115116332B (en) | 2023-09-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11844263B2 (en) | Display panel having one display region surrounding another displayer region and display device having the same | |
| CN210516000U (en) | Display substrate and display device | |
| CN111028692A (en) | Display panel and display device | |
| CN110767097B (en) | Display panel and display device | |
| CN110047386B (en) | Display device and electronic equipment | |
| CN111554227B (en) | Display panel and display device | |
| CN111739924A (en) | Display panel and electronic device | |
| CN111293158B (en) | Display panel and display device | |
| CN112864211B (en) | Display panel and display device | |
| CN112037704B (en) | Display panel and electronic device | |
| CN115116332A (en) | Display panel and display device | |
| CN110568655B (en) | Display panel and display device | |
| CN112732119B (en) | Touch display panel | |
| CN111834396A (en) | Light-transmitting display panel, display panel and display device | |
| CN112054043B (en) | Display panel and preparation method thereof | |
| CN110767686A (en) | Display screen and display terminal | |
| CN111665992B (en) | Display module | |
| CN212412056U (en) | Display panel and electronic device | |
| CN111489662B (en) | Drive substrate, display panel, display screen and electronic equipment | |
| CN111834424B (en) | Display panel, display screen and electronic equipment | |
| CN110265435B (en) | Display panel and display device | |
| CN115576442A (en) | Display substrate and touch display device | |
| CN112328119A (en) | Touch structure and touch display panel | |
| CN113644107B (en) | Array substrate, display panel and display device | |
| CN113517318B (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |