CN115114882B - Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer - Google Patents

Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer Download PDF

Info

Publication number
CN115114882B
CN115114882B CN202210761149.6A CN202210761149A CN115114882B CN 115114882 B CN115114882 B CN 115114882B CN 202210761149 A CN202210761149 A CN 202210761149A CN 115114882 B CN115114882 B CN 115114882B
Authority
CN
China
Prior art keywords
connector
preset
pad
adjacent layer
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210761149.6A
Other languages
Chinese (zh)
Other versions
CN115114882A (en
Inventor
郑凯强
张世傑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202210761149.6A priority Critical patent/CN115114882B/en
Publication of CN115114882A publication Critical patent/CN115114882A/en
Application granted granted Critical
Publication of CN115114882B publication Critical patent/CN115114882B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/31Design entry, e.g. editors specifically adapted for circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The application discloses a method, a system and equipment for drawing a grounding via hole of a connector and hollowing of an adjacent layer, which mainly relate to the technical field of connector drawing and are used for solving the problems of time consumption, high error and the like in the conventional connector drawing of the grounding via hole and the hollowing area of the adjacent layer. Comprising the following steps: searching connectors using the same package in the PCB by presetting a skip window; acquiring the serial numbers of the connectors of the same package through a preset skip window so as to trigger a preset VIA page; acquiring parameters of a grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector to finish drawing the grounding VIA hole of the connector; and acquiring preset adjacent layer hollowing information through a preset PAD void page, and further determining the PAD of the connector for drawing the adjacent layer hollowing area so as to draw the adjacent layer hollowing area. The method realizes automatic drawing of the ground via hole and the hollowed-out area of the adjacent layer, saves time and reduces errors.

Description

Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer
Technical Field
The application belongs to the technical field of connector drawing, and particularly relates to a method, a system and equipment for drawing a grounding via hole of a connector and hollowing an adjacent layer.
Background
In the PCB design, to meet various connector specifications for better signal quality, special specifications are provided on the connector to define the ground vias and the pattern of hollowing out adjacent layers of the high-speed PAD.
The prior technique for drawing the grounding via hole of the connector and hollowing the adjacent layers mainly comprises the following steps: manual drawing of connectors is performed by the layout engine in accordance with the connector specifications provided by the SI engine.
However, in the PCB design, the layout manager needs to draw GND via holes and PAD adjacent layers on the connector one by one according to the special specification on the connector, so that more than one connector in one PCB, such as a server PCB board, may have more than 10 connectors, which consumes a lot of time for drawing one by one, and has the problems of non-specification caused by human error.
Disclosure of Invention
Aiming at the defects of low design quality and the like caused by human factor missing and the like in PCB design, which are caused by the fact that a great amount of time is consumed by layout to draw the grounding via hole of the PCB wiring of the connector and the hollowing of the adjacent layer of the high-speed signal PAD, the application provides a method, a system and equipment for drawing the grounding via hole of the connector and hollowing of the adjacent layer, so as to solve the technical problems.
In a first aspect, the present application provides a method for drawing a connector ground via and a hole in an adjacent layer, the method comprising: searching connectors using the same package in the PCB by presetting a skip window; acquiring the serial numbers of the connectors of the same package through a preset skip window so as to trigger a preset VIA page; acquiring parameters of a grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector to finish drawing the grounding VIA hole of the connector; and acquiring preset adjacent layer hollowing information through a preset PAD void page, and further determining the PAD of the connector for drawing the adjacent layer hollowing area so as to draw the adjacent layer hollowing area.
In one implementation of the present application, before the number of the same packaged connector is obtained through a preset skip window, the method includes: all connector numbers using the same package are presented through a preset presentation page.
In one implementation of the present application, the ground via parameters include: VIA TYPE parameter, PAD GAP parameter.
In one implementation of the present application, the obtaining the parameters of the ground VIA hole by presetting the VIA page specifically includes: obtaining a VIA TYPE parameter through presetting a VIA page; determining a plurality of PAD TYPE values corresponding to the VIA TYPE parameters; wherein the VIA TYPE parameter comprises a length parameter and a width parameter; and determining the VIA TYPE parameters from the PAD TYPE values through a preset VIA page.
In one implementation of the present application, determining a PAD position and a ground point position of a connector to complete drawing a ground via of the connector specifically includes: and calculating a grounding VIA hole position according to the length parameter, the VIA TYPE parameter and the PAD GAP parameter to automatically complete wiring of the PAD and the grounding VIA hole of the connector and complete drawing of the grounding VIA hole of the connector.
In one implementation of the present application, before determining the VIA TYPE parameter from the PAD TYPE values by the preset VIA page, the method further includes: based on the VIA TYPE parameter, a VIA-PAD control interface is generated to display a plurality of PAD TYPE values corresponding to the VIA TYPE parameter.
In one implementation of the present application, determining PAD area parameters of a connector for drawing hollowed-out areas of adjacent layers specifically includes: the ski program determines the PAD of the connector with the hollowed adjacent layer by the name of the connector NET, and obtains the regional parameters of the PAD of the connector.
In a second aspect, the present application provides a system for routing a connector ground via to an adjacent layer, the system comprising: the searching module is used for searching connectors which use the same package in the PCB through a preset skip window; the triggering module is used for acquiring the numbers of the connectors in the same package through a preset skip window so as to trigger a preset VIA page; the drawing module is used for obtaining the parameters of the grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector so as to finish drawing the grounding VIA hole of the connector; and the PAD region parameter of the connector for drawing the hollowed-out region of the adjacent layer is determined so as to draw the hollowed-out region of the adjacent layer.
In one implementation of the present application, the search module further includes a display unit; and the display unit is used for displaying all connector numbers using the same package through a preset display page.
In a third aspect, the present application provides an apparatus for patterning a connector ground via and an adjacent layer, comprising: a processor; and a memory having executable code stored thereon that, when executed, causes the processor to perform a method of drawing a connector ground via and an adjacent layer of any of the above.
The application has the beneficial effects that the application runs the skip program, and then searches the name of the connector by presetting the skip window, thereby realizing the automatic acquisition of a plurality of connectors with the same package in the PCB; the serial numbers of the connectors in the same package are obtained through a preset skip window, and connectors in the PCB do not need to be selected one by one in the operation process, so that the automatic selection of the connectors by a program is realized; the method comprises the steps of obtaining parameters of the grounding VIA hole through a preset VIA page, determining the PAD position and the grounding point position of the connector, and automatically drawing the grounding VIA hole of the connector; and acquiring the preset adjacent layer hollowing information through a preset PAD void page, so that the automatic calculation of the adjacent layer hollowing area is realized.
In summary, in the Cadence Layout design, the connector in the PCB can be selected through the skip program, and further, the repetitive work is reduced by defining the wiring mode of the grounding hole of the connector and the hollowed-out area of the adjacent layer, and the purposes of improving the efficiency and the PCB quality are achieved.
In addition, the application has reliable design principle, simple structure and very wide application prospect.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a flow chart of a method for drawing a ground via and a void in an adjacent layer of a connector according to an embodiment of the present application;
fig. 2 is a schematic diagram of an internal structure of a system for drawing a ground via and a hollowed-out adjacent layer of a connector according to an embodiment of the present application.
Fig. 3 is a schematic diagram of an internal structure of a device for drawing a ground via and a hollowed-out adjacent layer of a connector according to an embodiment of the present application.
Detailed Description
In order to make the technical solution of the present application better understood by those skilled in the art, the technical solution of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.
It should be noted that, at present, there are multiple PCB design software in the market, cadence is the most widely applied software in the industry, not only it has powerful functions and supports multiple related software, but also because it provides an open secondary development interface and a more perfect development language library, users can develop according to their own needs. The agile language is a high-level programming language based on a C language and a LISP language and is built in Cadence software, cadence provides rich interactive functions for the agile language, the agile language is researched, tools are written, and the working efficiency can be greatly improved after the operation is put into application.
Based on the method, the system and the equipment, the method, the system and the equipment for drawing the grounding via hole of the connector and hollowing of the adjacent layer are provided, one TYPE connector can be selected at one time through the Skill of the application in the design of the PCB, the signal grounding via hole wiring mode of the connector is defined through the Skill, and the grounding via hole wiring mode of the connector is electrically connected with the PAD (PAD: a bonding PAD, namely a pin in the packaging of a component by using soldering tin in practical application, the pins of the components such as a resistor, a capacitor, an inductor, a chip and the like and the bonding PAD are electrically connected together. The technical scheme solves the defects of the prior art, can be used for designing time of each layout, and can finish the drawing of hollowing out of the PCB wiring grounding via hole and the PAD adjacent layer of the connector by one key. By the application, layout design can be rapidly performed, so that the working efficiency and accuracy are greatly improved, and the design quality is improved.
The following describes the technical scheme provided by the embodiment of the application in detail through the attached drawings.
Fig. 1 is a method for drawing a ground via and a void in an adjacent layer of a connector according to an embodiment of the present application. As shown in fig. 1, the method for drawing the hollowing of the grounding via hole and the adjacent layer of the connector provided by the embodiment of the application mainly comprises the following steps:
step 110, searching connectors using the same package in the PCB board through a preset skip window.
It should be noted that the connectors using the same package refer to connectors having the same preset Symbol name.
Specifically, the Skill program is run, a connector for executing the program is selected, a preset Skill window is jumped out, a Symbol name input box exists in the preset Skill window, the name of the connector package to be searched is imported into the Symbol name input box, and a search button preset on the preset Skill window is triggered to run the search program to search for connectors using the same package in the PCB.
Those skilled in the art can understand that the connector with the same package can be automatically obtained through the above description, and the automatic selection of the connector is realized without selecting parts in the PCB one by one.
Step 120, obtaining the numbers of the connectors in the same package through a preset skip window to trigger a preset VIA page.
It should be noted that, the present application may also display the same connector as the Symbol name to the operator, so that the operator may obtain the corresponding connector number. Specifically, before the serial numbers of the connectors of the same package are obtained through a preset skip window, all the serial numbers of the connectors of the same package are displayed through a preset display page.
Specifically, a Ref Des input frame exists in a preset skip window, the connector number to be drawn is imported into the Ref Des input frame, an EXIT button preset on the preset skip window is triggered to trigger a preset VIA page, and the input connector number is subjected to subsequent processing through triggering the preset VIA page.
It will be appreciated by those skilled in the art that the present application, through the foregoing, is able to flexibly select connectors for subsequent rendering processing.
Step 130, obtaining parameters of the grounding VIA hole through presetting a VIA page, and further determining the PAD position and the grounding point position of the connector to finish drawing the grounding VIA hole of the connector.
The parameters of the ground via include: VIA TYPE parameter, PAD GAP parameter.
The method for acquiring the grounding VIA parameters through the preset VIA page comprises the following specific steps: obtaining a VIA TYPE parameter through presetting a VIA page; determining a plurality of PAD TYPE values corresponding to the VIA TYPE parameters; wherein the VIA TYPE parameter comprises a length parameter and a width parameter; and determining the VIA TYPE parameters from the PAD TYPE values through a preset VIA page.
Before determining the VIA TYPE parameters from the PAD TYPE values through the preset VIA page, the application can also display the PAD TYPE values corresponding to the VIA TYPE parameters to an operator, so that the operator can determine the VIA TYPE parameters. Specifically: based on the VIA TYPE parameter, a VIA-PAD control interface is generated to display a plurality of PAD TYPE values corresponding to the VIA TYPE parameter.
The "determining the PAD position and the ground point position of the connector to complete drawing the ground via of the connector" may specifically be: and calculating a ground VIA hole position by taking the PAD center point of the connector as a reference point according to the length parameter, the VIA TYPE parameter and the PAD GAP parameter so as to automatically complete wiring of the PAD and the ground VIA hole of the connector and complete drawing of the ground VIA hole of the connector.
For example, when PAD TYPE is R14x47, it indicates that the PAD size of this connector is 14x47 mil; when VIA TYPE is VIA18D8AT28, this represents a VIA size of 18mil; when PAD GAP input is 6, PAD GAP for the via and connector is 6mil. The PAD center point of the connector is taken as a reference point, the ground via hole position is calculated through (47/2+6+18/2), and the ground via hole is automatically drawn on the PAD of the connector.
And 140, acquiring preset adjacent layer hollowing information through a preset PAD void page, and further determining PAD region parameters of a connector for drawing the adjacent layer hollowing region so as to draw the adjacent layer hollowing region.
Specifically, location information of a PAD of the connector is obtained, location information is used as a center point coordinate, the size of a hollowed-out area is calculated according to hollowed-out information of a preset adjacent layer, and the position of an external extension coordinate is calculated in a vector mode.
For example, the PAD location coordinates are (0, 0) and (30, 0). X1=8.55 mil; x2=8.55 mil; y1=3.93 mil; y2=11.8 mil.
(X2,Y2)=(X1-X4-X5,Y1+Y4+Y5)=(0-7-8.85,0+23.5+11.8)=(-15.85,35.3);
(X2,Y3)=(X1-X4-X5.Y1-Y4-Y6)=(0-7-8.85,0-23.5-3.93)=(-15.85,-27.43);
(X3,Y2)=(X2+X4+X5,Y1+Y4+Y5)=(30+7+8.85,0+23.5+11.8)=(45.85,35.3);
(X3,Y3)=(X3+X4+X5,Y1-Y4-Y6)=(30+7+8.85,0-23.5-3.93)=(45.85,-27.43)。
Further, adjacent level hollowed-out areas of a square area of 61.7x62.73mil size are drawn.
The "determining PAD area parameters of the connector for drawing the hollowed-out area of the adjacent layer" may specifically be: the ski program determines the PAD of the connector with the hollowed adjacent layer by the name of the connector NET, and obtains the regional parameters of the PAD of the connector.
As an example, the area parameters of PAD of the connector with Member of Diff Pair parameters are obtained by filtering the Member of Diff Pair parameters corresponding to the NET names in the connector.
Based on the above description, the person skilled in the art will understand that: according to the application, through presetting a skip window and searching for the connector name, the automatic acquisition of a plurality of connectors with the same package in the PCB is realized; the serial numbers of the connectors in the same package are obtained through a preset skip window, and connectors in the PCB do not need to be selected one by one in the operation process, so that the automatic selection of the connectors by a program is realized; the method comprises the steps of obtaining parameters of the grounding VIA hole through a preset VIA page, determining the PAD position and the grounding point position of the connector, and automatically drawing the grounding VIA hole of the connector; and acquiring the preset adjacent layer hollowing information through a preset PAD void page, so that the automatic calculation of the adjacent layer hollowing area is realized. In summary, in the Cadence Layout design, the connector in the PCB can be selected through the skip program, and further, the repetitive work is reduced by defining the wiring mode of the grounding hole of the connector and the hollowed-out area of the adjacent layer, and the purposes of improving the efficiency and the PCB quality are achieved.
In addition, the embodiment of the application also provides a system for drawing the hollowing of the grounding via hole of the connector and the adjacent layer, as shown in fig. 2, the system for drawing the hollowing of the grounding via hole of the connector and the adjacent layer mainly comprises:
and the searching module 210 is configured to search connectors using the same package in the PCB board through a preset skin window. It should be noted that the connectors using the same package refer to connectors having the same preset Symbol name. Specifically, the search module runs the Skill program, selects a connector to be executed, jumps out of a preset Skill window, the preset Skill window has a Symbol name input box, introduces the name of the connector package to be searched into the Symbol name input box, and triggers a search button preset on the preset Skill window to run the search program to search for connectors using the same package in the PCB board.
Those skilled in the art can understand that the connector with the same package can be automatically obtained through the above description, and the automatic selection of the connector is realized without selecting parts in the PCB one by one.
The triggering module 220 is configured to obtain the numbers of the connectors in the same package through a preset skip window, so as to trigger a preset VIA page.
Specifically, a Ref Des input box exists in a preset skip window, a trigger module guides the connector number to be drawn into the Ref Des input box, and an EXIT button preset on the preset skip window is triggered to trigger a preset VIA page so as to carry out subsequent processing on the input connector number through triggering the preset VIA page.
It will be appreciated by those skilled in the art that the present application, through the foregoing, is able to flexibly select connectors for subsequent rendering processing.
The drawing module 230 is configured to obtain parameters of the ground VIA through a preset VIA page, and further determine a PAD position and a ground point position of the connector, so as to finish drawing the ground VIA of the connector; the parameters of the ground via include: VIA TYPE parameter, PAD GAP parameter.
The method for acquiring the grounding VIA parameters through the preset VIA page comprises the following specific steps: obtaining a VIA TYPE parameter through presetting a VIA page; determining a plurality of PAD TYPE values corresponding to the VIA TYPE parameters; wherein the VIA TYPE parameter comprises a length parameter and a width parameter; and determining the VIA TYPE parameters from the PAD TYPE values through a preset VIA page.
Before determining the VIA TYPE parameters from the PAD TYPE values through the preset VIA page, the application can also display the PAD TYPE values corresponding to the VIA TYPE parameters to an operator, so that the operator can determine the VIA TYPE parameters. Specifically: based on the VIA TYPE parameter, a VIA-PAD control interface is generated to display a plurality of PAD TYPE values corresponding to the VIA TYPE parameter.
The "determining the PAD position and the ground point position of the connector to complete drawing the ground via of the connector" may specifically be: and calculating a ground VIA hole position by taking the PAD center point of the connector as a reference point according to the length parameter, the VIA TYPE parameter and the PAD GAP parameter so as to automatically complete wiring of the PAD and the ground VIA hole of the connector and complete drawing of the ground VIA hole of the connector.
The drawing module 230 is further configured to obtain preset adjacent layer hollowing information through a preset PAD void page, and further determine PAD area parameters of a connector for drawing an adjacent layer hollowing area, so as to draw the adjacent layer hollowing area.
Specifically, according to the preset adjacent layer hollowing information as a parameter, selecting the PAD of the connector consistent with the preset adjacent layer hollowing information from the connector, acquiring the Location information of the PAD of the connector, calculating the size of the hollowing area according to the preset adjacent layer hollowing information by taking the Location information as a central point coordinate, and calculating the position of the external extension coordinate in a vector mode.
The "determining PAD area parameters of the connector for drawing the hollowed-out area of the adjacent layer" may specifically be: the ski program determines the PAD of the connector with the hollowed adjacent layer by the name of the connector NET, and obtains the regional parameters of the PAD of the connector.
As an example, the area parameters of PAD of the connector with Member of Diff Pair parameters are obtained by filtering the Member of Diff Pair parameters corresponding to the NET names in the connector.
Based on the above description, the person skilled in the art will understand that: the application realizes that a plurality of connectors with the same package in the PCB board are automatically obtained through the search module 210; the number of the connectors in the same package is obtained through the triggering module 220, so that connectors in the PCB do not need to be selected one by one in the operation process, and automatic connector selection by a program is realized; the drawing module 230 is used for obtaining the parameters of the grounding via hole, determining the PAD position and the grounding point position of the connector, and realizing automatic drawing of the grounding via hole of the connector; in addition, the drawing module 230 achieves automatic calculation of the hollowed-out area of the adjacent layer by acquiring the preset hollowed-out information of the adjacent layer. In summary, in the Cadence Layout design, the connector in the PCB can be selected through the skip program, and further, the repetitive work is reduced by defining the wiring mode of the grounding hole of the connector and the hollowed-out area of the adjacent layer, and the purposes of improving the efficiency and the PCB quality are achieved.
In addition, the embodiment of the application also provides a device for drawing the grounding via hole of the connector and the adjacent layer to be hollowed out, as shown in fig. 3, executable instructions are stored on the device, and when the executable instructions are executed, the method for drawing the grounding via hole of the connector and the adjacent layer to be hollowed out is realized. Specifically, the server side sends an execution instruction to the memory through the bus, and when the memory receives the execution instruction, an execution signal is sent to the processor through the bus to activate the processor.
It should be noted that, the processor is configured to search connectors using the same package in the PCB board through a preset skip window; acquiring the serial numbers of the connectors of the same package through a preset skip window so as to trigger a preset VIA page; acquiring parameters of a grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector to finish drawing the grounding VIA hole of the connector; and acquiring preset adjacent layer hollowing information through a preset PAD void page, and further determining the PAD of the connector for drawing the adjacent layer hollowing area so as to draw the adjacent layer hollowing area.
Although the present application has been described in detail by way of preferred embodiments with reference to the accompanying drawings, the present application is not limited thereto. Various equivalent modifications and substitutions may be made in the embodiments of the present application by those skilled in the art without departing from the spirit and scope of the present application, and it is intended that all such modifications and substitutions be within the scope of the present application/be within the scope of the present application as defined by the appended claims. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims (10)

1. A method of mapping a connector ground via to a void in an adjacent layer, the method comprising:
searching connectors using the same package in the PCB by presetting a skip window; wherein the connectors with the same package are connectors with the same preset Symbol name;
acquiring the serial numbers of the connectors of the same package through a preset skip window so as to trigger a preset VIA page;
acquiring parameters of a grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector to finish drawing the grounding VIA hole of the connector;
and acquiring preset adjacent layer hollowing information through a preset PAD void page, and further determining PAD region parameters of a connector for drawing the adjacent layer hollowing region so as to draw the adjacent layer hollowing region.
2. Method for drawing ground vias and hollowing out adjacent layers of connectors according to claim 1, characterized in that it comprises, before obtaining the numbering of the same packaged connectors by means of a preset skip window:
all connector numbers using the same package are presented through a preset presentation page.
3. The method of claim 1, wherein the grounding via parameters include: VIA TYPE parameter, PAD GAP parameter.
4. The method for drawing the ground VIA and the adjacent layer hollowing out of the connector according to claim 3, wherein the obtaining the parameters of the ground VIA through the preset VIA page specifically comprises:
acquiring the VIA TYPE parameters through a preset VIA page; determining a plurality of PAD TYPE values corresponding to the VIA TYPE parameters; wherein the VIA TYPE parameter comprises a length parameter and a width parameter;
and determining the VIA TYPE parameters from the PAD TYPE values through a preset VIA page.
5. The method of claim 1, wherein determining PAD and ground point locations of the connector to complete the drawing of the connector ground vias comprises:
and calculating the position of the grounding VIA according to the PAD TYPE parameter, the VIA TYPE parameter and the PAD GAP parameter so as to automatically complete wiring of the PAD and the grounding VIA of the connector and complete drawing of the grounding VIA of the connector.
6. The method of drawing a connector ground VIA and adjacent layer hollowing out of claim 4, further comprising, prior to determining VIA TYPE parameters from a plurality of PAD TYPE values by a preset VIA page:
based on the VIA TYPE parameter, a VIA-PAD control interface is generated to display a plurality of PAD TYPE values corresponding to the VIA TYPE parameter.
7. The method for drawing a connector ground via and adjacent layer hollowing out as recited in claim 1, wherein determining PAD area parameters of the connector drawing adjacent layer hollowing out areas comprises:
the ski program determines the PAD of the connector with the hollowed adjacent layer by the name of the connector NET, and obtains the regional parameters of the PAD of the connector.
8. A system for mapping a connector ground via to a void in an adjacent layer, the system comprising:
the searching module is used for searching connectors which use the same package in the PCB through a preset skip window; wherein the connectors with the same package are connectors with the same preset Symbol name;
the triggering module is used for acquiring the numbers of the connectors in the same package through a preset skip window so as to trigger a preset VIA page;
the drawing module is used for obtaining the parameters of the grounding VIA hole through a preset VIA page, and further determining the PAD position and the grounding point position of the connector so as to finish drawing the grounding VIA hole of the connector; and the PAD region parameter of the connector for drawing the hollowed-out region of the adjacent layer is determined so as to draw the hollowed-out region of the adjacent layer.
9. The system for routing connector ground vias and adjacent layers to void according to claim 8, wherein said search module further comprises a display unit;
the display unit is used for displaying all connector numbers using the same package through a preset display page.
10. An apparatus for mapping a connector ground via to a void in an adjacent layer, the apparatus comprising:
a processor;
and a memory having executable code stored thereon that, when executed, causes the processor to perform a method of drawing a connector ground via and adjacent layer hollowing out as recited in any one of claims 1-7.
CN202210761149.6A 2022-06-30 2022-06-30 Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer Active CN115114882B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210761149.6A CN115114882B (en) 2022-06-30 2022-06-30 Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210761149.6A CN115114882B (en) 2022-06-30 2022-06-30 Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer

Publications (2)

Publication Number Publication Date
CN115114882A CN115114882A (en) 2022-09-27
CN115114882B true CN115114882B (en) 2023-11-03

Family

ID=83330660

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210761149.6A Active CN115114882B (en) 2022-06-30 2022-06-30 Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer

Country Status (1)

Country Link
CN (1) CN115114882B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105760584A (en) * 2016-02-01 2016-07-13 浪潮(北京)电子信息产业有限公司 Internal wiring method and system for chip
CN109753731A (en) * 2019-01-07 2019-05-14 郑州云海信息技术有限公司 The design drawing edit methods and relevant apparatus of CPU in a kind of pcb board
CN111368494A (en) * 2020-02-28 2020-07-03 苏州浪潮智能科技有限公司 Method and device for rapidly drawing full-plate differential line via hole oval limited area
CN112235949A (en) * 2020-10-16 2021-01-15 苏州浪潮智能科技有限公司 Method, device and equipment for digging differential via hole in printed circuit board design

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110941937B (en) * 2019-10-31 2024-05-07 京东方科技集团股份有限公司 Electronic device, package drawing generation method, and computer-readable storage medium

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105760584A (en) * 2016-02-01 2016-07-13 浪潮(北京)电子信息产业有限公司 Internal wiring method and system for chip
CN109753731A (en) * 2019-01-07 2019-05-14 郑州云海信息技术有限公司 The design drawing edit methods and relevant apparatus of CPU in a kind of pcb board
CN111368494A (en) * 2020-02-28 2020-07-03 苏州浪潮智能科技有限公司 Method and device for rapidly drawing full-plate differential line via hole oval limited area
CN112235949A (en) * 2020-10-16 2021-01-15 苏州浪潮智能科技有限公司 Method, device and equipment for digging differential via hole in printed circuit board design

Also Published As

Publication number Publication date
CN115114882A (en) 2022-09-27

Similar Documents

Publication Publication Date Title
CN106201893B (en) A kind of Java bytecode debugger and adjustment method
JPH07262241A (en) Printed board mounting design system and its method
CN110941937B (en) Electronic device, package drawing generation method, and computer-readable storage medium
CN108319683A (en) Webpage display process, device and terminal
CN112649720A (en) Board card testing method and device and computer readable storage medium
CN115114882B (en) Method, system and equipment for drawing ground via hole of connector and hollowing adjacent layer
CN112235949A (en) Method, device and equipment for digging differential via hole in printed circuit board design
JP2008310573A (en) Display method for cad drawing
JP5935658B2 (en) Design support program, method and apparatus
CN112329378A (en) Height limit detection method, device, equipment and storage medium for printed circuit board design
JP2004258869A (en) Packaged circuit design method, packaged circuit design system and packaged circuit design program
JP6152169B2 (en) Device for displaying data used by electronic component placement machines
JP2868866B2 (en) Interactive component placement CAD system
KR20190079684A (en) Supporting device, display system and drawing support method
JP6535048B2 (en) Device for displaying data used by the electronic component mounting machine
JP2007323170A (en) Printed circuit board cad system and footprint generation method in same system
US9164736B2 (en) Data processing system, input support method, and input support program
JP2018163576A (en) Component position detection program, component position detection method and information processor
JP3662722B2 (en) Printed circuit board design and development support method
EP0654745A2 (en) Graphical display system for routing and repartitioning circuits during layout
JPH04138574A (en) Device for displaying circuit information
CN115310404A (en) Circuit board routing detection method and device and electronic equipment
JP2643834B2 (en) Printed wiring board design equipment
JP3145323B2 (en) Via automatic generation method and via automatic generation system
US20170344688A1 (en) Component placement method and information processing apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant