CN115103195A - Video processing card and video processing apparatus - Google Patents

Video processing card and video processing apparatus Download PDF

Info

Publication number
CN115103195A
CN115103195A CN202210728476.1A CN202210728476A CN115103195A CN 115103195 A CN115103195 A CN 115103195A CN 202210728476 A CN202210728476 A CN 202210728476A CN 115103195 A CN115103195 A CN 115103195A
Authority
CN
China
Prior art keywords
video
processing
card
module
lossless compression
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210728476.1A
Other languages
Chinese (zh)
Inventor
杨利锋
李松
周晶晶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Novastar Electronic Technology Co Ltd
Original Assignee
Xian Novastar Electronic Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Novastar Electronic Technology Co Ltd filed Critical Xian Novastar Electronic Technology Co Ltd
Priority to CN202210728476.1A priority Critical patent/CN115103195A/en
Publication of CN115103195A publication Critical patent/CN115103195A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H04N19/426Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements using memory downsizing methods

Abstract

The embodiment of the disclosure relates to a video processing card and a video processing device. The video processing card includes: the decoding processing module is used for decoding the received video signal; the layer processing module is used for carrying out layer processing on the video signal; the visual lossless compression module is used for carrying out visual lossless compression on the video signal; and the storage module is used for caching the video signal after lossless compression. The video processing card is provided with the visual lossless compression module, the visual lossless compression can be carried out on the video signals, the influence of the compressed video signals on the visual effect of the video is small, the bandwidth is reduced, the requirement on the transmission rate of the serializer/deserializer is low when the video signals are transmitted externally, and the number of the serializer/deserializer between the video processing equipment card and the video processing equipment card can be reduced to a certain extent.

Description

Video processing card and video processing apparatus
Technical Field
The embodiment of the disclosure relates to the technical field of video processing, in particular to a video processing card and video processing equipment.
Background
The video processor is a whole-course witness and marking device for birth, growth and maturity of an LED full-color display screen. With the pursuit of people for image quality, the 8K display pixels are extremely high, so that the imaging is very clear and fine, and the application market is larger and larger. However, 8K video has a higher demand for the transmission rate from card to card in the video processor due to its increased bandwidth.
In the related art, the 8K video is transmitted by increasing the serializer/deserializer between the cards or increasing the transmission rate of the serializer/deserializer, so that the cost of the video processor is high.
Accordingly, there is a need to ameliorate one or more of the problems with the above-mentioned related art solutions.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the disclosed embodiments is to provide a video processing card and a video processing apparatus, thereby overcoming, at least to some extent, one or more of the problems due to the limitations and disadvantages of the related art.
In a first aspect, the present invention provides a video processing card, comprising:
the decoding processing module is used for decoding the received video signal;
the layer processing module is used for carrying out layer processing on the video signal;
the visual lossless compression module is used for carrying out visual lossless compression on the video signal;
and the storage module is used for caching the video signal after lossless compression.
In a second aspect, the present invention provides a video processing apparatus, including the video processing card in the foregoing embodiment, further including:
the video output card is electrically connected with the video processing card and is used for receiving the video signals sent by the video processing card;
the video output card comprises a visual lossless decompression module used for carrying out visual lossless decompression on the video signals after the visual lossless compression.
The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:
in the embodiment of the disclosure, the video processing card has the visual lossless compression module, and can perform visual lossless compression on the video signal, and the compressed video signal has little influence on the visual effect of the video and reduces the bandwidth, so that the requirement on the transmission rate of the serializer/deserializer during external transmission is low, and the number of the serializer/deserializer between the video processing device card and the card can be reduced to a certain extent.
According to the video processing device, the video processing card can transmit the video signals after performing visual lossless compression, and the video output card can output the compressed video signals after performing visual lossless compression, so that the requirement on the transmission rate between the video processing card and the video output card is reduced, and the cost of the video processing device is reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty.
FIG. 1 is a schematic diagram of a video processing card according to an exemplary embodiment of the present disclosure;
FIG. 2 is a schematic diagram of another exemplary video processing card configuration in an exemplary embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a video processing card configuration with two sub-processing cards in an exemplary embodiment of the present disclosure;
FIG. 4 is a schematic diagram of another video processing card with two sub-processing cards according to an exemplary embodiment of the present disclosure;
fig. 5 shows a schematic structural diagram of a video processing device in an exemplary embodiment of the present disclosure;
fig. 6 shows a schematic structural diagram of another video processing device in an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
First, in the present exemplary embodiment, there is provided a video processing card, which may include, as shown in fig. 1: the device comprises a decoding processing module, a layer processing module, a visual lossless compression module and a storage module. The decoding processing module is used for decoding the received video signal; the layer processing module is used for carrying out layer processing on the video signal; the visual lossless compression module is used for carrying out visual lossless compression on the video signal; the storage module is used for caching the lossless compressed video signal.
The video processing card in this embodiment can be applied to an LED video processing device for processing a video signal received by the video processing device. The LED video processing equipment is provided with a video input interface, such as an HDMI interface or a DP interface. The video processing card may perform signal decoding processing, layer processing, and the like on a video signal input through the video input interface.
The video processing card is provided with a visual lossless compression module which can be a visual lossless compression program written in the video processing card, and the visual lossless compression module can perform visual lossless compression on the video signal and then send the video signal. The compression mode has small loss on video signals, and the picture is clear and basically lossless visually. And the compressed video signals are sent out, so that the bandwidth of the video signals is small, and the requirement on the transmission rate between the cards of the video processing equipment is low. Especially for video signals with larger bandwidth, such as 8K video, the video signals can be compressed into 4K video for transmission, so that for a video processing device with only 4K video transmission capacity, the transmission rate of the serializer/deserializer does not need to be increased or the number of the serializer/deserializer does not need to be increased. The improvement of the transmission rate of the serializer/deserializer can increase the power consumption of the system and cause serious heat generation of products; increasing the number of serializers/deserializers increases the overall cost of the video processing device, and increasing the number of serializers/deserializers increases the difficulty of wiring the circuit board.
The video processing card is provided with the visual lossless compression module, the visual lossless compression can be carried out on the video signals, the visual effect of the compressed video signals on the video is less influenced, and the bandwidth is reduced, so that the requirement on the transmission rate of the serializer/deserializer during external transmission is lower, and the number of the serializer/deserializer between the video processing equipment card and the card can be reduced to a certain extent.
For the video processing card in the above embodiment, the video lossless compression module may perform the visual lossless compression after the video processing card performs the decoding processing on the video signal and before the layer processing.
Specifically, after receiving a video signal input by the video input interface, the video processing card first performs decoding processing on the video signal, where the decoding processing can obtain resolution information of the video signal, then performs visual lossless compression on the decoded video signal, and performs layer processing after the compression.
Based on the above embodiment, referring to fig. 2, in order to selectively compress the decoded video signal according to the bandwidth, the video processing card may further include a first identification control module for identifying the bandwidth of the decoded video signal and controlling the visual lossless compression module to perform the visual lossless compression operation according to the identification result.
Specifically, a first identification control module may be arranged on the video processing card, and is used to identify the bandwidth of the decoded video signal, and the first identification control module may be a control program written in the video processing card. The bandwidth of the decoded video signal is identified through the first identification control module, when the bandwidth of the video signal is greater than or equal to a preset threshold value, the visual lossless compression module is controlled to perform visual lossless compression on the video signal, and when the bandwidth of the video signal is smaller than the threshold value, the visual lossless compression is not performed on the video signal. The mode can selectively compress the video signals according to the bandwidth, for example, only the video signals which are more than or equal to 4K are compressed, and the video processing flexibility is better.
As shown in fig. 3, it is understood that the video processing card may include:
the decoding processing module is arranged on the first processing sub-card;
the second processing sub-card is electrically connected with the first processing card, and the layer processing module and the storage module are arranged on the second processing sub-card;
wherein the visually lossless compression module is located on the first processing daughter card or on the second processing daughter card.
The video processing card may include two processing daughter cards: the video signal processing device comprises a first processing sub-card and a second processing sub-card, wherein the first processing sub-card is used for decoding the video signal input by the video input interface, the second processing sub-card is used for performing layer processing on the video signal and caching the video signal after visual lossless compression, and the storage pressure can be reduced by caching the compressed video signal.
When the vision lossless compression module is located on the first processing sub-card, the first processing sub-card decodes the input video signal, and the processing is finished to perform vision lossless compression processing on the video signal, wherein before the compression processing, the bandwidth of the video signal can be identified through the first identification control module, and the vision lossless compression processing is performed according to the bandwidth selectivity, and the first identification control module can be a control program written into the first processing sub-card.
And the compressed video signal is sent to a second processing sub-card, and the second processing sub-card performs layer processing on the video signal. When the second processing daughter card buffers the video signal, the video signal which is not subjected to layer processing may be buffered, or the video signal after layer processing may be buffered. The memory module for buffering the video signal may be a random access memory embedded in the first processing sub-card or the second processing sub-card for buffering, and the random access memory may further transmit the buffered video signal to a double-data-rate synchronous dynamic random access memory on the video processing device. When the visual lossless compression module is located on the first processing sub-card, not only the requirement on the transmission rate between the cards of the video processing device is low, but also the requirement on the transmission rate between the first processing sub-card and the second processing sub-card in the video processing card is low.
For the video processing card in the foregoing embodiment, the visual lossless compression module may perform visual lossless compression after the video processing card performs decoding processing and layer processing on the video signal.
Specifically, after receiving a video signal input by the video input interface, the video processing card firstly performs decoding processing on the video signal, the video processing card can acquire resolution information of the video signal after the decoding processing, then performs layer processing on the signal, and performs visual lossless compression processing on the video signal according to the resolution information after the layer processing. For example, the layer processing may include enlarging, reducing, superimposing, fading in and fading out of images, and the like, and of course, other processing manners may also be included, which is not limited in this embodiment.
Based on the above embodiment, referring to fig. 2, in order to selectively compress the decoded video signal according to the bandwidth, the video processing card further includes a first recognition control module for recognizing the decoded video signal and controlling the visual lossless compression module to perform the visual lossless compression operation according to the recognition result.
Specifically, a first identification control module may be arranged on the video processing card, and is used to identify the bandwidth of the decoded video signal, and the first identification control module may be a control program written in the video processing card. The bandwidth of the decoded video signal is identified through the first identification control module, when the bandwidth of the video signal is greater than or equal to a preset threshold value, the visual lossless compression module is controlled to perform visual lossless compression on the video signal, and when the bandwidth of the video signal is smaller than the threshold value, the visual lossless compression is not performed on the video signal. The mode can selectively compress the video signals according to the bandwidth, for example, only the video signals which are more than or equal to 4K are compressed, and the video processing flexibility is better.
As shown in fig. 4, it is understood that the video processing card may include:
the decoding processing module is arranged on the first processing sub-card;
the second processing sub-card is electrically connected with the first processing card, and the layer processing module and the storage module are arranged on the second processing sub-card;
wherein the visual lossless compression module is located on the second processing daughter card.
The video processing card may include two processing daughter cards: the video signal processing device comprises a first processing sub-card and a second processing sub-card, wherein the first processing sub-card is used for decoding the video signal input by the video input interface, the second processing sub-card is used for performing layer processing on the video signal and caching the video signal after visual lossless compression, and the storage pressure can be reduced by caching the compressed video signal.
When the visual lossless compression module is located on the second processing sub-card, the first processing sub-card firstly decodes the input video signal, and the processed video signal is sent to the second processing sub-card.
The second processing daughter card performs visual lossless compression processing on the received video signal firstly, and then performs layer processing, or performs layer processing firstly and then performs visual lossless compression processing. Before compression processing, the bandwidth of the video signal can be identified through a first identification control module, visual lossless compression processing is carried out according to bandwidth selectivity, and the first identification control module can be a control program written into a second processing sub-card.
And when the second processing sub-card buffers the video signal, the video signal after visual lossless compression is buffered. When the second processing sub-card performs the visual lossless compression processing and then the layer processing on the video signal, the video signal may be buffered after the compression, or the video signal may be buffered after the layer processing. The memory module for caching the video signal can be a random access memory embedded in the second processing sub-card for caching, and the random access memory can also transmit the cached video signal to a double-rate synchronous dynamic random access memory on the video processing equipment.
Secondly, in this exemplary embodiment, there is provided a video processing device, as shown in fig. 5, the video processing device includes the video processing card in any one of the embodiments, and may further include:
the video output card is electrically connected with the video processing card and is used for receiving the video signals sent by the video processing card;
the video output card comprises a visual lossless decompression module which is used for carrying out visual lossless decompression on the video signals after the visual lossless compression.
In this embodiment, the video processing card can perform lossless visual compression and then transmit the video, and the lossless visual decompression module in the video output card can perform lossless visual decompression and then encode and output the received compressed video signal, so that the transmission and buffer pressure is reduced, and the final normal output of the video signal can be ensured. Wherein, the visual lossless decompression module can be a visual lossless decompression program written in the video output card.
According to the video processing device, the video processing card can transmit the video signals after performing visual lossless compression, and the video output card can output the compressed video signals after performing visual lossless compression, so that the requirement on the transmission rate between the video processing card and the video output card is reduced, and the cost of the video processing device is reduced.
Based on the above-described embodiment, referring to fig. 6, the video output card further includes a second recognition control module for recognizing the received video signal and controlling the visual lossless decompression module to perform the visual lossless decompression operation according to the recognition result.
Specifically, a first identification control module can be arranged on the video processing card, and the video signal is selectively compressed according to the bandwidth by identifying the bandwidth of the decoded video signal. The video output card can be further provided with a second identification control module to identify the received video signal, see whether the video signal is a video signal subjected to visual lossless compression or not, and control the visual lossless decompression module to decompress the video signal if the video signal is the video signal subjected to visual lossless compression.
The visual lossless compression module in the above embodiments may adopt Distributed Source Coding (DSC) or VC2 video lossless compression Coding;
the decompression algorithm adopted by the visual lossless decompression module corresponds to the compression algorithm adopted by the visual lossless compression module.
Specifically, since the loss of the video signal of the distributed source coding or the VC2 video lossless compression coding is relatively very small, the visual lossless compression module may perform the visual lossless compression on the video signal by using the distributed source coding or the VC2 video lossless compression coding, and certainly, other visual lossless compression modes and algorithms may also be used, which are not limited specifically herein. Since the visually lossless decompression module decompresses the video signal compressed by the visually lossless compression module, the decompression method of the visually lossless decompression module should correspond to the compression method of the visually lossless compression module, for example, when distributed source coding is used, decompression should also be a decoding method that can decompress the video signal encoded by the distributed source well.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims (10)

1. A video processing card, comprising:
the decoding processing module is used for decoding the received video signal;
the layer processing module is used for carrying out layer processing on the video signal;
the visual lossless compression module is used for carrying out visual lossless compression on the video signal;
and the storage module is used for caching the video signal after lossless compression.
2. The video processing card of claim 1, wherein the visual lossless compression module is configured to perform visual lossless compression after the video processing card performs decoding processing on the video signal and before layer processing.
3. The video processing card according to claim 2, further comprising a first identification control module for identifying the video signal bandwidth after the decoding process and controlling the visual lossless compression module to perform the visual lossless compression operation according to the identification result.
4. A video processing card according to claim 2 or 3, comprising:
the decoding processing module is arranged on the first processing sub-card;
the second processing sub-card is electrically connected with the first processing card, and the layer processing module and the storage module are arranged on the second processing sub-card;
wherein the visually lossless compression module is located on the first process daughter card or on the second process daughter card.
5. The video processing card of claim 1, wherein the visual lossless compression module is configured to perform visual lossless compression after the video processing card performs decoding processing and layer processing on the video signal.
6. The video processing card according to claim 5, further comprising a first identification control module for identifying the video signal bandwidth after the decoding process and controlling the visual lossless compression module to perform the visual lossless compression operation according to the identification result.
7. The video processing card according to claim 5 or 6, comprising:
the decoding processing module is arranged on the first processing sub-card;
the second processing sub-card is electrically connected with the first processing card, and the layer processing module and the storage module are arranged on the second processing sub-card;
wherein the visually lossless compression module is located on the second process daughter card.
8. A video processing apparatus comprising the video processing card according to any one of claims 1 to 6, further comprising:
the video output card is electrically connected with the video processing card and is used for receiving the video signal sent by the video processing card;
the video output card comprises a visual lossless decompression module used for carrying out visual lossless decompression on the video signals after the visual lossless compression.
9. The video processing apparatus of claim 8, wherein the video output card further comprises a second recognition control module for recognizing the received video signal and controlling the visually lossless decompression module to perform a visually lossless decompression operation according to the recognition result.
10. The video processing device according to claim 8 or 9, wherein the visual lossless compression module employs distributed source coding or VC2 video lossless compression coding;
the decompression algorithm adopted by the visual lossless decompression module corresponds to the compression algorithm adopted by the visual lossless compression module.
CN202210728476.1A 2022-06-24 2022-06-24 Video processing card and video processing apparatus Pending CN115103195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210728476.1A CN115103195A (en) 2022-06-24 2022-06-24 Video processing card and video processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210728476.1A CN115103195A (en) 2022-06-24 2022-06-24 Video processing card and video processing apparatus

Publications (1)

Publication Number Publication Date
CN115103195A true CN115103195A (en) 2022-09-23

Family

ID=83293532

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210728476.1A Pending CN115103195A (en) 2022-06-24 2022-06-24 Video processing card and video processing apparatus

Country Status (1)

Country Link
CN (1) CN115103195A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117082191A (en) * 2023-10-13 2023-11-17 广东保伦电子股份有限公司 Extended multi-channel video source back display system and multi-channel video back display method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117082191A (en) * 2023-10-13 2023-11-17 广东保伦电子股份有限公司 Extended multi-channel video source back display system and multi-channel video back display method
CN117082191B (en) * 2023-10-13 2024-03-08 广东保伦电子股份有限公司 Extended multi-channel video source back display system and multi-channel video back display method

Similar Documents

Publication Publication Date Title
US5634040A (en) Data communication apparatus and method having concurrent image overlay function
KR102085270B1 (en) Method for selecting resolution with minimum distortion value and devices performing the method
US10971109B2 (en) Image processing method, apparatus, device, and video image transmission system
US20190313111A1 (en) Adaptive thresholding for computer vision on low bitrate compressed video streams
WO2013086530A2 (en) Method and apparatus for processing partial video frame data
CA2204219C (en) Video transcoding with interim encoding format
CN115103195A (en) Video processing card and video processing apparatus
US11102493B2 (en) Method and apparatus for image compression that employs multiple indexed color history buffers
CN117082191B (en) Extended multi-channel video source back display system and multi-channel video back display method
CN113573111A (en) 8K ultra-high-definition video conversion point screen system and method
CN113014858A (en) Method, system and device for changing resolution
US10602170B2 (en) Signal extension method and system
US8824811B2 (en) LCD module, portable electronic devices and displaying method thereof
EP3637411B1 (en) Content adaptive display interface
US7340101B2 (en) Device and method for compressing and decompressing data for graphics display
CN210428420U (en) Display adapting device without frame buffer
CN113038274B (en) Video interface conversion device and method
CN113923318B (en) Method for realizing simultaneous transmission of HD and 4K HDR video signals and SDI device
CN110618802A (en) Display adaptation method and display adaptation device without frame buffer
CN114827624A (en) Video signal transmission method and system
US20040051714A1 (en) Graphics display module and method
WO1999034320A1 (en) Method and apparatus to improve video processing in a computer system or the like
CN114040206A (en) Signal processing method, device and system of display equipment and storage medium
CN112214174A (en) Flash-memory-based cache decompression system and method for mobile equipment
CN113873246A (en) Video image resolution-variable processing system and method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination