CN112214174A - Flash-memory-based cache decompression system and method for mobile equipment - Google Patents
Flash-memory-based cache decompression system and method for mobile equipment Download PDFInfo
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- 230000006837 decompression Effects 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000009877 rendering Methods 0.000 claims abstract description 9
- 238000012795 verification Methods 0.000 claims description 3
- 230000006835 compression Effects 0.000 abstract description 17
- 238000007906 compression Methods 0.000 abstract description 17
- 238000013507 mapping Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002427 irreversible effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
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- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
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- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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Abstract
The invention discloses a FLASH-based cache decompression system and method for mobile equipment, which comprises a graph drawing unit, an SDRAM module, an FLASH CACHE module and a FLASH module; the graphics rendering unit requesting data from FLASH CACHE module via bus; the FLASH CACHE module requests data from SDRAM or FLASH module and returns the needed data to the graph drawing unit; when the FLASH CACHE module requests data from the FLASH module, the data is decompressed and then output to the SDRAM module. The invention reduces the use of off-chip flash memory by utilizing lossless compression, so that the drawing of complex scenes in an embedded graphic system becomes possible; and the SDRAM in the chip is used as a buffer for outputting after decompression, and multiple times of decompression are not needed.
Description
Technical Field
The invention relates to the field of lossless compression data decompression acceleration systems, in particular to a flash-memory-based cache decompression system and method for mobile equipment.
Background
The compression coding method commonly used at present can be divided into two categories, one is lossless compression method, which removes or reduces redundancies in data, but these redundancy values can be reinserted into data, so lossless compression is a reversible process, and the other is lossy compression method, which compresses entropy and reduces information. The lossy compression method is irreversible.
Lossless compression methods are generally used in multimedia technology for compressing text and data because they do not generate distortion, and it can ensure complete recovery of the original data. However, the compression ratio of the method is lower, such as the compression ratio of 2: l-5: l compared with the coding, the run-length coding and the Hufmfna coding, and the lossy compression method can be used for compressing data such as images, sound, dynamic videos and the like because a certain degree of distortion is allowed. For example, according to the JPEG standard of the Yihe code, the gray image of the natural scene can be compressed by several times to dozens of times, and for the color image of the natural scene, the compression ratio can reach dozens of times or even hundreds of times. With mixed-coding DVI multimedia systems, the compression ratio can typically be as high as 100:1 to 200: 1.
The graphics processor is also called a display core, a visual processor and a display chip, and is a microprocessor specially used for image operation on personal computers, workstations, game machines and some mobile devices (such as tablet computers, smart phones and the like). The graphic processor is one of the important devices of man-machine conversation, and has important practical significance for driving the display information required by the computer and other systems in a conversion way, providing a line scanning signal for the display device and controlling the display device to display correctly.
Texture (Texture) is an important concept in graphics processors, and it makes objects look more realistic when Texture is mapped onto the surface of an object in a specific way using Texture Mapping (Texture Mapping). Texture maps provide a way to map pixel points to an actual scene, which is often very complex and requires a large number of textures.
Conventional embedded graphics systems employ texture storage in off-chip flash memory (flash), which is relatively area sensitive and has limited off-chip flash memory size. With the continuous development of computer graphics, the drawing precision requirement of a graphics processor is continuously improved, and off-chip texture storage in an embedded graphics system becomes a bottleneck of the system more and more. Therefore, the embedded graphics system needs to introduce a texture compression mechanism to reduce the occupancy rate of off-chip memory.
Chinese patent application No. CN 108024115 a discloses a texture compression method and apparatus for compressing some color information of texture blocks, and implementing all colors included in the texture blocks by a number of bits less than the determined number of compression bits based on the color distribution of each texture block. The traditional embedded graphic processing system adopts an off-chip flash memory to store textures, so that the problem of insufficient memory space can occur for complex application scenes.
Therefore, we propose a flash-based cache decompression system and method for mobile devices to solve the above problems.
Disclosure of Invention
The present invention is directed to a flash-based cache decompression system and method for mobile devices, which provides real-time lossless texture decompression to solve the problems of the background art mentioned above.
In order to achieve the purpose, the invention provides the following technical scheme: a FLASH-based cache decompression system for mobile equipment comprises a graphic drawing unit, an SDRAM module, an FLASH CACHE module and a FLASH module;
the graphics rendering unit requesting data from FLASH CACHE module via bus;
the FLASH CACHE module requests data from SDRAM or FLASH module and returns the needed data to the graph drawing unit;
when the FLASH CACHE module requests data from the FLASH module, the data is decompressed and then output to the SDRAM module.
Preferably, the data comprises a look-up table and a data block;
every four bytes in the lookup table are a group, and three information of the size of a data packet, whether the data packet is compressed or not and the address in the file are recorded;
the data comprises a packet header, data and a verification code.
A flash-based cache decompression method for mobile devices comprises the following steps:
s1: the graphics rendering unit begins requesting data from the FLASH CACHE module;
s2: determining FLASH CACHE whether the module is miss, which is the criterion for determining whether the data is in the SDRAM module,
when the FLASH CACHE module does not have a miss, the data is already in the SDRAM, the direct access SDRAM module retrieves the data,
when the FLASH CACHE module is miss, the address of the corresponding block in the flash module is accessed, and then the block data is fetched to be written back to the SDRAM module after passing through the decompression module;
s3: and (6) ending.
Compared with the prior art, the invention has the beneficial effects that: the invention reduces the use of off-chip flash memory by utilizing lossless compression, so that the drawing of complex scenes in an embedded graphic system becomes possible; and the SDRAM in the chip is used as a buffer for outputting after decompression, and multiple times of decompression are not needed.
Drawings
FIG. 1 is a schematic view of a decompression system according to the present invention;
FIG. 2 is a diagram illustrating a compressed data format according to the present invention;
FIG. 3 is a schematic illustration of a decompression flow in accordance with the present invention;
in the figure: 101-graphics drawing unit, 102-SDRAM module, 103-FLASH CACHE module, 104-FLASH module, 105-bus;
201-analyzing a data packet, 202-static huffman decompression, 203-LZ77 decompression and 204-data output;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, the present invention provides a technical solution: a FLASH-based cache decompression system for mobile devices comprises a graphics rendering unit 101, an SDRAM module 102, an FLASH CACHE module 103 and a FLASH module 104;
the graphics-rendering unit 101 requests FLASH CACHE the module 103 for data via the bus 105;
FLASH CACHE module 103 requests data from SDRAM module 102 or FLASH module 104 and returns the required data to graphics rendering unit 101;
the FLASH CACHE module 103 decompresses and outputs the data to the SDRAM module 102 when requesting the data from the FLASH module 104.
The data comprises a lookup table and a data block; every four bytes in the lookup table are a group, and three information of the size of a data packet, whether the data packet is compressed or not and the address in the file are recorded; the data comprises a header, data and a verification code.
During decompression, the lookup table 201 is read and analyzed, a corresponding compressed data packet is obtained according to the information of the lookup table 201, that is, the corresponding lookup table 201 is read according to an external data request, and subsequent decompression operation is performed on data according to the information obtained from the lookup table 201. Static huffman decompression 202 is then performed. After the completion, LZ77 is performed to decompress 203, and finally the data is output 204.
A flash-based cache decompression method for mobile devices comprises the following steps:
s1: the graphics-rendering unit 101 starts requesting data from the FLASH CACHE module 103;
s2: a determination FLASH CACHE is made as to whether the module 103 is miss, which is a criterion for whether data is in the SDRAM module 102,
when the FLASH CACHE module 103 does not have a miss, the data is already in SDRAM, the direct access SDRAM module 102 retrieves the data,
when the FLASH CACHE module 103 is miss, the address of the corresponding block in the FLASH module 104 is accessed, and then the block data is written back to the SDRAM module 102 after passing through the decompression module;
s3: and (6) ending.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (3)
1. A flash-based cache decompression system for mobile devices, comprising: the device comprises a graph drawing unit, an SDRAM module, an FLASH CACHE module and a FLASH module;
the graphics rendering unit requesting data from FLASH CACHE module via bus;
the FLASH CACHE module requests data from SDRAM or FLASH module and returns the needed data to the graph drawing unit;
when the FLASH CACHE module requests data from the FLASH module, the data is decompressed and then output to the SDRAM module.
2. A mobile device-oriented flash-based cache decompression system according to claim 1, wherein: the data comprises a lookup table and a data block;
every four bytes in the lookup table are a group, and three information of the size of a data packet, whether the data packet is compressed or not and the address in the file are recorded;
the data comprises a packet header, data and a verification code.
3. A flash-based cache decompression method for a mobile device, comprising the steps of:
s1: the graphics rendering unit begins requesting data from the FLASH CACHE module;
s2: determining FLASH CACHE whether the module is miss, which is the criterion for determining whether the data is in the SDRAM module,
when the FLASH CACHE module does not have a miss, the data is already in the SDRAM, the direct access SDRAM module retrieves the data,
when the FLASH CACHE module is miss, the address of the corresponding block in the flash module is accessed, and then the block data is fetched to be written back to the SDRAM module after passing through the decompression module;
s3: and (6) ending.
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CN110728725A (en) * | 2019-10-22 | 2020-01-24 | 苏州速显微电子科技有限公司 | Hardware-friendly real-time system-oriented lossless texture compression algorithm |
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KR19990040378A (en) * | 1997-11-18 | 1999-06-05 | 구자홍 | Bus access method and circuit of digital still camera |
US20010049771A1 (en) * | 1998-10-09 | 2001-12-06 | Brett A. Tischler | Dynamic replacement technique in a shared cache |
KR20020031097A (en) * | 1999-02-17 | 2002-04-26 | 케네쓰 올센 | Graphics system having a super-sampled sample buffer with efficient storage of sample position information |
KR20040078250A (en) * | 2003-03-03 | 2004-09-10 | 엘지전자 주식회사 | Digital tv system |
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