CN115098305A - Mainboard standby power switching method and device, electronic equipment and storage medium - Google Patents
Mainboard standby power switching method and device, electronic equipment and storage medium Download PDFInfo
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- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
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Abstract
The application discloses a mainboard standby power switching method and device, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the following steps: responding to the condition detection unit detecting that the condition parameter of the first power supply unit is abnormal, sending a condition abnormal signal to a standby power control unit, and executing a standby power strategy by the standby power control unit according to the condition abnormal signal; and responding to the state detection unit detecting that the first power supply unit is powered off abnormally, sending a power failure abnormal signal to the standby power control unit, and executing an emergency standby power strategy by the standby power control unit according to the power failure abnormal signal. The low-level barb that the in-process that can avoid power supply unit to fall the power back to backup battery unit to succeed in preparing for the power supply unit of mainboard appears for the mainboard is prepared for the power supply management process is comprehensive more.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a method and an apparatus for switching a motherboard standby power, an electronic device, and a storage medium.
Background
In the current big data era, higher requirements are put on the reliability of a storage array, and especially higher requirements are put on the power supply stability of a storage system.
In the prior art, in the Power Supply design of a high-Power dual-controller storage system, a short-time low-level barb exists in the process from Power failure of a Power Supply Unit (PSU) to successful Power Backup of a Battery Backup Unit (BBU), and the barb may have short-time influence on normal operation of a storage device load, so that the working reliability of the storage device is reduced.
In the current storage market, with the development and application of high-end storage, high-speed signal loads such as DDR (Double data rate, Double data rate synchronous dynamic random access memory), PCIe (peripheral component interconnect express), and the like on a storage device have higher requirements on the power supply reliability of the device, and various power modules on a motherboard also have higher dependence on the power supply stability of a front-end PSU combiner, and only if the PSU provides stable 12V power supply for a rear-end power supply, the motherboard can be powered on normally and operate stably. And a short-time barb may cause under-voltage protection of a rear-end power supply, so that power supply failure of a load is caused, the load fails to work normally due to power failure, and serious influences such as data backup failure and even data loss are caused. Therefore, how to avoid the low-level barb during standby power switching is a problem to be solved urgently.
Disclosure of Invention
In order to solve at least one problem mentioned in the background art, the present application provides a motherboard power backup switching method, apparatus, electronic device, and storage medium, which can avoid a low-level barb occurring in the process from the power failure of a power supply unit to the successful power backup of a backup battery unit, so that the motherboard power backup management process is more systematic and comprehensive.
The embodiment of the application provides the following specific technical scheme:
in a first aspect, a motherboard power backup switching method is provided, where the motherboard is connected to a first power supply unit, a power backup control unit, and a backup battery unit, and the first power supply unit is connected to a state detection unit, where the first power supply unit is configured to supply power to the motherboard, and the backup battery unit is configured to backup power to the motherboard, and the method includes:
responding to the condition detection unit detecting that the condition parameters of the first power supply unit are abnormal, sending a condition abnormal signal to a standby power control unit, and executing a standby power strategy by the standby power control unit according to the condition abnormal signal;
and responding to the condition that the state detection unit detects that the first power supply unit is powered off abnormally, sending a power failure abnormal signal to the standby power control unit, and executing an emergency standby power strategy by the standby power control unit according to the power failure abnormal signal.
Further, the main board is further connected with a built-in standby power unit, the built-in standby power unit comprises a charging path, a discharging path, a switch and a super capacitor, the first power supply unit is further used for charging the super capacitor through the charging path,
the standby power control unit executes a standby power strategy according to the state abnormal signal, and the standby power strategy comprises the following steps:
the standby power control unit sends a standby power instruction to the built-in standby power unit;
the built-in standby power unit turns on the switch according to the standby power instruction to prepare power supply;
in response to the first power supply unit being powered down within a first preset time, the built-in standby power unit discharges in the discharge path through the super capacitor so as to maintain the power supply of the mainboard at least within the standby power time;
switching to the backup battery unit for supplying power;
the standby power time is the time required for the first power supply unit to be powered down to be switched to the standby battery unit for power supply.
Further, after the standby power control unit sends a standby power instruction to the built-in standby power unit, the method further includes:
the standby power control unit sends a low-power-consumption operation instruction to the mainboard;
and the main board executes frequency reduction operation and/or power reduction operation according to the low-power-consumption operation instruction.
Further, the power backup control unit executes an emergency power backup strategy according to the power failure abnormal signal, and the emergency power backup strategy includes:
the standby power control unit starts redundant standby power of a dual power supply unit and supplies power to a main board of the first power supply unit through the closing of a second power supply unit;
and the standby power control unit sends a standby power instruction to the standby battery unit, and the standby battery unit starts power supply according to the standby power instruction.
Further, the method further comprises:
and in response to the detection that the backup battery unit supplies power normally, the standby power control unit cuts off the combination.
Further, before the responding to the first power supply unit powering down within the first preset time, the built-in standby power unit discharges in the discharge path through the super capacitor to maintain the power supply of the mainboard at least within the standby power time, the method further includes:
and determining the power supply parameters of the super capacitor according to the standby power time and the power supply current required by the mainboard.
Further, the power supply parameter of the super capacitor is calculated according to the following formula:
Q＝C×V＝I×T
and Q is the total electric quantity of the super capacitor, C is the capacity of the super capacitor, V is the voltage at two ends of the super capacitor during discharging, I is the power supply current required by the mainboard, and T is the standby power time.
Further, the state parameter anomaly comprises at least one of:
the first power supply unit temperature exceeds a temperature threshold, the first power supply unit current exceeds a current threshold, and the first power supply unit voltage fluctuates abnormally.
In a second aspect, a motherboard power-backup switching device is provided, the device includes a first power supply unit, a power-backup control unit, a backup battery unit, and a state detection unit;
the state detection unit is used for responding to the detection of the state parameter abnormity of the first power supply unit and sending a state abnormity signal to the standby power control unit;
the standby power control unit is used for executing a standby power strategy according to the state abnormal signal;
the state detection unit is also used for responding to the detection of abnormal power-off of the first power supply unit and sending a power-down abnormal signal to the standby power control unit;
and the standby power control unit is also used for executing an emergency standby power strategy according to the power failure abnormal signal.
In a third aspect, an electronic device is provided, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the motherboard standby power switching method when executing the computer program.
In a fourth aspect, a computer-readable storage medium is provided, which stores computer-executable instructions for executing the motherboard standby power switching method.
The embodiment of the application has the following beneficial effects:
according to the mainboard power supply switching method, the mainboard power supply switching device, the electronic equipment and the storage medium, two power supply paths, namely the pre-power supply strategy and the emergency power supply strategy, can be coordinated with each other, so that the low-level barb phenomenon caused by insufficient preparation of the traditional power supply strategy is effectively avoided, the operation reliability of a system is improved, meanwhile, the power supply abnormity under different conditions can be more comprehensively coped with, and the power supply management process is more systematized. The power supply standby strategy can perform power supply standby according to the abnormal state information of the power supply unit, so that the power supply standby process is fully prepared; the emergency power supply strategy can fully utilize the redundant power supply of the power supply unit, the stable transition to the power supply stage is ensured as far as possible, and the influence caused by the barb is reduced.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a general flowchart illustrating a motherboard standby power switching method according to an embodiment of the present disclosure;
FIG. 2 illustrates a detailed flow diagram of a power-up-anticipation strategy according to one embodiment of the present application;
fig. 3 shows a detailed flowchart of an emergency power backup strategy according to an embodiment of the present application;
FIG. 4 shows a circuit diagram of a built-in power backup unit according to one embodiment of the present application;
FIG. 5 illustrates a dual power supply unit redundant power supply topology according to one embodiment of the present application;
fig. 6 is a schematic structural diagram of a motherboard standby power switching device according to an embodiment of the present application;
FIG. 7 illustrates an exemplary system that can be used to implement the various embodiments described in this application.
Detailed Description
In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present application, "a plurality" means two or more unless otherwise specified.
Example one
The application provides a mainboard power backup switching method, is applied to the mainboard, and the mainboard is connected with first power supply unit, power backup control unit and backup battery unit, and first power supply unit is connected with state detection unit, and wherein, first power supply unit is used for supplying power for the mainboard, and backup battery unit is used for the mainboard power backup, refer to fig. 1, the method includes:
s1, responding to the state detection unit detecting the state parameter abnormity of the first power supply unit, sending a state abnormity signal to the standby power control unit, and executing a standby power strategy by the standby power control unit according to the state abnormity signal;
and S2, responding to the abnormal power-down of the first power supply unit detected by the state detection unit, sending a power-down abnormal signal to the power-standby control unit, and executing an emergency power-standby strategy by the power-standby control unit according to the power-down abnormal signal.
Specifically, the first power supply unit supplies power to the corresponding main board when working normally, and the system control unit operates the main-standby power switching optimization algorithm while supplying power. When the state detection unit detects that an abnormal condition occurs, the standby power control unit selects a corresponding algorithm path according to the abnormal state, and the standby power control unit efficiently performs standby power operation. The main-standby power switching optimization algorithm comprises two paths, namely the pre-standby power strategy and the emergency standby power strategy, and the two paths are selected according to the real-time detection result of the state detection unit. The pre-standby power strategy and the emergency standby power strategy are not influenced with each other in a control algorithm layer and a physical layer, and the final results of the two algorithm paths ensure that the mainboard selects a proper path to efficiently and reliably switch to the backup battery unit for standby power according to the self state. The pre-standby power strategy takes the state parameters of the first power supply unit as reference points, and the built-in standby power unit is matched with the rear-end load, so that standby power preparation operation is realized, and high-quality standby power in a short time after the PSU is powered off is ensured; the emergency power supply strategy takes the power failure information of the PSU as a reference point, so that the normal operation of power supply under emergency is ensured, and the influence possibly generated due to the power failure of the PSU is reduced to the minimum. The two standby power paths are coordinated and matched with each other, and simultaneously, the hardware provides support for the two standby power paths, so that the low-level barb phenomenon caused by insufficient preparation of the traditional standby power strategy is effectively avoided, and the operation reliability of the system is improved.
In some embodiments, the motherboard is further connected with a built-in power supply unit, the built-in power supply unit includes a charging path, a discharging path, a switch, and a super capacitor, and the first power supply unit is further configured to charge the super capacitor through the charging path, based on which S1 includes:
s11, the standby power control unit sends a standby power instruction to the built-in standby power unit;
s12, the built-in standby power unit turns on a switch according to the standby power instruction to prepare power supply;
s13, responding to the first power supply unit losing power within a first preset time, the built-in standby power unit discharges power in a discharging path through the super capacitor so as to maintain the power supply of the mainboard at least within the standby power time;
s14, switching to a backup battery unit for supplying power;
the standby power time is the time required for the first power supply unit to switch to the backup battery unit for power supply after power failure.
This is further illustrated in connection with fig. 2:
specifically, when the state detection unit detects that the state parameter of the first power supply unit is abnormal (for example, the PSU is in an abnormal state such as over-temperature and over-current, but not powered down), the standby power control unit sends a standby power instruction to the built-in standby power unit to notify the built-in standby power unit to prepare for standby power, so that the built-in standby power is timely switched after the PSU is abnormally powered down. When the first power supply unit is powered off within the first preset time, the power supply is switched to the built-in preparation unit for supplying power, and when the BBU (base band unit) is started, the power supply of the built-in preparation unit is cut off, so that the non-delay preparation power switching can be realized.
In some embodiments, after S11, the method further comprises:
101. the standby power control unit sends a low-power-consumption operation instruction to the mainboard;
102. and the main board executes the frequency reduction operation and/or the power reduction operation according to the low-power-consumption operation instruction.
Specifically, when the built-in standby power unit starts to work for standby power, the standby power control unit sends information of frequency reduction and power reduction operation to the mainboard, PSU abnormity is sent to the load end through the I2C link, and the load end timely reduces the frequency to prepare for short-time internal switching to standby power. Illustratively, the central processing unit on the motherboard reduces the rate of processing data by multiple cores, and sequentially closes transmission services on each I/O (input/output) card, and the PCIe high-speed data transmission channel is also gradually closed.
Specifically, referring to fig. 4, fig. 4 illustrates a topology of a built-in backup unit. The built-in standby power unit provides a bidirectional BUCK-BOOST charging and discharging circuit which comprises a BOOST path (charging path) and a BUCK path (discharging path). Under the normal working state of the mainboard, the built-in standby power unit works along a BOOST path from left to right, the first power supply unit supplies power to the mainboard and charges the super capacitor through the BOOST path, and when the first power supply unit is powered down to BBU standby power, the super capacitor discharges through the BUCK path. For example, assuming that the voltage of the super capacitor is 24V, when the super capacitor is fully charged, and after the voltage is divided by the resistors R1 and R2, the voltage at the point Va is shown as 3V, at this time, the switch controls the two MOS transistors (field effect transistors) M1 and M2 on the charging circuit to be turned off, and the first power supply unit stops charging the super capacitor. In the pre-standby power strategy path, after the built-in standby power unit receives a standby power command of the standby power control unit, a MOS (field effect transistor) M3 on the discharge path is opened, but at the moment, because the negative terminal voltage (obtained by dividing the voltage on the first power supply unit by R3 and R4) on the comparator is higher than the positive terminal 3V, the BUCK path (discharge path) of the super capacitor does not discharge outwards; when the voltage of the positive end on the comparator is lower than that of the negative end, the first power supply unit can be judged to be powered down, the built-in standby power unit of the system starts to work, and the super capacitor discharges through the BUCK path, so that low-level barbs cannot appear in the period from the PSU to the BBU switching.
In some embodiments, prior to S13, the method further comprises:
and determining the power supply parameters of the super capacitor according to the standby power time and the power supply current required by the mainboard. Wherein, in some embodiments, the parameter of the super capacitor is calculated according to the following formula:
Q＝C×V＝I×T
q is the total electric quantity of the super capacitor, C is the capacity of the super capacitor, V is the voltage at two ends of the super capacitor during discharging, I is the power supply current required by the mainboard, and T is the standby power time.
For example, the voltage value I is a supply current required by the motherboard, which depends on different motherboards; and T is the time from the power failure of the PSU to the successful power backup of the BBU, the time spent by the discharge of the general super capacitor is at least 5ms, and the proper capacity and voltage of the super capacitor can be selected according to the power backup time and the power supply current required by the mainboard, so as to ensure that the electric quantity of the super capacitor meets the requirement.
In some embodiments, S2 includes:
s21, the standby power control unit starts the redundant standby power of the dual power supply unit and supplies power to the mainboard of the first power supply unit through the closing of the second power supply unit;
and S22, the standby power control unit sends a standby power instruction to the standby battery unit, and the standby battery unit starts power supply according to the standby power instruction.
In some embodiments, the method further comprises:
and S23, responding to the detection that the backup battery unit supplies power normally, and the standby power control unit cuts off the combination.
Specifically, referring to fig. 3, when the first power supply unit suddenly fails to work under the condition of no abnormal early warning, the built-in standby power unit cannot work in time, the BBU standby power unit also cannot work in time, and at the moment, only the capacitor inside the first power supply unit maintains a low voltage of the first power supply unit to supply power to the system, so that the barb of the first power supply unit needs to be detected, and then the standby power control unit is quickly notified, and the standby power control unit starts the redundant standby power of the dual power supply unit. The other PSU, namely the second power supply unit, supplies power to the main board path of the first power supply unit with power failure quickly through closing, so that the barb length caused by the power failure of the first power supply unit is shortened as much as possible. The spare power control unit simultaneously informs the BBU to carry out the operation of preparing for electricity, and after the BBU normally worked and accomplished mainboard spare power, the spare power control unit need cut off the way of combining as early as possible thereby prevents to appear because of the long-time power supply of second power supply unit and the overcurrent protection that simultaneously prepared for electricity and lead to. In the emergency power supply strategy, because the situation is more urgent and the barb of the first power supply unit needs to be detected to inform the power supply control unit to work, the built-in power supply unit does not work in the process, the generation of the barb is reduced as much as possible by short-time redundant power supply of the other second power supply unit on the dual controller, and calculation and test are needed before redundant power supply is carried out to ensure that the running time of the second power supply unit under the overcurrent condition is longer than the BBU starting protection time so as to reduce the influence of the barb.
For example, referring to fig. 5, the dual power supply units are combined to supply power to the corresponding storage controllers, and paths for supplying power to the other controller also exist on each of the dual power supply units. When the emergency power failure condition occurs to one path of power supply unit, the standby power control unit controls the MOS on the other path to be switched on after detecting the barb, and at the moment, the power supply unit on the other path supplies power to the two controllers in a short time until the MOS tube is switched off after BBU standby power, so that the overcurrent protection caused by the long-time power supply and the simultaneous standby power of the second power supply unit is prevented.
In some embodiments, the state parameter anomalies include at least one of:
the first power supply unit temperature exceeds a temperature threshold, the first power supply unit current exceeds a current threshold, and the first power supply unit voltage fluctuates abnormally.
In this embodiment, can coordinate each other through two power supply routes of power supply strategy and urgent power supply strategy in advance to effectively avoided traditional power supply strategy because prepare the low level barb phenomenon that produces inadequately, improved the operational reliability of system, more comprehensive reply the power supply anomaly of different situations simultaneously, make the power supply management process more systematized. The power supply standby strategy can perform power supply standby according to the abnormal state information of the power supply unit, so that the power supply standby process is fully prepared; the emergency power supply strategy can fully utilize the redundant power supply of the power supply unit, the stable transition to the power supply stage is ensured as far as possible, and the influence caused by the barb is reduced.
It should be noted that the terms "S1", "S2", etc. are used for descriptive purposes only, are not intended to be used in a specific sense to refer to an order or sequence, and are not intended to limit the present application, but are merely used for convenience in describing the methods of the present application and are not to be construed as indicating the order of the steps. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
Example two
Corresponding to the above embodiments, the present application further provides a motherboard standby power switching apparatus, referring to fig. 6, the apparatus includes a first power supply unit, a standby power control unit, a backup battery unit, and a state detection unit. The state detection unit is used for responding to the detection of the state parameter abnormity of the first power supply unit and sending a state abnormity signal to the standby power control unit; the standby power control unit is used for executing a standby power strategy according to the state abnormal signal; the state detection unit is also used for responding to the detection that the first power supply unit is abnormally powered off and sending a power failure abnormal signal to the standby power control unit; and the standby power control unit is also used for executing an emergency standby power strategy according to the power failure abnormal signal.
Further, the main board standby power switching device further comprises a built-in standby power unit, the built-in standby power unit comprises a charging path, a discharging path, a switch and a super capacitor, the first power supply unit is further used for charging the super capacitor through the charging path, and the standby power control unit is further used for sending a standby power instruction to the built-in standby power unit; the built-in standby power unit is used for opening a switch according to the standby power instruction to prepare power supply; responding to the first power supply unit being powered down within a first preset time, the built-in standby power unit is further used for discharging in a discharging path through a super capacitor so as to maintain the power supply of the mainboard at least within the standby power time; the standby power control unit is also used for switching to a standby battery unit for supplying power; the standby power time is the time required for the first power supply unit to switch to the backup battery unit for power supply after power failure.
Further, the standby power control unit is further configured to send a low power consumption operation instruction to the motherboard; and the main board executes frequency reduction operation and/or power reduction operation according to the low-power-consumption operation instruction.
Furthermore, the standby power control unit is also used for starting redundant standby power of a dual power supply unit and supplying power to the main board of the first power supply unit through the closing of a second power supply unit; the standby power control unit is also used for sending a standby power instruction to a standby battery unit, and the standby battery unit is used for starting power supply according to the standby power instruction.
Further, in response to detecting that the backup battery unit supplies power normally, the standby power control unit is further configured to cut off the combining path.
Further, the built-in standby power unit is further configured to determine a power supply parameter of the super capacitor according to the standby power time and the power supply current required by the motherboard.
Further, the parameter of the super capacitor is calculated according to the following formula:
Q＝C×V＝I×T
q is the total electric quantity of the super capacitor, C is the capacity of the super capacitor, V is the voltage at two ends of the super capacitor during discharging, I is the power supply current required by the mainboard, and T is the standby power time.
Further, the state parameter abnormality includes at least one of:
the first power supply unit temperature exceeds a temperature threshold, the first power supply unit current exceeds a current threshold, and the first power supply unit voltage fluctuates abnormally.
For the specific limitations of the motherboard standby power switching device, reference may be made to the above-mentioned limitations related to the motherboard standby power switching method, and therefore, the details are not repeated herein. All or part of each module in the mainboard standby power switching device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
EXAMPLE III
Corresponding to the above embodiment, the present application further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and capable of running on the processor, and when the processor executes the program, the method for switching between standby power of the motherboard can be implemented.
As shown in fig. 7, in some embodiments, the system can be used as the electronic device for the motherboard standby power switching method in any one of the embodiments. In some embodiments, a system may include one or more computer-readable media (e.g., system memory or NVM/storage) having instructions and one or more processors (e.g., processor (s)) coupled with the one or more computer-readable media and configured to execute the instructions to implement modules to perform actions described herein.
For one embodiment, the system control module may include any suitable interface controller to provide any suitable interface to at least one of the processor(s) and/or any suitable device or component in communication with the system control module.
The system control module may include a memory controller module to provide an interface to the system memory. The memory controller module may be a hardware module, a software module, and/or a firmware module.
System memory may be used, for example, to load and store data and/or instructions for the system. For one embodiment, the system memory may comprise any suitable volatile memory, such as suitable DRAM. In some embodiments, the system memory may include a double data rate type four synchronous dynamic random access memory (DDR4 SDRAM).
For one embodiment, the system control module may include one or more input/output (I/O) controllers to provide an interface to the NVM/storage and communication interface(s).
For example, the NVM/storage may be used to store data and/or instructions. The NVM/storage may include any suitable non-volatile memory (e.g., flash memory) and/or may include any suitable non-volatile storage device(s) (e.g., one or more hard disk drive(s) (HDD (s)), one or more Compact Disc (CD) drive(s), and/or one or more Digital Versatile Disc (DVD) drive (s)).
The NVM/storage may include storage resources that are physically part of the device on which the system is installed, or it may be accessible by the device and not necessarily part of the device. For example, the NVM/storage may be accessible over a network via the communication interface(s).
The communication interface(s) may provide an interface for the system to communicate over one or more networks and/or with any other suitable device. The system may wirelessly communicate with one or more components of the wireless network according to any of one or more wireless network standards and/or protocols.
For one embodiment, at least one of the processor(s) may be packaged together with logic for one or more controllers (e.g., memory controller modules) of the system control module. For one embodiment, at least one of the processor(s) may be packaged together with logic for one or more controllers of the system control module to form a System In Package (SiP). For one embodiment, at least one of the processor(s) may be integrated on the same die with logic for one or more controllers of the system control module. For one embodiment, at least one of the processor(s) may be integrated on the same die with logic of one or more controllers of a system control module to form a system on a chip (SoC).
In various embodiments, the system may be, but is not limited to being: a server, a workstation, a desktop computing device, or a mobile computing device (e.g., a laptop computing device, a handheld computing device, a tablet, a netbook, etc.). In various embodiments, the system may have more or fewer components and/or different architectures. For example, in some embodiments, a system includes one or more cameras, a keyboard, a Liquid Crystal Display (LCD) screen (including touch screen displays), a non-volatile memory port, multiple antennas, a graphics chip, an Application Specific Integrated Circuit (ASIC), and speakers.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware, for example, as an Application Specific Integrated Circuit (ASIC), a general purpose computer or any other similar hardware device. In one embodiment, the software programs of the present application may be executed by a processor to implement the steps or functions described above. Likewise, the software programs (including associated data structures) of the present application may be stored in a computer readable recording medium, such as RAM memory, magnetic or optical drive or diskette and the like. Further, some of the steps or functions of the present application may be implemented in hardware, for example, as circuitry that cooperates with the processor to perform various steps or functions.
In addition, some of the present application may be implemented as a computer program product, such as computer program instructions, which when executed by a computer, may invoke or provide methods and/or techniques in accordance with the present application through the operation of the computer. Those skilled in the art will appreciate that the form in which the computer program instructions reside on a computer-readable medium includes, but is not limited to, source files, executable files, installation package files, and the like, and that the manner in which the computer program instructions are executed by a computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. In this regard, computer readable media can be any available computer readable storage media or communication media that can be accessed by a computer.
Communication media includes media by which communication signals, including, for example, computer readable instructions, data structures, program modules, or other data, are transmitted from one system to another. Communication media may include conductive transmission media such as cables and wires (e.g., fiber optics, coaxial, etc.) and wireless (non-conductive transmission) media capable of propagating energy waves such as acoustic, electromagnetic, RF, microwave, and infrared. Computer readable instructions, data structures, program modules, or other data may be embodied in a modulated data signal, for example, in a wireless medium such as a carrier wave or similar mechanism such as is embodied as part of spread spectrum techniques. The term "modulated data signal" means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. The modulation may be analog, digital or hybrid modulation techniques.
An embodiment according to the present application comprises an apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform a method and/or a solution according to the aforementioned embodiments of the present application.
Example four
Corresponding to the above embodiment, the present application further provides a computer-readable storage medium storing computer-executable instructions, where the computer-executable instructions are used to execute the motherboard standby power switching method.
In the present embodiment, computer-readable storage media may include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information, such as computer-readable instructions, data structures, program modules, or other data. For example, computer-readable storage media include, but are not limited to, volatile memory such as random access memory (RAM, DRAM, SRAM); and non-volatile memory such as flash memory, various read-only memories (ROM, PROM, EPROM, EEPROM), magnetic and ferromagnetic/ferroelectric memories (MRAM, FeRAM); and magnetic and optical storage devices (hard disk, tape, CD, DVD); or other now known media or later developed that can store computer-readable information/data for use by a computer system.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the true scope of the embodiments of the present application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A mainboard standby power switching method is applied to a mainboard, and is characterized in that the mainboard is connected with a first power supply unit, a standby power control unit and a backup battery unit, the first power supply unit is connected with a state detection unit, wherein the first power supply unit is used for supplying power to the mainboard, and the backup battery unit is used for standby power to the mainboard, and the method comprises the following steps:
responding to the condition detection unit detecting that the condition parameters of the first power supply unit are abnormal, sending a condition abnormal signal to a standby power control unit, and executing a standby power strategy by the standby power control unit according to the condition abnormal signal;
and responding to the state detection unit detecting that the first power supply unit is powered off abnormally, sending a power failure abnormal signal to the standby power control unit, and executing an emergency standby power strategy by the standby power control unit according to the power failure abnormal signal.
2. The motherboard power backup switching method according to claim 1, wherein a built-in power backup unit is further connected to the motherboard, the built-in power backup unit comprises a charging path, a discharging path, a switch and a super capacitor, the first power supply unit is further configured to charge the super capacitor through the charging path,
the standby power control unit executes a standby power strategy according to the state abnormal signal, and the standby power strategy comprises the following steps:
the standby power control unit sends a standby power instruction to the built-in standby power unit;
the built-in standby power unit turns on the switch according to the standby power instruction to prepare power supply;
in response to the first power supply unit being powered down within a first preset time, the built-in standby power unit discharges in the discharge path through the super capacitor so as to maintain the power supply of the mainboard at least within a standby power time;
switching to the backup battery unit for supplying power;
the standby power time is the time required for the first power supply unit to be powered down to be switched to the standby battery unit for power supply.
3. The motherboard power backup switching method according to claim 2, wherein after the power backup control unit sends a power backup instruction to the built-in power backup unit, the method further comprises:
the standby power control unit sends a low-power-consumption operation instruction to the mainboard;
and the main board executes frequency reduction operation and/or power reduction operation according to the low-power-consumption operation instruction.
4. The motherboard power backup switching method according to claim 1, wherein the power backup control unit executes an emergency power backup strategy according to the power failure abnormal signal, and the method comprises the following steps:
the standby power control unit starts redundant standby power of a dual power supply unit and supplies power to a main board of the first power supply unit through the closing of a second power supply unit;
and the standby power control unit sends a standby power instruction to the standby battery unit, and the standby battery unit starts power supply according to the standby power instruction.
5. The motherboard-ready power switching method of claim 4, further comprising:
and in response to the detection that the backup battery unit supplies power normally, the standby power control unit cuts off the combination.
6. The motherboard power supply switching method of claim 2, wherein before said responding to the first power supply unit powering down within a first preset time, the built-in power supply unit discharges through the super capacitor in the discharge path to maintain the motherboard power supply at least within a power supply time, the method further comprises:
and determining the power supply parameters of the super capacitor according to the standby power time and the power supply current required by the mainboard.
7. The motherboard power-backup switching method of claim 6, wherein the power supply parameter of the super capacitor is calculated according to the following formula:
Q＝C×V＝I×T
q is the total electric quantity of the super capacitor, C is the capacity of the super capacitor, V is the voltage at two ends of the super capacitor during discharging, I is the power supply current required by the mainboard, and T is the standby power time.
8. A mainboard standby power switching device is characterized by comprising a first power supply unit, a standby power control unit, a standby battery unit and a state detection unit;
the state detection unit is used for responding to the detection that the state parameter of the first power supply unit is abnormal and sending a state abnormal signal to the standby power control unit;
the standby power control unit is used for executing a standby power strategy according to the state abnormal signal;
the state detection unit is also used for responding to the detection that the first power supply unit is abnormally powered off and sending a power failure abnormal signal to the standby power control unit;
and the standby power control unit is also used for executing an emergency standby power strategy according to the power failure abnormal signal.
9. An electronic device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the motherboard power switching method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium storing computer-executable instructions for performing the motherboard power-on switching method of any one of claims 1 to 7.
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| CN202210708608.4A CN115098305A (en) | 2022-06-21 | 2022-06-21 | Mainboard standby power switching method and device, electronic equipment and storage medium |
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| CN202210708608.4A CN115098305A (en) | 2022-06-21 | 2022-06-21 | Mainboard standby power switching method and device, electronic equipment and storage medium |
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