CN115087189A - Circuit board structure and layout structure thereof - Google Patents
Circuit board structure and layout structure thereof Download PDFInfo
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- CN115087189A CN115087189A CN202110282035.9A CN202110282035A CN115087189A CN 115087189 A CN115087189 A CN 115087189A CN 202110282035 A CN202110282035 A CN 202110282035A CN 115087189 A CN115087189 A CN 115087189A
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- 230000008054 signal transmission Effects 0.000 claims abstract description 42
- 229910000679 solder Inorganic materials 0.000 claims abstract description 22
- 239000004020 conductor Substances 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 5
- 238000002310 reflectometry Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001028 reflection method Methods 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
本发明提供一种电路板结构及其布局结构。布局结构包括至少一信号传输线、至少一焊垫以及至少一阻抗调整导线。信号传输线、焊垫以及阻抗调整导线设置在第一电路板上。阻抗调整导线电连接在信号传输线以及焊垫间。阻抗调整导线沿焊垫的周围进行设置,并至少部分环绕焊垫。
The present invention provides a circuit board structure and a layout structure thereof. The layout structure includes at least one signal transmission line, at least one bonding pad and at least one impedance adjusting wire. Signal transmission lines, solder pads and impedance adjustment wires are arranged on the first circuit board. The impedance adjustment wire is electrically connected between the signal transmission line and the bonding pad. Impedance adjustment wires are provided along the perimeter of the pad and at least partially surround the pad.
Description
技术领域technical field
本发明涉及一种电路板结构及其布局结构,且特别是涉及一种可降低信号反射现象的电路板结构及其布局结构。The present invention relates to a circuit board structure and its layout structure, and in particular to a circuit board structure and its layout structure which can reduce the phenomenon of signal reflection.
背景技术Background technique
在印刷电路板的设计上,为了使信号可以在不同高度的电路板间进行传送,常通过焊垫以至连接例如导电通孔的连接结构,来使不同的电路板间可以产生电连接。然而,相对于传输线,焊垫常具有相对大的表面积并提供相对低的阻抗。如此一来,传输线与焊垫所形成的信号传输路径,会产生阻抗不连续的现象,而造成信号传输过程的反射现象,降低信号传输的质量。In the design of printed circuit boards, in order to allow signals to be transmitted between circuit boards of different heights, electrical connections between different circuit boards are often made through bonding pads and connecting structures such as conductive vias. However, solder pads often have relatively large surface areas and provide relatively low impedance relative to transmission lines. As a result, the signal transmission path formed by the transmission line and the bonding pad will generate discontinuous impedance, which will cause reflection in the signal transmission process and reduce the quality of signal transmission.
发明内容SUMMARY OF THE INVENTION
本发明提供一种电路板结构及其布局结构,可减低信号传输时的反射现象。The invention provides a circuit board structure and a layout structure thereof, which can reduce the reflection phenomenon during signal transmission.
本发明的电路板布局结构包括至少一信号传输线、至少一焊垫以及至少一阻抗调整导线。信号传输线、焊垫以及阻抗调整导线设置在第一电路板上。阻抗调整导线电连接在信号传输线以及焊垫间。阻抗调整导线沿焊垫的周围进行设置,并至少部分环绕焊垫。The circuit board layout structure of the present invention includes at least one signal transmission line, at least one solder pad and at least one impedance adjustment wire. Signal transmission lines, solder pads and impedance adjustment wires are arranged on the first circuit board. The impedance adjustment wire is electrically connected between the signal transmission line and the bonding pad. Impedance adjustment wires are provided along the perimeter of the pad and at least partially surround the pad.
本发明的电路板结构包括第一电路板以及第二电路板。第一电路板具有至少一信号传输线、至少一焊垫以及至少一阻抗调整导线。阻抗调整导线电连接在信号传输线以及焊垫间。阻抗调整导线沿焊垫的周围进行设置,并至少部分环绕焊垫。第二电路板,通过至少一连接结构电连接至所述第二电路板。The circuit board structure of the present invention includes a first circuit board and a second circuit board. The first circuit board has at least one signal transmission line, at least one solder pad and at least one impedance adjustment wire. The impedance adjustment wire is electrically connected between the signal transmission line and the bonding pad. Impedance adjustment wires are provided along the perimeter of the pad and at least partially surround the pad. The second circuit board is electrically connected to the second circuit board through at least one connection structure.
根据上述,本发明通过设置阻抗调整导线以电连接在信号传输线以及焊垫间。并使阻抗调整导线沿焊垫的周围进行设置,且至少部分环绕焊垫。可有效减低信号传输过程所产生的阻抗不连续现象,可有效提升信号传输的质量。According to the above, the present invention provides an impedance adjustment wire to be electrically connected between the signal transmission line and the pad. The impedance adjustment wires are arranged along the circumference of the bonding pad and at least partially surround the bonding pad. It can effectively reduce the impedance discontinuity phenomenon caused by the signal transmission process, and can effectively improve the quality of the signal transmission.
附图说明Description of drawings
包含附图以便进一步理解本发明,且附图并入本说明书中并构成本说明书的一部分。附图说明本发明的实施例,并与描述一起用于解释本发明的原理。The accompanying drawings are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
图1示出本发明一实施例的电路板布局结构的示意图;FIG. 1 shows a schematic diagram of a circuit board layout structure according to an embodiment of the present invention;
图2A以及图2B分别示出本发明实施例的布局结构的不同实施方式的示意图;FIG. 2A and FIG. 2B respectively show schematic diagrams of different implementation manners of the layout structure of the embodiment of the present invention;
图3示出本发明实施例的布局结构的另一实施方式的示意图;FIG. 3 shows a schematic diagram of another implementation manner of the layout structure of the embodiment of the present invention;
图4示出依据本发明实施例的布局结构所测量的时间区域反射法(Time DomainReflectometry,TDR)波形图;FIG. 4 shows a time domain reflectometry (Time Domain Reflectometry, TDR) waveform diagram measured by a layout structure according to an embodiment of the present invention;
图5示出本发明一实施例的电路板结构的示意图;FIG. 5 shows a schematic diagram of a circuit board structure according to an embodiment of the present invention;
图6示出本发明实施例的高速传输接口的传输结构的示意图。FIG. 6 shows a schematic diagram of a transmission structure of a high-speed transmission interface according to an embodiment of the present invention.
附图标号说明Explanation of reference numerals
100、210、300:布局结构;100, 210, 300: layout structure;
110、510、520:电路板;110, 510, 520: circuit board;
111、211-1、211-2、221-1、221-2、311、5111、611、612、631、632:焊垫;111, 211-1, 211-2, 221-1, 221-2, 311, 5111, 611, 612, 631, 632: solder pads;
112、212-1、212-2、222-1、222-2、312:阻抗调整导线;112, 212-1, 212-2, 222-1, 222-2, 312: impedance adjustment wires;
113、313:信号传输线;113, 313: signal transmission line;
410、420、430:曲线;410, 420, 430: Curves;
SPC:规格;SPC: specification;
500:电路板结构;500: circuit board structure;
IC1、IC2:集成电路;IC1, IC2: integrated circuit;
VIA、621、622:导电通孔;VIA, 621, 622: conductive vias;
L11:自感;L11: Self-inductance;
L12:互感;L12: mutual inductance;
C11:自容;C11: self-contained;
C22:互容。C22: Mutual tolerance.
具体实施方式Detailed ways
现将详细地参考本发明的示范性实施例,示范性实施例的实例说明于附图中。只要有可能,相同元件符号在图式和描述中用来表示相同或相似部分。Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and description to refer to the same or like parts.
请参照图1,图1示出本发明一实施例的电路板布局结构的示意图。布局结构100设置在电路板110上。布局结构100包括焊垫111、阻抗调整导线112以及信号传输线113。信号传输线113电连接至阻抗调整导线112的一端,阻抗调整导线112的另一端则电连接至焊垫111。在本实施例中,焊垫111具有一相对大的电荷传送表面,并提供一第一阻抗。设置在焊垫111以及信号传输线113中的阻抗调整导线112,则具有相对小的电荷传送表面,并提供一第二阻抗。其中,第二阻抗大于第一阻抗。Please refer to FIG. 1 . FIG. 1 shows a schematic diagram of a circuit board layout structure according to an embodiment of the present invention. The
在本实施例中,信号传输线113用以传送一电气信号。布局结构100通过在信号传输线113以及焊垫111间设置阻抗调整导线112,并通过阻抗调整导线112所提供的,相对大于焊垫111所提供的第一阻抗的第二阻抗,来提高信号传输线113至焊垫111间阻抗变化的连续性,可有效减低电气信号的传送过程中,所可能发生的信号反射现象。In this embodiment, the
值得一提的,在本实施例中,阻抗调整导线112可沿着焊垫111的周围进行设置。其中,焊垫111的形状可以设计为多边形或是圆形。阻抗调整导线112则可以沿焊垫111为多边形或是圆形的周围,并与焊垫111具有一间隔距离,以环绕焊垫111的方式进行布局。在图1中,阻抗调整导线112可部分环绕焊垫111,例如环绕焊垫111达1/4个周长。It is worth mentioning that in this embodiment, the
此外,在本实施例中,焊垫111以及阻抗调整导线112可均配置在电路板110的相同表面上。在本发明其他实施例中,焊垫111以及阻抗调整导线112可分别配置在电路板110的不同表面上。In addition, in the present embodiment, the
附带一提的,本实施例中,焊垫111可用以电连接至一连接结构,并通过连接结构电连接至另一电路板。连接结构可以由任意形式的导电通孔(VIA)。Incidentally, in this embodiment, the
以下请参照图2A以及图2B,图2A以及图2B分别示出本发明实施例的布局结构的不同实施方式的示意图。在图2A中,布局结构210包括焊垫211-1、211-2以及阻抗调整导线212-1、212-2。焊垫211-1、211-2以及阻抗调整导线212-1、212-2配置在电路板的相同表面上。阻抗调整导线212-1的一端电连接至焊垫211-1,阻抗调整导线212-1的另一端可用以连接至第一信号传输线。阻抗调整导线212-2的一端电连接至焊垫211-2,阻抗调整导线212-2的另一端可用以连接至第二信号传输线。第一信号传输线以及第二信号传输线可分别收发互为差动信号的二电气信号。Please refer to FIG. 2A and FIG. 2B below. FIG. 2A and FIG. 2B respectively illustrate schematic diagrams of different implementation manners of the layout structure according to the embodiment of the present invention. In FIG. 2A , the
另外,阻抗调整导线212-1环绕焊垫211-1的周围,在与焊垫211-1的周围具有一第一间隔距离的条件下进行设置。在图2A的实施方式中,阻抗调整导线212-1环绕焊垫211-1达1/2个周长。在另一方面,阻抗调整导线212-2环绕焊垫211-2的周围,并在与焊垫211-2的周围具有一第二间隔距离的条件下进行设置。在图2A的实施方式中,阻抗调整导线212-2环绕焊垫211-2同样可达1/2个周长。其中,第一间格距离以及第二间隔距离可以相同或不相同,没有固定的限制。In addition, the impedance adjustment wire 212-1 surrounds the periphery of the bonding pad 211-1, and is arranged under the condition that there is a first separation distance from the periphery of the bonding pad 211-1. In the embodiment of FIG. 2A, the impedance adjustment wire 212-1 surrounds the pad 211-1 by 1/2 the circumference. On the other hand, the impedance adjusting wire 212-2 surrounds the periphery of the bonding pad 211-2 and is disposed under the condition of having a second spaced distance from the periphery of the bonding pad 211-2. In the embodiment of FIG. 2A , the impedance adjustment wire 212-2 can also encircle the bonding pad 211-2 up to 1/2 of the circumference. Wherein, the first grid distance and the second interval distance may be the same or different, and there is no fixed limit.
在图2B中,布局结构220包括焊垫221-1、221-2以及阻抗调整导线222-1、222-2。焊垫221-1、221-2以及阻抗调整导线222-1、222-2同样可配置在电路板的相同表面上。阻抗调整导线222-1的一端电连接至焊垫221-1,阻抗调整导线222-1的另一端可用以连接至第一信号传输线。阻抗调整导线222-2的一端电连接至焊垫221-2,阻抗调整导线222-2的另一端可用以连接至第二信号传输线。第一信号传输线以及第二信号传输线可分别收发互为差动信号的二电气信号。In FIG. 2B , the
另外,阻抗调整导线222-1环绕焊垫221-1的周围,在与焊垫221-1的周围具有一第一间隔距离的条件下进行设置。在图2B的实施方式中,阻抗调整导线222-1环绕焊垫221-1达1个周长。在另一方面,阻抗调整导线222-2环绕焊垫221-2的周围,并在与焊垫221-2的周围具有一第二间隔距离的条件下进行设置。在图2B的实施方式中,阻抗调整导线222-2环绕焊垫221-2同样可达1个周长。同样的,在本实施方式中,第一间格距离以及第二间隔距离可以相同或不相同,没有固定的限制。In addition, the impedance adjustment wire 222-1 surrounds the periphery of the bonding pad 221-1, and is arranged under the condition that there is a first separation distance from the periphery of the bonding pad 221-1. In the embodiment of FIG. 2B, the impedance adjustment wire 222-1 surrounds the pad 221-1 for 1 circumference. On the other hand, the impedance adjusting wire 222-2 surrounds the periphery of the bonding pad 221-2 and is disposed with a second spacing distance from the periphery of the bonding pad 221-2. In the embodiment of FIG. 2B , the impedance adjustment wire 222-2 can also surround the bonding pad 221-2 up to one circumference. Likewise, in this embodiment, the first grid distance and the second spacing distance may be the same or different, and there is no fixed limit.
以下请参照图3,图3示出本发明实施例的布局结构的另一实施方式的示意图。布局结构300包括焊垫311、阻抗调整导线312以及信号传输线313。在本实施方式中,焊垫311以及阻抗调整导线312可设置在电路板的不同表面上。Please refer to FIG. 3 below. FIG. 3 shows a schematic diagram of another implementation manner of the layout structure according to the embodiment of the present invention. The
基于焊垫311以及阻抗调整导线312设置在电路板的不同表面上,阻抗调整导线312可依据焊垫311的轮廓在电路板的第二表面上的垂直投影进行布局。在本实施方式中,阻抗调整导线312可至少部分与焊垫311的轮廓相互重叠。阻抗调整导线312的长度,可以为焊垫311的周长的1/4、1/2、3/4或与焊垫311的周长实质上相等。Based on the
通过本实施方式的布局方法,可以有效减低阻抗调整导线312以及焊垫311所需的布局面积。With the layout method of this embodiment, the layout area required for the
附带一提的,在本实施方式中,阻抗调整导线312以及信号传输线313可以布局在电路板的相同表面上,或分别设置在电路板的不同表面上,没有特定的限制。当阻抗调整导线312以及信号传输线313布局在电路板的不同表面上时,阻抗调整导线312以及信号传输线313可以通过导电通孔以相互电连接。Incidentally, in this embodiment, the
以下请参照图4,图4示出依据本发明实施例的布局结构所测量的时间区域反射法(Time Domain Reflectometry,TDR)波形图。其中,图4的时间区域反射法可依据输入信号为具有25皮秒的方波信号来进行测量。曲线410表示没有加入阻抗调整导线时的时间区域反射曲线;曲线420表示加入环绕焊垫半圈的阻抗调整导线时的时间区域反射曲线;曲线430表示加入环绕焊垫1/4圈的阻抗调整导线时的时间区域反射曲线。以规格SPC被设定在介于70~93欧姆为范例,在传输阻抗产生变动时,依据曲线410,在没有加入阻抗调整导线的条件下,传输阻抗最低可下降至58欧姆并远低于规格SPC;依据曲线420,在加入半圈阻抗调整导线的条件下,传输阻抗可变动至75欧姆并满足规格SPC的要求;依据曲线430,在加入1/4圈阻抗调整导线的条件下,传输阻抗可变动至70欧姆并仍可满足规格SPC的要求。Please refer to FIG. 4 below. FIG. 4 shows a waveform diagram of Time Domain Reflectometry (TDR) measured by a layout structure according to an embodiment of the present invention. Wherein, the time-area reflection method in FIG. 4 can be measured according to the input signal being a square wave signal with 25 picoseconds.
以下请参照图5,图5示出本发明一实施例的电路板结构的示意图。电路板结构500包括电路板510以及520。电路板510上可承载集成电路IC1、IC2。集成电路IC1、IC2可以被设置在电路板510的任意表面上,没有固定的限制。电路板510上并具有布局结构511。布局结构511连接至集成电路IC2,并用以与集成电路IC2进行信号的收发动作。布局结构511可如图1至图3的多个实施例来建构,在此不多赘述。Please refer to FIG. 5 below. FIG. 5 shows a schematic diagram of a circuit board structure according to an embodiment of the present invention. The
布局结构511中具有焊垫5111,焊垫5111可电连接至导电通孔VIA。通过导电通孔VIA,电路板510、520间可以相互电连接。The
另外,本实施例中的电路板520上也可承载或不承载集成电路。设计者可以依据需求自行进行设定,并没有特殊的限制。In addition, the
请参照图6,图6示出本发明实施例的高速传输接口的传输结构的示意图。在图6中,焊垫611、导电通孔621以及焊垫631用以形成第一导线结构以传输一第一信号,焊垫612、导电通孔622以及焊垫632用以形成第二导线结构以传输一第二信号,其中第一信号与第二信号互为差动信号。焊垫611、焊垫612可以设置在相同的第一电路板上,焊垫621、焊垫622则可以设置在相同的第二电路板上,其中的第一电路板与第二电路板不相同。Please refer to FIG. 6 , which is a schematic diagram illustrating a transmission structure of a high-speed transmission interface according to an embodiment of the present invention. In FIG. 6, the
在本实施例中,以第一导线结构为例,第一导线结构具有自感L11,并具有与第二导线结构间所产生的互感L12。第一导线结构上并具有自容C11,以及与第二导线结构间所产生的互容C22。In this embodiment, taking the first wire structure as an example, the first wire structure has a self-inductance L11 and a mutual inductance L12 with the second wire structure. The first wire structure also has a self-capacitance C11 and a mutual capacitance C22 with the second wire structure.
通过本发明实施例中,设置至少部分环绕焊垫的阻抗调整导线,自感L11可以被增加。另外,互感L12以及互容C12可以被减低并降低信号在传输线间交互偶和的电场与磁场。本发明实施例并通过至少部分环绕焊垫的阻抗调整导线来产生一电感性路径以补偿多层电路板堆栈结构所产生的大的电路(例如自容C11)。其中,本实施例中的第一导线结构与第二导线结构间的阻抗差Zdiff可表示如下:By arranging impedance adjustment wires at least partially surrounding the pads in the embodiments of the present invention, the self-inductance L11 can be increased. In addition, the mutual inductance L12 and the mutual capacitance C12 can be reduced and reduce the electric and magnetic fields of the signal interaction between the transmission lines. Embodiments of the present invention create an inductive path to compensate for large circuits (eg, self-capacitance C11 ) generated by a multilayer circuit board stack structure by at least partially encircling the impedance-adjusting wires of the pads. The impedance difference Zdiff between the first wire structure and the second wire structure in this embodiment can be expressed as follows:
综上所述,本发明提出的电路板布局结构,通过在焊垫以及信号传输线间设置阻抗调整导线。并通过使阻抗调整导线沿焊垫的周围进行设置,且部分环绕焊垫的方式进行布局,可减低信号传输过程所可能产生的反射现象,有效提升信号传输的质量。To sum up, in the circuit board layout structure proposed by the present invention, impedance adjustment wires are arranged between the pads and the signal transmission lines. By setting the impedance adjustment wires along the periphery of the pad, and laying out the layout in a way of partially surrounding the pad, the reflection phenomenon that may be generated during the signal transmission process can be reduced, and the quality of the signal transmission can be effectively improved.
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features thereof can be equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present invention. scope.
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