CN115086214B - System and method for detecting set, electronic equipment and storage medium - Google Patents
System and method for detecting set, electronic equipment and storage medium Download PDFInfo
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- 238000004891 communication Methods 0.000 claims abstract description 60
- 238000012795 verification Methods 0.000 claims abstract description 48
- 230000006870 function Effects 0.000 claims description 15
- 238000004590 computer program Methods 0.000 claims description 12
- 230000009977 dual effect Effects 0.000 description 6
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/08—Network architectures or network communication protocols for network security for authentication of entities
Abstract
The embodiment of the application provides a system, a method, electronic equipment and a storage medium for detecting a set of chips, which are applied to the technical field of chips, wherein the system for detecting the set of chips comprises a set of chips and a functional module, and the set of chips comprises a chip A and a chip B; the function module is used for configuring the chip A into a server working mode and configuring the chip B into a client working mode; the chip B is used for sending a connection request containing verification information to the chip A in a client working mode; the chip A is used for receiving a connection request in a server working mode and verifying verification information; when the verification is passed, creating a communication connection with the chip B; and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through communication connection. By the scheme of the embodiment of the application, communication connection can be established, and chip detection information is sent according to the communication connection so as to realize detection of chips in the set.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a system and method for detecting a set of chips, an electronic device, and a storage medium.
Background
Currently, in the backbone network and the core network, in order to improve the throughput rate and the forwarding rate of the network, core routers or high-end router clusters are adopted. In these cluster devices, a plurality of network chips are often integrated into a set of chips, and data is processed through a plurality of chips included in the set of chips, so that processing efficiency is improved.
However, because the network chip integrated in the current set is various in form and the connection form between the sets is also various, the communication connection in the set is very complex to create in the set detection process, and the detection information is difficult to send.
Disclosure of Invention
An object of the embodiments of the present application is to provide a system, a method, an electronic device, and a storage medium for detecting a set of pieces, so as to solve a problem that sending of detection information is difficult in detecting a set of pieces. The specific technical scheme is as follows:
in a first aspect of an embodiment of the present application, a set detection system is provided, including a set and a functional module, where the set includes a chip a and a chip B;
the functional module is used for configuring the chip A into a server working mode and configuring the chip B into a client working mode;
the chip B is used for sending a connection request containing verification information to the chip A in a client working mode;
the chip A is used for receiving the connection request in a server working mode and verifying the verification information; when the verification is passed, creating a communication connection with the chip B; and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through the communication connection.
Optionally, the chip a is further configured to identify a header of the first chip detection information, where the first chip detection information is received chip detection information sent by the chip B or chip detection information sent to the chip B, and the header includes data positions corresponding to interface information and target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
the chip B is further used for identifying a header of second chip detection information, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
Optionally, the verification information is an IP address of a server where the chip a is located;
the functional module is also used for acquiring the IP address of the server where the chip A is located; the IP address of the server where the chip A is located is sent to the chip B;
the chip B is specifically configured to send a connection request including an IP address of a server where the chip A is located to the chip A;
the chip A is used for receiving the connection request and verifying the IP address of the server where the chip A is located; when the verification passes, a communication connection with the chip B is created.
Optionally, the functional module is specifically configured to execute a compiling instruction sent by each of the chip a and the chip B, where the compiling instruction is an instruction for compiling a startup program of each of the chip a and the chip B; after the compiling instructions sent by the chip A and the chip B are executed, starting the chip A and acquiring the IP address of the server where the chip A is located.
In a second aspect of the embodiments of the present application, a method for detecting a set of chips is provided, where the system includes a set of chips and a functional module, and the set of chips includes a chip a and a chip B;
the method comprises the following steps:
the chip A is configured into a server working mode through the functional module, and the chip B is configured into a client working mode;
transmitting a connection request containing verification information to the chip A through the chip B in a client working mode;
receiving the connection request through the chip A in a server working mode, and verifying the verification information;
when the verification is passed, creating a communication connection between the chip A and the chip B through the chip A;
and receiving chip detection information sent by the chip B through the chip A or chip detection information sent to the chip B by utilizing the communication connection.
Optionally, after receiving, by the chip a, the chip detection information sent by the chip B or the chip detection information sent to the chip B by using the communication connection, the method further includes:
identifying a header of first chip detection information through the chip A, wherein the first chip detection information is the received chip detection information sent by the chip B or the chip detection information sent to the chip B, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
identifying a header of second chip detection information by the chip B, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
Optionally, the verification information is an IP address of a server where the chip a is located; the sending, by the chip B, a connection request including authentication information to the chip a in a client working mode includes:
acquiring an IP address of a server where the chip A is located through the functional module, and sending the IP address of the server where the chip A is located to the chip B;
sending a connection request containing the IP address of the server where the chip A is located to the chip A through the chip B in a client working mode;
the receiving, by the chip a, the connection request, and verifying the verification information, including:
and receiving the connection request through the chip A, and verifying the IP address of the server where the chip A in the connection request is located.
Optionally, before the acquiring, by the functional module, the IP address of the server where the chip a is located and sending the IP address of the server where the chip a is located to the chip B, the method further includes:
executing compiling instructions sent by the chip A and the chip B respectively through the functional module, wherein the compiling instructions refer to instructions for compiling starting programs of the chip A and the chip B respectively;
after the compiling instructions sent by the chip A and the chip B are executed, starting the chip A and acquiring the IP address of the server where the chip A is located.
In another aspect of the embodiments of the present application, an electronic device is provided, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;
a memory for storing a computer program;
and the processor is used for realizing any set of slice detection method when executing the program stored in the memory.
In another aspect of the embodiments of the present application, a computer readable storage medium is provided, in which a computer program is stored, the computer program implementing any one of the set of slice detection methods described above when executed by a processor.
Embodiments of the present application also provide a computer program product comprising instructions which, when run on a computer, cause the computer to perform any of the set of slice detection methods described above.
The beneficial effects of the embodiment of the application are that:
the embodiment of the application provides a set detection system, a set detection method, electronic equipment and a storage medium, wherein the set detection system comprises a set and a functional module, and the set comprises a chip A and a chip B; the functional module is used for configuring the chip A into a server working mode and configuring the chip B into a client working mode; the chip B is used for sending a connection request containing verification information to the chip A in a client working mode; the chip A is used for receiving the connection request in a server working mode and verifying the verification information; when the verification is passed, creating a communication connection with the chip B; and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through the communication connection. Therefore, through the scheme of the embodiment of the application, the chip A and the chip B in the sleeve sheet are configured in a working mode only through the functional module, so that the chip A and the chip B send and verify the verification information in the corresponding working modes, and when the verification is passed, the communication connection is established, and the chip detection information can be sent according to the communication connection, so that the detection of the chip in the sleeve sheet is realized.
Of course, not all of the above-described advantages need be achieved simultaneously in practicing any one of the products or methods of the present application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other embodiments may also be obtained according to these drawings to those skilled in the art.
Fig. 1 is a schematic structural diagram of a die detection system according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an example of a tile inspection system according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart of a method for detecting a set of chips according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. Based on the embodiments herein, a person of ordinary skill in the art would be able to obtain all other embodiments based on the disclosure herein, which are within the scope of the disclosure herein.
First, terms of art that may be used in the embodiments of the present application will be explained:
EDA verification/simulation: EDA refers to Electronic Design Assistance, which refers specifically to verification work performed using server resources and simulation tools in chip verification.
TB: the abbreviation of Test Bench represents the EDA verification platform of a certain chip, subsystem or module.
In a first aspect of the embodiments of the present application, a die set detection system is provided, referring to fig. 1, including a die set 101 and a functional module 102, where the die set includes a chip a and a chip B;
a functional module 102, configured to configure a chip a as a server operation mode and a chip B as a client operation mode;
the chip B is used for sending a connection request containing verification information to the chip A in a client working mode;
the chip A is used for receiving a connection request in a server working mode and verifying verification information; when the verification is passed, creating a communication connection with the chip B; and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through communication connection.
In this embodiment of the present application, the functional module may be a common module independent of the set. The chip a and the chip B may be any one of the chips, for example, when two chips exist in the chip set in the embodiment of the present application, any one of the chips may be the chip a, and in the case that the chip is the chip a, the other is the chip B, and the two chips may be connected by a common module, for example, the chip a and the chip B may be connected by a Socket form. The function module 102 configures the chip a as a server operation mode, configures the chip B as a client operation mode, and may configure itself as a server operation mode by calling the function module for the chip a, and configures itself as a client operation mode by calling the function module for the other chip. For example, the functional module is SOCKET C FUNCTION, and the set includes a chip a (TB a) and a chip B (TB B), where the TB a configures itself into a server (server) working mode by calling a common SOCKET C FUNCTION, and the TB B calls a common SOCKET C FUNCTION and configures itself into a client (client) working mode.
After the functional module 102 configures the chip a to be in the server working mode and configures the chip B to be in the client working mode, compiling and starting may be performed on the two chips respectively. After the start-up, the chip B sends a connection request containing authentication information to the chip a in the client operation mode, where the authentication information may be predetermined information that the chip a can perform authentication, for example, may be an IP (Internet Protocol ) address of a server where the chip a is located, or other preset information.
The chip A receives a connection request in a server working mode, verifies the verification information, can judge whether the verification information is correct or not according to the information acquired in advance, and if so, passes the verification. For example, when the verification information is the IP address of the server where the chip a is located, the chip a may acquire the IP address of the server where the chip a is located, and then match the IP address with the verification information, and if the IP address matches, the verification is passed. Chip a creates a communication connection with chip B when the verification passes, and may create a bi-directional data-transceiving connection. For example, when the TB a works as a server working mode, a connection relationship is established when the TB B sends a request as a client working mode, and the TB B obtains an IP address of a server where the TB a is located as the client working mode, packages the IP address, generates a Socket packet, and sends a connection request including the packet to the TB a; when the TB A receives the request of the TB B, judging whether the IP address is legal or not, and if the IP address is legal and the port numbers are matched, establishing double TB communication.
The chip detection in the embodiment of the application may refer to testing performance, voltage, temperature, and the like of the chip. The chip detection information may be information for performing chip detection, for example, when a read-write function of a chip is tested, a read-write instruction for testing the function is sent, then the test chip performs a write operation of a certain information according to a read-write result of the read-write instruction, for example, a write instruction is sent to the chip, and then the read instruction is sent to read the written information, so that the read-write function is detected according to the read information.
Therefore, through the system of the embodiment of the application, the functional module can configure the working modes of the chip A and the chip B in the set, so that the chip A and the chip B can send and verify the verification information in the corresponding working modes, and when the verification is passed, the communication connection is established, so that the chip detection information is sent according to the communication connection, and the detection of the chip in the set is realized.
Optionally, the chip a is further configured to identify a header of the first chip detection information, where the first chip detection information is the received chip detection information sent by the chip B or the chip detection information sent to the chip B, and the header includes data positions corresponding to the interface information and the target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
the chip B is also used for identifying a header of second chip detection information, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
In this embodiment of the present application, after the communication connection of the dual TB is established successfully, normal data transmission and reception can be performed, where the data transmission and reception support a duplex mode, and the chip a and the chip B can simultaneously transmit and receive data. The chips A and B can preset the corresponding headers of different types of information, the headers comprise the length of the received chip detection information and the data position of the target detection data, and each chip can extract and classify the target data according to the headers after receiving the information. In the practical use process, each chip may include a plurality of interfaces, different headers may be set for different interfaces, for example, the headers include the length of the chip detection information and the data position of the target detection data, and corresponding interface information, for example, a Header is built for each Socket data, and the position and length of each data are specified in the Header, so that data extraction and classification are performed according to the Header, and when data searching is performed, searching is performed according to the category to which the data belongs in the classification result.
Therefore, through the system of the embodiment of the application, the corresponding header can be set for different information, so that the extraction and classification of the data according to the header are facilitated, and the extraction and identification efficiency of the data is improved.
Optionally, the verification information is an IP address of a server where the chip a is located;
the functional module is also used for acquiring the IP address of the server where the chip A is located; the IP address of the server where the chip A is located is sent to the chip B;
the chip B is specifically used for sending a connection request containing the IP address of the server where the chip A is located to the chip A;
the chip A is used for receiving the connection request and verifying the IP address of the server where the chip A is positioned; when the verification passes, a communication connection with chip B is created.
Optionally, the functional module is specifically configured to execute a compiling instruction sent by each of the chip a and the chip B, where the compiling instruction is an instruction for compiling a starting program of each of the chip a and the chip B; after the compiling instructions sent by the chip A and the chip B are executed, the chip A is started and the IP address of the server where the chip A is located is obtained.
In this embodiment of the present application, after the working modes of the chip a and the chip B are configured, a Python script may be used to execute the compiling command of the two chips, wait for the compiling of the two chips to complete, execute the command of running the chip a first, obtain the IP address of the server where the chip a is located at the same time, execute the command of running the chip B, and transmit the IP address into the chip B.
In order to illustrate the solution of the embodiment of the present application, the following description will be made with reference to the specific embodiment, referring to fig. 2, where the left side of the figure is a chip TB a, the right side is a TB B, and two TBs are connected by Socket, where the TB a serves as a server of the Socket, the TB B serves as a client of the Socket, and SOCKET C FUNCTION manages the module in a common module, and the two TBs multiplex the module. The DC (Data Classification) classifies data received and transmitted by the Socket according to interfaces, is convenient for management and application of the data on different interfaces, supports a full duplex mode in a communication mode, and respectively indicates different interfaces, DUT A and DUT B indicate different to-be-tested originals, and FUN CALL indicates function CALL.
The implementation details of the technical scheme are as follows:
1. creation of dual TB communication: two independent TB platforms are created, wherein one TB calls a common Socket CFunit (SOCKET C FUN, common module) to configure itself into a server working mode, and the other TB calls a common Socket C Function to configure itself into a client working mode.
2. Initiation of dual TB communication: and firstly executing compiling commands of two TBs by using a Python script, waiting for the completion of the compiling of the two TBs, firstly executing a command for running the TB A, acquiring an IP address of a server where the TB A is located, then executing a command for running the TB B, and transmitting the acquired IP address of the server where the TB A is located into the TB B.
3. Establishment of dual TB communication: the method comprises the steps that a TB A is used as a server, a request is sent by a client to establish a connection relationship, a TB B is used as the client, the IP address of the server where the TB A is located is obtained, the IP address is packed, a Socket data packet is generated, and the connection request is sent to the TB A; once the TB a receives the request of the TB B, it is determined whether the IP address is legal, and if it is legal and the port number matches, the dual TB communication is established.
4. Use of dual TB communication: after the communication connection of the double TB is established successfully, normal data receiving and transmitting can be carried out, and the data receiving and transmitting support a duplex mode. Since there are data of a plurality of interfaces, it is necessary to classify and manage the data. And establishing a Header for each piece of Socket data, and designating the position and the length of each piece of data in the Header, so that the receiving end can conveniently extract and classify the data.
In a second aspect of the embodiment of the present application, a method for detecting a set of chips is provided, where the set of chips includes a set of chips and a functional module, and the set of chips includes a chip a and a chip B;
referring to fig. 3, the method includes:
step S31, configuring a chip A as a server working mode and a chip B as a client working mode through a functional module;
step S32, a connection request containing verification information is sent to the chip A through the chip B in a client working mode;
step S33, receiving a connection request through the chip A in a server working mode, and verifying the verification information;
step S34, when the verification is passed, communication connection between the chip A and the chip B is created through the chip A;
in step S35, the chip a receives the chip detection information sent by the chip B or the chip detection information sent to the chip B by using the communication connection.
Optionally, after receiving, by the chip a, the chip detection information sent by the chip B or the chip detection information sent to the chip B, using the communication connection, the method further includes:
identifying a header of first chip detection information through the chip A, wherein the first chip detection information is the received chip detection information sent by the chip B or the chip detection information sent to the chip B, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
identifying a header of second chip detection information through the chip B, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
Optionally, the verification information is an IP address of a server where the chip a is located; sending, by the chip B, a connection request including authentication information to the chip a in a client operation mode, including:
the IP address of the server where the chip A is located is obtained through the functional module, and the IP address of the server where the chip A is located is sent to the chip B;
sending a connection request containing the IP address of the server where the chip A is located to the chip A through the chip B in a client working mode;
receiving a connection request through the chip A and verifying the verification information, wherein the method comprises the following steps:
and receiving a connection request through the chip A, and verifying the IP address of the server where the chip A is located in the connection request.
Optionally, before the function module obtains the IP address of the server where the chip a is located and sends the IP address of the server where the chip a is located to the chip B, the method further includes:
executing compiling instructions sent by the chip A and the chip B respectively through the functional module, wherein the compiling instructions refer to instructions for compiling starting programs of the chip A and the chip B respectively;
after the compiling instructions sent by the chip A and the chip B are executed, the chip A is started and the IP address of the server where the chip A is located is obtained.
Therefore, by the method of the embodiment of the application, the functional module can configure the working modes of the chip A and the chip B in the set, so that the chip A and the chip B can send and verify the verification information in the corresponding working modes, and when the verification is passed, the communication connection is established, so that the chip detection information is sent according to the communication connection, and the detection of the chip in the set is realized.
The embodiment of the present application further provides an electronic device, as shown in fig. 4, including a processor 401, a communication interface 402, a memory 403, and a communication bus 404, where the processor 401, the communication interface 402, and the memory 403 complete communication with each other through the communication bus 404,
a memory 403 for storing a computer program;
the processor 401, when executing the program stored in the memory 403, implements the following steps:
the chip A is configured into a server working mode through a functional module, and the chip B is configured into a client working mode;
sending a connection request containing verification information to the chip A through the chip B in a client working mode;
receiving a connection request through the chip A in a server working mode, and verifying verification information;
when the verification is passed, creating communication connection between the chip A and the chip B;
and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through communication connection.
The communication bus mentioned above for the electronic devices may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc. The communication bus may be classified as an address bus, a data bus, a control bus, or the like. For ease of illustration, the figures are shown with only one bold line, but not with only one bus or one type of bus.
The communication interface is used for communication between the electronic device and other devices.
The Memory may include random access Memory (Random Access Memory, RAM) or may include Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor.
The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but also digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
In yet another embodiment provided herein, there is also provided a computer readable storage medium having stored therein a computer program which when executed by a processor implements the steps of any of the set of slice detection methods described above.
In yet another embodiment provided herein, there is also provided a computer program product containing instructions that, when run on a computer, cause the computer to perform any of the set of tile detection methods of the above embodiments.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another, for example, by wired (e.g., coaxial cable, optical fiber, digital Subscriber Line (DSL)), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), etc.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for method, electronic device, storage medium, i.e. computer program product embodiments, the description is relatively simple, as it is substantially similar to system embodiments, as relevant see also part of the description of method embodiments.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application. Any modifications, equivalent substitutions, improvements, etc. that are within the spirit and principles of the present application are intended to be included within the scope of the present application.
Claims (8)
1. The chip set detection system is characterized by comprising a chip set and a functional module, wherein the chip set comprises a chip A and a chip B;
the functional module is used for configuring the chip A into a server working mode and configuring the chip B into a client working mode; the method is also used for acquiring the IP address of the server where the chip A is located; the IP address of the server where the chip A is located is sent to the chip B;
the chip B is used for sending a connection request containing the IP address of the server where the chip A is located to the chip A in a client working mode;
the chip A is used for receiving the connection request in a server working mode and verifying the IP address of the server where the chip A is located; when the verification is passed, creating a communication connection with the chip B; and receiving the chip detection information sent by the chip B or the chip detection information sent to the chip B through the communication connection.
2. The system of claim 1, wherein the system further comprises a controller configured to control the controller,
the chip A is further used for identifying a header of first chip detection information, wherein the first chip detection information is received chip detection information sent by the chip B or chip detection information sent to the chip B, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
the chip B is further used for identifying a header of second chip detection information, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
3. The system of claim 1, wherein the system further comprises a controller configured to control the controller,
the functional module is specifically configured to execute a compiling instruction sent by each of the chip a and the chip B, where the compiling instruction refers to an instruction for compiling a startup program of each of the chip a and the chip B; after the compiling instructions sent by the chip A and the chip B are executed, starting the chip A and acquiring the IP address of the server where the chip A is located.
4. The method for detecting the set of chips is characterized by being applied to a set of chip detection system, wherein the system comprises a set of chips and a functional module, and the set of chips comprises a chip A and a chip B;
the method comprises the following steps:
the chip A is configured into a server working mode through the functional module, and the chip B is configured into a client working mode; acquiring an IP address of a server where the chip A is located through the functional module; the IP address of the server where the chip A is located is sent to the chip B;
sending a connection request containing the IP address of the server where the chip A is located to the chip A through the chip B in a client working mode;
receiving the connection request through the chip A in a server working mode, and verifying the IP address of the server where the chip A is located;
when the verification is passed, creating a communication connection between the chip A and the chip B through the chip A;
and receiving chip detection information sent by the chip B through the chip A or chip detection information sent to the chip B by utilizing the communication connection.
5. The method of claim 4, wherein after receiving the chip detection information transmitted by the chip B through the chip a or the chip detection information transmitted to the chip B using the communication connection, the method further comprises:
identifying a header of first chip detection information through the chip A, wherein the first chip detection information is the received chip detection information sent by the chip B or the chip detection information sent to the chip B, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the first chip detection information, and extracting target data in the first chip detection information according to the data position;
or alternatively, the first and second heat exchangers may be,
identifying a header of second chip detection information by the chip B, wherein the second chip detection information is the received chip detection information sent by the chip A or the chip detection information sent to the chip A, and the header comprises data positions corresponding to interface information and target detection data; classifying according to the second chip detection information, and extracting target data in the second chip detection information according to the data position.
6. The method of claim 4, wherein before the function module obtains the IP address of the server where the chip a is located and sends the IP address of the server where the chip a is located to the chip B, the method further comprises:
executing compiling instructions sent by the chip A and the chip B respectively through the functional module, wherein the compiling instructions refer to instructions for compiling starting programs of the chip A and the chip B respectively;
after the compiling instructions sent by the chip A and the chip B are executed, starting the chip A and acquiring the IP address of the server where the chip A is located.
7. The electronic equipment is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus;
a memory for storing a computer program;
a processor for implementing the method of any of claims 4-6 when executing a program stored on a memory.
8. A computer readable storage medium, characterized in that the computer readable storage medium has stored therein a computer program which, when executed by a processor, implements the method of any of claims 4-6.
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