CN115078290A - Gas sensor chip suitable for NDIR principle and preparation method thereof - Google Patents
Gas sensor chip suitable for NDIR principle and preparation method thereof Download PDFInfo
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- G01N21/35—Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light
- G01N21/3504—Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing gases, e.g. multi-gas analysis
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Abstract
The invention provides a gas sensor chip suitable for NDIR principle and a preparation method thereof, wherein a micro convex lens and an NDIR infrared gas sensor chip are integrated in the chip manufacturing process, so that the micro convex lens can well gather the energy of infrared light in the sensitive area of an infrared detection chip, the output of the chip is improved, and the gas detection sensitivity of the whole sensor is improved, and the gas sensor chip is characterized in that: the chip comprises a chip body and a micro convex lens, wherein the chip body and the micro convex lens are fixed together through an optical adhesive, and the arc surface of the micro convex lens is positioned above a black light absorption layer of the chip body.
Description
Technical Field
The invention relates to the related technical field of gas sensors, in particular to a gas sensor chip suitable for an NDIR principle and a preparation method thereof.
Background
The gas sensor may be classified into a semiconductor sensor, an electrochemical gas sensor, an NDIR (non-dispersive infrared) gas sensor, a solid electrolyte gas sensor, a combustion gas sensor, an optical waveguide sensor, and the like in terms of operation principle. At present, a metal oxide semiconductor sensor and a solid electrolyte sensor occupy most markets of gas sensors, but both the metal oxide semiconductor sensor and the solid electrolyte sensor need to work at higher temperature, and have the problems of high power consumption, low sensitivity, poor anti-interference capability and inconvenient use. NDIR gas sensors have many advantages: high precision, good selectivity, difficult poisoning, long service life, wide measuring range, strong anti-interference capability and the like.
The NDIR gas sensor is a high-cost-performance gas concentration detection system which is based on the Lambert-beer law of infrared absorption of gas and formed by a high-sensitivity infrared detector, an electric modulation infrared light source, a gas chamber, an amplifying circuit, an A/D (analog/digital) converter and a microprocessor. The basic working process is as follows: the method comprises the steps of directly introducing gas to be detected into a gas chamber, detecting changes before and after light intensity by using an infrared detector when infrared light emitted by an infrared light source passes through the gas chamber, detecting the intensity of the infrared light when the gas to be detected is not introduced, detecting the intensity of the infrared light when the gas to be detected is introduced, and determining the concentration of the gas to be detected by calculating the difference of the light intensity before and after the detection.
In order to better detect light intensity, a high-sensitivity infrared detector generally mounts a convex lens on an infrared detection chip to focus infrared light. In the prior art, the convex lens is coupled and installed on the infrared detection chip when the NDIR gas sensor is assembled, and the convex lens cannot well gather the energy of infrared light in the sensitive area of the infrared detection chip due to deviation in the coupling process, so that the gas detection sensitivity of the whole sensor is reduced.
Disclosure of Invention
In order to solve the problems mentioned above, the invention provides a gas sensor chip suitable for the NDIR principle and a preparation method thereof, wherein a micro convex lens and the NDIR gas sensor chip are integrated in the chip manufacturing process, so that the micro convex lens can well gather the energy of infrared light in the sensitive area of an infrared detection chip, the output of the chip is improved, and the gas detection sensitivity of the whole sensor is further improved.
The technical scheme is as follows:
a gas sensor chip adapted to NDIR principle, characterized by: the chip comprises a chip body and a micro convex lens, wherein the chip body and the micro convex lens are fixed together through an optical adhesive, and the arc surface of the micro convex lens is positioned above a black light absorption layer of the chip body.
Further, the chip body comprises a substrate, and a supporting layer is arranged on the upper surface of the substrate;
the support layer is provided with a thermocouple stack and an electrode PAD; the thermocouple stack comprises a plurality of thermocouple pairs, each thermocouple pair sequentially comprises an upper metal aluminum thermocouple, a silicon oxide layer and a lower N-type polycrystalline silicon thermocouple from top to bottom, the lower N-type polycrystalline silicon thermocouple and the upper metal aluminum thermocouple of the adjacent thermocouple pair are connected through a cold end connecting through hole close to a cold end, and the upper metal aluminum thermocouple and the lower N-type polycrystalline silicon thermocouple of the same thermocouple pair are connected through a hot end connecting through hole close to a hot end;
the upper surface of the thermocouple stack is provided with a top oxidation layer, the upper surface of the top oxidation layer is provided with a silicon nitride absorption passivation layer, and the silicon nitride absorption passivation layer is connected with the metal aluminum upper thermocouple through a heat conduction through hole close to the hot end;
and a black light absorption layer is arranged on the upper surface of the silicon nitride absorption passivation layer at the hot end.
Further, the supporting layer sequentially comprises a first silicon oxide supporting layer, a silicon nitride supporting layer and a second silicon oxide supporting layer from bottom to top.
Further, the upper surface of the electrode PAD is exposed.
Further, the surface of the black light absorbing layer is roughened to form a surface roughened black light absorbing layer.
Furthermore, a back surface release cavity is arranged at the hot end of the substrate, and four sides of the etched graph of the back surface release cavity are subjected to fillet treatment.
The invention also provides a preparation method of the gas sensor chip suitable for the NDIR principle, which is characterized by comprising the following steps of: comprises the following steps of (a) carrying out,
step 1, preparing a micro convex lens;
step 2, preparing a chip body;
and step 3, integrating the chip body and the micro convex lens.
Further, the step 1 specifically includes:
step 1-1, cleaning a P-type double polished silicon wafer, and thinning the P-type double polished silicon wafer;
step 1-2, spin-coating a layer of photoresist with the thickness of 1-50 um on the upper surface of the silicon wafer;
step 1-3, forming regularly arranged micro cylindrical photoresist on the surface of a silicon wafer through exposure and development processes under the constraint of a circular hole photoetching mask plate;
step 1-4, inverting the silicon wafer, fixing the silicon wafer above a heating plate through a support frame, and baking to enable the micro cylindrical photoresist to automatically melt and flow under the action of surface tension to form a micro lens structure with an arc or a near-arc outline, wherein the baking temperature range is 100-250 ℃, and the time is as follows: 0.5-3 h;
1-5, completing pattern transfer of the silicon micro-lens by reactive ion etching to form a micro-lens array structure;
and 1-6, forming a micro-lens array structure with a back cavity on the back of the silicon wafer through photoetching and dry etching processes.
Further, the step 2 specifically includes:
2-1, cleaning the P-type double polished silicon wafer, and thinning;
step 2-2, taking the silicon wafer as a substrate, depositing a first silicon oxide supporting layer with the thickness of 0.1-5 um on the upper surface of the substrate by a thermal oxidation process, and depositing a silicon nitride supporting layer with the thickness of 0.01-0.5 um and a second silicon oxide supporting layer with the thickness of 0.01-0.5 um on the upper surface of the first silicon oxide supporting layer by utilizing front low-pressure chemical vapor deposition;
2-3, sputtering a layer of polycrystalline silicon with the thickness of 0.1-5 um on the upper surface of the second silicon dioxide supporting layer by using a plasma enhanced chemical vapor deposition process, doping by using an ion implantation and diffusion method to form an N-type polycrystalline silicon semiconductor, and performing photoetching and patterning to form an N-type polycrystalline silicon lower-layer thermocouple; manufacturing a silicon oxide layer with the thickness of 0.05-0.5 um on the upper surface of the lower thermocouple of the N-type polycrystalline silicon, and finally photoetching to respectively form a cold end connecting through hole and a hot end connecting through hole;
step 2-4, performing metal magnetron sputtering on the upper surface of the silicon oxide layer to deposit a layer of aluminum with the thickness of 0.01-10 um, performing photoetching and patterning to form an upper-layer thermocouple of the metal aluminum, and simultaneously performing electric connection to form a connecting lead structure and an electrode PAD, wherein the upper-layer thermocouple of the metal aluminum is connected with the lower-layer thermocouple of the N-type polycrystalline silicon through a hot end connecting through hole close to the hot end, and the lower-layer thermocouple of the N-type polycrystalline silicon is connected with the upper-layer thermocouple of the metal aluminum of the adjacent thermocouple pair through a cold end connecting through hole close to the cold end; depositing a layer of silicon oxide with the thickness of 0.01-10 um by a plasma enhanced chemical vapor deposition method to be used as a top oxide layer; then, photoetching the top oxide layer at the hot end until the thermocouple on the upper layer of the metal aluminum is formed, and forming a heat conduction through hole at the hot end;
2-5, depositing a silicon nitride absorption passivation layer with the thickness of 0.01-10 um on the top by a plasma enhanced chemical vapor deposition method, covering the thermal conduction through hole, communicating the silicon nitride absorption passivation layer on the top with the hot end, and forming a thermal conduction layer; spin coating the upper surface of the silicon nitride absorption passivation layer to form a black photoresist light absorption layer with the thickness of 0.5-3um, and etching the black photoresist light absorption layer by utilizing photoetching patterning to form the black light absorption layer only in the hot end distribution; exposing the electrode PAD;
and 2-6, roughening the black light absorption layer by utilizing reactive ion etching to form a roughened black light absorption layer on the surface, finally, carrying out back cavity etching on the substrate by utilizing deep silicon etching, forming a back release cavity at the position of the central hot end of the chip body, and carrying out fillet treatment on four sides of an etched pattern of the back release cavity.
Further, the step 3 specifically includes:
step 3-1, ultra-precision polishing is carried out on the bonding surfaces of the micro convex lens and the chip body, wherein the bonding surface of the micro convex lens is the reverse surface relative to the lens surface, and the bonding surface of the chip body is a heat-sensitive surface;
step 3-2, carrying out constant temperature treatment on the micro convex lens and the chip body;
step 3-3, cleaning the micro convex lens and the chip body;
and 3-4, combining the micro convex lens and the chip body through an optical adhesive, and then coating a thin layer of photosensitive adhesive on the outer side of the contact edge of the bonding surface.
The beneficial effects of the invention are as follows:
1. according to the invention, the micro convex lens and the NDIR gas sensor chip are integrated in the chip manufacturing process, so that system chip-level integration is realized, and the deviation caused by coupling in the device assembling stage is overcome, so that the micro convex lens can well gather the energy of infrared light in the sensitive area of the infrared detection chip, the chip output is improved, and the gas detection sensitivity of the whole sensor is further improved.
2. According to the invention, the thermal conduction through hole is formed at a position close to the hot end, and the silicon nitride absorption passivation layer is directly connected with the metal aluminum upper-layer thermocouple to form the thermal conduction layer, so that the absorption of infrared light radiation energy by the chip is increased, the output performance of the chip is improved, and the gas detection sensitivity of the whole sensor is further improved.
3. According to the invention, the black light absorption layers are arranged at the top and the hot end of the chip body and are roughened, so that the absorption of the chip on infrared light radiation energy is further improved, the output performance of the chip is improved, and the gas detection sensitivity of the whole sensor is improved.
4. According to the invention, the four sides of the etched graph of the back release cavity are subjected to rounding treatment, so that the bottom supporting layer can be effectively prevented from being folded, damage to an internal sensitive element is avoided, and the product quality is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of the overall structure of the present invention;
FIG. 2 is a schematic sectional view of the structure of the product after completion of steps 1-2 of the production process of the present invention;
FIG. 3 is a schematic sectional view of the structure of the product after completion of steps 1-3 of the production process of the present invention;
FIG. 4 is a schematic sectional view showing the structure of the product after completion of steps 1 to 4 of the production method of the present invention;
FIG. 5 is a schematic sectional view showing the structure of the product after completion of steps 1 to 5 of the production method of the present invention;
FIG. 6 is a schematic sectional view showing the structure of the product after completion of steps 1 to 6 in the production process of the present invention;
FIG. 7 is a schematic sectional view showing the structure of a product after completion of step 2-2 of the production method of the present invention;
FIG. 8 is a schematic sectional view showing the structure of the product after completion of steps 2-3 of the production process of the present invention;
FIG. 9 is a schematic sectional view showing the structure of the product after completion of steps 2 to 4 of the production method of the present invention;
FIG. 10 is a schematic sectional view showing the structure of the product after completion of steps 2 to 5 of the production method of the present invention;
FIG. 11 is a schematic sectional view showing the structure of the product after completion of steps 2 to 6 of the production method of the present invention;
FIG. 12 is a schematic diagram of the infrared light incident effect of the product of the present invention;
FIG. 13 is a schematic top view of a chip body according to the present invention;
FIG. 14 is a schematic view of the structure of one end of a lower thermocouple in accordance with the present invention;
fig. 15 is a schematic structural view of one end of an upper thermocouple according to the present invention.
Detailed Description
The present invention will be further described with reference to the following examples.
The following examples are intended to illustrate the invention, but are not intended to limit the scope of the invention. The conditions in the embodiments can be further adjusted according to specific conditions, and simple modifications of the method of the present invention based on the concept of the present invention are within the scope of the claimed invention.
As shown in fig. 1, a gas sensor chip suitable for NDIR principle includes a chip body 2 and a micro-convex lens 1, the chip body 2 and the micro-convex lens 1 are fixed together by an optical adhesive 3, and an arc surface 11 of the micro-convex lens 1 is located above a black light absorption layer 21 of the chip body 2.
The chip body 2 includes a substrate 22, and a support layer 231 is disposed on an upper surface of the substrate 22. The support layer 231 includes a first silicon oxide support layer 23, a silicon nitride support layer 24, and a second silicon oxide support layer 25 in sequence from bottom to top.
As shown in fig. 13, the support layer 231 is provided with a thermocouple stack 272 and an electrode PAD 26; the thermocouple stack 272 includes a number of thermocouple pairs 271. As shown in fig. 1, each thermocouple pair 271 includes, from top to bottom, an upper thermocouple 27 of aluminum metal, a silicon oxide layer 28, and a lower thermocouple 29 of N-type polysilicon. Referring to fig. 1, 13, 14 and 15, the N-type polycrystalline silicon lower thermocouple 29 and the metal aluminum upper thermocouple 27 of the adjacent thermocouple pair are connected through a cold end connecting through hole 210 close to the cold end, and the metal aluminum upper thermocouple 27 and the N-type polycrystalline silicon lower thermocouple 29 in the same thermocouple pair 271 are connected through a hot end connecting through hole 211 close to the hot end. The cold end is one end of the thermocouple pair 271 far away from the center of the chip body 2, and the hot end is one end of the thermocouple pair 271 near the center of the chip body 2.
As shown in fig. 1, a top oxide layer 212 is disposed on the upper surface of the thermocouple stack, a silicon nitride absorption passivation layer 213 is disposed on the upper surface of the top oxide layer 212, and the silicon nitride absorption passivation layer 213 is connected to the metal aluminum upper thermocouple 27 through a heat conduction through hole 214 near the hot end.
The upper surface of the silicon nitride absorption passivation layer 213 is provided with a black light absorption layer 21 at the hot end.
The upper surface of the electrode PAD26 is exposed.
The surface roughening of the black light absorbing layer 21 forms a surface roughened black light absorbing layer 216.
The substrate 22 is provided with a back release cavity 215 at the hot end, and the back release cavity 215 etches the four sides of the pattern for rounding. The back relief cavity 215 and the rounded corners 217 are shown in fig. 13.
The invention also provides a preparation method of the gas sensor chip suitable for NDIR principle, which comprises the following steps,
step 1, preparing a micro convex lens 1;
step 2, preparing a chip body 2;
and step 3, integrating the chip body 2 and the micro convex lens 1.
Further, the step 1 specifically includes:
step 1-1, as shown in FIG. 2, cleaning the P-type double polished silicon wafer, and thinning the silicon wafer to a thickness of 150-; the cleaning treatment is carried out according to the cleaning process standard of a wafer foundry: sequentially putting a silicon wafer 12 into acetone, absolute ethyl alcohol, a first mixed solution and deionized water for ultrasonic cleaning, respectively performing ultrasonic treatment for 10-60 minutes, and finally putting the silicon wafer 12 on a hot plate to be heated for half an hour for cleaning treatment at 100 ℃, wherein the first mixed solution is formed by mixing concentrated sulfuric acid with the mass concentration of 1.84g/ml and hydrogen peroxide with the mass concentration of 1.1g/ml according to the volume ratio of 3: 1;
step 1-2, as shown in fig. 2, spin-coating a layer of photoresist 13 with the thickness of 1-50 um on the upper surface of the silicon wafer 12;
step 1-3, as shown in fig. 3, forming regularly arranged micro cylindrical photoresists 15 on the surface of the silicon wafer 12 through exposure and development processes under the constraint of a circular hole photoetching mask plate 14;
step 1-4, as shown in fig. 4, inverting the silicon wafer 12, fixing the silicon wafer 12 above a heating plate 17 by a support frame 16, baking, and accurately controlling the baking temperature and time to keep the adhesion of the micro-cylinder photoresist 15 (the micro-cylinder photoresist 15, as shown in fig. 3) within a certain range, so that the micro-cylinder photoresist 15 automatically flows by heat under the action of surface tension to form a micro-lens structure 151 with an arc or a near-arc profile, wherein the baking temperature range is 100-: 0.5-3 h; in the hot melting process, if the temperature is lower and does not reach the glass state temperature of the photoresist, the photoresist can not completely flow freely and can not form a spherical shape; if the temperature is higher, the photoresist is easy to decompose and carbonize or contains bubbles inside; the viscosity of the photoresist is reduced along with the increase of the temperature, and the reflow is carried out at a temperature slightly higher than the glass transition temperature, so that the photoresist pattern can be fully reflowed.
Step 1-5, as shown in fig. 5, completing the pattern transfer of the silicon micro-lens by reactive ion etching to form a micro-lens array structure 18; the step is carried out in the non-reacted mixed gas SF 6 And O 2 The reaction ion dry etching machine is set with the pressure of 100-300mtor and the power of 50-150W and SF 6 The flow rate of (A) is 100- 2 The flow rate of (2) is 10-100 sccm/min;
step 1-6, as shown in fig. 6, a microlens array structure 19 with a back cavity is formed on the back surface of the silicon wafer 12 through the processes of photolithography and dry etching.
Further, the step 2 specifically includes:
step 2-1, cleaning the P-type double-polished silicon wafer, and thinning the P-type double-polished silicon wafer to a thickness of 300-; the cleaning treatment is the same as the step 1-1 according to the cleaning process standard of the wafer foundry;
step 2-2, as shown in fig. 7, using the silicon wafer in the step 2-1 as a substrate 22, depositing a first silicon oxide supporting layer 23 with a thickness of 0.1-5 um on the upper surface of the substrate by a thermal oxidation process, and depositing a silicon nitride supporting layer 24 with a thickness of 0.01-0.5 um and a second silicon oxide supporting layer 25 with a thickness of 0.01-0.5 um on the upper surface of the first silicon oxide supporting layer 23 by front-side low-pressure chemical vapor deposition; preparing three support layers for improving the stress of the support film layer by the stress reversal of silicon nitride and silicon oxide;
step 2-3, as shown in fig. 8, sputtering a layer of polysilicon with a thickness of 0.1-5 um on the upper surface of the second silicon dioxide supporting layer 25 by using a plasma enhanced chemical vapor deposition process, doping by using an ion implantation and diffusion method to form an N-type polysilicon semiconductor (here, the polysilicon and the N-type polysilicon semiconductor are structures in the preparation process and are not marked in fig. 8), and then performing photoetching and patterning to form an N-type polysilicon lower thermocouple 29; a silicon oxide layer 28 with the thickness of 0.05-0.5 um is manufactured on the upper surface of the lower thermocouple 29 of the N-type polycrystalline silicon, and finally photoetching is carried out to respectively form a cold end connecting through hole 210 and a hot end connecting through hole 211;
step 2-4, as shown in fig. 9, performing metal magnetron sputtering on the upper surface of the silicon oxide layer 28 to deposit a layer of aluminum (the aluminum is a structure in the preparation process and is not marked in fig. 9) with a thickness of 0.01-10 um, performing photolithography patterning to form a thermocouple 27 on the upper layer of the metal aluminum, and simultaneously performing electrical connection to form a connection lead structure and an electrode PAD 26. The lead structure specifically comprises: as shown in fig. 1, 9, 13, 14 and 15, the upper thermocouple 27 of metallic aluminum and the lower thermocouple 29 of N-type polycrystalline silicon are connected by a hot end connection through hole 211 close to the hot end, and the lower thermocouple 29 of N-type polycrystalline silicon and the upper thermocouple 27 of metallic aluminum of an adjacent thermocouple pair are connected by a cold end connection through hole 210 close to the cold end; depositing a layer of silicon oxide with the thickness of 0.01-10 um by a plasma enhanced chemical vapor deposition method to serve as a top oxide layer 212; then, photoetching the top oxide layer 212 at the hot end until the thermocouple 27 on the upper layer of the metal aluminum is formed, and forming a heat conduction through hole 214 at the hot end;
step 2-5, as shown in fig. 10, depositing a silicon nitride absorption passivation layer 213 with a thickness of 0.01-10 um on the top oxide layer 212 by using a plasma enhanced chemical vapor deposition method, and covering the thermal conduction through hole 214, so that the silicon nitride absorption passivation layer 213 on the top is communicated with the hot end to form a thermal conduction layer, thereby increasing the absorption of the chip on infrared radiation energy and improving the output performance of the chip; spin coating is carried out on the upper surface of the silicon nitride absorption passivation layer 213 to form a black photoresist light absorption layer with the thickness of 0.5-3um (the black photoresist light absorption layer is a structure in the preparation process and is not marked in figure 10), and the black photoresist light absorption layer is etched by utilizing photoetching patterning and is only distributed at the hot end to form a black light absorption layer 21, so that heat is gathered and uniformly distributed at the hot end part; the PAD26 is exposed, so that packaging and routing are facilitated;
step 2-6, as shown in fig. 11, reactive ion etching is used for roughening the black light absorption layer 21 to form a surface-roughened black light absorption layer 216, so that the surface absorption rate is improved, finally, deep silicon etching is used for back cavity etching of the substrate 22, a back surface release cavity 215 is formed at the central hot end of the chip body 2, four edges of an etched graph of the back surface release cavity 215 are subjected to fillet processing, so that wrinkles of a bottom support layer can be effectively prevented, and the bottom is prevented from damaging internal sensitive elements.
Further, the step 3 specifically includes:
step 3-1, ultra-precision polishing is carried out on the bonding surfaces of the micro convex lens 1 and the chip body 2, wherein the bonding surface of the micro convex lens 1 is the reverse surface relative to the lens surface, and the bonding surface of the chip body 2 is a heat-sensitive surface;
step 3-2, carrying out constant temperature treatment on the micro convex lens 1 and the chip body 2; placing the micro convex lens 1 and the chip body 2 in an environment of 50-100 ℃, keeping the temperature for about 3 hours, so that the temperature of the device is uniform, and the optical cement is firm;
step 3-3, cleaning the micro convex lens 1 and the chip body 2; cleaning the surface of the optical cement by using a soft material in the same environment, and covering the surface of the optical cement by using a dust-free glass cover after cleaning;
step 3-4, as shown in fig. 1, applying a certain pressure on the micro-convex lens 1 and the chip body 2, bonding the micro-convex lens 1 and the chip body 2 by an optical adhesive 3, and then coating a thin layer of photosensitive adhesive (where the photosensitive adhesive is not labeled in fig. 1) on the outer side of the contact edge of the bonding surface to enhance the optical adhesive effect.
As shown in fig. 12, the micro-convex lens and the NDIR infrared gas sensor chip are integrated in the chip manufacturing process, so that system chip-level integration is realized, the energy of infrared light 4 emitted by the infrared light source is concentrated at the hot end as much as possible, the micro-convex lens can well gather the energy of the infrared light 4 in the sensitive area of the infrared detection chip, the output of the chip is improved, and the gas detection sensitivity of the whole sensor is improved.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
1. A gas sensor chip adapted to NDIR principle, characterized by: the chip comprises a chip body and a micro convex lens, wherein the chip body and the micro convex lens are fixed together through an optical adhesive, and the arc surface of the micro convex lens is positioned above a black light absorption layer of the chip body.
2. A gas sensor chip adapted to NDIR principles according to claim 1, wherein: the chip body comprises a substrate, and a supporting layer is arranged on the upper surface of the substrate;
the support layer is provided with a thermocouple stack and an electrode PAD; the thermocouple stack comprises a plurality of thermocouple pairs, each thermocouple pair sequentially comprises an upper metal aluminum thermocouple, a silicon oxide layer and a lower N-type polycrystalline silicon thermocouple from top to bottom, the lower N-type polycrystalline silicon thermocouple and the upper metal aluminum thermocouple of the adjacent thermocouple pair are connected through a cold end connecting through hole close to a cold end, and the upper metal aluminum thermocouple and the lower N-type polycrystalline silicon thermocouple of the same thermocouple pair are connected through a hot end connecting through hole close to a hot end;
the upper surface of the thermocouple stack is provided with a top oxidation layer, the upper surface of the top oxidation layer is provided with a silicon nitride absorption passivation layer, and the silicon nitride absorption passivation layer is connected with the metal aluminum upper thermocouple through a heat conduction through hole close to the hot end;
and a black light absorption layer is arranged on the upper surface of the silicon nitride absorption passivation layer at the hot end.
3. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the supporting layer sequentially comprises a first silicon oxide supporting layer, a silicon nitride supporting layer and a second silicon oxide supporting layer from bottom to top.
4. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the upper surface of the electrode PAD is uncovered.
5. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the surface of the black light absorbing layer is roughened to form a roughened surface black light absorbing layer.
6. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the substrate is provided with a back surface release cavity at the hot end, and four sides of an etched graph of the back surface release cavity are subjected to fillet treatment.
7. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to any one of claims 1 to 6, characterised in that: comprises the following steps of (a) carrying out,
step 1, preparing a micro convex lens;
step 2, preparing a chip body;
and step 3, integrating the chip body and the micro convex lens.
8. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to claim 7, characterised in that: the step 1 specifically comprises:
step 1-1, cleaning a P-type double polished silicon wafer, and thinning the P-type double polished silicon wafer;
step 1-2, spin-coating a layer of photoresist on the upper surface of the silicon wafer;
step 1-3, forming a tiny cylindrical photoresist on the surface of a silicon wafer through exposure and development processes under the constraint of a circular hole photoetching mask plate;
step 1-4, inverting the silicon wafer, fixing the silicon wafer above a heating plate through a support frame, and baking to enable the micro cylindrical photoresist to automatically melt and flow under the action of surface tension to form a micro lens structure with an arc or a nearly arc outline;
1-5, completing pattern transfer of the silicon micro-lens by reactive ion etching to form a micro-lens array structure;
and 1-6, forming a micro-lens array structure with a back cavity on the back of the silicon wafer through photoetching and dry etching processes.
9. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to claim 7, characterised in that: the step 2 specifically comprises:
2-1, cleaning the P-type double polished silicon wafer, and thinning;
2-2, taking the silicon wafer as a substrate, depositing a first silicon oxide supporting layer on the upper surface of the substrate, and depositing a silicon nitride supporting layer and a second silicon oxide supporting layer on the upper surface of the first silicon oxide supporting layer;
step 2-3, sputtering a layer of polycrystalline silicon on the upper surface of the second silicon dioxide supporting layer, doping to form an N-type polycrystalline silicon semiconductor, and performing photoetching and patterning to form an N-type polycrystalline silicon lower-layer thermocouple; manufacturing a silicon oxide layer on the upper surface of the lower thermocouple of the N-type polycrystalline silicon, and finally photoetching to form a cold end connecting through hole and a hot end connecting through hole respectively;
step 2-4, sputtering and depositing a layer of aluminum on the upper surface of the silicon oxide layer, carrying out photoetching and patterning to form a metal aluminum upper-layer thermocouple, and simultaneously carrying out electric connection to form a connecting lead structure and an electrode PAD, wherein the metal aluminum upper-layer thermocouple and the N-type polycrystalline silicon lower-layer thermocouple are connected through a hot end connecting through hole close to a hot end, and the N-type polycrystalline silicon lower-layer thermocouple and the metal aluminum upper-layer thermocouple of the adjacent thermocouple pair are connected through a cold end connecting through hole close to a cold end; depositing a layer of silicon oxide as a top oxide layer; then, photoetching the top oxide layer at the hot end until the thermocouple on the upper layer of the metal aluminum is formed, and forming a heat conduction through hole;
2-5, depositing a silicon nitride absorption passivation layer on the top, covering the thermal conduction through hole, and communicating the silicon nitride absorption passivation layer on the top with the hot end to form a thermal conduction layer; spin coating the upper surface of the silicon nitride absorption passivation layer to form a black photoresist light absorption layer, and etching the black photoresist light absorption layer by utilizing photoetching patterning to only form the black light absorption layer in a hot end distribution manner; leaking the electrode PAD;
and 2-6, roughening the black light absorption layer to form a roughened black light absorption layer on the surface, finally, carrying out back cavity etching on the substrate, forming a back release cavity at the position of the central hot end of the chip body, and carrying out fillet treatment on four sides of an etched pattern of the back release cavity.
10. A method of manufacturing a gas sensor chip adapted to NDIR principles according to claim 7, characterised in that: the step 3 specifically includes:
step 3-1, ultra-precision polishing is carried out on the bonding surfaces of the micro convex lens and the chip body, wherein the bonding surface of the micro convex lens is the reverse surface relative to the lens surface, and the bonding surface of the chip body is a heat-sensitive surface;
step 3-2, carrying out constant temperature treatment on the micro convex lens and the chip body;
step 3-3, cleaning the micro convex lens and the chip body;
and 3-4, combining the micro convex lens and the chip body through an optical adhesive, and then coating a thin layer of photosensitive adhesive on the outer side of the contact edge of the bonding surface.
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