CN115064125A

CN115064125A - Organic light emitting display device

Info

Publication number: CN115064125A
Application number: CN202210861524.4A
Authority: CN
Inventors: 金容载; 全珍; 姜哲圭
Original assignee: Samsung Display Co Ltd
Current assignee: Samsung Display Co Ltd
Priority date: 2017-04-11
Filing date: 2018-04-11
Publication date: 2022-09-16
Also published as: KR20180114981A; US20180293939A1; US11270640B2; US10909918B2; US20220199023A1; CN108694909A; US20210074212A1; CN108694909B; KR102309599B1; US11935471B2

Abstract

An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency is provided. The organic light emitting display device includes: a pixel coupled to the first scan line, the second scan line, and the data line; a first scan driver configured to supply a scan signal to the first scan line during a first period and a second period in one frame period when the organic light emitting display device is driven at a second driving frequency; a second scan driver configured to supply a scan signal to the second scan line during a first period when the organic light emitting display device is driven at a second driving frequency; and a data driver configured to supply a data signal to the data line during a first period.

Description

Organic light emitting display device

The present application is a divisional application of an invention patent application having an application date of 2018, 4 and 11 months, an application number of "201810320157.0", and an invention name of "organic light emitting display device".

This application claims priority and benefit of korean patent application No. 10-2017-0046813, filed in korean intellectual property office at 11/4/2017, the entire disclosure of which is incorporated herein by reference.

Technical Field

Aspects of the present disclosure relate to an organic light emitting display device, and more particularly, to an organic light emitting display device capable of improving display quality.

Background

With the development of information technology, the importance of a display device as a connection medium between a user and information increases. Therefore, display devices such as liquid crystal display devices and organic light emitting display devices are increasingly used.

Among these display devices, the organic light emitting display device displays an image using an organic light emitting diode that generates light by recombination of electrons and holes. The organic light emitting display device has a high response speed and has low power consumption.

Recently, a method for driving an organic light emitting display device at a low frequency has been used to reduce or minimize power consumption. A method capable of improving display quality when driving an organic light emitting display device at a low frequency is desired.

Disclosure of Invention

Aspects of embodiments of the present disclosure relate to an organic light emitting display device capable of improving display quality.

According to an embodiment of the present disclosure, there is provided an organic light emitting display device configured to be driven at a first driving frequency or a second driving frequency lower than the first driving frequency, the organic light emitting display device including: a pixel coupled to the first scan line, the second scan line, and the data line; a first scan driver configured to supply a scan signal to the first scan line during a first period and a second period in one frame period when the organic light emitting display device is driven at a second driving frequency; a second scan driver configured to supply a scan signal to the second scan line during a first period when the organic light emitting display device is driven at a second driving frequency; and a data driver configured to supply a data signal to the data line during a first period.

In an embodiment, when the organic light emitting display device is driven at a first driving frequency, the first scan driver is configured to supply a scan signal to the first scan line during one frame period, and the second scan driver is configured to supply a scan signal to the second scan line during one frame period.

In an embodiment, when the organic light emitting display device is driven at a first driving frequency, a scan signal supplied to an ith (i is a natural number) first scan line overlaps with a scan signal supplied to an ith second scan line.

In an embodiment, the data driver is configured to supply the data signal as a data signal synchronized with the scan signal supplied to the first scan line.

In an embodiment, when the organic light emitting display device is driven at the second driving frequency, the first scan driver is configured to supply j (j is a natural number of 2 or more) scan signals to each of the first scan lines during one frame period, and the second scan driver is configured to supply k (k is a natural number less than j) scan signals to each of the second scan lines during one frame period.

In an embodiment, during the first period, a scan signal supplied to an ith (i is a natural number) first scan line overlaps with a scan signal supplied to an ith second scan line.

In an embodiment, the second time period is longer than the first time period.

In an embodiment, the first scan driver is configured to supply the scan signal to each of the first scan lines two or more times during the second period.

In an embodiment, the data driver is configured to supply a voltage of the reference power source to the data line during the second period.

In an embodiment, the reference power supply is set to a voltage within a voltage range of the data signal supplied from the data driver.

In an embodiment, the organic light emitting display device further includes: an emission control line parallel to the first scan line, the emission control line coupled to the pixel; and an emission driver configured to supply an emission control signal to the emission control line during a first period, a second period, and a period in which the organic light emitting display device is driven at a first driving frequency.

In an embodiment, the emission control signal supplied to the ith (i is a natural number) emission control line overlaps with the scan signal supplied to the ith first scan line during at least a part of the period.

In an embodiment, each of the pixels located at an ith (i is a natural number) horizontal line includes: an organic light emitting diode; and a pixel circuit configured to control an amount of current flowing from the first driving power source to the second driving power source via the organic light emitting diode.

In an embodiment, the reference power supply is set to a voltage different from that of the first driving power supply.

In an embodiment, a pixel circuit includes: a first transistor coupled to a first driving power source via a first node coupled to a first electrode thereof, the first transistor being configured to control an amount of current supplied to the organic light emitting diode, the amount of current corresponding to a voltage of a second node; a second transistor coupled between the data line and the first node, the second transistor being configured to be turned on when a scan signal is supplied to the ith first scan line; a third transistor coupled between the second electrode of the first transistor and a second node, the third transistor being configured to be turned on when a scan signal is supplied to the ith second scan line; a fourth transistor coupled between the second node and the initialization power supply, the fourth transistor being configured to be turned on when the scan signal is supplied to the (i-1) th second scan line; and a fifth transistor coupled between the first node and the first driving power source, the fifth transistor being configured to be turned off when the emission control signal is supplied to the ith emission control line.

In an embodiment, the first transistor, the second transistor, and the fifth transistor are P-type transistors, and the third transistor and the fourth transistor are N-type oxide semiconductor transistors.

In an embodiment, the pixel circuit further comprises: a sixth transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, the sixth transistor being configured to be turned off when the emission control signal is supplied to the ith emission control line; and a seventh transistor coupled between an anode electrode of the organic light emitting diode and the initialization power supply.

In an embodiment, the seventh transistor is a P-type transistor and is configured to be turned on when the scan signal is supplied to the ith first scan line.

In an embodiment, the seventh transistor is an N-type transistor and is configured to be turned on when the emission control signal is supplied to the ith emission control line.

In an embodiment, the seventh transistor is an N-type transistor, the ith third scan line is coupled to a gate electrode of the seventh transistor, and the scan signal supplied to the ith third scan line overlaps with the emission control signal supplied to the ith emission control line.

In an embodiment, a pixel circuit includes: an eleventh transistor configured to control an amount of current supplied to the organic light emitting diode from the first driving power source coupled to the first electrode thereof, the amount of current corresponding to a voltage of an eleventh node; a twelfth transistor coupled between the twelfth node and the data line, the twelfth transistor being configured to be turned on when the scan signal is supplied to the ith first scan line; a thirteenth transistor coupled between the twelfth node and an anode electrode of the organic light emitting diode, the thirteenth transistor being configured to be turned off when the emission control signal is supplied to the (i-1) th emission control line; a fourteenth transistor coupled between the eleventh node and the first electrode of the eleventh transistor, the fourteenth transistor being configured to be turned on when a scan signal is supplied to the ith second scan line; a fifteenth transistor coupled between the initialization power supply and an anode electrode of the organic light emitting diode, the fifteenth transistor being configured to be turned on when a scan signal is supplied to the ith first scan line; a sixteenth transistor coupled between the first driving power supply and the first electrode of the eleventh transistor, the sixteenth transistor being configured to be turned off when the emission control signal is supplied to the ith emission control line; and a storage capacitor coupled between the eleventh node and the twelfth node.

In an embodiment, the eleventh to sixteenth transistors are N-type transistors.

In an embodiment, the organic light emitting display device further includes: a third scan line parallel to the first scan line, the third scan line being coupled to the pixel; and a third scan driver configured to supply a scan signal to the third scan line during a second period when the organic light emitting display device is driven at the second driving frequency. The first scan driver is configured not to supply a scan signal to the first scan line during a second period when the organic light emitting display device is driven at a second driving frequency.

In an embodiment, the third scan driver is configured not to supply the scan signal to the third scan line during a period in which the organic light emitting display device is driven at the first driving frequency and in the first period.

In an embodiment, each of the pixels located at an ith (i is a natural number) horizontal line includes: an organic light emitting diode; a first transistor coupled to a first driving power source via a first node coupled to a first electrode thereof, the first transistor being configured to control an amount of current supplied to the organic light emitting diode, the amount of current corresponding to a voltage of a second node; a second transistor coupled between the data line and the first node, the second transistor being configured to be turned on when a scan signal is supplied to the ith first scan line; a third transistor coupled between the second electrode of the first transistor and the second node, the third transistor being configured to be turned on when a scan signal is supplied to the ith second scan line; a fourth transistor coupled between the second node and the initialization power supply, the fourth transistor being configured to be turned on when the scan signal is supplied to the (i-1) th second scan line; a fifth transistor coupled between the first node and the first driving power source, the fifth transistor being configured to be turned off when the emission control signal is supplied to the ith emission control line; and an eighth transistor coupled between the first node and the reference power supply, the eighth transistor being configured to be turned on when the scan signal is supplied to the ith third scan line.

In an embodiment, an organic light emitting display device includes: a pixel including a first transistor configured to control an amount of current flowing from a first driving power source to a second driving power source via an organic light emitting diode, a second transistor coupled between a data line and a first electrode of the first transistor, the second transistor configured to turn on when a scan signal is supplied to an ith (i is a natural number) first scan line, and a third transistor coupled between a second electrode and a gate electrode of the first transistor, the third transistor configured to turn on when a scan signal is supplied to an ith second scan line; a first scan driver configured to supply a scan signal to an ith first scan line during a first period and a second period of one frame period; a second scan driver configured to supply a scan signal to an ith second scan line during a first period; and a data driver configured to supply a data signal to the data line during a first period, and configured to supply a voltage of the reference power source during a second period.

In an embodiment, the third transistor is set to be an N-type oxide semiconductor transistor.

In an embodiment, the second time period is longer than the first time period.

In an embodiment, the pixel further comprises: a fourth transistor coupled between the gate electrode of the first transistor and the initialization power supply, the fourth transistor being configured to be turned on when the scan signal is supplied to the (i-1) th second scan line; and a fifth transistor coupled between the first electrode of the first transistor and the first driving power supply, the fifth transistor being configured to be turned off when the emission control signal is supplied to the ith emission control line.

In an embodiment, the organic light emitting display device further includes an emission driver configured to supply an emission control signal to the ith emission control line during the first period and the second period.

According to an embodiment of the present disclosure, there is provided an organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency, the organic light emitting display device including: a pixel coupled to the first scan line, the second scan line, and the data line; a first scan driver configured to supply a scan signal to a first scan line; a second scan driver configured to supply a scan signal to the second scan line; and a timing controller configured to supply the same number of gate start pulses to the first and second scan drivers when the organic light emitting display device is driven at the first driving frequency, and configured to supply different numbers of gate start pulses to the first and second scan drivers when the organic light emitting display device is driven at the second driving frequency.

In an embodiment, when the organic light emitting display device is driven at the second driving frequency, the timing controller is configured to: supplying l (l is a natural number of 2 or more) gate start pulses to a first scan driver during one frame period; and supplying p (p is a natural number less than l) gate start pulses to the second scan driver during one frame period.

Drawings

Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; this disclosure may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art.

In the drawings, the size may be exaggerated for clarity of illustration. Like reference numerals refer to like elements throughout.

Fig. 1 is a diagram schematically illustrating an organic light emitting display device according to an embodiment of the present disclosure.

Fig. 2 is a circuit diagram illustrating an embodiment of the pixel illustrated in fig. 1.

Fig. 3 is a waveform diagram illustrating an embodiment of a driving method of the pixel illustrated in fig. 2.

Fig. 4 is a waveform diagram illustrating another embodiment of a driving method of the pixel illustrated in fig. 2.

Fig. 5 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 2 is driven at the first driving frequency.

Fig. 6 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 2 is driven at the second driving frequency.

Fig. 7 is a graph showing a change in characteristics of a driving transistor included in a pixel.

Fig. 8 is a waveform diagram illustrating gate start pulses supplied to the first and second scan drivers.

Fig. 9 is a circuit diagram illustrating another embodiment of the pixel illustrated in fig. 1.

Fig. 10 is a waveform diagram illustrating an embodiment of a driving method of the pixel illustrated in fig. 9.

Fig. 11 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 9 is driven at the first driving frequency.

Fig. 12 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 9 is driven at the second driving frequency.

Fig. 13 is a circuit diagram illustrating still another embodiment of the pixel illustrated in fig. 1.

Fig. 14 is a circuit diagram illustrating still another embodiment of the pixel illustrated in fig. 1.

Fig. 15 is a circuit diagram illustrating still another embodiment of the pixel illustrated in fig. 1.

Fig. 16A to 16B are waveform diagrams illustrating an embodiment of a driving method of the pixel illustrated in fig. 15.

Fig. 17 is a circuit diagram illustrating still another embodiment of the pixel illustrated in fig. 1.

Fig. 18 is a waveform diagram illustrating an embodiment of a driving method of the pixel illustrated in fig. 17.

Fig. 19 is a circuit diagram illustrating still another embodiment of the pixel shown in fig. 1.

Fig. 20 is a waveform diagram illustrating an embodiment of a driving method of the pixel illustrated in fig. 19.

Fig. 21 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 19 is driven at the first driving frequency.

Fig. 22 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 19 is driven at the second driving frequency.

Fig. 23 is a diagram schematically illustrating an organic light emitting display device according to another embodiment of the present disclosure.

Fig. 24 is a circuit diagram illustrating an embodiment of the pixel illustrated in fig. 23.

Fig. 25 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 24 is driven at the first driving frequency.

Fig. 26 is a waveform diagram illustrating an embodiment of a driving method when the pixel illustrated in fig. 24 is driven at the second driving frequency.

Fig. 27 is a waveform diagram illustrating gate start pulses supplied to the first, second, and third scan drivers illustrated in fig. 23.

Detailed Description

In the following detailed description, only certain exemplary embodiments of the present disclosure have been shown and described, simply by way of illustration. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

Referring to fig. 1, the organic light emitting display device according to an embodiment of the present disclosure includes a pixel unit 100, a first scan driver 110, a second scan driver 120, a data driver 130, a timing controller 140, a host system 150, and an emission driver 160.

The host system 150 supplies the image data RGB to the timing controller 140 through a set or predetermined interface. In addition, the host system 150 may supply timing signals Vsync, Hsync, DE, and CLK to the timing controller 140.

The timing controller 140 generates a data driving control signal DCS and an emission driving control signal ECS based on image data RGB supplied from the host system 150 and timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a clock signal CLK. The data driving control signal DCS generated by the timing controller 140 is supplied to the data driver 130, and the emission driving control signal ECS generated by the timing controller 140 is supplied to the emission driver 160. In addition, the timing controller 140 supplies the gate start pulse GSP1 or GSP2 and the clock signal CLK to the first and

second scan drivers

110 and 120 based on the timing signals. In addition, the timing controller 140 rearranges the data RGB supplied from the outside and supplies the rearranged data RGB to the data driver 130.

The data driving control signal DCS includes a source start pulse and a clock signal. The source start pulse controls the sampling start time of the data. The clock signal is used to control the sampling operation.

The emission driving control signal ECS includes an emission start pulse and a clock signal. The transmit start pulse controls a first timing of the transmit control signal. The clock signal is used to shift (e.g., in time) the transmit start pulse.

The first gate start pulse GSP1 controls a first timing of a scan signal supplied from the first scan driver 110. The clock signal CLK is used to shift (e.g., temporally shift) the first gate start pulse GSP 1.

The second gate start pulse GSP2 controls a first timing of the scan signal supplied from the second scan driver 120. The clock signal CLK is used to shift (e.g., temporally shift) the second gate start pulse GSP 2.

The data driver 130 supplies a data signal to the data line D in correspondence with the data driving control signal DCS. The data signal supplied to the data line D is supplied to the pixel PXL selected by the scan signal.

When the organic light emitting display device is driven at the first driving frequency, the data driver 130 supplies a data signal to the data line D during one frame period. In this case, the data signal supplied to the data line D may be supplied in synchronization with (e.g., simultaneously or overlapping with) the scan signals supplied to the first and second scan lines S1 and S2.

When the organic light emitting display device is driven at a second driving frequency lower than the first driving frequency, the data driver 130 supplies a data signal to the data line D during a first period in one frame period and supplies a voltage of a reference power source to the data line D during a second period other than the first period. Here, the voltage of the reference power supply may be set to a specific voltage within the voltage range of the data signal. In addition, the first period represents a period in which the scan signal is supplied to the first scan line S1 and the second scan line S2. In addition, the second period represents a period in which the scan signal is supplied to the first scan line S1 instead of the second scan line S2.

The first scan driver 110 supplies a scan signal to the first scan line S1 in correspondence with the first gate start pulse GSP 1. In an embodiment, the first scan driver 110 may sequentially supply scan signals to the first scan lines S1. Here, the scan signal supplied from the first scan driver 110 is set to a gate-on voltage so that the transistors included in the pixels PXL may be turned on.

The second scan driver 120 supplies a scan signal to the second scan line S2 in correspondence with the second gate start pulse GSP 2. In an embodiment, the second scan driver 120 may sequentially supply scan signals to the second scan lines S2. Here, the scan signal supplied from the second scan driver 120 is set to the gate-on voltage so that the transistors included in the pixels PXL may be turned on.

The first and

second scan drivers

110 and 120 may control scan signals supplied to the scan lines S1 and S2 corresponding to the driving frequency. In an embodiment, when the organic light emitting display device is driven at the first driving frequency, the first scan driver 110 may sequentially supply one or more scan signals to each of the first scan lines S1 during one frame period. Similarly, when the organic light emitting display device is driven at the first driving frequency, the second scan driver 120 may sequentially supply one or more scan signals to each of the second scan lines S2 during one frame period. Here, the scan signal supplied to the i-th (i is a natural number) first scan line S1i overlaps with the scan signal supplied to the i-th second scan line S2 i. In other words, the scan signal supplied to the ith first scan line S1i and the scan signal supplied to the ith second scan line S2i are supplied simultaneously (i.e., the scan signals are supplied in synchronization with each other).

When the organic light emitting display device is driven at the second driving frequency, the first scan driver 110 supplies a scan signal to the first scan line S1 during the first and second periods. In an embodiment, the first scan driver 110 may supply j (j is a natural number of 2 or more) scan signals to each of the first scan lines S1 during the first and second periods. Here, the scan signal supplied to each of the first scan lines S1 may be repeatedly supplied for each set or predetermined period of time.

When the organic light emitting display device is driven at the second driving frequency, the second scan driver 120 supplies the scan signal to the second scan line S2 during the first period. In an embodiment, the second scan driver 120 supplies k (k is a natural number less than j) scan signals to each of the second scan lines S2 during the first period. Here, the scan signal supplied to the ith first scan line S1i overlaps with the scan signal supplied to the ith second scan line S2 i.

The emission driver 160 supplies an emission control signal to the emission control line E corresponding to the emission drive control signal ECS. In an embodiment, the emission driver 160 may sequentially supply the emission control signal to the emission control line E. When the emission control signals are sequentially supplied to the emission control line E, the pixels PXL do not emit light in units of horizontal lines. For this reason, the emission control signal is set to a gate-off voltage so that the transistor included in the pixel PXL may be turned off. In addition, the emission driver 160 supplies the emission control signal to the ith emission control line Ei to overlap the scan signals supplied to the (i-1) th and ith first scan lines S1i-1 and S1 i.

The pixel unit 100 includes a pixel PXL coupled to the data line D, the scan lines S1 and S2, and the emission control line E. The pixel PXL receives the first driving power ELVDD, the second driving power ELVSS, and the initialization power Vint supplied from the outside (e.g., the outside of the pixel unit 100).

Each of the pixels PXL is selected to receive a data signal supplied from the data line D when a scan signal is supplied to the scan lines S1 and S2 combined therewith. The pixels PXL receiving the data signal control the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode corresponding to the data signal. At this time, the organic light emitting diode generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current. Further, the emission time of each of the pixels PXL is controlled by an emission control signal supplied from the emission control line E coupled to the pixel PXL.

In addition, each of the pixels PXL may be coupled to one or more first scan lines S1, one or more second scan lines S2, and one or more emission control lines E corresponding to a circuit structure thereof. That is, in the embodiment of the present disclosure, the signal lines S1, S2, E, and D coupled to the pixel PXL may be variously set in correspondence to the circuit structure of the pixel PXL.

Fig. 2 is a circuit diagram illustrating an embodiment of the pixel PXL shown in fig. 1. For convenience of description, the pixels PXL located on the ith horizontal line and coupled to the mth data line Dm are shown in fig. 2.

Referring to fig. 2, the pixel PXL according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 200 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 200, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 200.

The pixel circuit 200 controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. To this end, the pixel circuit 200 includes first to fifth transistors M1 to M5 and a storage capacitor Cst.

A first electrode of the first transistor (or driving transistor) M1 is coupled to the first node N1, and a second electrode of the first transistor M1 is coupled to an anode electrode of the organic light emitting diode OLED. In addition, the gate electrode of the first transistor M1 is coupled to the second node N2. The first transistor M1 controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the voltage of the second node N2. For this, the first driving power ELVDD is set to a voltage higher than that of the second driving power ELVSS.

The second transistor M2 is coupled between the data line Dm and the first node N1. In addition, a gate electrode of the second transistor M2 is coupled to the ith first scan line S1 i. The second transistor M2 is turned on when a scan signal is supplied to the ith first scan line S1i, so that the data line Dm and the first node N1 are electrically coupled to each other.

The third transistor M3 is coupled between the second electrode of the first transistor M1 and the second node N2. In addition, a gate electrode of the third transistor M3 is coupled to the ith second scan line S2 i. The third transistor M3 is turned on when the scan signal is supplied to the ith second scan line S2i, so that the second electrode of the first transistor M1 and the second node N2 are electrically coupled to each other. Therefore, when the third transistor M3 is turned on, the first transistor M1 is diode-connected.

The fourth transistor M4 is coupled between the second node N2 and the initialization power supply Vint. Further, the gate electrode of the fourth transistor M4 is coupled to the (i-1) th second scan line S2 i-1. The fourth transistor M4 is turned on when the scan signal is supplied to the (i-1) th second scan line S2i-1 to supply the voltage of the initialization power Vint to the second node N2. Here, the voltage of the initialization power supply Vint is set to a voltage lower than the voltage of the data signal supplied to the data line Dm.

The fifth transistor M5 is coupled between the first driving power source ELVDD and the first node N1. Further, the gate electrode of the fifth transistor M5 is coupled to the emission control line Ei. The fifth transistor M5 is turned off when the emission control signal is supplied to the emission control line Ei, and is turned on otherwise.

The storage capacitor Cst is coupled between the first driving power source ELVDD and the second node N2. The storage capacitor Cst stores the voltage applied to the second node N2.

The first to fifth transistors M1 to M5 are formed as P-type transistors. In an embodiment, the first to fifth transistors M1 to M5 may be formed as P-type polysilicon semiconductor transistors.

Fig. 3 is a waveform diagram illustrating an embodiment of a driving method of the pixel PXL illustrated in fig. 2.

Referring to fig. 3, an emission control signal is first supplied to an emission control line Ei. When the emission control signal is supplied to the emission control line Ei, the fifth transistor M5 is turned off. When the fifth transistor M5 is turned off, the electrical coupling between the first node N1 and the first driving power ELVDD is interrupted, and thus, the pixel PXL is set to a non-emission state.

Thereafter, the scan signal is supplied to the (i-1) th second scan line S2 i-1. When the scan signal is supplied to the (i-1) th second scan line S2i-1, the fourth transistor M4 is turned on. When the fourth transistor M4 is turned on, the voltage of the initialization power supply Vint is supplied to the second node N2.

After the voltage of the initialization power Vint is supplied to the second node N2, a scan signal is supplied to each of the ith first scan line S1i and the ith second scan line S2 i. When the scan signal is supplied to the ith second scan line S2i, the third transistor M3 is turned on. When the third transistor M3 is turned on, the first transistor M1 is diode-connected.

If the scan signal is supplied to the ith first scan line S1i, the second transistor M2 is turned on. When the second transistor M2 is turned on, the data signal DS from the data line Dm is supplied to the first node N1. At this time, since the second node N2 is initialized to the voltage of the initialization power Vint lower than the voltage of the data signal DS, the first transistor M1 is turned on.

If the first transistor M1 is turned on, the data signal DS supplied to the first node N1 is supplied to the second node N2 via the diode-connected first transistor M1. Accordingly, a voltage corresponding to the data signal DS and the threshold voltage of the first transistor M1 is applied to the second node N2. At this time, the storage capacitor Cst stores the voltage of the second node N2.

After the voltage corresponding to the data signal DS and the threshold voltage of the first transistor M1 is stored in the storage capacitor Cst, the supply of the emission control signal to the emission control line Ei is stopped. When the supply of the emission control signal to the emission control line Ei is stopped, the fifth transistor M5 is turned on. When the fifth transistor M5 is turned on, the first driving power ELVDD and the first node N1 are electrically coupled to each other. At this time, the first transistor M1 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the voltage of the second node N2. Thus, the organic light emitting diode OLED generates light having a luminance corresponding to the amount of current.

In fact, the pixel PXL of the present disclosure is driven while repeating the above-described process. Further, for convenience of description, a case where one scan signal is supplied to each of the scan lines S1 and S2 is illustrated in fig. 3, but the present disclosure is not limited thereto. In an embodiment, a plurality of scan signals may be supplied to each of the scan lines S1 and S2 as shown in fig. 4. In this case, the operation procedure is substantially the same as that of fig. 3, and thus, a detailed description thereof may not be repeated. In the following description, it will be assumed that one scan signal is supplied to each of the scan lines S1 and S2.

Fig. 5 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 2 is driven at the first driving frequency. Here, the first driving frequency may be set to a frequency of 60Hz or more.

Referring to fig. 5, when the organic light emitting display device is driven at the first frequency, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2n during one frame period 1F. Here, the scan signal supplied to the ith first scan line S1i overlaps with the scan signal supplied to the ith second scan line S2 i.

Further, when the organic light emitting display device is driven at the first frequency, the emission control signals are sequentially supplied to the emission control lines E1 to En during one frame period 1F. Here, the emission control signal supplied to the ith emission control line Ei overlaps the scan signals supplied to the (i-1) th first scan line S1i-1 and the ith first scan line S1 i. The data signal DS is supplied to the data lines D in synchronization with the scan signal.

Then, as described in fig. 2 and 3, a voltage corresponding to the data signal DS is stored in each of the pixels PXL. Further, each of the pixels PXL generates light having a luminance (e.g., a predetermined luminance) corresponding to the data signal DS so that the pixel unit 100 can display an image (e.g., a predetermined image).

Fig. 6 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 2 is driven at the second driving frequency. Here, the second driving frequency may be set to a frequency less than 60 Hz.

Referring to fig. 6, when the organic light emitting display device is driven at the second driving frequency, one frame period 1F is divided into a first period T1 and a second period T2. Here, the second period T2 may be set to a period wider (e.g., having a longer duration) than the first period T1.

During the first period T1, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2 n. Here, the scan signal supplied to the ith first scan line S1i overlaps with the scan signal supplied to the ith second scan line S2 i.

Further, during the first period T1, emission control signals are sequentially supplied to the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei overlaps with the scan signals supplied to the (i-1) th first scan line S1i-1 and the ith first scan line S1 i. The data signal DS is supplied to the data lines D in synchronization with the scan signal. Accordingly, during the first period T1, a voltage corresponding to the data signal DS is stored in each of the pixels PXL.

During the second period T2, a plurality of scan signals are supplied to each of the first scan lines S11 to S1 n. Here, the scan signal supplied to each of the first scan lines S11 through S1n may be supplied for each set or predetermined period of time. In an embodiment, during the second period T2, the scan signals may be supplied to the first scan lines S11 to S1n several times while being sequentially repeated.

During the second period T2, a plurality of emission control signals are supplied to the emission control lines E1 through En. Here, the emission control signal supplied to the ith emission control line Ei may be supplied to overlap with the scan signals supplied to the (i-1) th and ith first scan lines S1i-1 and S1 i. Further, during the second period T2, the voltage of the reference power Vref is supplied to the data line D.

The driving method will be described with reference to fig. 2 and 6. During the first period T1, the voltage of the data signal DS is stored in each of the pixels PXL. Accordingly, the first transistor M1 supplies a current (e.g., a predetermined current) corresponding to a difference between the voltage of the first driving power ELVDD applied to the first node N1 and the voltage of the data signal DS applied to the second node N2 to the organic light emitting diode OLED.

The emission control signal is supplied to the ith emission control line Ei during a partial period of the second period T2. When the emission control signal is supplied to the ith emission control line Ei, the fifth transistor M5 is turned off. Thus, the pixel PXL is set to a non-emission state.

After that, the scan signal is supplied to the ith first scan line S1 i. When a scan signal is supplied to the ith first scan line S1i, the second transistor M2 is turned on. When the second transistor M2 is turned on, the voltage of the reference power Vref is supplied from the data line Dm to the first node N1. Accordingly, the characteristic curve of the first transistor M1 is changed, and thus, the display quality of the organic light emitting display device may be improved.

For example, during a period in which the pixel PXL emits light, the characteristic of the first transistor M1 corresponding to the voltage of the first driving power ELVDD applied to the first node N1 is set to a specific state as shown in fig. 7. When the characteristic of the first transistor M1 is set to a specific state during one frame period, an image having a desired luminance is not displayed corresponding to the data signal DS during at least an early period of the next frame period.

When the organic light emitting display device is driven at the second driving frequency, the one-frame period 1F is set relatively wide (e.g., relative to when the organic light emitting display device is driven at the first driving frequency). In an embodiment, when the first driving frequency is set to 60Hz, the one-frame period 1F may be set to 1/60s (seconds). When the second driving frequency is set to 10Hz, the one-frame period 1F may be set to 1/10s (seconds). Therefore, when the organic light emitting display device is driven at the second driving frequency, flicker may be generated when the characteristic of the first transistor M1 is fixed to a specific state during one frame period.

On the other hand, in the present disclosure, when the voltage of the reference power Vref is supplied to the first electrode of the first transistor M1, the characteristics of the first transistor M1 are changed. In fact, in the present disclosure, the voltage of the reference power Vref is periodically supplied to the first electrode of the first transistor M1 during the second period T2, and thus, the characteristic of the first transistor M1 can be prevented from being fixed to a specific state.

For this, the voltage of the reference power Vref may be set to a specific voltage within the voltage range of the data signal DS. In addition, the voltage of the reference power Vref may be set to a voltage different from the voltage of the first driving power ELVDD, for example, a voltage higher than the voltage of the first driving power ELVDD. For example, the voltage of the reference power Vref may be set to a voltage equal to or greater than half of the voltage range of the data signal DS (e.g., the data signal DS of black gray scale).

When the scan signals are sequentially supplied to the first scan lines S11 to S1n and the emission control signals are sequentially supplied to the emission control lines E1 to En during a period in which the organic light emitting display device is driven at the second driving frequency, the driving conditions under which the organic light emitting display device is driven at the second driving frequency may be similar to or the same as the driving conditions under which the organic light emitting display device is driven at the first driving frequency. Accordingly, the display quality of the organic light emitting display device may be improved.

For example, when the first driving frequency is set to 60Hz, the pixels PXL are set to the non-emission state sixty times in one second. Further, when the second driving frequency is set to 10Hz, the pixel PXL is set to the non-emission state ten times in one second. When the number of times the pixels PXL are set to the non-emission state is differently set when the organic light emitting display device is driven at the first driving frequency and the second driving frequency, the observer recognizes a luminance difference or the like even when the same image is displayed.

On the other hand, when the emission control signal is supplied to each of the emission control lines E1 to En five times during the second period T2 when the organic light emitting display apparatus is driven at the second driving frequency (e.g., 10Hz), the number of times the pixel PXL is set to the non-emission state is set to be the same as the number of times the pixel PXL is set to the non-emission state when the organic light emitting display apparatus is driven at the first driving frequency. That is, in the embodiments of the present disclosure, the driving condition for driving the organic light emitting display device at the second driving frequency is similar to or the same as the driving condition for driving the organic light emitting display device at the first driving frequency, so that the display quality of the organic light emitting display device may be improved. Further, when the organic light emitting display device is driven at the second driving frequency, the data signal DS is supplied to the data line D during the first period T1 (e.g., only during the first period T1), and thus, power consumption of the organic light emitting display device may be reduced or minimized.

Fig. 8 is a waveform diagram illustrating gate start pulses GSP1 and GSP2 supplied to the first scan driver 110 and the second scan driver 120.

Referring to fig. 8, when the organic light emitting display device is driven at the first driving frequency, as shown in fig. 5, the same number of scan signals are supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2 n. Accordingly, when the organic light emitting display device is driven at the first driving frequency, the number of the first gate start pulses GSP1 supplied from the timing controller 140 to the first scan driver 110 is set to be equal to the number of the second gate start pulses GSP2 supplied from the timing controller 140 to the second scan driver 120.

When the organic light emitting display device is driven at the second driving frequency, as shown in fig. 6, different numbers of scan signals are supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2 n. Accordingly, when the organic light emitting display device is driven at the second driving frequency, the number of the first gate start pulses GSP1 supplied from the timing controller 140 to the first scan driver 110 is set to be different from the number of the second gate start pulses GSP2 supplied from the timing controller 140 to the second scan driver 120. In other words, when the organic light emitting display device is driven at the second driving frequency, l (l is a natural number of 2 or more) first gate start pulses GSP1 are supplied to the first scan driver 110, and p (p is a natural number less than l) second gate start pulses GSP2 are supplied to the second scan driver 120.

Fig. 9 is a circuit diagram illustrating another embodiment of the pixel PXL illustrated in fig. 1. In fig. 9, the same components as those of fig. 2 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 9, the pixel PXL according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 201 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 201, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 201.

The pixel circuit 201 controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. To this end, the pixel circuit 201 includes a first transistor M1, a second transistor M2, a third transistor M3 ', a fourth transistor M4', a fifth transistor M5, and a storage capacitor Cst.

The third transistor M3' is coupled between the second electrode of the first transistor M1 and the second node N2. In addition, a gate electrode of the third transistor M3' is coupled to the ith second scan line S2 i. The third transistor M3' is turned on when the scan signal is supplied to the ith second scan line S2i, so that the second electrode of the first transistor M1 and the second node N2 are electrically coupled to each other. Therefore, when the third transistor M3' is turned on, the first transistor M1 is diode-connected.

The fourth transistor M4' is coupled between the second node N2 and the initialization power supply Vint. In addition, the gate electrode of the fourth transistor M4' is coupled to the (i-1) th second scan line S2 i-1. The fourth transistor M4' is turned on when the scan signal is supplied to the (i-1) th second scan line S2i-1 to supply the voltage of the initialization power supply Vint to the second node N2.

The third transistor M3 'and the fourth transistor M4' are formed as N-type transistors. In an embodiment, the third transistor M3 'and the fourth transistor M4' may be formed as N-type oxide semiconductor transistors.

The oxide semiconductor transistor may be formed by a low-temperature process and have a charge mobility lower than that of the polysilicon semiconductor transistor. That is, the oxide semiconductor transistor has excellent off-current characteristics. Accordingly, when the third transistor M3 'and the fourth transistor M4' are formed as oxide semiconductor transistors, a leakage current from the second node N2 may be reduced or minimized, and thus, a display quality of the organic light emitting display device may be improved.

The pixel PXL shown in fig. 9 is constructed the same as the pixel PXL shown in fig. 2 except that the third transistor M3 'and the fourth transistor M4' are formed as N-type transistors. Further, the pixel PXL shown in fig. 9 operates the same as the pixel PXL shown in fig. 2 except that the scan signal supplied to the second scan line S2 is set to a high voltage (i.e., a gate-on voltage) so that the third transistor M3 'and the fourth transistor M4', which are formed as N-type transistors, may be turned on as shown in fig. 10. Therefore, detailed description of the elements may not be repeated.

Fig. 11 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 9 is driven at the first driving frequency. The driving method of fig. 11 is substantially the same as the driving method of fig. 5 except that only the polarities of the scan signals supplied to the second scan lines S21 through S2n are changed, and thus, the driving method of fig. 11 will be briefly described.

Referring to fig. 11, when the organic light emitting display device is driven at the first driving frequency, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2n during one frame period 1F. Further, when the organic light emitting display device is driven at the first driving frequency, the emission control signals are sequentially supplied to the emission control lines E1 to En during one frame period 1F.

Accordingly, a voltage corresponding to the data signal DS is stored in each of the pixels PXL, and thus, the pixel unit 100 may display an image (e.g., a predetermined image).

Fig. 12 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 9 is driven at the second driving frequency. The driving method of fig. 12 is substantially the same as the driving method of fig. 6 except that only the polarities of the scan signals supplied to the second scan lines S21 through S2n are changed; therefore, the driving method of fig. 12 will be briefly described.

Referring to fig. 12, during a first period T1 of one frame period 1F, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2 n. Further, during the first period T1, emission control signals are sequentially supplied to the emission control lines E1 to En. Accordingly, during the first period T1, a voltage corresponding to the data signal DS is stored in each of the pixels PXL.

During the second period T2 of the one frame period 1F, a plurality of scan signals are supplied to each of the first scan lines S11 to S1 n. In an embodiment, during the second period T2, the scan signal may be sequentially supplied to each of the first scan lines S11 to S1n several times.

During the second period T2, a plurality of emission control signals are supplied to each of the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei may be supplied to overlap with the scan signals supplied to the (i-1) th and ith first scan lines S1i-1 and S1 i. Further, during the second period T2, the voltage of the reference power Vref is supplied to the data line D.

Here, when a plurality of scan signals are supplied to each of the first scan lines S11 to S1n during the second period T2, the characteristics of the first transistor M1 included in each of the pixels PXL are periodically changed, and thus, the display quality of the organic light emitting display device may be improved.

Fig. 13 is a circuit diagram illustrating still another embodiment of the pixel PXL shown in fig. 1. In fig. 13, the same components as those of fig. 2 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 13, the pixel PXL according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 202 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 202, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 202.

The pixel circuit 202 controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. To this end, the pixel circuit 202 includes first to seventh transistors M1 to M7 and a storage capacitor Cst.

The sixth transistor M6 is coupled between the second electrode of the first transistor M1 and the anode electrode of the organic light emitting diode OLED. Further, the gate electrode of the sixth transistor M6 is coupled to the emission control line Ei. The sixth transistor M6 is turned off when the emission control signal is supplied to the emission control line Ei, and is turned on otherwise.

The seventh transistor M7 is coupled between the anode electrode of the organic light emitting diode OLED and the initialization power supply Vint. In addition, a gate electrode of the seventh transistor M7 is coupled to the ith first scan line S1 i. The seventh transistor M7 is turned on when the scan signal is supplied to the ith first scan line S1i to supply the voltage of the initialization power Vint to the anode electrode of the organic light emitting diode OLED.

If the voltage of the initialization power supply Vint is supplied to the anode electrode of the organic light emitting diode OLED, a parasitic capacitor (hereinafter, referred to as an "organic capacitor Coled") of the organic light emitting diode OLED is discharged. When the organic capacitor Coled is discharged, the black rendering capability of the pixel PXL is improved.

For example, during the previous frame period, a voltage (e.g., a predetermined voltage) is charged in the organic capacitor Coled corresponding to the current supplied from the first transistor M1. When the organic capacitor Coled is charged, the organic light emitting diode OLED may easily emit light even at a low current.

The black data signal may be supplied in the current frame period. The first transistor M1 ideally supplies no current to the organic light emitting diode OLED when the black data signal is supplied. However, even when the black data signal is supplied, a leakage current (e.g., a predetermined leakage current) is supplied to the organic light emitting diode OLED. At this time, when the organic capacitor Coled is in a charged state, light is emitted from the organic light emitting diode OLED in a minute amount, and thus, the black expression capability of the pixel PXL is deteriorated.

On the other hand, in the present disclosure, when the organic capacitor Coled is discharged by the initializing power supply Vint, the organic light emitting diode OLED is set to a non-emission state by a leakage current. That is, in the present disclosure, the organic capacitor Coled is discharged using the initialization power Vint, and thus, the black rendering capability of the pixel PXL may be improved (e.g., the pixel may render darker and darker black).

An operation procedure of the pixel PXL will be described with reference to fig. 13 and 3. First, an emission control signal is supplied to the emission control line Ei. When the emission control signal is supplied to the emission control line Ei, the fifth transistor M5 and the sixth transistor M6 are turned off. When the fifth transistor M5 is turned off, the electrical coupling between the first node N1 and the first driving power source ELVDD is interrupted. When the sixth transistor M6 is turned off, the electrical coupling between the first transistor M1 and the organic light emitting diode OLED is interrupted. Therefore, during a period in which the emission control signal is supplied to the emission control line Ei, the pixel PXL is set to a non-emission state.

After the voltage of the initialization power Vint is supplied to the second node N2, the scan signals are supplied to the ith first scan line S1i and the ith second scan line S2 i. When the scan signal is supplied to the ith second scan line S2i, the third transistor M3 is turned on. When the third transistor M3 is turned on, the first transistor M1 is diode-connected.

If the scan signal is supplied to the ith first scan line S1i, the second and seventh transistors M2 and M7 are turned on. When the seventh transistor M7 is turned on, the voltage of the initialization power supply Vint is supplied to the anode electrode of the organic light emitting diode OLED. When the second transistor M2 is turned on, the data signal DS from the data line Dm is supplied to the first node N1. At this time, since the second node N2 is initialized to the voltage of the initialization power Vint lower than the voltage of the data signal DS, the first transistor M1 is turned on.

After the voltage corresponding to the data signal DS and the threshold voltage of the first transistor M1 is stored in the storage capacitor Cst, the supply of the emission control signal to the emission control line Ei is stopped. When the supply of the emission control signal to the emission control line Ei is stopped, the fifth transistor M5 and the sixth transistor M6 are turned on.

When the fifth transistor M5 is turned on, the first driving power ELVDD and the first node N1 are electrically coupled to each other. At this time, the first transistor M1 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the voltage of the second node N2. Then, the organic light emitting diode OLED generates light having a luminance corresponding to the amount of current. In fact, the pixel PXL of the present disclosure is driven while repeating the above-described process.

The pixel PXL shown in fig. 13 is driven at the first driving frequency and the second driving frequency corresponding to the driving waveforms of fig. 5 and 6. When the pixels PXL are driven at the first and second driving frequencies, the driving method of the pixels PXL shown in fig. 13 is substantially the same as the driving method of the pixels PXL shown in fig. 2, and thus, a detailed description thereof may not be repeated.

The first to seventh transistors M1 to M7 are formed as P-type transistors. In an embodiment, the first to seventh transistors M1 to M7 may be formed as P-type polysilicon semiconductor transistors.

Fig. 14 is a circuit diagram illustrating still another embodiment of the pixel PXL shown in fig. 1. In fig. 14, the same components as those of fig. 13 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 14, the pixel PXL according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 203 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 203, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 203.

The pixel circuit 203 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. To this end, the pixel circuit 203 includes a first transistor M1, a second transistor M2, a third transistor M3 ', a fourth transistor M4 ', a fifth transistor M5, a sixth transistor M6, a seventh transistor M7 ', and a storage capacitor Cst.

The seventh transistor M7' is coupled between the anode electrode of the organic light emitting diode OLED and the initialization power supply Vint. In addition, the gate electrode of the seventh transistor M7' is coupled to the emission control line Ei. The seventh transistor M7' is turned on when the emission control signal is supplied to the emission control line Ei to supply the voltage of the initialization power Vint to the anode electrode of the organic light emitting diode OLED.

The third transistor M3 ', the fourth transistor M4 ', and the seventh transistor M7 ' are formed as N-type transistors. In an embodiment, the third transistor M3 ', the fourth transistor M4 ', and the seventh transistor M7 ' may be formed as N-type oxide semiconductor transistors. When the third transistor M3 'and the fourth transistor M4' are formed as oxide semiconductor transistors, it is possible to reduce or minimize a leakage current from the second node N2. Further, when the seventh transistor M7' is formed as an oxide semiconductor transistor, it is possible to reduce or minimize a leakage current between the anode electrode of the organic light emitting diode OLED and the initialization power supply Vint.

The operation process of the pixel PXL illustrated in fig. 14 is substantially similar or identical to that of the pixel PXL illustrated in fig. 13 except that the third transistor M3 ', the fourth transistor M4 ' and the seventh transistor M7 ' are formed as N-type transistors. In other words, the driving method of the pixel PXL illustrated in fig. 14 is similar or identical to the driving method of the pixel PXL illustrated in fig. 13 except that the seventh transistor M7 'is coupled to the emission control line Ei and the scan signal supplied to the second scan lines S2i-1 and S2i as illustrated in fig. 10 is set to a high voltage (i.e., a gate-on voltage) so that the third transistor M3', the fourth transistor M4 ', and the seventh transistor M7', which are formed as N-type transistors, may be turned on. Therefore, detailed description of the elements may not be repeated.

In fig. 14, it is shown that the seventh transistor M7' is coupled to the emission control line Ei, but the embodiment of the present disclosure is not limited thereto. In an embodiment, the seventh transistor M7' may be coupled to the ith third scan line S3i which is additionally formed as shown in fig. 15. In this case, a third scan driver for supplying a scan signal to the third scan line S3 may be additionally provided to the organic light emitting display device.

As shown in fig. 16A and 16B, a scan signal (gate-on voltage of high level) is supplied to the ith third scan line S3i so as to overlap with an emission control signal supplied to the emission control line Ei. When the scan signal is supplied to the ith third scan line S3i, the seventh transistor M7' is turned on, so that the voltage of the initialization power supply Vint is supplied to the anode electrode of the organic light emitting diode OLED.

Fig. 17 is a circuit diagram illustrating still another embodiment of the pixel PXL shown in fig. 1. In fig. 17, the same components as those of fig. 14 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 17, the pixel PXL according to the embodiment of the present disclosure includes the organic light emitting diode OLED and the pixel circuit 204 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 204, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 204.

The pixel circuit 204 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. To this end, the pixel circuit 204 includes a first transistor M1, a second transistor M2 ', a third transistor M3', a fourth transistor M4 ', a fifth transistor M5, a sixth transistor M6, a seventh transistor M7', and a storage capacitor Cst.

The second transistor M2' is coupled between the data line Dm and the first node N1. In addition, a gate electrode of the second transistor M2' is coupled to the ith first scan line S1 i. The second transistor M2' is turned on when a scan signal is supplied to the ith first scan line S1i to electrically couple the data line Dm and the first node N1 to each other.

The second transistor M2' may be formed as an N-type oxide semiconductor transistor. When the second transistor M2' may be formed as an N-type oxide semiconductor transistor, a leakage current between the data line Dm and the first node N1 may be reduced or minimized, and thus, a display quality of the organic light emitting display device may be improved.

In addition, the operation process of the pixel PXL shown in fig. 17 is substantially similar or identical to that of the pixel PXL shown in fig. 14 except that the second transistor M2' is formed as an N-type transistor. In other words, the driving method of the pixel PXL illustrated in fig. 17 is similar or identical to the driving method of the pixel PXL illustrated in fig. 14 except that the scan signal supplied to the first scan lines S1i-1 and S1i is set to a high voltage (i.e., a gate-on voltage) so that the second transistor M2', which is formed as an N-type transistor, may be turned on as illustrated in fig. 18. Therefore, detailed description of the elements may not be repeated.

Fig. 19 is a circuit diagram illustrating still another embodiment of the pixel PXL shown in fig. 1. For convenience of description, the pixels PXL located on the ith horizontal line and coupled to the mth data line Dm are shown in fig. 19.

Referring to fig. 19, the pixel PXL according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 205 for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 205, and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 205.

The pixel circuit 205 controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the data signal. For this, the pixel circuit 205 includes eleventh to sixteenth transistors M11 to M16 and a storage capacitor Cst.

A first electrode of the eleventh transistor (or driving transistor) M11 is coupled to the first driving power source ELVDD via the sixteenth transistor M16, and a second electrode of the eleventh transistor M11 is coupled to an anode electrode of the organic light emitting diode OLED. In addition, a gate electrode of the eleventh transistor M11 is coupled to the eleventh node N11. The eleventh transistor M11 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the voltage of the eleventh node N11.

The twelfth transistor M12 is coupled between the data line Dm and the twelfth node N12. In addition, a gate electrode of the twelfth transistor M12 is coupled to the ith first scan line S1 i. The twelfth transistor M12 is turned on when the scan signal is supplied to the ith first scan line S1 i. For this, the scan signal is set to the gate-on voltage.

The thirteenth transistor M13 is coupled between the twelfth node N12 and the anode electrode of the organic light emitting diode OLED. In addition, the gate electrode of the thirteenth transistor M13 is coupled to the (i-1) th emission control line Ei-1. The thirteenth transistor M13 is turned off when the emission control signal is supplied to the (i-1) th emission control line Ei-1, and is turned on when the emission control signal is not supplied. For this, the emission control signal is set to the gate-off voltage.

The fourteenth transistor M14 is coupled between the eleventh node N11 and the first electrode of the eleventh transistor M11. In addition, a gate electrode of the fourteenth transistor M14 is coupled to the ith second scan line S2 i. The fourteenth transistor M14 is turned on when the scan signal is supplied to the ith second scan line S2 i.

The fifteenth transistor M15 is coupled between the initialization power supply Vint' and the anode electrode of the organic light emitting diode OLED. Further, a gate electrode of the fifteenth transistor M15 is coupled to the ith first scan line S1 i. The fifteenth transistor M15 is turned on when a scan signal is supplied to the ith first scan line S1 i. Further, the voltage of the initialization power supply Vint' is set such that the organic light emitting diode OLED is turned off.

The sixteenth transistor M16 is coupled between the first driving power ELVDD and the first electrode of the eleventh transistor M11. In addition, a gate electrode of the sixteenth transistor M16 is coupled to the ith emission control line Ei. The sixteenth transistor M16 is turned off when the emission control signal is supplied to the ith emission control line Ei, and is turned on when the emission control signal is not supplied.

The storage capacitor Cst is coupled between the eleventh node N11 and a twelfth node N12 that is a common node between the twelfth transistor M12 and the thirteenth transistor M13. The storage capacitor Cst stores a voltage corresponding to the data signal and a threshold voltage of the eleventh transistor M11.

The eleventh to sixteenth transistors M11 to M16 are formed as N-type transistors. In an embodiment, the eleventh to sixteenth transistors M11 to M16 may be formed as N-type polycrystalline silicon semiconductor transistors or N-type oxide semiconductor transistors.

Fig. 20 is a waveform diagram illustrating an embodiment of a driving method of the pixel PXL illustrated in fig. 19.

Referring to fig. 20, first, an emission control signal is supplied to an (i-1) th emission control line Ei-1. When the emission control signal is supplied to the (i-1) th emission control line Ei-1, the thirteenth transistor M13 is turned off. When the thirteenth transistor M13 is turned off, the electrical coupling between the twelfth node N12 and the anode electrode of the organic light emitting diode OLED is interrupted.

After that, the scan signals are supplied to the ith first scan line S1i and the ith second scan line S2 i. When the scan signal is supplied to the ith first scan line S1i, the twelfth transistor M12 and the fifteenth transistor M15 are turned on. In addition, when the scan signal is supplied to the ith second scan line S2i, the fourteenth transistor M14 is turned on.

When the twelfth transistor M12 is turned on, the data line Dm and the twelfth node N12 are electrically coupled to each other. Thus, the data signal DS from the data line Dm is supplied to the twelfth node N12.

When the fourteenth transistor M14 is turned on, the eleventh node N11 and the first electrode of the eleventh transistor M11 are electrically coupled to each other. At this time, the eleventh node N11 is initialized to the voltage of the first driving power ELVDD. In addition, when the fourteenth transistor M14 is turned on, the eleventh transistor M11 is diode-connected.

When the fifteenth transistor M15 is turned on, the voltage of the initialization power supply Vint 'is supplied to the anode electrode of the organic light emitting diode OLED, and thus, the anode electrode of the organic light emitting diode OLED is initialized to the voltage of the initialization power supply Vint'. At this time, the organic light emitting diode OLED is set to a non-emission state.

After that, the emission control signal is supplied to the ith emission control line Ei. When the emission control signal is supplied to the ith emission control line Ei, the sixteenth transistor M16 is turned off. When the sixteenth transistor M16 is turned off, the electrical coupling between the first driving power ELVDD and the first electrode of the eleventh transistor M11 is interrupted.

At this time, since the second electrode of the eleventh transistor M11 is set to the voltage of the initialization power supply Vint ', the eleventh node N11 is set to a voltage obtained by adding the threshold voltage of the eleventh transistor M11 to the voltage of the initialization power supply Vint'. Here, since the twelfth node N12 is set to the voltage of the data signal DS, a voltage corresponding to the data signal DS and the threshold voltage of the eleventh transistor M11 is stored in the storage capacitor Cst.

After the voltages corresponding to the data signal DS and the threshold voltage of the eleventh transistor M11 are stored in the storage capacitor Cst, the supply of the emission control signal to the (i-1) th emission control line Ei-1 and the supply of the emission control signal to the ith emission control line Ei are sequentially stopped.

When the supply of the emission control signal to the (i-1) th emission control line Ei-1 is stopped, the thirteenth transistor M13 is turned on. When the thirteenth transistor M13 is turned on, the twelfth node N12 and the anode electrode of the organic light emitting diode OLED are electrically coupled to each other.

When the supply of the emission control signal to the ith emission control line Ei is stopped, the sixteenth transistor M16 is turned on. When the sixteenth transistor M16 is turned on, the voltage of the first driving power ELVDD is supplied to the first electrode of the eleventh transistor M11. At this time, the eleventh transistor M11 controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED corresponding to the voltage of the eleventh node N11. In fact, the pixel PXL shown in fig. 19 is driven while repeating the above-described process.

Fig. 21 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 19 is driven at the first driving frequency.

Referring to fig. 21, when the organic light emitting display device is driven at the first driving frequency, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2n during one frame period 1F. Here, the scan signal supplied to the ith first scan line S1i overlaps with the scan signal supplied to the ith second scan line S2 i.

Further, when the organic light emitting display device is driven at the first driving frequency, the emission control signals are sequentially supplied to the emission control lines E1 to En during one frame period 1F. Here, the emission control signal supplied to the ith emission control line Ei is supplied to overlap with the scan signal supplied to the (i +1) th first scan line S1i +1 and to overlap with the scan signal supplied to the ith first scan line S1i during a partial period. The data signal DS is supplied to the data lines D in synchronization with the scan signal.

Thus, as described in fig. 19 and 20, each of the pixels PXL generates light having a luminance (e.g., a predetermined luminance) corresponding to the data signal DS.

Fig. 22 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL illustrated in fig. 19 is driven at the second driving frequency.

Referring to fig. 22, when the organic light emitting display device is driven at the second driving frequency, one frame period 1F is divided into a first period T1 and a second period T2. Here, the second period T2 may be set to a wider period than the first period T1.

Further, during the first period T1, emission control signals are sequentially supplied to the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei is supplied to overlap with the scan signal supplied to the (i +1) th first scan line S1i +1 and overlap with the scan signal supplied to the ith first scan line S1i during a partial period. The data signal DS is supplied to the data lines D in synchronization with the scan signal. Accordingly, a voltage corresponding to the data signal DS is stored in each of the pixels PXL during the first period T1, and thus, each of the pixels PXL generates light having a corresponding luminance (e.g., a predetermined luminance).

During the second period T2, a plurality of emission control signals are supplied to each of the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei is supplied to overlap with the scan signal supplied to the (i +1) th first scan line S1i +1 and overlap with the scan signal supplied to the ith first scan line S1i during a partial period. Further, the voltage of the reference power Vref is supplied to the data line D during the second period T2.

The driving method will be described with reference to fig. 19 and 22. During the first period T1, the voltage of the data signal DS is stored in each of the pixels PXL. Accordingly, the eleventh transistor M11 supplies a current (e.g., a predetermined current) corresponding to a difference between the voltage of the data signal DS applied to the eleventh node N11 and the voltage of the first driving power source ELVDD applied to the first electrode of the eleventh transistor M11 to the organic light emitting diode OLED.

During a partial period of the second period T2, the emission control signal is supplied to the (i-1) th and ith emission control lines Ei-1 and Ei, and thus, the thirteenth and sixteenth transistors M13 and M16 are turned off. Thus, the pixel PXL is set to the non-emission state.

After that, the scan signal is supplied to the ith first scan line S1 i. When the scan signal is supplied to the ith first scan line S1i, the twelfth transistor M12 and the fifteenth transistor M15 are turned on. When the fifteenth transistor M15 is turned on, the anode electrode of the organic light emitting diode OLED is initialized to the voltage of the initialization power supply Vint'.

When the twelfth transistor M12 is turned on, the voltage of the reference power Vref is supplied to the twelfth node N12. When the voltage of the reference power Vref is supplied to the twelfth node N12, the voltage of the eleventh node N11 is changed by the coupling of the storage capacitor Cst. At this time, the characteristic curve of the eleventh transistor M11 is changed corresponding to the difference between the voltage applied to the eleventh node N11 and the voltage of the first driving power source ELVDD. That is, in the embodiment of the present disclosure, it is possible to prevent the characteristic of the eleventh transistor M11 from being fixed to a specific state, and thus, the display quality of the organic light emitting display device may be improved.

For this, the voltage of the reference power Vref may be set to a specific voltage within the voltage range of the data signal. Further, the voltage of the reference power Vref may be set to a voltage different from that of the first driving power ELVDD.

For example, when the first driving frequency is set to 60Hz, the pixels PXL are set to the non-emission state sixty times in one second. Further, when the second drive frequency is set to 10Hz, the pixel PXL is set to the non-emission state ten times in one second. When the number of times the pixels PXL are set to the non-emission state is differently set when the organic light emitting display device is driven at the first driving frequency and the second driving frequency, the observer recognizes a luminance difference or the like even when the same image is displayed.

On the other hand, when the emission control signal is supplied to each of the emission control lines E1 through En five times during the second period T2 when the organic light emitting display apparatus is driven at the second driving frequency (e.g., 10Hz), the number of times the pixel PXL is set to the non-emission state is set to be the same as the number of times the pixel PXL is set to the non-emission state when the organic light emitting display apparatus is driven at the first driving frequency. That is, in the embodiments of the present disclosure, the driving condition for driving the organic light emitting display device at the second driving frequency is similar to or the same as the driving condition for driving the organic light emitting display device at the first driving frequency, so that the display quality of the organic light emitting display device may be improved. Further, when the organic light emitting display device is driven at the second driving frequency, the data signal DS is supplied to the data line D during the first period T1 (e.g., only during the first period T1), and thus, power consumption of the organic light emitting display device may be reduced or minimized.

Fig. 23 is a diagram schematically illustrating an organic light emitting display device according to another embodiment of the present disclosure. In fig. 23, the same components as those of fig. 1 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 23, the organic light emitting display device according to an embodiment of the present disclosure includes a pixel unit 100, a first scan driver 110 ', a second scan driver 120', a third scan driver 170, a data driver 130 ', a timing controller 140', a host system 150, and an emission driver 160.

The gate start pulse GSP1, GSP2 or GSP3 and the clock signal CLK are supplied to the first scan driver 110 ', the second scan driver 120 ', and the third scan driver 170 at the timing controller 140 ' based on the timing signals Vsync, Hsync, DE, and CLK.

The first gate start pulse GSP1 controls a first timing of a scan signal supplied from the first scan driver 110'. The clock signal CLK is used to shift (e.g., temporally shift) the first gate start pulse GSP 1.

The second gate start pulse GSP2 controls a first timing of the scan signal supplied from the second scan driver 120'. The clock signal CLK is used to shift (e.g., temporally shift) the second gate start pulse GSP 2.

The third gate start pulse GSP3 controls a first timing of the scan signal supplied from the third scan driver 170. The clock signal CLK is used to shift (e.g., temporally shift) the third gate start pulse GSP 3.

The data driver 130' supplies a data signal to the data line D corresponding to the data driving control signal DCS. The data signal supplied to the data line D is supplied to the pixel PXL' selected by the scan signal.

When the organic light emitting display device is driven at the first driving frequency, the data driver 130' supplies a data signal to the data line D during one frame period. In this case, the data signal supplied to the data line D may be supplied in synchronization with the scan signals supplied to the first and second scan lines S1 and S2.

When the organic light emitting display device is driven at a second driving frequency lower than the first driving frequency, the data driver 130' supplies the data signal to the data line D during a first period T1 in one frame period and does not supply the data signal to the data line D during a second period T2 other than the first period T1. In addition, the first period T1 represents a period in which the scan signal is supplied to the first scan line S1 and the second scan line S2. Further, the second period T2 represents a period in which the scan signal is supplied to the third scan line S3.

The first scan driver 110' supplies a scan signal to the first scan line S1 corresponding to the first gate start pulse GSP 1. In an embodiment, the first scan driver 110' may sequentially supply scan signals to the first scan lines S1. Here, the first scan driver 110' supplies scan signals to the first scan lines S1 during a period when the organic light emitting display device is driven at the first driving frequency and a first period T1 when the organic light emitting display device is driven at the second driving frequency.

The second scan driver 120' supplies a scan signal to the second scan line S2 corresponding to the second gate start pulse GSP 2. In an embodiment, the second scan driver 120' may sequentially supply scan signals to the second scan lines S2. Here, the second scan driver 120' supplies scan signals to the second scan lines S2 during a period when the organic light emitting display device is driven at the first driving frequency and a first period T1 when the organic light emitting display device is driven at the second driving frequency.

In addition, when the transistors coupled to the first and second scan lines S1 and S2 are formed of the same conductivity type (e.g., P-type or N-type), the first and second scan drivers 110 'and 120' may be formed as one driver. This will be described in further detail later.

The third scan driver 170 supplies a scan signal to the third scan line S3 corresponding to the third gate start pulse GSP 3. In an embodiment, the third scan driver 170 may sequentially supply scan signals to the third scan line S3. Here, the third scan driver 170 supplies a scan signal to the third scan line S3 during a second period T2 when the organic light emitting display device is driven at the second driving frequency.

The pixel cell 100 includes a pixel PXL' positioned to be coupled to the data line D, the scan lines S1, S2, and S3, and the emission control line E. The pixels PXL' receive the first driving power ELVDD, the second driving power ELVSS, and the initialization power Vint supplied from the outside.

Each of the pixels PXL' is selected to receive a data signal from the data line D when a scan signal is supplied to the scan lines S1, S2, and S3 coupled thereto. The pixel PXL' receiving the data signal controls the amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode corresponding to the data signal.

In addition, each of the pixels PXL' may be coupled to one or more first scan lines S1, one or more second scan lines S2, one or more third scan lines S3, and one or more emission control lines E corresponding to a circuit structure thereof. That is, in the embodiment of the present disclosure, the signal lines S1, S2, S3, E, and D coupled to the pixel PXL 'may be variously set corresponding to the circuit structure of the pixel PXL'.

Fig. 24 is a circuit diagram illustrating an embodiment of the pixel PXL' illustrated in fig. 23. For convenience of description, the pixels PXL' located on the ith horizontal line and coupled to the mth data line Dm are shown in fig. 24. In fig. 24, the same components as those of fig. 2 are denoted by the same reference numerals, and detailed description thereof may not be repeated.

Referring to fig. 24, the pixel PXL 'according to the embodiment of the present disclosure includes an organic light emitting diode OLED and a pixel circuit 200' for controlling the amount of current supplied to the organic light emitting diode OLED.

An anode electrode of the organic light emitting diode OLED is coupled to the pixel circuit 200', and a cathode electrode of the organic light emitting diode OLED is coupled to the second driving power ELVSS. The organic light emitting diode OLED generates light having a luminance (e.g., a predetermined luminance) corresponding to the amount of current supplied from the pixel circuit 200'.

The pixel circuit 200' controls an amount of current flowing from the first driving power ELVDD to the second driving power ELVSS via the organic light emitting diode OLED in correspondence to the data signal. For this, the pixel circuit 200' includes first to fifth transistors M1 to M5, an eighth transistor M8, and a storage capacitor Cst.

The eighth transistor M8 is coupled between the first node N1 and the reference power Vref. Further, a gate electrode of the eighth transistor M8 is coupled to the ith third scanning line S3 i. The eighth transistor M8 is turned on when the scan signal is supplied to the ith third scan line S3i to supply the voltage of the reference power Vref to the first node N1. Here, the reference power Vref is set to a voltage different from that of the first driving power ELVDD.

When the organic light emitting display device is driven at the second driving frequency, the pixel PXL' shown in fig. 24 supplies the voltage of the reference power Vref to the first node N1 using the eighth transistor M8. That is, the driving process of the pixel PXL 'shown in fig. 24 is the same as that of the pixel PXL of fig. 2 except that the pixel PXL' supplies the voltage of the reference power Vref using the eighth transistor M8. Therefore, detailed description of the elements may not be repeated. Further, an eighth transistor M8 may also be added to the pixel PXL of fig. 9, 13, 14, 15, 17, and 19.

Fig. 25 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL' illustrated in fig. 24 is driven at the first driving frequency.

Referring to fig. 25, when the organic light emitting display device is driven at the first driving frequency, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2n during one frame period 1F. Here, the scan signal supplied to the ith first scan line S1i overlaps with the scan signal supplied to the ith second scan line S2 i.

Further, when the organic light emitting display device is driven at the first driving frequency, emission control signals are sequentially supplied to the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei overlaps the scan signals supplied to the (i-1) th first scan line S1i-1 and the ith first scan line S1 i. The data signal DS is supplied to the data lines D in synchronization with the scan signal.

Accordingly, a voltage corresponding to the data signal DS is stored in each of the pixels PXL ', and thus, each of the pixels PXL' generates light having a luminance (e.g., a predetermined luminance) corresponding to the data signal DS. In addition, the third scan lines S31 to S3n receive the gate-off voltage from the third scan driver 170 during a period in which the organic light emitting display device is driven at the first driving frequency. That is, when the organic light emitting display device is driven at the first driving frequency, the scan signal is not supplied to the third scan lines S31 to S3 n.

Fig. 26 is a waveform diagram illustrating an embodiment of a driving method when the pixel PXL' illustrated in fig. 24 is driven at the second driving frequency.

Referring to fig. 26, when the organic light emitting display device is driven at the second driving frequency, one frame period 1F is divided into a first period T1 and a second period T2. Here, the second period T2 may be set to a period wider than the first period T1 (e.g., having a longer duration than the first period T1).

During the first period T1, scan signals are sequentially supplied to the first scan lines S11 to S1n and the second scan lines S21 to S2 n. Here, the scan signal supplied to the ith first scan line S1i overlaps the scan signal supplied to the ith second scan line S2 i.

Further, during the first period T1, emission control signals are sequentially supplied to the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei overlaps the scan signals supplied to the (i-1) th first scan line S1i-1 and the ith first scan line S1 i. The data signal DS is supplied to the data lines D in synchronization with the scan signal. Accordingly, during the first period T1, a voltage corresponding to the data signal DS is stored in each of the pixels PXL'.

During the second period T2, a plurality of scan signals are supplied to each of the third scan lines S31 to S3 n. Here, the scan signal supplied to each of the third scan lines S31 through S3n may be supplied for each set or predetermined period of time. In the embodiment, during the second period T2, the scan signal may be supplied to the third scan lines S31 to S3n several times while being sequentially repeated.

During the second period T2, a plurality of emission control signals are supplied to each of the emission control lines E1 to En. Here, the emission control signal supplied to the ith emission control line Ei may be supplied to overlap with the scan signals supplied to the (i-1) th and ith third scan lines S3i-1 and S3 i.

The operation process of the pixel PXL' will be described. During the first period T1, the voltage of the data signal DS is stored in each of the pixels PXL'. Accordingly, the first transistor M1 supplies a current (e.g., a predetermined current) corresponding to a difference between the voltage of the first driving power ELVDD applied to the first node N1 and the voltage of the data signal DS applied to the second node N2 to the organic light emitting diode OLED.

The emission control signal is supplied to the ith emission control line Ei during a partial period of the second period T2. When the emission control signal is supplied to the ith emission control line Ei, the fifth transistor M5 is turned off. Thus, the pixel PXL' is set to the non-emission state.

After that, the scan signal is supplied to the ith third scan line S3 i. When the scan signal is supplied to the ith third scan line S3i, the eighth transistor M8 is turned on. When the eighth transistor M8 is turned on, the voltage of the reference power Vref is supplied to the first node N1. Accordingly, the characteristics of the first transistor M1 are changed, and thus, the display quality of the organic light emitting display device may be improved. Here, the third scan driver 170 sequentially supplies the scan signals to the third scan lines S31 to S3n at least two times or more (at least two times or more).

As shown in fig. 25 and 26, when the transistors coupled to the first scan lines S11 through S1n and the second scan lines S21 through S2n are set to the same conductivity type (e.g., P-type), the scan signals supplied from the first scan driver 110 'and the second scan driver 120' are set to be the same as each other. In this case, the first scan driver 110 'and the second scan driver 120' may be formed as one driver (e.g., one integrated driver circuit).

In addition, when the transistors coupled to the first scan lines S11 to S1N and the second scan lines S21 to S2N are set to different conductive types (e.g., P-type and N-type), the first scan driver 110 'and the second scan driver 120' are set to different drivers. In an embodiment, when the third transistor M3 is set as an N-type transistor as shown in fig. 9, the second scan driver 120' supplies a scan signal having a high voltage. In this case, the first scan driver 110 'supplies a scan signal having a low voltage, and the second scan driver 120' supplies a scan signal having a high voltage. Therefore, the first scan driver 110 'and the second scan driver 120' are set to different drivers.

Fig. 27 is a waveform diagram illustrating gate start pulses GSP1, GSP2, and GSP3 supplied to the first, second, and third scan drivers 110 ', 120', and 170 illustrated in fig. 23.

Referring to fig. 27, when the organic light emitting display device is driven at the first driving frequency, the first gate start pulse GSP1 is supplied to the first scan driver 110 ', and the second gate start pulse GSP2 is supplied to the second scan driver 120'. Here, the number of the first gate start pulses GSP1 supplied to the first scan driver 110 'is set to be equal to the number of the second gate start pulses GSP2 supplied to the second scan driver 120'. In addition, when the organic light emitting display device is driven at the first driving frequency, the third gate start pulse GSP3 is not supplied.

When the organic light emitting display device is driven at the second driving frequency, the first and second scan drivers 110 'and 120' supply the scan signals during the first period T1, and the third scan driver 170 supplies the scan signals during the second period T2. Here, since the second period T2 is set to be wider than the first period T1, p first gate start pulses GSP1 and p second gate start pulses GSP2 are respectively supplied to the first and second scan drivers 110 'and 120', and l (l is greater than p) third gate start pulses GSP3 are supplied to the third scan driver 170.

In the organic light emitting display device and the driving method thereof according to the present disclosure, when the organic light emitting display device is driven at a low frequency, the characteristics of the driving transistor are periodically initialized, and thus, the display quality of the organic light emitting display device may be improved. Further, when the organic light emitting display device is driven at a low frequency, each pixel is periodically set to a non-emission state. Therefore, the pixels can be driven under the same conditions as when the organic light emitting display device is driven at a high frequency.

Although in the above-described embodiments, various transistors are described as N-type transistors and other transistors are described as P-type transistors, embodiments of the present invention are not limited thereto. For example, embodiments of the present disclosure also include an embodiment in which the N-type transistor and the P-type transistor of the embodiment to be described are interchanged, and the corresponding signal level is inverted accordingly.

It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed above could be termed a second element, component, region, layer or section without departing from the spirit and scope of the inventive concept.

In addition, it will also be understood that when an element is referred to as being "between" two elements, it can be the only element between the two elements, or one or more intervening elements may also be present.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting of the inventive concepts. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes" and/or "including," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one(s) of … …" modify an entire list of elements when followed by a list of elements rather than modifying individual elements within the list of elements. Furthermore, the use of "may" in describing an embodiment of the inventive concept means "one or more embodiments of the inventive concept. Moreover, the term "exemplary" is intended to mean exemplary or illustrative.

It will be understood that when an element or layer is referred to as being "on," connected to, "coupled to," or "adjacent to" another element or layer, it can be directly on, connected to, coupled to or adjacent to the other element or layer, or one or more intervening elements or layers may be present. When an element or layer is referred to as being "directly on," directly connected to, "directly coupled to," or "directly adjacent to" another element or layer, there are no intervening elements or layers present.

As used herein, the terms "substantially," "about," and similar terms are used as approximate terms and not as degree terms, and are intended to account for inherent deviations in measured or calculated values that would be recognized by one of ordinary skill in the art.

As used herein, the term "use" and variations thereof may be considered synonymous with the term "utilize" and variations thereof, respectively.

A display device and/or any other relevant device or component in accordance with embodiments of the invention described herein may be implemented using any suitable hardware, firmware (e.g., application specific integrated circuits), software, or suitable combination of software, firmware and hardware. For example, various components of the display device may be formed on one Integrated Circuit (IC) chip or on separate IC chips. In addition, various components of the display device may be implemented on a flexible printed circuit film, a Tape Carrier Package (TCP), a Printed Circuit Board (PCB), or formed on the same substrate. Further, the various components of the display device may be processes or threads running on one or more processors in one or more computing devices executing computer program instructions and interacting with other system components for performing the various functions described herein. The computer program instructions are stored in a memory, which may be implemented in the computing device using standard memory devices, such as Random Access Memory (RAM), for example. The computer program instructions may also be stored in other non-transitory computer readable media such as, for example, CD-ROM or flash drives, etc. In addition, those skilled in the art will recognize that the functionality of the various computing devices may be combined or integrated into a single computing device, or that the functionality of a particular computing device may be distributed across one or more other computing devices, without departing from the scope of exemplary embodiments of the present invention.

Example embodiments have been disclosed herein and, although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some cases, features, characteristics and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics and/or elements described in connection with other embodiments, unless explicitly indicated otherwise, as will be apparent to one of ordinary skill in the art upon self-submission of the present application. It will therefore be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents.

Claims

1. A light emitting display device, comprising:

a first scan driver coupled to the first scan line;

a second scan driver coupled to the second scan line; and

a pixel, comprising:

a first transistor including a first electrode coupled to a first node, a second electrode, and a gate electrode coupled to a second node;

a second transistor including a first electrode coupled to a data line, a second electrode coupled to the first node, and a gate electrode coupled to one of the first scan lines;

a third transistor including a first electrode coupled to the second electrode of the first transistor, a second electrode coupled to the second node, and a gate electrode coupled to one of the second scan lines; and

a capacitor coupled to the second node.

2. The light-emitting display device of claim 1,

wherein the pixel further comprises: a fourth transistor including a first electrode coupled to the capacitor, a second electrode coupled to an initialization power supply, and a gate electrode coupled to one of the second scan lines.

3. The light-emitting display device of claim 2,

wherein the pixel further comprises: a fifth transistor including a first electrode coupled to the first node, a second electrode coupled to the capacitor, and a gate electrode coupled to one of emission control lines.

4. The light-emitting display device according to claim 3,

wherein the pixel further comprises:

a light emitting diode; and

a sixth transistor coupled between the first transistor and the light emitting diode.

5. The light-emitting display device according to claim 4,

wherein the sixth transistor includes a gate electrode coupled to one of the emission control lines.

6. The light-emitting display device according to claim 5,

wherein the light emitting display device is configured to be driven at a first driving frequency or a second driving frequency lower than the first driving frequency.

7. The light-emitting display device of claim 6,

wherein the first scan driver is configured to supply a first scan signal to the first scan line during a first period and a second period of one frame period when the light emitting display device is driven at the second driving frequency, and

wherein the second scan driver is configured to supply a second scan signal to the second scan line during the first period and not supply the second scan signal to the second scan line during the second period when the light emitting display device is driven at the second driving frequency.

8. The light-emitting display device according to claim 7,

wherein the second time period is longer than the first time period.

9. The light-emitting display device according to claim 7,

wherein the first scan driver is configured to supply the first scan signal to the first scan line during one frame period when the light emitting display device is driven at the first driving frequency, and

wherein the second scan driver is configured to supply the second scan signal to the second scan line during one frame period when the light emitting display device is driven at the first driving frequency.

10. The light-emitting display device of claim 9,

wherein one frame period of the first driving frequency is shorter than one frame period of the second driving frequency.

11. The light-emitting display device of claim 9,

further comprising: an emission driver configured to supply an emission control signal to the emission control line during the first and second periods.

12. The light-emitting display device of claim 11,

further comprising: a data driver configured to supply a data signal to the data line during the first period and supply a voltage of a reference power source to the data line during the second period.

13. The light-emitting display device according to claim 3,

wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are P-type transistors.

14. The light-emitting display device according to claim 3,

wherein the first transistor, the second transistor, and the fifth transistor are P-type transistors, and

wherein the third transistor and the fourth transistor are N-type transistors.

15. The light-emitting display device according to claim 4,

wherein the sixth transistor is a P-type transistor.