CN115061317A

CN115061317A - Display panel and display device

Info

Publication number: CN115061317A
Application number: CN202210747235.1A
Authority: CN
Inventors: 孙凯铭; 赖国昌; 陈榕; 伍黄尧; 郭亚兰; 问欣悦
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2022-06-28
Filing date: 2022-06-28
Publication date: 2022-09-16
Anticipated expiration: 2042-06-28
Also published as: CN115061317B

Abstract

The invention discloses a display panel and a display device, belonging to the technical field of display, wherein the display panel comprises a first substrate, a second substrate and a liquid crystal layer; the display panel comprises a plurality of sub-pixels, a plurality of scanning lines and a plurality of first data lines; the sub-pixel comprises a first electrode, a second electrode, a third electrode, a first switching transistor and a second switching transistor; the first substrate comprises a first electrode and a second electrode, and the second substrate comprises a third electrode; the first switch transistor is electrically connected with the scanning line, the first data line and the first electrode; the second switch transistor is electrically connected with the scanning line, the second data line and the third electrode; in the direction perpendicular to the plane of the display panel, the first electrodes and the third electrodes are in one-to-one correspondence, and at least part of the first electrodes and the third electrodes are overlapped. The display device comprises the display panel. The invention not only can realize the free switching between the wide visual angle display and the narrow visual angle display, but also can improve the display quality.

Description

Display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

A Liquid Crystal Display (LCD) has advantages of good picture quality, small size, light weight, low driving voltage, low power consumption, no radiation, and relatively low manufacturing cost, and is dominant in the field of flat panel displays.

With the continuous progress of the liquid crystal display technology, the viewing angle of the display has gradually widened, and people want to effectively protect business confidentiality and personal privacy while enjoying the visual experience brought by a large viewing angle, so as to avoid business loss or embarrassment caused by the leakage of screen information. Therefore, in addition to the requirement of wide viewing angle, in many cases, the display device is required to have a function of switching between a wide viewing angle and a narrow viewing angle.

When the existing peep-proof display is used for displaying at a narrow viewing angle, the peep-proof display is provided with a horizontal electric field for normal display and a vertical electric field for peep-proof, wherein the horizontal electric field is used for driving liquid crystal molecules to rotate in a horizontal plane, and the vertical electric field can interfere with a normal liquid crystal turnover angle, so that liquid crystal deflection angles of different pixel regions have large difference, and then the problems of uneven display brightness, flickering display pictures and the like are easily caused under the narrow viewing angle display state.

Therefore, it is an urgent need to provide a display panel and a display device that can not only realize the free switching between the wide viewing angle display and the narrow viewing angle display, but also improve the display quality.

Disclosure of Invention

In view of the above, the present invention provides a display panel and a display apparatus, so as to solve the problems that the peep-proof display device in the prior art is prone to display brightness unevenness and display screen flicker.

The invention discloses a display panel, comprising: the liquid crystal display panel comprises a first substrate, a second substrate and a liquid crystal layer, wherein the first substrate and the second substrate are oppositely arranged, and the liquid crystal layer is positioned between the first substrate and the second substrate; the display panel comprises a plurality of sub-pixels, a plurality of scanning lines and a plurality of first data lines, wherein the scanning lines and the first data lines are mutually insulated and crossed to define a region where the sub-pixels are located; the sub-pixel comprises a first electrode, a second electrode, a third electrode, a first switching transistor and a second switching transistor; the first substrate comprises a first electrode and a second electrode, and the second substrate comprises a third electrode; the grid electrode of the first switch transistor is electrically connected with the scanning line, the first pole of the first switch transistor is electrically connected with the first data line, and the second pole of the first switch transistor is electrically connected with the first electrode; a grid electrode of the second switch transistor is electrically connected with the scanning line, a first pole of the second switch transistor is electrically connected with the second data line, and a second pole of the second switch transistor is electrically connected with the third electrode; in the direction perpendicular to the plane of the display panel, the first electrodes and the third electrodes are in one-to-one correspondence, and at least part of the first electrodes and the third electrodes are overlapped.

Based on the same inventive concept, the invention also discloses a display device, which comprises the display panel.

Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:

the invention adds the second switch transistor and the second data line for controlling the third electrode for peep-proof in the display panel, so that the data voltage loaded to the third electrode can be fed independently through the second data line under the conduction of the second switch transistor, namely the data voltage of the third electrode can be controlled independently, when scanning each row of sub-pixels line by line through the scanning line, the first switch transistor controls to load the data voltage signal of the first data line to the first electrode, the polarity applied to the third electrode corresponding to one first electrode in the same sub-pixel is controlled independently through the second switch transistor and the second data line, the polarity of the data voltage applied to the first electrode in the same sub-pixel is set to be the same as the polarity of the voltage applied to the third electrode, two capacitor poles can be formed between the first electrode and the third electrode, when the voltage difference is applied to the two capacitor poles to form a vertical electric field, the difference between the electric field formed by the first electrode and the third electrode in one of the two adjacent sub-pixels in the first direction and the electric field formed by the first electrode and the third electrode in the other sub-pixel can be weakened, so that the deflection angles of the liquid crystal molecules in the two adjacent sub-pixels in the first direction are the same as far as possible, the problem of brightness difference of the two adjacent sub-pixels in the first direction can be avoided, the display quality is favorably improved, and the display effect is ensured.

Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic diagram of a planar structure of a display panel in the prior art;

FIG. 2 is a schematic view of the partial cross-sectional structure of FIG. 1;

FIG. 3 is a schematic diagram of a polarity inversion driving period and a polarity arrangement of sub-pixels corresponding to each frame when the display panel of FIG. 1 adopts a column inversion driving scheme;

FIG. 4 is a schematic view of the liquid crystal deflection of the adjacent sub-pixels after the privacy electrode of the display panel of FIG. 1 is applied with a voltage;

fig. 5 is a schematic plan view of a display panel according to an embodiment of the present invention;

FIG. 6 is a schematic sectional view taken along line A-A' of FIG. 5;

FIG. 7 is a schematic diagram of a liquid crystal deflection of an adjacent sub-pixel after a voltage is applied to a third electrode of the display panel of FIG. 5;

FIG. 8 is another schematic diagram of liquid crystal deflection of an adjacent sub-pixel after a voltage is applied to the third electrode of the display panel of FIG. 5;

FIG. 9 is an enlarged partial schematic view of the first and third electrodes of FIG. 5;

FIG. 10 is a schematic view of an alternative cross-sectional configuration taken along line A-A' of FIG. 5;

FIG. 11 is a schematic view of an alternative cross-sectional configuration taken along line A-A' of FIG. 5;

FIG. 12 is a schematic view of an alternative cross-sectional configuration taken along line A-A' of FIG. 5;

fig. 13 is a schematic plan view of a display device according to an embodiment of the present invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

In the prior art, as shown in fig. 1 and fig. 2, fig. 1 is a schematic plane structure of a display panel in the prior art, and fig. 2 is a schematic partial sectional structure of fig. 1, where a display panel 000 ' in the prior art includes a sub-pixel P ', a scan line G ' and a data line S ' are crossed and insulated to define a position of the sub-pixel P ', the sub-pixel P ' includes a thin film transistor T ' and a pixel electrode 101 ' that are electrically connected, and further includes a common electrode 102 ', an array substrate 10 ' includes the above structure, a color filter substrate 20 ' includes a color resistance layer and a black matrix layer, and further includes a peep-preventing electrode 201 ', and when the display panel 000 ' realizes normal wide-viewing-angle display, a dc common voltage (generally 0V or close to 0V, for example, -0.1V) is applied to the common electrode 102 ', and a dc voltage is also applied to the peep-preventing electrode 201 ', and an electrical distance between the dc voltage applied to the common electrode 201 ' and the dc common voltage applied to the common electrode 102 ' is increased When the potential difference is small (for example, less than 1V), because the bias voltage between the privacy protection electrode 201 'and the common electrode 102' is small, the formed vertical electric field is small, the vertical electric field has little influence on the tilt angle of the liquid crystal molecules of the liquid crystal layer 30 ', the display panel 000' drives the liquid crystal molecules of the liquid crystal layer 30 'to deflect between the array substrate 10' and the color film substrate 20 'by the in-plane electric field formed between the pixel electrode 101' and the common electrode 102 'on the array substrate 10', and the liquid crystal molecules realize a display mode with a wide viewing angle under the action of a strong in-plane electric field. Since the anti-peeping electrode 201 'applies a dc voltage, the anti-peeping electrode 201' in the prior art is generally a full-surface structure disposed on a side of the color filter substrate facing the liquid crystal layer.

When the display panel 000 ' in the prior art realizes narrow viewing angle display, the peep prevention electrode 201 ' generally adopts a larger constant voltage (assumed to be +2V), a dc common voltage (generally 0V or close to 0V, for example, -0.1V) is applied to the common electrode 102 ', and when a potential difference between the constant voltage applied to the peep prevention electrode 201 ' and the dc common voltage applied to the common electrode 102 ' is larger (for example, larger than 1V), a larger bias voltage exists between the common electrode 102 ' on the array substrate 10 ' and the peep prevention electrode 201 ' on the color filter substrate 20 ', so that a stronger vertical electric field is formed between the array substrate 10 ' and the color filter substrate 20 '. Liquid crystal molecules of the liquid crystal layer 30 'are deflected under the action of the vertical electric field, and if the liquid crystal molecules are negative liquid crystal molecules, the liquid crystal molecules are in an upright state when the vertical electric field is not formed, a strong vertical electric field is formed to reduce the inclination angle between the liquid crystal molecules and the array substrate 10', the liquid crystal molecules are changed from the upright state to an inclined state or a lying state, so that in the oblique viewing direction of the screen of the display panel 000 ', light passing through the liquid crystal molecules is mismatched with the polarization directions of the upper and lower polarizers due to phase delay, a light leakage phenomenon occurs, and when the screen is viewed from the oblique viewing direction of the display panel 000', the contrast of the screen is reduced to influence the viewing effect, so that the viewing angle is reduced, thereby realizing a narrow viewing angle mode, namely, switching from a wide viewing angle display mode to a narrow viewing angle display mode.

In the related art, the pixel electrodes 101 ' in the first substrate 10 ' are driven by column inversion, where the data voltages of the sub-pixels in the same column have the same polarity, and the adjacent columns have opposite polarities, as shown in fig. 1, a plurality of sub-pixels P ' arranged in the first direction X ' form a sub-pixel row PH ', a plurality of sub-pixels P ' arranged in the second direction Y ' form a sub-pixel column PL ', and the pixel electrodes 101 ' corresponding to the plurality of sub-pixels P ' sequentially arranged in the first direction X ' are alternately used by positive polarity, negative polarity, positive polarity, and negative polarity … …, that is, the data voltage applied to the pixel electrodes 101 ' through the data lines S ' is a column inversion driving signal with alternating positive and negative polarities (e.g., a column inversion driving signal with alternating positive and negative polarities of +5V and-5V). If two frames are taken as a polarity inversion driving period for example, in a polarity inversion driving period, the polarity arrangement of two adjacent frames is the same, and the polarities of the sub-pixels P ' are opposite, as shown in fig. 3, fig. 3 is a schematic diagram of a polarity inversion driving period and the polarity arrangement of the sub-pixels corresponding to each frame when the display panel of fig. 1 adopts the column inversion driving manner, and the polarity of all the sub-pixels of a frame is inverted once when the frame scans one frame, specifically, for the 6 sub-pixel columns PL ' connected by the 6 data lines S ' (S1 ', S2 ', S3 ', S4 ', S5 ', S6 ') enclosed by the dashed line frame in fig. 1, the polarity arrangement of the 1 st frame is +, - +, -, "+" indicates that the polarity of the data voltage loaded to the sub-pixel is positive, and "-" indicates that the polarity of the data voltage loaded to the sub-pixel is negative, then, in frame 2, the polarity arrangement of the 6 sub-pixels P 'connected to the 6 data lines S' is changed to-, +, and + sequentially, and the inversion is performed in a column inversion driving manner. By inverting the polarity of the data voltage of all the subpixels P 'once every scanning frame, it is possible to prevent the fixed potential from adsorbing impurity ions in the liquid crystal layer 30' to cause problems such as image sticking, and thus to improve the display quality.

However, if the column inversion driving method is adopted, as shown in fig. 4, fig. 4 is a schematic diagram of liquid crystal deflection of adjacent sub-pixels after the voltages are applied to the privacy electrodes of the display panel of fig. 1, in the narrow viewing angle display mode, because two capacitor electrodes are formed between the pixel electrode 101 ' and the privacy electrode 201 ', and the voltage difference applied to the two capacitor electrodes forms an electric field E1 ' and an electric field E2 ', while +5V and-5V are respectively applied to the pixel electrodes 101 ' corresponding to two adjacent sub-pixels P ' in the first direction X ', so that the electric field E1 ' formed by the pixel electrode 101 ' and the privacy electrode 201 ' in one sub-pixel P ' and the electric field E2 ' formed by the pixel electrode 101 ' and the privacy electrode 201 ' in the other sub-pixel P ' have a large difference, and the presence of the electric fields E1 ' and E2 ' may interfere with the normal deflection angle of liquid crystal molecules in the display panel, if the deflection angle of the liquid crystal molecules in the sub-pixel P 'corresponding to the electric field E1' is θ 1 ', and the deflection angle of the liquid crystal molecules in the sub-pixel P' corresponding to the electric field E2 'is θ 2', the deflection angle θ 1 'and the deflection angle θ 2' have a large difference, it is easy to cause a difference in luminance between two adjacent sub-pixels P 'in the first direction X', thereby causing display flicker.

Based on the above problem, the application provides a display panel and display device, not only can realize the free switching of wide visual angle demonstration and narrow visual angle demonstration, can improve again and show the quality, guarantee display effect. Specific embodiments of the display panel and the display device proposed in the present application are described in detail below.

Referring to fig. 5 and fig. 6 in combination, fig. 5 is a schematic plan structure diagram of a display panel according to an embodiment of the present invention, and fig. 6 is a schematic sectional structure diagram along the direction of a-a' in fig. 5 (it can be understood that, for clearly illustrating the structure of the present embodiment, fig. 5 is filled with transparency), a display panel 000 provided in the present embodiment includes: a first substrate 10 and a second substrate 20 disposed opposite to each other, and a liquid crystal layer 30 between the first substrate 10 and the second substrate 20;

the display panel 000 includes a plurality of sub-pixels P, a plurality of scan lines G and a plurality of first data lines S1, the scan lines G and the first data lines S1 are insulated from each other and cross to define a region where the sub-pixels P are located;

the sub-pixel P includes a first electrode 101, a second electrode 102, a third electrode 201, a first switching transistor T1, and a second switching transistor T2;

the first substrate 10 includes a first electrode 101, a second electrode 102, and the second substrate 20 includes a third electrode 201;

a gate electrode of the first switching transistor T1 is electrically connected to the scan line G, a first electrode of the first switching transistor T1 is electrically connected to the first data line S1, and a second electrode of the first switching transistor T1 is electrically connected to the first electrode 101;

a gate electrode of the second switching transistor T2 is electrically connected to the scan line G, a first electrode of the second switching transistor T2 is electrically connected to the second data line S2, and a second electrode of the second switching transistor T2 is electrically connected to the third electrode 201;

in a direction Z perpendicular to the plane of the display panel 000, the first electrodes 101 correspond to the third electrodes 201 one to one, and the first electrodes 101 at least partially overlap with the third electrodes 201.

Specifically, the display panel 000 of the embodiment may be a liquid crystal display panel, and the display panel 000 includes a first substrate 10 and a second substrate 20 that are oppositely disposed, and a liquid crystal layer 30 located between the first substrate 10 and the second substrate 20, optionally, the first substrate 10 may be an array substrate, the second substrate 20 may be a color film substrate, and the first substrate 10 and the second substrate 20 are arranged in a box-to-box manner on two sides of the liquid crystal layer 30, so as to form a structure of the liquid crystal display panel. The display panel 000 includes a plurality of sub-pixels P, a plurality of scan lines G and a plurality of first data lines S1, the scan lines G and the first data lines S1 are insulated and crossed to define a region where the sub-pixels P are located, optionally, in the figure of the present embodiment, an example of an array arrangement of the plurality of sub-pixels P is taken as an example, the plurality of sub-pixels P arranged along the first direction X form a sub-pixel row PH, and the plurality of sub-pixels P arranged along the second direction Y form a sub-pixel column PL. The present embodiment provides that each sub-pixel P at least includes a first electrode 101, a second electrode 102, a third electrode 201, a first switch transistor T1 and a second switch transistor T2, wherein the first electrode 101 may be a pixel electrode formed in each sub-pixel P, the second electrode 102 may be a common electrode (not illustrated in fig. 1) for applying a common voltage during image display, the first switch transistor T1 may be a P-type thin film transistor or an N-type thin film transistor, and the first switch transistor T1 may be disposed near a position where the scan line G crosses the first data line S1. The first switch transistor T1 includes a gate T1G, a first pole T1S (which may be understood as a source of the first switch transistor T1 of the present embodiment) and a second pole T1D (which may be understood as a drain of the first switch transistor T1 of the present embodiment), wherein the gate T1G of the first switch transistor T1 is electrically connected to the corresponding scan line G, the first pole T1S (source) of the first switch transistor T1 is electrically connected to the corresponding first data line S1, and the second pole T1D (drain) of the first switch transistor T1 is electrically connected to the corresponding first electrode 101 through a via. The first electrode 101 and the second electrode 102 may be transparent electrodes, and are made of transparent conductive materials such as Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO). In this embodiment, when the first electrode 101 is a pixel electrode and the second electrode 102 is a common electrode, the second electrode 102 may be a planar structure, and a hollow portion is formed only at a via position where the first electrode 101 is electrically connected to the second pole T1D of the first switch transistor T1, so as to avoid a short circuit between the second electrode 102 and the second pole T1D of the first switch transistor T1. Each first electrode 101 may include a plurality of strip-shaped sub-electrodes 1011 arranged at intervals, that is, the first electrode 101 may have a comb-tooth-shaped structure. When the display panel 000 of the embodiment displays, the gate T1G of the first switch transistor T1 is connected to a scan driving circuit (not shown in the drawings) in the display panel via a scan line G, the first switch transistor T1 is turned on line by line to turn on the first switch transistor T1, a data voltage is applied to the first electrode 101 serving as a pixel electrode through the first data line S1, an electric field is formed between the first electrode 101 serving as a pixel electrode and the second electrode 102 serving as a common electrode, and liquid crystal molecules of the liquid crystal layer 30 are deflected in the electric field, so as to control whether light is emitted or not, thereby implementing the display function of the display panel 000.

It is understood that, in fig. 6 of this embodiment, only the first electrode 101 is located on the side of the second electrode 102 close to the liquid crystal layer 30 as an example for illustration, and an insulating layer for insulating is disposed between the film layer where the first electrode 101 is located and the film layer where the second electrode 102 is located, in specific implementation, the arrangement modes of the two include, but are not limited to, and the positions of the first electrode 101 and the second electrode 102 may be replaced with each other, that is, the second electrode 102 may be located on the side of the first electrode 101 close to the liquid crystal layer 30. Or when the display panel 000 of this embodiment is an in-plane switching (IPS) mode liquid crystal display panel, the first electrode 101 and the second electrode 102 may also be located in the same film layer and insulated from each other, which is not described herein again, and can be understood with reference to the structure of the liquid crystal display panel in the related art.

In the display panel 000 of the embodiment, the second substrate 20 further includes a third electrode 201, the third electrode 201 may be understood as a privacy electrode of the display panel 000, and may also be understood as a viewing angle control electrode, and the display panel 000 may be freely switched between a wide viewing angle mode and a narrow viewing angle mode by applying different control voltages to the third electrode 201. The display panel 000 further includes a second switching transistor T2 and a second data line S2, the second switching transistor T2 may be a P-type thin film transistor or an N-type thin film transistor, and the second switching transistor T2 may be disposed near a position where the scan line G crosses the second data line S2. The gate T2G of the second switching transistor T2 is electrically connected to the scan line G, the first pole T2S (i.e., source) of the second switching transistor T2 is electrically connected to the second data line S2, and the second pole T2D (i.e., drain) of the second switching transistor T2 is electrically connected to the third electrode 201 through a via. When the display panel 000 realizes a narrow viewing angle display state, i.e., a privacy display mode, the gate T2G of the second switch transistor T2 is also connected to a scan driving circuit (not shown in the figure) in the display panel via a scan line G, the second switch transistor T2 is turned on line by line to turn on the second switch transistor T2, and a data voltage is applied to the third electrode 201 through the second data line S2, so that a vertical electric field is formed between the third electrode 201 and the first electrode 101 serving as a pixel electrode, and liquid crystal molecules of the liquid crystal layer 30 are deflected and changed in the electric field, thereby changing the emitting direction of light, and realizing a narrow viewing angle display function of the display panel 000.

In the present embodiment, the second switching transistor T2 and the second data line S2 for controlling the third electrode 201 used as the peep-proof electrode are additionally arranged in the display panel 000, so that the data voltage applied to the third electrode 201 can be independently fed through the second data line S2 when the second switching transistor T2 is turned on, that is, the data voltage of the third electrode 201 can be independently controlled, when the rows of sub-pixels P are scanned row by row through the scan line G, the first switching transistor T1 controls the data voltage signal of the first data line S1 to be applied to the first electrode 101, and the second switching transistor T2 controls the data voltage signal of the second data line S2 to be applied to the third electrode 201.

The display panel 000 of the present embodiment includes a wide viewing angle display mode and a narrow viewing angle display mode;

as shown in fig. 7, fig. 7 is a schematic diagram of liquid crystal deflection of the adjacent sub-pixels after the voltage is applied to the third electrode of the display panel of fig. 5, and when the display panel 000 implements the normal wide viewing angle display mode, the second data line S2 is floating or the second data line S2 is switched to zero potential (0V). At this time, a dc common voltage (generally 0V or close to 0V, for example, -0.1V) is applied to the second electrode 102, and the scanning line G turns on each second switching transistor T2, and a dc voltage is applied to each third electrode 201 through the plurality of second data lines S2, optionally, the second data lines S2 may also be in a floating state, that is, no potential signal is connected to the second data lines S2, so that when the potential difference between the dc voltage applied to the third electrodes 201 and the dc common voltage applied to the second electrode 102 is small (for example, the dc voltage applied to the second data lines S2 is 0V, and the potential difference between the dc voltage applied to the third electrodes 201 and the dc common voltage applied to the second electrodes 102 is less than 1V), since the bias voltage between the third electrodes 201 and the second electrodes 102 is small, the vertical electric field is small, and the inclination angle of the liquid crystal molecules of the liquid crystal layer is not greatly affected by the vertical electric field, that is, the third electrode 201 does not affect the rotation state of the liquid crystal molecules and the contrast of the display panel, and thus does not produce the peep-proof effect. At this time, the scan line G simultaneously turns on the first switching transistor T1, and a column inversion driving voltage (e.g., a column inversion driving signal with alternating positive and negative polarities of +5V and-5V) is applied to each first electrode 101 corresponding to each sub-pixel column PL through the first data line S1, so that the display panel 000 is formed by the in-plane electric field E3 and the in-plane electric field E4 formed between the first electrode 101 as a pixel electrode and the second electrode 102 as a common electrode on the first substrate 10 to drive the liquid crystal molecules in the liquid crystal layer 30 to deflect between the first substrate 10 and the second substrate 20, and the liquid crystal molecules realize a wide viewing angle display mode under the strong in-plane electric field.

As shown in fig. 8, fig. 8 is another schematic diagram of liquid crystal deflection of adjacent sub-pixels after voltage is applied to the third electrode of the display panel of fig. 5, and when the display panel 000 implements the narrow viewing angle display mode, the polarity of the applied potential of the second data line S2 corresponding to the same sub-pixel P is the same as that of the applied potential of the first data line S1. A dc common voltage (typically 0V or approximately 0V, for example, -0.1V) is applied to the second electrode 102, the first switching transistor T1 is turned on by the scanning line G, a column inversion driving voltage (for example, a column inversion driving signal in which positive and negative polarities of +5V and-5V are alternated) is applied to each first electrode 101 corresponding to each sub-pixel column PL through the first data line S1, the liquid crystal molecules in the in-plane electric field driving liquid crystal layer 30 formed between the first electrode 101 serving as a pixel electrode and the second electrode 102 serving as a common electrode on the first substrate 10 of the display panel 000 are deflected between the first substrate 10 and the second substrate 20, and the liquid crystal molecules realize a display effect under a strong in-plane electric field. And the second switching transistor T2 is turned on by the scanning line G, and a column inversion driving voltage is applied to each third electrode 201 corresponding to each sub-pixel column PL through the second data line S2, so that a large bias voltage exists between the second electrode 102 on the first substrate 10 and the third electrode 201 on the second substrate 20, and thus a strong vertical electric field is formed between the first substrate 10 and the second substrate 20. Liquid crystal molecules of the liquid crystal layer 30 are deflected under the action of the vertical electric field, and if the liquid crystal molecules are negative liquid crystal molecules, the liquid crystal molecules are in an upright state when the vertical electric field is not formed, a strong vertical electric field is formed to reduce the inclination angle between the liquid crystal molecules and the first substrate 10, and the liquid crystal molecules are changed from the upright state to an inclined state or a lying state, so that in the oblique viewing direction of the screen of the display panel 000, light passing through the liquid crystal molecules is mismatched with the polarization directions of the upper and lower polarizers due to phase delay, a light leakage phenomenon occurs, and when the screen is viewed from the oblique viewing direction of the display panel 000, the contrast of the screen is reduced to influence the viewing effect, so that the viewing angle is reduced, thereby realizing a narrow viewing angle mode, namely, switching from a wide viewing angle display mode to a narrow viewing angle display mode.

And since the first electrodes 101 correspond to the third electrodes 201 one to one in the direction Z perpendicular to the plane of the display panel 000 in the present embodiment, the first electrodes 101 and the third electrodes 201 at least partially overlap, the polarity applied to the third electrode 201 corresponding to one first electrode 101 in the same subpixel P is individually controlled by the second switching transistor T2 and the second data line S2, the polarity of the data voltage applied to the first electrode 101 in the same subpixel P may be set to be the same as the polarity of the voltage applied to the third electrode 201, that is, the second switching transistor T2 is turned on by the scanning line G, the voltage signal supplied to each third electrode 201 corresponding to each sub-pixel column PL through the second data line S2 is also a column inversion driving voltage, when a data voltage of +5V is applied to the first electrode 101 through the first data line S1, a driving signal of +2V is applied to the third electrode 201 of the subpixel P through the second data line S2; when a data voltage of-5V is applied to the first electrode 101 through the first data line S1, a driving signal of-2V is applied to the third electrode 201 of the sub-pixel P through the second data line S2, and a capacitance is formed between the first electrode 101 and the third electrode 201, an electric field E1 and an electric field E2 are formed by applying a voltage difference between the capacitance and the two electrodes, the data voltages of the first electrode 101 corresponding to two sub-pixels P adjacent to each other in the first direction X are +5V and-5V, respectively, and the driving voltages of the third electrode 201 corresponding to the data voltages are +2V and-2V, respectively, so as to reduce a difference between the electric field E1 formed by the first electrode 101 and the third electrode 201 in one of the two sub-pixels P adjacent to each other in the first direction X and the electric field E2 formed by the first electrode 101 and the third electrode 201 in the other sub-pixel P, as far as possible, the electric field E1 and the electric field E2 are equal, and the deflection angle θ 1 of the liquid crystal molecules in the sub-pixel P corresponding to the electric field E1 and the deflection angle θ 2 of the liquid crystal molecules in the sub-pixel P corresponding to the electric field E2 are also as same as possible, so that the problem of brightness difference between two adjacent sub-pixels P in the first direction X can be avoided, which is beneficial to improving the display quality and ensuring the display effect.

It is to be understood that the drawings of this embodiment are only for illustrating the structure of the display panel, and in particular, the structure of the display panel includes but is not limited to this, and may also include other structures capable of implementing a display function, which can be specifically understood with reference to the structure of the liquid crystal display panel in the related art, and this embodiment is not described herein again.

Optionally, as shown in fig. 6, the second substrate 20 of this embodiment may be a color filter substrate, and the second substrate 20 may include a color resist layer 21 and a black matrix layer 22 on a side of the film layer away from the third electrode 201. The film layer on which the third electrode 201 is located is closer to the first substrate 10 than the color resist layer 21 and the black matrix layer 22, so that the distance between the second electrode 102 and the third electrode 201 can be reduced in the narrow viewing angle display mode, and the vertical electric field can be enhanced. The color-resisting layer 21 may include color-resisting materials of three colors of red (R), green (G) and blue (B), which respectively correspond to the sub-pixels P of the three colors of red, green and blue. In the embodiment, the black matrix layer 22 is disposed in a manner including, but not limited to, sequentially arranging the red, green, and blue sub-pixels, and the light-shielding strip 221 covers the joint of the two adjacent sub-pixels.

Optionally, the first substrate 10 serving as the array substrate in this embodiment may include a first switching transistor T1, a second switching transistor T2, a scan line G, a first data line S1, a second data line S2, a first electrode 101, and a second electrode 102, that is, the above structures may all be the arrangement structures in the first substrate 10, and the first substrate 10 may include a first substrate, a plurality of conductive film layers (such as a metal film layer and a transparent conductive film layer) located on one side of the first substrate close to the liquid crystal layer 30, and an insulating layer arranged between the conductive film layers, so as to manufacture the above structures. In the embodiment, the second pole T2D (drain) of the second switch transistor T2 and the second electrode 201 in the second substrate 20 are electrically connected by a pad-up structure, or by a separate conductive connection portion, so that the second pole T2D of the second switch transistor T2 in the first substrate 10 and the second electrode 201 in the second substrate 20 are electrically connected, or by other electrical connection methods, which only needs to be satisfied that the conductive structures on the two opposing substrates can be electrically connected to each other to realize signal transmission, and the embodiment is not limited in detail herein.

Optionally, the first data line S1 and the second data line S2 in this embodiment may be disposed in the same layer, that is, the first data line S1 and the second data line S2 may be fabricated in the same layer and in the same process in a synchronous step, which is beneficial to reducing the overall thickness of the display panel 000 and improving the process efficiency. It should be understood that the drawings of the present embodiment are only illustrated with different filling patterns to distinguish the first data line S1 from the second data line S2, and do not indicate that the manufacturing materials of the two are different.

In some alternative embodiments, please refer to fig. 5-8 and fig. 9 in combination, fig. 9 is a partially enlarged schematic view of the first electrode and the third electrode in fig. 5 (it can be understood that, in order to illustrate the structure of the present embodiment, fig. 9 is filled with transparency), in the present embodiment, in a direction perpendicular to the plane of the display panel, the first electrode 101 and the third electrode 201 are overlapped with each other.

In this embodiment, it is explained that, in a direction Z perpendicular to a plane where the display panel 000 is located, the first electrodes 101 correspond to the third electrodes 201 one by one, and the first electrodes 101 coincide with the third electrodes 201, which can be understood that an edge of the first electrode 101 substantially coincides with an edge of the third electrode 201, so that each sub-pixel P includes one first electrode 101 and one third electrode 201, and while the first electrodes 101 correspond to the third electrodes 201 one by one, an area of the first electrode 201 may be substantially equal to an area of the third electrode 201, thereby avoiding a phenomenon that a partial area generates a pressure difference due to misalignment between the first electrode 101 and the third electrode 201, which causes a display flicker, and further facilitating to better improve display quality.

It can be understood that, since the first switch transistor T1 and the second switch transistor T2 need to be separately disposed in the region of one sub-pixel P, the connection region 101A of the first electrode 101 and the second pole T1D of the first switch transistor T1 and the connection region 201A of the third electrode 201 and the second pole T2D of the second switch transistor T2 need to be disposed separately and not to overlap, and therefore, in the direction perpendicular to the plane of the display panel in the present embodiment, the first electrode 101 and the third electrode 201 coincide with each other, and it can be understood that three edges of the first electrode 101 away from the connection region 101A of the first switch transistor T1 and three edges of the third electrode 201 away from the connection region 201A of the second switch transistor T2 illustrated in fig. 9 coincide.

Alternatively, as shown in fig. 5 to 9, the first electrode 101 used as a pixel electrode in this embodiment includes a plurality of slits 101K, and a strip-shaped sub-electrode 1011 is included between adjacent slits 101K, that is, the first electrode 101 may have a comb-tooth-shaped structure, and the third electrode 201 corresponding to one sub-pixel P has a whole-surface structure. The third electrode 201 in this embodiment is used as a peep-proof electrode, and liquid crystal molecules are deflected in the longitudinal direction under a vertical electric field formed by the third electrode 201 and the second electrode 102, so that the third electrode 201 does not need to form an in-plane electric field with other electrodes, and the third electrode 201 corresponding to one sub-pixel P can be set to be a whole-surface structure, which is beneficial to improving the process efficiency of the display panel 000. The first electrode 101 used as the pixel electrode needs to form an in-plane electric field with the second electrode 102, so that the slits 101K of the first electrode 101 enable the electric field to pass through and form a parallel electric field with the second electrode 102, which is beneficial to providing an electric field for driving liquid crystal molecules to deflect, and thus, a normal display effect of the display panel 000 is achieved.

In some alternative embodiments, please refer to fig. 5, fig. 6 and fig. 10 in combination, fig. 10 is another schematic cross-sectional structure diagram along a-a' direction in fig. 5, in this embodiment, the first substrate 10 at least includes a first substrate 011, and a first metal layer 012, a second metal layer 013, a first electrode layer 014, and a second electrode layer 015 located on a side of the first substrate 011 facing the second substrate 20, and the second electrode layer 015 is located on a side of the first electrode layer 014 facing away from the first substrate 011;

the scan line G, the gate T1G of the first switch transistor T1, and the gate T2G of the second switch transistor T2 are located on the first metal layer 012;

the first data line S1, the second data line S2, the first pole T1S and the second pole T1D of the first switch transistor T1, and the first pole T2S (source) and the second pole T2D (drain) of the second switch transistor T2 are located on the second metal layer 013;

the first electrode 101 is located on the first electrode layer 014, and the second electrode 102 is located on the second electrode layer 015 (as shown in fig. 10); alternatively, the second electrode 102 is located on the first electrode layer 014, and the first electrode 101 is located on the second electrode layer 015 (as shown in fig. 6).

In this embodiment, it is explained that the first electrode 101 may be located on a side of the second electrode 102 close to the liquid crystal layer 30, and an insulating layer for insulating is disposed between a film layer where the first electrode 101 is located and a film layer where the second electrode 102 is located. Or when the display panel 000 of this embodiment is an In-Plane Switching (IPS) liquid crystal display panel, the first electrode 101 and the second electrode 102 may also be located In the same film layer and insulated from each other (not shown In the drawings).

In some alternative embodiments, please continue to refer to fig. 5 and fig. 6 in combination, the second substrate 20 in this embodiment at least includes a second substrate 021 and a third electrode layer 022 located on a side of the second substrate 021 facing the first substrate 10, and the third electrode 201 is located on the third electrode layer 022;

a plurality of first support columns 401 are further included between the second substrate 021 and the third electrode layer 022, and the third electrode 201 covers the first support columns 401.

This embodiment explains that since the third electrode 201 is located on the side of the second substrate 021 facing the first substrate 10 and the second switching transistor T2 is located on the side of the first substrate 011 facing the second substrate 20, that is, the third electrode 201 and the second switching transistor T2 are located on two opposing substrates, in order to achieve electrical connection of the second pole T2D of the second switching transistor T2 with the third electrode 201, a plurality of first support pillars 401 may be disposed between the second substrate 021 and the third electrode layer 022 such that a partial region in one third electrode 201 covers the first support pillars 401, the first support pillars 401 function to bring the partial region of the third electrode 201 as close as possible to the first substrate 10, and by the disposition of the first support pillars 401, the third electrode 201 partially close to the first substrate 10 may be electrically connected to the second pole T2D of the second switching transistor T2 by opening holes on the first substrate 10, and further, the driving signal fed by the second data line S2 can be transmitted to the third electrode 201 in the second substrate 20, so as to achieve the narrow-viewing-angle anti-peep display effect of the display panel 000.

Optionally, as shown in fig. 6, in the embodiment, a color film layer 21 and a black matrix layer 22 are further included between the second substrate 021 and the third electrode layer 022, the color film layer 21 includes a plurality of color resistors 211, the black matrix layer 22 includes a plurality of hollow portions 22K, that is, the light-shielding strips 221 of the black matrix layer 22 are arranged in a crossing manner to define the hollow portions 22K, and the color resistors 211 are located in the hollow portions 22K. The liquid crystal display panel does not emit light, when light of the backlight module enters the second substrate 20, a part of the light is shielded by the light shielding strips 221 of the black matrix layer 22, and the light which is not shielded by the light shielding strips 221 of the black matrix layer 22 can show different colors after passing through the color resistors 211 in the hollow portion 22K, so that the color display effect of the display panel 000 is realized.

Optionally, the manufacturing material of the first support column 401 may be manufactured by the same process as that of a Spacer (PS, Photo Spacer, columnar Spacer, which plays a role of supporting a glass substrate of a liquid crystal cell) in the display panel 000, the first support column 401 may be made of an insulating material with a good buffering performance, and the manufacturing material of the first support column 401 is not specifically limited in this embodiment. As shown in fig. 6, a height H1 of the first support pillar 401 in a direction Z perpendicular to the plane of the display panel 000 may be less than a height H between the second pole T2D of the second switch transistor T2 and the third electrode 201 on the second substrate 20 side, a via K may be further opened on a surface of the first substrate 10 facing the second substrate 20, the via K penetrates through to a surface of the second pole T2D of the second switch transistor T2, and a conductive connection structure 50 is filled in the via K, the conductive structure 50 may be a metal conductive structure or a transparent conductive structure, etc., a top of the conductive connection structure 50 filled in the via K may be directly in contact and electrically connected with the third electrode 201 of a partial region, a bottom of the conductive connection structure 50 filled in the via K may be directly in contact and electrically connected with the second pole T2D of the second switch transistor T2, and the conductive connection structure 50 filled in the via K, an effect of electrically connecting the second pole T2D of the second switching transistor T2 with the third electrode 201 is achieved.

Alternatively, as shown in fig. 5 and fig. 11, fig. 11 is another schematic cross-sectional structure diagram of a direction a-a' in fig. 5, in this embodiment, a side of the first substrate 10 facing the second substrate 20 includes a first groove 10K, the first groove 10K penetrates through a surface of a side of the second metal layer 013 facing away from the first substrate 011, and the first groove 10K exposes a portion of the second pole T2D (i.e., the drain) of the second switch transistor T2;

at least part of the first support column 401 is embedded in the first groove 10K;

the third electrode 201 is in direct contact with the second pole T2D (i.e., drain) of the second switching transistor T2 within the first groove 10K.

The present embodiment explains that the height H1 of the first support column 401 in the plane direction Z perpendicular to the display panel 000 may be equal to the height H between the second pole T2D of the second switching transistor T2 and the third electrode 201 on the second substrate 20 side, that is, by increasing the height of the first supporting column 401, at least a portion of the first supporting column 401 is embedded in the first groove 10K formed on the side of the first substrate 10 facing the second substrate 20, further, the third electrode 201 covering a partial region of the first support pillar 401 may be directly contacted and electrically connected to the second electrode T2D of the second switch transistor T2 in the first groove 10K, so as to prevent PI liquid from remaining on the surface of the first substrate 10 facing the second substrate 20, so that the impedance is relatively large when the PI liquid is left in the contact position, and the electrical connection effect between the third electrode 201 and the second pole T2D of the second switching transistor T2 is affected. In this embodiment, one side of the first substrate 10 facing the second substrate 20 includes a first groove 10K, the first groove 10K penetrates through the surface of the second metal layer 013 facing away from the first substrate 011, so that the first support pillar 401 is pushed into the first groove 10K, and the third electrode 201 is electrically connected to the second electrode T2D of the second switch transistor T2 at the position where no PI liquid is remained, which is favorable for improving the stability of signal transmission and ensuring the display quality.

It can be understood that the process of fabricating the alignment film in the lcd panel generally adopts an inkjet coating (PI inkjet) method, which ejects PI (polyimide) liquid from the small holes of the nozzle, forms high-density PI liquid droplets by the movement of the nozzle or the stage, and finally, the PI liquid droplets are diffused on the substrate to form the alignment film.

In some optional embodiments, please refer to fig. 5 and 12 in combination, fig. 12 is another schematic cross-sectional structure along the direction a-a' in fig. 5, in which a plurality of second supporting pillars 402 are further included between the first substrate 011 and the second electrode layer 015; in a direction Z perpendicular to the plane of the display panel 000, the second support column 402 overlaps the first support column 401;

the second electrode layer 015 includes a plurality of lap portions 601, the lap portions 601 cover the second support pillars 402, and the lap portions 601 are in direct contact with the third electrodes 201;

the second pole of the second switching transistor T2 is electrically connected to the tap 601.

This embodiment explains that the display panel 000 may further include a plurality of second supporting pillars 402, the plurality of second supporting pillars 402 are disposed between the first substrate 011 and the second electrode layer 015, optionally, the second supporting pillars 402 are disposed on a side of the first substrate 011 facing the second substrate 20, the second electrode layer 015 may further include a plurality of bridging portions 601 in addition to the first electrode 101, the bridging portions 601 cover the second supporting pillars 402, the bridging portions 601 covering the second supporting pillars 402 are in direct contact with the third electrode 201 covering a partial region of the first supporting pillars 401, electrical connection between the bridging portions 601 and the third electrode 201 is achieved, and the bridging portions 601 are electrically connected to the second pole T2D (i.e., drain) of the second switching transistor T2. In this embodiment, the second supporting column 402 is disposed on one side of the first substrate 10, in the direction Z perpendicular to the plane of the display panel 000, the second supporting column 402 overlaps the first supporting column 401, that is, the first supporting column 401 and the second supporting column 402 are in an opposite-top structure, the first supporting column 401 raises the third electrode 201 of a partial region, and the second supporting column 402 raises the overlapping portion 601 of the partial region, so that the contact electrical connection effect between the overlapping portion 601 and the third electrode 201 can be prevented from being affected by the residue of the PI liquid on the first substrate 10 side and the PI liquid on the second substrate 20 side, and further the display quality of the display panel under the narrow viewing angle display can be improved.

Optionally, as shown in fig. 5 and 12, at least a first insulating layer 016 is included between the second electrode layer 015 and the second metal layer 013, the first insulating layer 016 includes a first via 016K, and the first via 016K exposes a portion of the second pole T2D (i.e., the drain) of the second switch transistor T2;

the lap joint 601 is in direct contact with the second pole T2D of the second switching transistor T2 within the first via 016K.

This embodiment explains that the second pole T2D of the second switch transistor T2 can be electrically connected to the bridge 601 by providing a first via 016K in the first insulating layer 016, the first insulating layer 016 being at least one insulating layer between the second electrode layer 015 and the second metal layer 013, and optionally a second insulating layer 017 between the first electrode layer 014 and the second metal layer 013, the first via 016K penetrating through the first insulating layer 016 and the second insulating layer 017, so that the first via 016K exposes a portion of the second pole T2D of the second switch transistor T2, and the bridge 601 can directly contact the second pole T2D of the second switch transistor T2 in the first via 016K to achieve the electrical connection effect between the bridge 601 and the second pole T2D of the second switch transistor T2. The present embodiment can avoid the residue of the PI liquid on the first substrate 10 side and the PI liquid on the second substrate 20 side from affecting the contact electrical connection effect of the overlapping portion 601 and the third electrode 201, and further can improve the display quality of the display panel under the narrow viewing angle display.

In some optional embodiments, please refer to fig. 13, fig. 13 is a schematic plane structure diagram of a display device according to an embodiment of the present invention, a display device 111 according to this embodiment includes a display panel 000 according to the above embodiment of the present invention, optionally, the display device 111 may further include a backlight module, the embodiment of fig. 13 only takes a mobile phone as an example to illustrate the display device 111, it is understood that the display device 111 according to this embodiment of the present invention may be other display devices 111 with a display function, such as a computer, a television, a vehicle-mounted display device, and the present invention is not limited specifically thereto. The display device 111 provided in the embodiment of the present invention has the beneficial effects of the display panel 000 provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel 000 in the above embodiments, which is not described herein again.

As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel, comprising: the liquid crystal display panel comprises a first substrate, a second substrate and a liquid crystal layer, wherein the first substrate and the second substrate are oppositely arranged, and the liquid crystal layer is positioned between the first substrate and the second substrate;

the display panel comprises a plurality of sub-pixels, a plurality of scanning lines and a plurality of first data lines, wherein the scanning lines and the first data lines are mutually insulated and crossed to define the area where the sub-pixels are located;

the sub-pixel comprises a first electrode, a second electrode, a third electrode, a first switching transistor and a second switching transistor;

the first substrate comprises the first electrode and the second electrode, and the second substrate comprises the third electrode;

a gate electrode of the first switching transistor is electrically connected with the scanning line, a first electrode of the first switching transistor is electrically connected with the first data line, and a second electrode of the first switching transistor is electrically connected with the first electrode;

a gate of the second switching transistor is electrically connected to the scan line, a first pole of the second switching transistor is electrically connected to the second data line, and a second pole of the second switching transistor is electrically connected to the third electrode;

in a direction perpendicular to a plane of the display panel, the first electrodes and the third electrodes are in one-to-one correspondence, and the first electrodes and the third electrodes are at least partially overlapped.

2. The display panel according to claim 1, wherein the first electrode and the third electrode coincide with each other in a direction perpendicular to a plane of the display panel.

3. The display panel according to claim 1, wherein the first substrate comprises at least a first substrate and a first metal layer, a second metal layer, a first electrode layer, and a second electrode layer on a side of the first substrate facing the second substrate, the second electrode layer being on a side of the first electrode layer facing away from the first substrate;

the scanning line, the grid electrode of the first switch transistor and the grid electrode of the second switch transistor are positioned on the first metal layer;

the first data line, the second data line, the first pole and the second pole of the first switch transistor, and the first pole and the second pole of the second switch transistor are located in the second metal layer;

the first electrode is positioned on the first electrode layer, and the second electrode is positioned on the second electrode layer; or, the second electrode is located on the first electrode layer, and the first electrode is located on the second electrode layer.

4. The display panel according to claim 3, wherein the second substrate includes at least a second substrate and a third electrode layer on a side of the second substrate facing the first substrate, the third electrode being located on the third electrode layer;

the second substrate and the third electrode layer further comprise a plurality of first support columns therebetween, and the third electrode covers the first support columns.

5. The display panel according to claim 4, wherein a side of the first substrate facing the second substrate comprises a first groove, the first groove penetrates through to a surface of the second metal layer facing away from the first substrate, and the first groove exposes a part of the second electrode of the second switch transistor;

at least part of the first supporting column is embedded in the first groove in a clamping manner;

the third electrode is in direct contact with a second pole of the second switching transistor within the first recess.

6. The display panel according to claim 4, further comprising a plurality of second support pillars between the first substrate and the second electrode layer; the second support column overlaps with the first support column in a direction perpendicular to the plane of the display panel;

the second electrode layer includes a plurality of lap joints covering the second support pillars, the lap joints being in direct contact with the third electrode;

a second pole of the second switching transistor is electrically connected to the tap.

7. The display panel according to claim 6, wherein a first insulating layer is included between the second electrode layer and the second metal layer, the first insulating layer including a first via hole exposing a portion of the second pole of the second switching transistor;

the landing is in direct contact with a second pole of the second switching transistor within the first via.

8. The display panel according to claim 4, wherein a color film layer and a black matrix layer are further included between the second substrate and the third electrode layer, the color film layer includes a plurality of color resistors, the black matrix layer includes a plurality of hollow portions, and the color resistors are located in the hollow portions.

9. The display panel according to claim 1, wherein the first electrode comprises a plurality of slits, and the third electrode corresponding to one of the sub-pixels has a full-surface structure.

10. The display panel according to claim 1, wherein the display panel includes a wide viewing angle display mode and a narrow viewing angle display mode;

in the wide viewing angle display mode, the second data line is floated or the second data line is switched in zero potential;

in the narrow viewing angle display mode, the polarity of the accessed potentials of the second data line and the first data line corresponding to the same sub-pixel is the same.

11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.