CN115047830B

CN115047830B - Bus system of controller and sensor, operation method and machine automation system

Info

Publication number: CN115047830B
Application number: CN202210557080.5A
Authority: CN
Inventors: 李伟坚
Original assignee: Pengyan Technology Shanghai Co ltd
Current assignee: Pengyan Technology Shanghai Co ltd
Priority date: 2022-05-20
Filing date: 2022-05-20
Publication date: 2023-06-23
Anticipated expiration: 2042-05-20
Also published as: CN115047830A

Abstract

The embodiment of the invention relates to the technical field of buses, and discloses a bus system of a controller and a sensor, an operation method and a machine automation system. The bus system includes: the system comprises a central processing unit kernel, a multimedia transmission intranet and a plurality of ports; the multimedia internal transmission network comprises at least one optical fiber transmission network directly connected with the central processing unit kernel; the optical fiber transmission network comprises at least one sub-network, wherein the sub-network comprises cascade links and gates formed by a plurality of Optical Network Units (ONU) which are connected in cascade, and each cascade link is connected with one Optical Line Terminal (OLT) in a Central Processing Unit (CPU) core through the gate; the ONU and/or the door are connected with the port; the ONU is configured to send the message into the OLT step by step through the cascade link and the gate after receiving the external message through the connected port, and the OLT broadcasts the message, so that one or more ONUs associated with the message send the message to the outside through the connected port. Reducing cost and complexity.

Description

Bus system of controller and sensor, operation method and machine automation system

Technical Field

The embodiment of the invention relates to the technical field of buses, in particular to a bus system of a controller and a sensor, an operation method and a machine automation system.

Background

With the development of automated driving automobiles, intelligent robots, and factory automation, the field of machine automation is rapidly expanding. However, due to their diversification and high speed requirements, no bus or network architecture is currently available that can effectively meet these emerging technology requirements. In contrast, current networks have problems of high latency, low bandwidth, complex wiring, large electromagnetic interference (Electromagnetic Interference, EMI), high cost, unsafe data, complex system integration, and the like. For example, the network does not have sufficient bandwidth to carry sensor data generated by cameras, liDAR (Light Laser Detection and Ranging, liDAR), etc. to the central processor (Central Processing Unit, CPU) Core with low latency. Furthermore, existing cable systems are complex, short-range, and cannot handle EMI without expensive shields due to the use of copper cabling systems. There is currently no multi-function integrated "controller and sensor network" system bus solution to be able to support and carry internet L2/L3 ethernet packets, motor and motion control information, sensor data and CPU commands (Central Processing Unit Command, CPU-CMD) from edge node to edge node throughout the system.

Disclosure of Invention

The embodiment of the invention aims to provide a bus system of a controller and a sensor, an operation method and a machine automation system, which can reduce the cost and the complexity of the bus system of the controller and the sensor while realizing data transmission.

To achieve the above object, an embodiment of the present invention provides a bus system of a controller and a sensor, including: the system comprises a central processing unit kernel, a multimedia transmission intranet and a plurality of ports configured to be externally connected; the multimedia internal transmission network comprises at least one optical fiber transmission network directly connected with the central processing unit core; the optical fiber transmission network comprises at least one sub-network, wherein the sub-network comprises cascade links and gates formed by a plurality of cascade-connected Optical Network Units (ONU), and each cascade link is connected with one Optical Line Terminal (OLT) in the central processor core through the gate; the ONU and/or the door are/is connected with the port; and after the ONU is configured to receive external messages through the connected ports, the messages are sent to the OLT step by step through the cascade link and the gate where the ONU is positioned, and the OLT broadcasts the messages to each ONU step by step through the gate and the cascade link, so that one or more ONUs associated with the messages send the broadcast received messages to the outside through the connected ports.

To achieve the above object, an embodiment of the present invention further provides a method for operating a controller and a sensor bus, where the controller and sensor bus system is the controller and sensor bus system described above, and the method includes: the ONU receives external information through a connected port; the ONU sends the received information to the OLT in the central processing unit through the cascade link and the gate; the OLT broadcasts the received message in the bus system of the controller and the sensor; one or more ONUs associated with the message send the received message to the outside through the corresponding port.

To achieve the above object, an embodiment of the present invention further provides a machine automation system including: a bus system of controllers and sensors as described above, and a plurality of external machine automation devices; the external machine automation device accesses the bus system of the controller and the sensor through a port configured to be externally connected in the bus system of the controller and the sensor.

The bus system of the controller and the sensor provided by the embodiment of the invention comprises the ONU among the subnetworks, wherein the ONU is externally connected through the port, and after the ONU receives the external information through the port, the information is sent to the OLT in the central processing unit through the cascade link and the gate where the ONU is positioned step by step for the OLT to broadcast the information, so that one or more ONU associated with the information sends the information to the outside, the data transmission is realized, and compared with the scheme that each ONU needs to use one optical fiber transceiver due to the direct connection of each ONU with the OLT, the cascade connection among the ONU can enable a plurality of ONU to share the same optical fiber transceiver, or the ONU does not need to use the optical fiber transceiver through a copper cable, and simultaneously, the optical module and the optical splitter are not needed, thereby reducing the optical fiber transceiver needed in the bus system of the controller and the sensor, saving the cost and reducing the complexity of the bus.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.

FIG. 1 is a schematic diagram of a bus system of a controller and a sensor according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of an ONU provided in another embodiment of the present invention;

fig. 3 is a schematic diagram of an ONU cascade link structure based on a Chip-to-Chip interface according to another embodiment of the present invention;

fig. 4 is a schematic diagram of an ONU cascade link structure based on a transmission medium according to another embodiment of the present invention;

fig. 5 is a schematic diagram of an ONU cascade link structure based on a Chip-to-Chip interface and a transmission medium according to another embodiment of the present invention;

FIG. 6 is a flow chart of a method of operation of the controller and sensor bus system provided in another embodiment of the invention;

fig. 7 is a schematic structural view of a machine automation system provided in another embodiment of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be understood by those of ordinary skill in the art that in various embodiments of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the claimed technical solution of the present invention can be realized without these technical details and various changes and modifications based on the following embodiments.

The following embodiments are divided for convenience of description, and should not be construed as limiting the specific implementation of the present invention, and the embodiments can be mutually combined and referred to without contradiction.

In one aspect, the present invention provides a bus system for a controller and a sensor. Referring to fig. 1, the controller and sensor bus system 100 includes a central processor core 110, a multimedia internal transmission network 120 formed around the central processor core 110, and a plurality of ports 130, the central processor core 110 includes at least one optical line terminal (Optical Line Terminal, OLT) 111, the multimedia internal transmission network 120 includes at least one optical fiber transmission network 121, each optical fiber transmission network 121 includes at least one subnetwork 123 including a cascade link and a gate 124 composed of a plurality of cascade-connected optical network units (Optical Network Unit, ONUs) 122, each cascade link being connected to one OLT111 in the central processor core 110 through one gate 124, wherein the ONUs 122 and/or gates 124 are configured to be externally connected through the ports 130, so that after the ONUs 122 receive external messages through the ports 130, the ONUs 122 can step-feed the messages to the OLT111 in the central processor core 110 through the cascade link where they are located and the gates 124 for the OLT110 to broadcast the messages so that the ONU(s) associated with the messages send the received messages to the outside.

In fig. 1, only one OLT is shown in the central processor core, and the central processor may further include a plurality of OLTs, where different OLTs in the central processor correspond to switches, and send messages uploaded on subnets connected to the respective OLTs to other OLTs, so that the messages can be propagated to ONUs in subnets connected to the other OLTs, and thus, the message broadcasting in the whole system can be achieved. In addition, in fig. 1, a Splitter (Splitter) is further disposed between the OLT and the optical fiber transmission network in the multimedia internal transmission network.

Therefore, when one OLT is provided, the message transmission manner between ONUs across subnets is: the ONU on the cascade link transmits a message to the ONU on the upstream of the link in a point-to-point mode, the message is transmitted step by step until the ONU reaches the OLT, the OLT broadcasts the message to the ONU connected with the ONU, and the ONU which receives the message transmits the message to the ONU on the downstream of the cascade link along the cascade link of the ONU, until the ONU on the most downstream of the link is reached; when a plurality of OLTs are provided, the message transmission modes among ONUs crossing the OLTs are as follows: and the ONU on the cascade link transmits messages to the ONU on the upstream of the link in a point-to-point mode, the messages are transmitted step by step until the ONU reaches the OLT, and the OLT transmits the messages to other OLTs through the core switch, so that each OLT broadcasts the messages to the ONU connected with the OLT, and the ONU which receives the messages transmits the messages to the ONU on the downstream of the link step by step along the cascade link where the ONU is positioned until the ONU on the most downstream of the link is reached. Wherein, the upstream of the link is the part of the link close to the OLT, and the downstream of the link is the part of the link far from the OLT. That is, in the bus system of the controller and the sensor, the communication between the two ONUs needs to be performed through the OLT, first, when one ONU transmits a message to the corresponding OLT step by step through the cascade link and the gate where the ONU is located, after receiving the message, the OLT broadcasts the message to each ONU in the bus system of the controller and the sensor through a point-to-multipoint manner, but only NOU related to the message will process the data, such as sending to an external device connected to the ONU through a port.

It can be understood that, since the ONUs are cascade-linked and the message is sent up step by step until the OLT is sent up, and the message is sent down step by step until the ONU at the most downstream of the cascade-linked ONUs is sent up, the multiple ONUs that are cascade-connected can share one optical fiber transceiver. Based on this, referring to fig. 1, only one optical fiber transceiver 125 is included in some of the subnets 123, the optical fiber transceiver 125 being disposed between the gate 124 in the subnet 123 and the OLT111, 2 optical fiber transceivers 125 are included in some of the subnets 123, one optical fiber transceiver 125 being disposed between the gate 124 in the subnet 123 and the OLT111, and another optical fiber transceiver 125 being disposed between the ONUs 122 within the subnet 123. Therefore, compared with the scheme that each ONU needs to use one optical fiber transceiver due to the fact that each ONU is directly connected with the OLT, the cascade connection among the ONUs enables a plurality of ONUs to share the same optical fiber transceiver, or the ONUs are directly connected to the OLT through copper cables without using the optical fiber transceiver, so that the optical fiber transceivers needed in a bus system of a controller and a sensor are reduced, cost is saved, and complexity of a bus is reduced.

It should also be noted that all messages may be encapsulated in a generic encapsulation (General Encapsulation Mode, GEM) for transmission in the bus system of the controller and sensor. I.e. GEM acts as a unique standardized data and message container for transmitting messages between ONUs and/or to the central processor core through the bus system of the controller and sensors. That is, the message may be encapsulated into a GEM format at each ONU upon entering the bus system of the controller and sensor, and passed through the central processor core (here decapsulated for processing and repackaged for transmission) and to the ONU connected to the target external device, which decapsulates the message into the original format, and out to the target external device or other destination. The message may come from various sources such as an external device connected to the ONU through a port, an external device connected to the door through a port, a central processor core, etc.

There are two types of GEM formats: GEM packets (packets) and GEM controls (controls). The GEM packet format includes a GEM header (header) plus a GEM payload (payload) (e.g., 8 bytes to 4 kilobytes in length). Typically, GEM packet formats are used to encapsulate incoming port data, packets, and messages at the ingress (e.g., ONU, port).

In order to implement the above-mentioned uplink and downlink transmission of data, the schematic structural diagram of the ONU may refer to fig. 2.

In some embodiments, an ONU comprises at least the following components: the first serializer-deserializer 201, the second serializer-deserializer 202, the first transmission data selector 203, the second transmission data selector 204, the reception data selector 205, the reception gecarbox 206, the MAC chip 207, the transmission gecarbox 208.

In this embodiment, the first serializer-deserializer is configured to receive a message sent by the downstream ONU and send the message sent by the downstream ONU to the second transmission selector; the second transmit data selector is configured to send the received message sent by the downstream ONU to the second serializer-deserializer; the second serializer-deserializer is configured to send a received message sent by the downstream ONU to the upstream ONU or the gate; the second serializer-deserializer is further configured to receive a message sent by the upstream ONU or the gate and send the message sent by the upstream ONU or the gate to the first transmission data selector and the reception data selector, in the case that the first serializer-deserializer is configured to receive the message sent by the downstream ONU; the first transmit data selector is further configured to send the received message sent by the upstream ONU or gate to the first serializer-deserializer; the first serializer-deserializer is further configured to send the received upstream ONU or the message sent by the gate to the downstream ONU; the received data selector is configured to send the received message sent by the upstream ONU or the gate to the receiving gecarbox, the receiving gecarbox is configured to send the received message sent by the upstream ONU or the gate to the MAC chip, and the local MAC chip is configured to send the received message sent by the upstream ONU or the gate; the transmitting gecarbox is further configured to send the local data in the MAC chip as a message to the second serializer-deserializer through the second transmit data selector for sending to the upstream ONU or gate through the second serializer-deserializer, in the case where the second serializer-deserializer is configured to receive the message sent by the upstream ONU or gate.

The upstream ONU is an ONU which is connected with the ONU currently receiving the message in a cascade way and is closer to the OLT in the process that the message reaches the OLT step by step through a cascade link and a gate; the upstream ONU is an ONU which is connected with the local ONU in cascade and is relatively far away from the OLT in the process that the message reaches each ONU step by step from the OLT through the cascade link and the gate.

In order to facilitate a better understanding of the functions of the structures of the ONU in fig. 2 by a person skilled in the art, a transmission procedure of a message in the ONU will be described below as an example. The local data may be data stored in the local data or may be a message uploaded by an external device connected to the local data through a port.

Referring to fig. 2:

in the transmission process of the message from the cascade link to the OLT, a certain ONU receives the message reported from the downstream ONU: the message enters the ONU via the first serializer-deserializer 201, then exits the first serializer-deserializer 201 and is sent to the second transmit data selector 204, then exits the second transmit data selector 204 and is sent to the second serializer-deserializer 202, and finally is sent out through the second serializer-deserializer 202. Wherein, in case the ONU is not present upstream ONU but is directly connected to the gate, the message sent out by the second serializer-deserializer 202 is sent into the gate and transmitted to the OLT connected to the gate through the gate; in case that an upstream ONU exists in the ONU, the message sent out through the second serializer-deserializer 202 is sent into the upstream ONU, and the current transmission process is repeated in the upstream ONU until it is transmitted to the gate and is transmitted to the OLT connected to the gate through the gate.

In addition, in case that a message transmitted by a certain ONU is local data stored in the MAC chip 207, that is, a message is burst from the current ONU to the OLT, the message starts from the MAC chip 207 and is sent to the transmission gecarbox 208, and then the message coming out of the transmission gecarbox 208 is sent to the second transmission data selector 204, and finally sent to the second serializer-deserializer 202 to be transmitted through the second serializer-deserializer 202.

In the process of the message from the OLT to the ONUs in the cascade link, a certain ONU receives the message of the upstream ONU or the gate: the message enters the ONU via the second serializer-deserializer 202 and then is transmitted in two paths: in one path, the message coming out of the second serializer-deserializer 202 is sent to the received data selector 205, then the message coming out of the received data selector 205 is sent to the received Gecarbox 206, and finally the message is sent to the MAC chip 207; in another path, the message from the second serializer-deserializer 202 is sent to the first transmit data selector 203, and then the message from the first transmit data selector 203 is sent to the first serializer-deserializer 201 for transmission through the second serializer-deserializer 201. In the MAC chip 207, the message is parsed by the MAC chip 207, and if it is determined that the message is a destination of the message, the message is retained and processed accordingly, for example, sent to an external device through a port, and if it is determined that the message is not a destination of the message, the message is discarded.

In some embodiments, in order to ensure that messages sent from downstream ONUs can be accurately sent to upstream ONUs, clock recovery is also required prior to transmission. Based on this, the ONU further comprises a clock data selector 209, a first asynchronous first-in first-out (First Input First Output, FIFO) memory 210 and a second asynchronous FIFO memory 212.

Wherein the second serializer-deserializer is further configured to send the received data to the first asynchronous FIFO memory; the first serializer-deserializer is further configured to send the received data to the second asynchronous FIFO memory; the clock data selector is configured to acquire a clock signal of the data received by the second serializer-deserializer and send the clock signal to the MAC chip; the MAC chip is further configured to generate clock control information according to the received clock signal and send the clock control information into the first asynchronous FIFO memory; the first asynchronous FIFO memory is configured to adjust received data according to clock control information so that a clock of a message to be externally transmitted to the ONU coincides with a clock signal, and transmit the adjusted data to the first serializer-deserializer; the second asynchronous FIFO memory is configured to adjust the received data to be synchronous with the clock of its own received data module and to send the adjusted data to the second serializer-deserializer.

In order to facilitate a better understanding of the function of the clock data selector, the first asynchronous FIFO memory and the second asynchronous FIFO memory by a person skilled in the art, the following description will be given in terms of the flow of different messages during transmission.

Referring to fig. 2:

in the transmission process of the message from the cascade link to the OLT, a certain ONU receives the message reported from a downstream ONU, when the message enters the ONU through the first serializer-deserializer 201, the clock data selector 209 acquires the clock signal of the received message from the first serializer-deserializer 201, then the clock data selector 209 sends the acquired clock signal into the MAC chip 207, and after generating the clock control message according to the clock signal, the MAC chip 207 sends the clock control message into the second asynchronous FIFO memory 211, so that the second asynchronous FIFO memory 211 resets the read pointer and the write pointer according to the received clock control message, and after the message is sent from the first serializer-deserializer 201 into the second asynchronous FIFO memory 211, the message sent from the second asynchronous FIFO memory 211 into the second transmission data selector 204 is synchronized with the clock of the message when it enters the first serializer-deserializer 201 through the reset read pointer and the write pointer.

In the process of the message from the OLT to the ONUs in the cascade link, a certain ONU receives the message of the upstream ONU or the gate: the message is sent to the first asynchronous FIFO memory 210 after entering the ONU through the second serializer-deserializer 202, the first asynchronous FIFO memory 210 performs clock recovery on the received message so that the clock of the adjusted message coincides with the clock of the data receiving module of the first asynchronous FIFO memory 210, and then the message coming out of the first asynchronous FIFO memory 210 is sent to the first transmission data selector 203.

As can be seen, for the upstream message sent by the downstream ONU, the ONU mainly forwards the upstream message without performing parsing processing in the local MAC chip, and for the downstream message sent by the upstream ONU or the gate, the ONU needs to forward the downstream message to notify the other ONUs, and also needs to perform parsing processing in the local MAC chip to determine whether the downstream message is a destination of the message.

In view of the situation that abnormal transmission status may occur in the message transmission process, such as overload of a certain ONU, disconnection of connections (such as connection between ONUs, connection between internal structures of ONUs), etc., it is also proposed to provide a conversion mechanism for the message transmission process. Specifically, in some embodiments, ONUs located at both ends of the cascade link are connected to a gate, and the gate is configured to re-issue a message to an ONU at the other end of the cascade link if a transmission state abnormality occurs in a message issued to the ONU at the other end of the cascade link during transmission to the ONU at the other end of the cascade link; in the case where a transmission state abnormality occurs in the process of transmitting a message sent by an ONU in a direction from the ONU at one end of the tandem link to the ONU at the other end of the tandem link, a message is received that the ONU retransmits in a direction from the ONU at the other end of the tandem link to the ONU at one end of the tandem link. The method comprises the steps that a certain cascade link is formed by cascade connection of ONU1, ONU2 and NOU, wherein ONU1 and ONU3 are respectively connected with a gate, ONU1 is preset as the ONU at the head end in the cascade link, and ONU3 is the ONU at the tail end in the cascade link, so that under normal conditions, an ONU2 burst message is transmitted to the OLT along the transmission path of ONU2-ONU 1-gate, and correspondingly, the OLT broadcasts the message to each ONU in the cascade link along the transmission path of gate-ONU 1-ONU2-ONU 3; but in case an anomaly is detected, the ONU2 burst message will follow the ONU2-ONU 3-gate transmission path until it is transmitted to the OLT, which will broadcast the message to each ONU in the cascade link along the gate-ONU 3-ONU2-ONU1 transmission path accordingly. I.e. the message transmission paths in normal and abnormal situations are reversed. Therefore, when one transmission direction in the cascade link cannot normally transmit the message, the message transmission direction is converted, so that the message which cannot be normally transmitted can be retransmitted by the message transmission direction, the message can be normally transmitted, and the problem that the message cannot be transmitted once a certain transmission direction is abnormal can not occur.

And in order to support the conversion of the transmission path, the first serializer-deserializer is further configured to receive the message sent by the upstream ONU or the gate and send the message sent by the upstream ONU or the gate to the second transmission selector and the reception data selector; the second transmit data selector is configured to send the received message sent by the upstream ONU or the gate to the second serializer-deserializer; the second serializer-deserializer is configured to send a received message sent by the upstream ONU or the gate to the downstream ONU, the received data selector is configured to send the received message sent by the upstream ONU or the gate to the received gecarbox, the received gecarbox is configured to send the received message sent by the upstream ONU or the gate to the MAC chip, and the local MAC chip is configured to send the received message sent by the upstream ONU or the gate; the second serializer-deserializer is further configured to receive a message sent by the downstream ONU and send the message sent by the downstream ONU to the first transmission data selector, if the first serializer-deserializer is further configured to receive the message sent by the upstream ONU or the gate; the first transmit data selector is further configured to send the received message sent by the downstream ONU to the first serializer-deserializer; the first serializer-deserializer is further configured to send a received message sent by the downstream ONU to the upstream ONU; the transmitting gecarbox is further configured to send the local data in the MAC chip as a message to the first serializer-deserializer through the first transmit data selector for sending to the upstream ONU or gate through the first serializer-deserializer, in case the first serializer-deserializer is configured to receive the message sent by the upstream ONU or gate.

At this time, refer to fig. 2:

in the transmission process of the message from the cascade link to the OLT, a certain ONU receives the message reported from the downstream ONU: the message enters the ONU via the second serializer-deserializer 202, then the message coming out of the second serializer-deserializer 202 is sent to the first transmit data selector 203, and then the message coming out of the first transmit data selector 203 is sent to the first serializer-deserializer 201 for transmission out through the second serializer-deserializer 201. Wherein, in case the ONU is not present upstream ONU but is directly connected to the gate, the message sent out by the second serializer-deserializer 202 is sent into the gate and transmitted to the OLT connected to the gate through the gate; in case that an upstream ONU exists in the ONU, the message sent out through the second serializer-deserializer 202 is sent into the upstream ONU, and the current transmission process is repeated in the upstream ONU until it is transmitted to the gate and is transmitted to the OLT connected to the gate through the gate.

In addition, in case that a message transmitted by a certain ONU is local data stored in the MAC chip 207, that is, a message is burst from the current ONU to the OLT, the message starts from the MAC chip 207 and is sent to the transmission gecarbox 208, then the message from the transmission gecarbox 208 is sent to the first transmission data selector 204, and finally sent to the first serializer-deserializer 202 to be transmitted through the first serializer-deserializer 202.

In the process of the message from the OLT to the ONUs in the cascade link, a certain ONU receives the message of the upstream ONU or the gate: the message is to enter the ONU via the first serializer-deserializer 201 and then transmitted in two paths: in one path, the message from the first serializer-deserializer 202 is sent to the received data selector 205, then the message from the received data selector 205 is sent to the received Gecarbox 206, and finally the message is sent to the MAC chip 207; in another path, the message is sent out of the first serializer-deserializer 201 to the second transmit data selector 204, then out of the second transmit data selector 204 to the second serializer-deserializer 202, and finally out through the second serializer-deserializer 202. In the MAC chip 207, the message is parsed by the MAC chip 207, and if it is determined that the message is a destination of the message, the message is retained and processed accordingly, for example, sent to an external device through a port, and if it is determined that the message is not a destination of the message, the message is discarded.

Accordingly, since the types of messages received by the first serializer-deserializer and the second serializer-deserializer are changed at this time, that is, the upstream message transmitted by the receiving downstream ONU by the first serializer-deserializer is converted into the downstream message transmitted by the receiving upstream ONU or the gate, and the downstream message transmitted by the receiving upstream ONU or the gate by the second serializer-deserializer is converted into the upstream message transmitted by the receiving downstream ONU, the clock recovery function also needs to be converted accordingly. Specifically, the clock data selector is configured to acquire a clock signal of data received by the first serializer-deserializer and send the clock signal to the MAC chip; the MAC chip is further configured to generate clock control information according to the received clock signal and send the clock control information into the second asynchronous FIFO memory; the second asynchronous FIFO memory is configured to adjust the received data according to the clock control information so that the clock of the message sent to the outside of the ONU coincides with the clock signal, and send the adjusted data to the second serializer-deserializer; the first asynchronous FIFO memory is configured to adjust the received data to be synchronous with the clock of its own received data module and to send the adjusted data to the first serializer-deserializer. At this point, there is still a second serializer-deserializer that is further configured to send the received data to the first asynchronous FIFO memory; the first serializer-deserializer is further configured to send the received data to the second asynchronous FIFO memory.

It follows that the transmission paths of the messages, i.e., the first serializer-deserializer-first asynchronous FIFO memory-second transmit data selector-second serializer-deserializer and the second serializer-deserializer-second asynchronous FIFO memory-first transmit data selector-first serializer-deserializer, are unchanged, but since the messages transmitted thereof are converted from one to the other of the downstream messages and the upstream messages, respectively, the data fed into the MAC chip by the receive data selector and the receive gecarbox will be converted from one to the other of the first serializer-deserializer and the second serializer-deserializer, while the local data in the MAC chip is transmitted to one to the other of the first transmit data selector and the second transmit data selector by the transmit data selector, and the clock signal acquired by the clock selector is converted from one to the other of the first serializer-deserializer and the second serializer-deserializer.

It should be noted that, the first serializer-deserializer and the second serializer-deserializer in the same ONU do not simultaneously receive the message sent by the downstream ONU, but one receives the message sent by the downstream ONU, and the other receives the message sent by the upstream ONU or the gate. Specifically, where the first serializer-deserializer is configured to receive downstream ONNU send messages, the second serializer-deserializer would be configured to receive upstream ONU or gate sent messages; in the case where the first serializer-deserializer is configured to receive messages sent by an upstream ONU or gate, the second serializer-deserializer would be configured to receive downstream ONNU send messages, such that the ONUs have the capability to process both upstream ONU or gate sent messages and downstream ONNU send messages.

It should also be noted that the ports in this embodiment may be any type of interface port, such as peripheral component interconnect express (Peripheral Component Interconnect express, PCIe), mobile industrial processor interface (Mobile Industry Processor Interface, MIPI), ethernet, universal serial bus (Universal Serial Bus, USB), universal input output (General Purpose Input Output, GPIO), universal asynchronous receiver/Transmitter (Universal Asynchronous Receiver/Transmitter, UART), inter-integrated circuit (Inter-Integrated Circuit, I2C), and/or other types of ports.

In this embodiment, the ONU associated with the message refers to an ONU connected to a target external device through a port, where the target external device is a transmission target of the message, for example, when the analysis server needs to perform correlation analysis by using ambient temperature data, the temperature sensor is an external device that transmits temperature data to the connected ONU through an interface, the temperature data collected by the temperature sensor is a message, and the analysis server is the target external device. The data transmission process comprises the following steps: the temperature sensor is used as an external device to send the acquired temperature data to a corresponding ONU, the ONU receives the data and then transmits the received temperature data to a Central Processing Unit (CPU) core through a cascade link in a subnet where the ONU is located, the CPU core broadcasts the temperature data, when an analysis server receives the temperature data through the ONU connected with a port, the analysis server analyzes the data, the purpose of determining the temperature data is self, and then the temperature data is sent to the analysis server through the port.

Of course, the above is merely a specific illustration, and in other examples, the external devices may include one or more of other sensor devices (e.g., ultrasonic, infrared, camera, LIDAR, SONAR (Sound Navigation And Ranging, sonor), magnetic, RADAR (Radio Detection and Ranging, RADAR), etc.), internet devices, motors, actuators, lights, displays (e.g., screen, user interface), speakers, graphics processing units, central processing units, memory (e.g., solid state drive, hard disk drive), and controllers/microcontrollers. In particular, the external device may be connected in a wireless manner or in a wired manner, and the number of connected ports may be one or more according to the actual situation.

In some embodiments, referring to fig. 3, the tandem connection between ONUs in the same sub-network is implemented through a Chip-to-Chip interface. More ONUs can be accessed into the subnetwork through the Chip-to-Chip interface, so that the ONU can be effectively expanded in a bus system of a controller and a sensor without obviously increasing the cost.

In other embodiments, referring to fig. 4, the tandem connection between ONUs in the same sub-network is implemented through the transmission medium. The transmission medium can be only an optical fiber, or only a copper cable, or can be used by mixing the optical fiber and the copper cable. When the transmission medium is a copper wire, no additional auxiliary connection of other equipment is required; when the transmission medium is an optical fiber, an optical transceiver (Optical Transceiver) is further arranged between the optical fiber connected ONU and the optical fiber.

In still other embodiments, referring to fig. 5, the tandem connection between ONUs in the same sub-network is implemented jointly through a Chip-to-Chip interface and a transmission medium. Wherein the transmission medium comprises optical fibers and/or copper cables.

It should be noted that, referring to fig. 3-5, the connection between the OLT and the ONU, or the connection between the OLT and the OLT may be a direct connection through a copper cable, or may be an optical connection, and when the OLT and the ONU are connected through an optical fiber, an optical transceiver is further disposed between the OLT and the gate.

It should be further noted that, in the cascade links shown in fig. 3 to 5, gates are not shown for simplicity in representing the implementation of the cascade links, and it does not mean that no gates exist. In addition, only one ONU of the cascade link shown in fig. 3-5 is connected to the OLT, but it can be understood that, in a case where a switching mechanism needs to be provided to ensure normal transmission of a message, an ONU of the cascade link end that is not connected to the OLT in fig. 3-5 may also establish a connection with the OLT, so as to implement the switching mechanism based on the connection established between the ONU of the two ends of the cascade link and the OLT.

It is worth mentioning that a plurality of transmission media are provided for the connection of ONU in the bus system of controller and sensor, can be selected according to the occasion condition in a flexible way, wherein, compared with the current use of copper cable as transmission media, use of optical fiber can improve bandwidth and transmission efficiency, reduce time delay.

In another aspect, the embodiment of the invention further provides an operation method of the controller and sensor bus system, where the controller and sensor bus system is the controller and sensor bus system described in the foregoing embodiment. The flow of the operation method of the controller and the sensor bus system is shown in fig. 6, and at least comprises the following steps:

in step 601, the onu receives an external message through the connected port.

In step 602, the onu sends the received message to the OLT in the central processing unit core step by step through the cascade link and gate where it is located.

In step 603, the olt broadcasts the received message in the bus system of the controller and the sensor.

In step 604, the one or more ONUs associated with the message send the received message to the outside through the corresponding port.

It should be noted that this embodiment is a method embodiment corresponding to a bus system embodiment, and this embodiment may be implemented in conjunction with the bus system embodiment. The details of the related technologies mentioned in the bus system embodiment are still valid in this embodiment, and in order to reduce repetition, they are not described here again. Accordingly, the related technical details mentioned in the present embodiment can also be applied to the bus system embodiment.

Another aspect of an embodiment of the present invention further provides a machine automation system, as shown in fig. 7, including: a controller and sensor bus system 100, and a plurality of external machine automation devices 200; the external machine automation device 200 accesses the bus system 100 of the controller and the sensor through a port configured as an external connection in the bus system 100 of the controller and the sensor.

In this embodiment, the machine automation system may be an automation device, such as an automatic industrial machine or an automatic control robot of an automatic driving vehicle, or may form a part of other machine automation applications, which will not be described herein.

It should be noted that this embodiment is a system embodiment corresponding to a bus system embodiment, and this embodiment may be implemented in conjunction with the bus system embodiment. The details of the related technologies mentioned in the bus system embodiment are still valid in this embodiment, and in order to reduce repetition, they are not described here again. Accordingly, the related technical details mentioned in the present embodiment can also be applied to the bus system embodiment.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of carrying out the invention and that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

Claims

1. A bus system for a controller and a sensor, comprising: the system comprises a central processing unit kernel, a multimedia transmission intranet and a plurality of ports configured to be externally connected;

the multimedia transmission intranet comprises at least one optical fiber transmission network directly connected with the central processing unit kernel; the optical fiber transmission network comprises at least one sub-network, wherein the sub-network comprises cascade links and gates formed by a plurality of cascade-connected Optical Network Units (ONU), and each cascade link is connected with one Optical Line Terminal (OLT) in the central processor core through the gate; the ONU and/or the door are/is connected with the port;

after the ONU is configured to receive external information through the connected port, the information is sent to the OLT step by step through the cascade link and the gate where the ONU is positioned, and the OLT broadcasts the information to each ONU step by step through the gate and the cascade link, so that one or more ONUs associated with the information send the broadcast received information to the outside through the connected port;

the ONU comprises a first serializer-deserializer, a second serializer-deserializer, a first transmission data selector, a second transmission data selector, a reception Gecarbox, a MAC chip and a transmission Gecarbox;

The first serializer-deserializer is configured to receive a message sent by a downstream ONU and send the message sent by the downstream ONU to the second transmission data selector; the second transmit data selector is configured to send the received message sent by the downstream ONU to the second serializer-deserializer; the second serializer-deserializer is configured to send a received message sent by the downstream ONU to an upstream ONU or the gate;

the second serializer-deserializer is further configured to receive a message sent by the upstream ONU or the gate and send the message sent by the upstream ONU or the gate to the first transmission data selector and the reception data selector, in the case that the first serializer-deserializer is configured to receive a message sent by a downstream ONU; the first transmit data selector is further configured to send the received message sent by the upstream ONU or the gate to the first serializer-deserializer; the first serializer-deserializer is further configured to send a received message sent by the upstream ONU or the gate to the downstream ONU; the received data selector is configured to send a received message sent by the upstream ONU or the gate to the received gecarbox, the received gecarbox being configured to send a received message sent by the upstream ONU or the gate to the MAC chip, the MAC chip being configured to receive a received message sent by the upstream ONU or the gate;

The transmitting gecarbox is further configured to send the local data in the MAC chip as a message to the second serializer-deserializer through the second transmit data selector to be sent to the upstream ONU or the gate through the second serializer-deserializer, if the second serializer-deserializer is configured to receive the message transmitted by the upstream ONU or the gate;

the upstream ONU is connected with the ONU currently receiving the message in a cascade manner and is closer to the OLT in the process that the message gradually reaches the OLT through the cascade link and the gate; the upstream ONU is connected with the ONU in cascade and is relatively far away from the OLT in the process that the message reaches each ONU step by step from the OLT through the cascade link and the gate.

2. The bus system of controller and sensor according to claim 1, wherein the ONUs are cascade-connected via a Chip-to-Chip interface and/or a transmission medium.

3. The controller and sensor bus system according to claim 2, wherein the transmission medium comprises copper cables and/or fiber optic cables with fiber optic transceivers disposed at both ends.

4. The controller and sensor bus system of claim 1, wherein the subnetwork further comprises a fiber optic transceiver, and wherein a number of the ONUs in the subnetwork share a fiber optic transceiver.

5. The bus system of controller and sensor according to claim 1, wherein said ONUs at both ends of said cascade link are connected to said gate,

the gate is configured to re-issue a message to the ONU at the other end of the cascade link if a transmission state abnormality occurs in a process of transmitting the message issued to the ONU at the one end of the cascade link to the ONU at the other end of the cascade link; and receiving a message retransmitted by the ONU along the direction from the ONU at the other end of the cascade link to the ONU at the one end of the cascade link when the transmission state abnormality occurs in the process of transmitting the message sent by the ONU along the direction from the ONU at the one end of the cascade link to the ONU at the other end of the cascade link.

6. The controller and sensor bus system according to claim 5, wherein the first serializer-deserializer is further configured to receive a message sent by the upstream ONU or the gate and send the message sent by the upstream ONU or the gate to the second transmit data selector and the receive data selector; the second transmit data selector is configured to send the received message sent by the upstream ONU or the gate to the second serializer-deserializer; the second serializer-deserializer is configured to send a received message sent by the upstream ONU or the gate to the downstream ONU, the received data selector is configured to send a received message sent by the upstream ONU or the gate to the received gecarbox, the received gecarbox is configured to send a received message sent by the upstream ONU or the gate to the MAC chip, and the MAC chip is configured to send a received message sent by the upstream ONU or the gate;

The second serializer-deserializer is further configured to receive a message sent by the downstream ONU and send the message sent by the downstream ONU to the first transmission data selector, if the first serializer-deserializer is further configured to receive a message sent by the upstream ONU or the gate; the first transmit data selector is further configured to send the received message sent by the downstream ONU to the first serializer-deserializer; the first serializer-deserializer is further configured to send a received message sent by the downstream ONU to the upstream ONU;

the transmitting gecarbox is further configured to send local data in the MAC chip as a message to the first serializer-deserializer through the first transmit data selector for transmission to the upstream ONU or the gate through the first serializer-deserializer, if the first serializer-deserializer is configured to receive a message sent by the upstream ONU or the gate.

7. The controller and sensor bus system of claim 6 wherein the ONU further comprises a clock data selector, a first asynchronous first-in first-out FIFO memory, and a second asynchronous FIFO memory,

The second serializer-deserializer is further configured to send the received message to the first asynchronous FIFO memory;

the first serializer-deserializer is further configured to send the received message to the second asynchronous FIFO memory;

the clock data selector is configured to acquire a clock signal when the first serializer-deserializer or the second serializer-deserializer receives a message sent by the upstream ONU or the gate and send the clock signal to the MAC chip;

the MAC chip is further configured to generate a clock control message from the received clock signal and to send the clock control message to the first asynchronous FIFO memory if the message sent by the upstream ONU or the gate is received by the second serializer-deserializer, or to send the clock control message to the second asynchronous FIFO memory if the message sent by the upstream ONU or the gate is received by the first serializer-deserializer;

the first asynchronous FIFO memory is configured to adjust the received message according to the clock control message so that the clock of the message sent to the outside is consistent with the clock signal and send the adjusted message to the first serializer-deserializer when the clock control message is received;

The second asynchronous FIFO memory is configured to adjust the received message so that the clock of the message sent to the outside coincides with the clock signal, and send the adjusted message to the second serializer-deserializer, in the case where the clock control message is received.

8. The controller and sensor bus system according to claim 7, wherein the MAC chip is further configured to monitor a transmission state, and in case of monitoring that the transmission state is abnormal, generate a link switching control message, and send the link switching control message to the reception data selector and the clock data selector;

the received data selector is further configured to convert a message received from one of the first serializer-deserializer and the second serializer-deserializer into a message received from the other according to the link conversion control message;

the clock selector is further configured to convert acquiring the clock signal from one of the first serializer-deserializer and the second serializer-deserializer to acquiring the clock signal from the other according to the link conversion control message.

9. The controller and sensor bus system of claim 1, wherein the ONU further comprises an upstream burst control logic module configured to generate an upstream enable signal that is sent to the first transmit data selector and the second transmit data selector, respectively, based on an enable control signal generated by a MAC chip, the first transmit data selector and the second transmit data selector further configured to determine a message burst occasion based on the upstream enable signal.

10. A method of operation of a controller and sensor bus system, wherein the controller and sensor bus system is a controller and sensor bus system according to any one of claims 1 to 9, the method comprising:

the ONU receives external information through a connected port;

the ONU sends the received information to the OLT in the central processing unit through the cascade link and the gate;

the OLT broadcasts the received message in the bus system of the controller and the sensor;

one or more ONUs associated with the message send the received message to the outside through the corresponding port.

11. A machine automation system, comprising: the bus system of controller and sensor of any one of claims 1 to 9, and a plurality of external machine automation devices;

the external machine automation device accesses the bus system of the controller and the sensor through a port configured to be externally connected in the bus system of the controller and the sensor.