CN115047322B - Method and system for identifying fault chip of intelligent medical equipment - Google Patents
Method and system for identifying fault chip of intelligent medical equipment Download PDFInfo
- Publication number
- CN115047322B CN115047322B CN202210985863.3A CN202210985863A CN115047322B CN 115047322 B CN115047322 B CN 115047322B CN 202210985863 A CN202210985863 A CN 202210985863A CN 115047322 B CN115047322 B CN 115047322B
- Authority
- CN
- China
- Prior art keywords
- chip
- working
- sequence
- fault
- determining
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2836—Fault-finding or characterising
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Health & Medical Sciences (AREA)
- Biomedical Technology (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Measuring And Recording Apparatus For Diagnosis (AREA)
Abstract
The invention provides a method and a system for identifying a fault chip of intelligent medical equipment, which relate to the technical field of artificial intelligence, and the method comprises the following steps: determining the interconnection relationship of each working chip in the intelligent medical equipment based on different equipment working modes; setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode, and recording response signals; determining the fault information of the same working chip according to the interconnection relation and the response signal of the same working chip in the same equipment working mode; and matching fault identification to the same working chip based on the fault information so as to obtain a chip identification chart of the intelligent medical equipment, and outputting and displaying the chip identification chart. The fault information of the chip is determined from the two aspects of the interconnection relation and the response signal of the chip, and the fault of the equipment can be intuitively and effectively solved in time by establishing the chip identification diagram, so that the effective operation of the medical equipment is ensured.
Description
Technical Field
The invention relates to the technical field of artificial intelligence, in particular to a method and a system for identifying a fault chip of intelligent medical equipment.
Background
Along with the improvement of economic level, people also increase gradually to self health and medical service's demand, whether medical equipment can high-quality operation, play the decisive role to medical service quality, currently, large-scale complicated intelligent medical equipment's hardware is more, this has improved the probability that medical equipment trouble takes place undoubtedly greatly, and then has reduced medical equipment's operation validity, so, it is very important to detect the chip among the intelligent medical equipment and confirm whether it has the trouble as the basis of operation validity.
Therefore, the invention provides a method and a system for identifying a fault chip of intelligent medical equipment.
Disclosure of Invention
The invention provides a method and a system for identifying a fault chip of intelligent medical equipment, which are used for determining fault information of the chip from two aspects of interconnection and intercommunication of the chip and a response signal, and can intuitively and effectively solve the fault of the equipment in time by establishing a chip identification diagram so as to ensure the effective operation of the medical equipment.
The invention provides a method for identifying a fault chip of intelligent medical equipment, which comprises the following steps:
step 1: determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
and 2, step: setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode, and recording response signals;
and step 3: determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the same equipment working mode;
and 4, step 4: and matching fault identification to the same working chip based on the fault information so as to obtain a chip identification chart of the intelligent medical equipment, and outputting and displaying the chip identification chart.
Preferably, the determining of the interconnection relationship of each working chip in the intelligent medical device based on different device working modes includes:
acquiring preset chip working sets in different equipment working modes;
determining the work participation process of each working chip in the chip working set;
and determining the other chips with communication interaction functions with the corresponding working chips in the working participation process, and constructing the interconnection relationship between the corresponding working chips and the corresponding other chips.
Preferably, based on the device operating mode, setting a matched detection resistor to a corresponding operating chip in the smart medical device, and recording a response signal, including:
calling a resistance set matched with the working mode of the equipment from a mode-resistance matching database;
according to the chip unique code of each working chip in the working mode of the equipment, obtaining a detection code matched with the chip unique code from the resistor set, and matching the detection resistor matched with the detection code to the corresponding working chip;
establishing a detachable connection circuit of the detection resistor and the corresponding working chip to measure a current passing value and a voltage passing value of the corresponding working chip in the detachable connection circuit;
and recording the current passing value and the voltage passing value as response signals.
Preferably, the determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the working mode of the same device includes:
determining a plurality of sub-processes included in the working participation process of the first chip in the same equipment working mode;
setting a process label to the corresponding sub-process according to the execution attribute of each sub-process and the working attribute of the same equipment working mode;
according to the process label, carrying out stage participation extraction on the corresponding interconnection relation to obtain a corresponding first stage;
acquiring second chips with a communication interaction function with the first chip in the first stage, and acquiring communication interaction contents between the first chip and each second chip;
analyzing a transmission address and a receiving address in the communication interactive content to determine the transmission relation between the first chip and each second chip, and meanwhile determining the communication interactive difference between the first chip and each second chip according to the communication interactive content;
when the transmission relation is one-way transmission and is combined with the communication interaction difference, a first label is arranged on the first chip;
when the transmission relation is bidirectional transmission and is combined with the communication interaction difference, a second label is arranged on the first chip;
when the transmission relation is multidirectional transmission and is combined with the communication interaction difference, a third label is arranged on the second chip;
constructing and obtaining a tag sequence corresponding to the first stage according to the tag setting result;
determining work conversion content between adjacent stages, and analyzing the influence value of the work conversion content on the right stage;
when the influence value is larger than a preset value, acquiring a plurality of intermediate chips related to the work conversion content, screening a third chip from the plurality of intermediate chips according to the stage attribute of the right stage, and supplementing a tag sequence corresponding to the right stage according to a sequence corresponding to a conventionally set tag of the third chip to obtain an effective sequence;
constructing and obtaining a total interconnection sequence of the first chip based on the uncompensated tag sequence and the supplemented effective sequence;
acquiring the signal difference between the response signal of the first chip in each first stage and the corresponding standard signal in the working participation process corresponding to the first chip, and constructing and obtaining a total signal difference sequence of the first chip;
performing a first comparison between the total interconnection sequence and a first standard sequence, and simultaneously performing a second comparison between the total signal difference sequence and a corresponding second standard signal;
and determining the fault information of the first chip according to the first comparison result and the second comparison result.
Preferably, determining the fault information of the first chip according to the first comparison result and the second comparison result includes:
acquiring a first salient difference in the first comparison result, and acquiring a second salient difference in the second comparison result;
analyzing the first prominent difference and the second prominent difference based on a fault analysis model to obtain fault information;
the first salient difference is related to the sequence difference value of the first salient sequence and the phase attribute of the corresponding phase of the first salient sequence;
the second salient differences are related to sequence differences of the second salient sequence and phase attributes of a corresponding phase in which the second salient sequence is located.
Preferably, matching a fault identifier to the same working chip based on the fault information includes:
extracting sub fault communication information and sub fault response information in the fault information;
determining the work participation process of the same working chip, splitting the work participation process according to the work flow under the working mode of corresponding equipment to obtain a working phase set, establishing a first mapping relation between the sub-fault communication information and the corresponding working phase set, and establishing a second mapping relation between the sub-fault response information and the corresponding working phase set;
establishing a first mapping vector based on the first mapping relation;
establishing a second mapping vector based on the second mapping relation;
calculating the actual communication value coefficient of the same working chip according to the first comparison result;
calculating the actual response value coefficient of the same working chip according to the second comparison result;
optimizing the first mapping vector based on the actual communication value coefficient to obtain a third mapping vector;
optimizing the second mapping vector based on the actual response value coefficient to obtain a fourth mapping vector;
obtaining a first identifier matched with the third mapping vector and a second identifier matched with the fourth mapping vector from a vector-identifier database;
and based on the first identifier and the second identifier, the fault identifier is used as the fault identifier of the same working chip.
Preferably, calculating the actual communication cost coefficient of the same operating chip according to the first comparison result includes:
wherein n1 represents the total number of sequences in the first comparison result;
indicating a current communication value corresponding to an i1 th sequence in the first comparison result;
indicating a standard communication value corresponding to the (i 1) th sequence in the first comparison result;
representing a communication weight corresponding to an i1 st sequence in the first comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
and Y1 represents an actual communication cost coefficient, and represents a sequence difference value of the (i 1) th sequence in the first comparison result.
Preferably, calculating the actual response cost coefficient of the same working chip according to the second comparison result includes:
wherein n2 represents the total number of sequences of the second comparison result;
the current response value of the response index corresponding to the ith 2-th sequence in the second comparison result is represented;
a standard response value representing a response index corresponding to the i2 th sequence in the second comparison result;
an index weight indicating a response index corresponding to the i 2-th sequence in the second comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
a response indicator corresponding to the i2 th sequence in the second comparison result is represented as a response indicator pair analysis value
Y2 represents the actual response cost coefficient.
Preferably, matching the fault identifier with the same working chip to obtain a chip identifier diagram of the intelligent medical device, and outputting and displaying the chip identifier diagram, wherein the method comprises the following steps:
acquiring a chip layout of the intelligent medical equipment;
determining the layout position of the same working chip based on the chip layout;
and setting the corresponding fault mark at the matched layout position to obtain a chip mark diagram, and outputting and displaying the chip mark diagram.
The invention provides an identification system for a fault chip of intelligent medical equipment, which comprises:
the relation determining module is used for determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
the signal recording module is used for setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode and recording response signals;
the fault determining module is used for determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the same equipment working mode;
and the fault identifier matching module is used for matching fault identifiers to the same working chip based on the fault information so as to obtain a chip identifier chart of the intelligent medical equipment and outputting and displaying the chip identifier chart.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of a method for identifying a faulty chip of an intelligent medical device in an embodiment of the present invention;
FIG. 2 is a block diagram of a fault chip identification system for use with an intelligent medical device in an embodiment of the invention;
FIG. 3 is a diagram illustrating chip identification in an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
The invention provides a method for identifying a fault chip of intelligent medical equipment, which comprises the following steps of:
step 1: determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
step 2: setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode, and recording response signals;
and step 3: determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the same equipment working mode;
and 4, step 4: and matching fault identification to the same working chip based on the fault information so as to obtain a chip identification diagram of the intelligent medical equipment, and outputting and displaying the chip identification diagram.
In this embodiment, for example, the smart medical device 1 has modes 1 and 2 and includes chips 1, 2, 3, 4, and 5, in which, in mode 1, the chips 1, 2, and 3 operate, and in mode 2, the chips 1, 2, 3, 4, and 5 operate, and the related chips in different modes have interconnection relationships.
In this embodiment, for example, in the mode 1, there is data communication between the chip 1 and the chips 2 and 3, and at this time, an interconnection relationship is formed, for example: and the chip 2 and the chip 3 transmit data to the chip 1, so that an interconnection relation based on the chip 1 is formed.
In this embodiment, the matching of the detection resistor is to provide a detection reference for the working chip, so as to facilitate detection of the chip, and obtain a measurement result of a detection circuit formed by the chip based on the resistor, and includes voltage detection, current detection, and the like.
In this embodiment, the fault information refers to a communication fault, a data transmission fault, a corresponding fault, and the like existing in the chip, that is, whether the chip has a fault is determined through these contents, so that matching of a fault identifier is facilitated, and a chip identifier map is constructed.
In this embodiment, the chip identification map includes all chips in the device that need to be fault-identified, and the fault conditions corresponding to different fault identifications are different.
In this embodiment, the display is output to facilitate timely repair of a fault existing in the device.
The beneficial effects of the above technical scheme are: the fault information of the chip is determined from the two aspects of the interconnection relation and the response signal of the chip, and the fault of the equipment can be intuitively and effectively solved in time by establishing the chip identification diagram, so that the effective operation of the medical equipment is ensured.
The invention provides a method for identifying fault chips of intelligent medical equipment, which is used for determining the interconnection and intercommunication relation of each working chip in the intelligent medical equipment based on different equipment working modes and comprises the following steps:
acquiring preset chip working sets in different equipment working modes;
determining the work participation process of each working chip in the chip working set;
and determining the other chips with communication interaction functions with the corresponding working chips in the working participation process, and constructing the interconnection relationship between the corresponding working chips and the corresponding other chips.
In this embodiment, for example, when the device is in the mode 1, the chips 1, 2, and 3 operate, at this time, under the condition of the mode 1, there are 2 processes, and a chip working set is obtained by counting the working conditions of the working chips involved in the 2 processes, and for example, the chip 1 participates in the work in the process 1 and does not participate in the work in the process 2, and the working participation process of the chip 1 is the process 1, and the chip 1 and the chips 2 and 3 both have a communication interaction function in the process 1, and at this time, the remaining chips are the chips 2 and 3, and the established interconnection relationship is: chip 1-chips 2, 3.
The beneficial effects of the above technical scheme are: by acquiring the chip working set and determining the working participation process, the interconnection and intercommunication relation can be conveniently and effectively determined, a foundation is provided for subsequent fault determination, and the timely solution efficiency of the equipment is indirectly improved.
The invention provides an identification method of a fault chip for intelligent medical equipment, which is used for setting matched detection resistors for corresponding working chips in the intelligent medical equipment and recording response signals based on the working mode of the equipment and comprises the following steps:
calling a resistance set matched with the working mode of the equipment from a mode-resistance matching database;
according to the chip unique code of each working chip in the working mode of the equipment, obtaining a detection code matched with the chip unique code from the resistor set, and matching the detection resistor matched with the detection code to the corresponding working chip;
establishing a detachable connection circuit of the detection resistor and the corresponding working chip to measure a current passing value and a voltage passing value of the corresponding working chip in the detachable connection circuit;
and recording the current passing value and the voltage passing value as response signals.
In this embodiment, the pattern-resistance matching database includes the participating chips involved in different device operation modes of the same intelligent medical device and the detection resistors for matching the participating chips, so that a resistance set corresponding to the pattern may be retrieved, and the resistance set includes all participating chips involved in the device operation mode.
In this embodiment, the chip unique code refers to a unique identification representing a corresponding working chip, which is convenient for matching the unique detection code from the set, and then obtaining the detection resistance.
In this embodiment, the detachable connection circuit refers to a circuit formed by a detection resistor and a chip, and the circuit is detachable, and the chip on the circuit is detected by an ammeter and a voltmeter to obtain a current passing value and a voltage passing value.
The beneficial effects of the above technical scheme are: through match with the relevant detection resistance of chip from the database, be convenient for based on can dismantling connecting circuit, realize the detection to the electric current of chip, voltage provides the basis for follow-up fault detection that carries on.
The invention provides an identification method of a fault chip for intelligent medical equipment, which determines the fault information of the same working chip according to the interconnection relation and the response signal of the same working chip in the working mode of the same equipment, and comprises the following steps:
determining a plurality of sub-processes included in the working participation process of the first chip in the same equipment working mode;
setting a process label to the corresponding sub-process according to the execution attribute of each sub-process and the working attribute of the same equipment working mode;
according to the process label, carrying out stage participation extraction on the corresponding interconnection relation to obtain a corresponding first stage;
acquiring second chips with a communication interaction function with the first chip in the first stage, and acquiring communication interaction content between the first chip and each second chip;
analyzing a transmission address and a receiving address in the communication interactive content to determine the transmission relation between the first chip and each second chip, and meanwhile determining the communication interactive difference between the first chip and each second chip according to the communication interactive content;
when the transmission relation is one-way transmission and is combined with the communication interaction difference, setting a first label for the first chip;
when the transmission relation is bidirectional transmission and combined with the communication interaction difference, setting a second label to the first chip;
when the transmission relation is multidirectional transmission and is combined with the communication interaction difference, a third label is set for the second chip;
constructing and obtaining a tag sequence corresponding to the first stage according to the tag setting result;
determining work conversion content between adjacent stages, and analyzing an influence value of the work conversion content on a right stage;
when the influence value is larger than a preset value, acquiring a plurality of intermediate chips related to the work conversion content, screening a third chip from the plurality of intermediate chips according to the stage attribute of the right stage, and supplementing a tag sequence corresponding to the right stage according to a sequence corresponding to a conventionally set tag of the third chip to obtain an effective sequence;
constructing and obtaining a total interconnection sequence of the first chip based on the uncompensated tag sequence and the supplemented effective sequence;
acquiring the signal difference between the response signal of the first chip in each first stage and the corresponding standard signal in the working participation process corresponding to the first chip, and constructing and obtaining a total signal difference sequence of the first chip;
performing a first comparison between the total interconnection sequence and a first standard sequence, and simultaneously performing a second comparison between the total signal difference sequence and a corresponding second standard signal;
and determining the fault information of the first chip according to the first comparison result and the second comparison result.
In this embodiment, for example, for mode 1 in the intelligent medical device 1, several sub-processes refer to the work flows existing in this mode 1, for example, if there are 3 work flows, it is considered that there are 3 sub-processes, and the first chip refers to any one chip in the device 1 that needs to be determined by the fault.
In this embodiment, for example, for the chip 1, the sub-processes included in the working participation process of the chip 1 are determined, for example, the sub-processes related to the chip 1 are 1 and 2, the execution attribute of the sub-process 1 is to send a laser detection signal, the execution attribute of the sub-process 2 is to receive a laser reflection signal, and the working attribute of the device mode is to detect with laser and detect with laser density in a normal range, so as to set a process label to the sub-processes.
In this embodiment, the phases participate in the extraction, for example, sub-processes 1 and 2 may be respectively used as a respective phase.
In this embodiment, the content of the communication interaction between the chip 1 (first chip) and the chips 2 and 3 (second chips) in the first stage includes: signal transmission, command transmission, etc.
In this embodiment, the analysis of the communication interactive content is to acquire an address in the content to determine a transmission relationship, that is, the chip 2 and the chip 3 transmit the content to the chip 1, the chip 1 feeds back the content to the chip 2, and the chips 2 and 3 do not have a communication relationship, at this time, the chip 1 and the chip 2 are in bidirectional transmission, 2 and 3-1-2, and the chip 1 and the chip 3 are in unidirectional transmission, 3-1.
In this embodiment, the combination of the communication interaction differences refers to the differences between the current communication interaction content and the standard interaction content, for example, the communication interaction content is 01, 02, the standard interaction content is 01, 00, and at this time, 01-01, 02-00 are the corresponding communication interaction differences.
In this embodiment, setting different tags to the chip is determined comprehensively based on the transmission relationship and the difference, and the different transmission relationships and the tags corresponding to the same difference are different.
In this embodiment, if the chip 1 has two first stages, tag sequences of the two first stages can be obtained.
In this embodiment, the label setting result is 1@,2, the corresponding label sequences are b1 and b2, b1 represents 1@, and b2 represents 2.
In this embodiment, the work conversion content refers to that different stages are determined by the sub-process, so that during the conversion process of the sub-process, there exists a conversion process, which is the corresponding work conversion content, that is, the conversion from the sub-process 1 to the sub-process 2, at this time, the influence value of the conversion content on the second first stage, that is, the influence value on the right-side stage, needs to be analyzed, if the conversion content is converted according to the normal conversion standard, the influence value is 0, if the conversion content is not converted according to the normal conversion standard, that is, it indicates that a conversion abnormality occurs, then the influence on the second first-stage sequence is determined by the conversion abnormality, wherein, by determining the related middle chip, the chips that may affect the sequence are screened according to the stage attribute of the right-side stage, that the conversion abnormality of the middle chip may affect the sequence, that the accuracy of the subsequent sequence is affected, and therefore, the third chip is screened, and the conventionally set sequence is obtained for supplementing, and the purpose of effectively analyzing the abnormality is to supplement.
For example, [ b1 b 2], supplemented by [ b1 b2, c1], where c1 is the sequence corresponding to the regular set tag.
In this embodiment, the total interconnection sequence is a combination of all the first-stage sequences involved in the first chip 1, such as [ b11 b12 ], [ b1 b2, c1], and then [ b11 b12 b1 b2, c1].
In this embodiment, the standard signal refers to a standard current and voltage.
In this embodiment, the total signal difference sequence is composed of the response signal differences of the same first chip at different stages.
In this embodiment, the standard sequences are all preset and are used as a reference to compare actually obtained sequences to determine fault information.
The beneficial effects of the above technical scheme are: the method comprises the steps of extracting the communication interaction content of the same chip and other chips in a phase by setting a process label, conveniently obtaining the communication interaction content of the same chip and other chips so as to obtain the communication relationship, setting labels according to the communication relationship and the interaction difference to obtain a corresponding sequence, obtaining an effective actual sequence by determining the influence of work conversion content on the phase, obtaining existing faults from two aspects by comparing the sequence with a standard sequence, ensuring the reliability of fault determination, providing a basis for subsequent construction of a diagram, and facilitating timely solution and processing.
The invention provides an identification method of a fault chip for intelligent medical equipment, which is used for determining fault information of a first chip according to a first comparison result and a second comparison result and comprises the following steps:
acquiring a first salient difference in the first comparison result, and acquiring a second salient difference in the second comparison result;
analyzing the first prominent difference and the second prominent difference based on a fault analysis model to obtain fault information;
the first salient difference is related to the sequence difference value of the first salient sequence and the phase attribute of the corresponding phase of the first salient sequence;
the second salient differences are related to sequence differences of the second salient sequence and phase attributes of a corresponding phase in which the second salient sequence is located.
In this embodiment, for example: and (3) comparing the results: [1256111], where 5 and 6 are the significant differences.
In this embodiment, the fault analysis model is obtained by training a sample based on the salient differences that may be generated by each chip in different devices and different modes and fault information corresponding to the different salient differences, and the salient differences include: a prominent difference in communication and a prominent difference in response.
The beneficial effects of the above technical scheme are: by acquiring the outstanding difference in different comparison results and analyzing based on the model, fault information can be acquired conveniently, timely processing of the equipment can be ensured conveniently, and normal operation of the equipment can be ensured.
The invention provides a method for identifying a fault chip of intelligent medical equipment, which is used for matching fault identifications to the same working chip based on fault information and comprises the following steps:
extracting sub-fault communication information and sub-fault response information in the fault information;
determining the work participation process of the same working chip, splitting the work participation process according to the work flow under the working mode of corresponding equipment to obtain a working phase set, establishing a first mapping relation between the sub-fault communication information and the corresponding working phase set, and establishing a second mapping relation between the sub-fault response information and the corresponding working phase set;
establishing a first mapping vector based on the first mapping relation;
establishing a second mapping vector based on the second mapping relation;
calculating the actual communication value coefficient of the same working chip according to the first comparison result;
calculating the actual response value coefficient of the same working chip according to the second comparison result;
optimizing the first mapping vector based on the actual communication value coefficient to obtain a third mapping vector;
optimizing the second mapping vector based on the actual response value coefficient to obtain a fourth mapping vector;
acquiring a first identifier matched with the third mapping vector and a second identifier matched with the fourth mapping vector from a vector-identifier database;
and based on the first identifier and the second identifier, the fault identifier of the same working chip is used.
In this embodiment, the fault information includes both communication and response faults, and therefore, sub-fault communication information and sub-fault response information are extracted.
Such as: the sub-fault communication information is: information 1, 2 and 3, wherein the sub fault response information is as follows: information 4, 5, and 6, wherein the workflow is a workflow that can be split into work processes, and it should be noted that one workflow may correspond to one phase, and two workflows may also correspond to one phase.
In this embodiment, after splitting according to the flow, there are a stage 1 and a stage 2, where the information 1 and the information 2 are in the stage 1, the information 3 is in the stage 2, and this is the first mapping relationship established, the information 4 is in the stage 1, and the information 5 and the information 6 are in the stage 2, and this is the second mapping relationship established.
Thus, a mapping vector can be constructed that yields: s1 s2, s1 indicates that information 1, 2 and information 1, 2 are in stage 1, and s2 indicates that information 3 and information 3 are in stage 2.
In this embodiment, the first factor mapping vector is optimized, such as optimizing s1 s2 to s3 s 4.
In this embodiment, the vector-identifier database includes the mapping vector related to communication and the matched identifier, the mapping vector related to response and the matched identifier, and thus the corresponding first identifier and the second identifier can be obtained, and the faults represented by different identifiers are different.
The beneficial effects of the above technical scheme are: through information extraction, the mapping relation and the mapping vector are constructed, and the vector is optimized through different coefficients, so that the accuracy of the obtained identification can be ensured, an accurate basis is provided for determining the chip fault identification, and an effective basis is provided for subsequent equipment fault solving.
The invention provides an identification method of a fault chip for intelligent medical equipment, which is used for calculating the actual communication value coefficient of the same working chip according to a first comparison result and comprises the following steps:
wherein n1 represents the total number of sequences in the first comparison result;
indicating a current communication value corresponding to an i1 th sequence in the first comparison result;
indicating a standard communication value corresponding to the (i 1) th sequence in the first comparison result;
representing a communication weight corresponding to an i 1-th sequence in the first comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
and Y1 represents an actual communication cost coefficient, and represents a sequence difference value of the (i 1) th sequence in the first comparison result.
Wherein n1 is greater than 1.
The beneficial effects of the above technical scheme are: the actual communication value coefficient is effectively calculated by comparing the corresponding communication value under different sequences with the standard value, so that a basis is provided for vector optimization.
The invention provides an identification method of a fault chip for intelligent medical equipment, which is used for calculating the actual response value coefficient of the same working chip according to a second comparison result and comprises the following steps:
wherein n2 represents the second ratioComparing the total number of the sequences;
the current response value of the response index corresponding to the ith 2-th sequence in the second comparison result is represented;
a standard response value representing a response index corresponding to the i2 th sequence in the second comparison result;
an index weight indicating a response index corresponding to the i 2-th sequence in the second comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
a response indicator corresponding to the i2 nd sequence in the second comparison result is represented as a response indicator pair analysis value
Y2 represents an actual response worth coefficient.
In this embodiment, since the response is based on the current and voltage responses, conversion of the standard coefficients is required to ensure the consistency of the calculation.
Wherein n2 is greater than 1.
The beneficial effects of the above technical scheme are: the actual response value coefficient is effectively calculated by comparing the corresponding response value under different sequences with the standard value, so that a basis is provided for vector optimization.
The invention provides a method for identifying a fault chip of intelligent medical equipment, which matches a fault identification to the same working chip to further obtain a chip identification chart of the intelligent medical equipment and outputs and displays the chip identification chart, and comprises the following steps:
acquiring a chip layout of the intelligent medical equipment;
determining the layout position of the same working chip based on the chip layout;
and setting the corresponding fault mark at the matched layout position to obtain a chip mark diagram, and outputting and displaying the chip mark diagram.
In this embodiment, as shown in fig. 3, if there are 3 chips in the device, and the identification results of chip 01, chip 02 and chip 03 are shown in the figure.
The beneficial effects of the above technical scheme are: through obtaining equipment chip layout drawing to and match the chip position, effectually mark the sign on corresponding the position, guarantee the understanding directly perceived to the trouble, conveniently in time solve the trouble, guarantee medical equipment's effective operation.
The invention provides an identification system for a fault chip of intelligent medical equipment, which comprises the following components as shown in figure 2:
the relation determining module is used for determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
the signal recording module is used for setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode and recording response signals;
the fault determining module is used for determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the same equipment working mode;
and the fault identifier matching module is used for matching fault identifiers to the same working chip based on the fault information so as to obtain a chip identifier chart of the intelligent medical equipment and outputting and displaying the chip identifier chart.
The beneficial effects of the above technical scheme are: the fault information of the chip is determined from the two aspects of the interconnection relationship and the response signal of the chip, and the fault of the equipment can be intuitively and effectively solved in time by establishing the chip identification diagram, so that the effective operation of the medical equipment is ensured.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. A method for identifying a faulty chip for an intelligent medical device, comprising:
step 1: determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
and 2, step: setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode, and recording response signals;
and step 3: determining the fault information of the same working chip according to the interconnection relation and the response signal of the same working chip in the same equipment working mode;
and 4, step 4: matching fault identification to the same working chip based on the fault information so as to obtain a chip identification diagram of the intelligent medical equipment, and outputting and displaying the chip identification diagram;
the determining the fault information of the same working chip according to the interconnection relationship and the response signal of the same working chip in the same equipment working mode includes:
determining a plurality of sub-processes included in the working participation process of the first chip in the same equipment working mode;
setting a process label to the corresponding sub-process according to the execution attribute of each sub-process and the working attribute of the same equipment working mode;
according to the process label, carrying out stage participation extraction on the corresponding interconnection relation to obtain a corresponding first stage;
acquiring second chips with a communication interaction function with the first chip in the first stage, and acquiring communication interaction content between the first chip and each second chip;
analyzing a transmission address and a receiving address in the communication interactive content to determine the transmission relation between the first chip and each second chip, and meanwhile determining the communication interactive difference between the first chip and each second chip according to the communication interactive content;
when the transmission relation is one-way transmission and is combined with the communication interaction difference, setting a first label for the first chip;
when the transmission relation is bidirectional transmission and is combined with the communication interaction difference, a second label is arranged on the first chip;
when the transmission relation is multidirectional transmission and is combined with the communication interaction difference, a third label is arranged on the second chip;
constructing and obtaining a tag sequence corresponding to the first stage according to the tag setting result;
determining work conversion content between adjacent stages, and analyzing an influence value of the work conversion content on a right stage;
when the influence value is larger than a preset value, acquiring a plurality of intermediate chips related to the work conversion content, screening a third chip from the plurality of intermediate chips according to the stage attribute of the right stage, and supplementing a tag sequence corresponding to the right stage according to a sequence corresponding to a conventionally set tag of the third chip to obtain an effective sequence;
constructing and obtaining a total interconnection sequence of the first chip based on the uncompensated tag sequence and the supplemented effective sequence;
acquiring the signal difference between the response signal of the first chip in each first stage and the corresponding standard signal in the working participation process corresponding to the first chip, and constructing and obtaining a total signal difference sequence of the first chip;
performing a first comparison between the total interconnection sequence and a first standard sequence, and simultaneously performing a second comparison between the total signal difference sequence and a corresponding second standard signal;
and determining the fault information of the first chip according to the first comparison result and the second comparison result.
2. The method for identifying the faulty chip of the intelligent medical device according to claim 1, wherein determining that each working chip of the intelligent medical device is based on the interconnection relationship in different device working modes comprises:
acquiring preset chip working sets under different equipment working modes;
determining the work participation process of each working chip in the chip working set;
and determining the other chips with the communication interaction function with the corresponding working chip in the working participation process, and constructing the interconnection relation between the corresponding working chip and the corresponding other chips.
3. The method of claim 1, wherein setting a matched sense resistor to a corresponding active chip in the smart medical device based on the device operating mode and recording a response signal comprises:
calling a resistance set matched with the working mode of the equipment from a mode-resistance matching database;
according to the chip unique code of each working chip in the working mode of the equipment, obtaining a detection code matched with the chip unique code from the resistor set, and matching the detection resistor matched with the detection code to the corresponding working chip;
establishing a detachable connection circuit of the detection resistor and the corresponding working chip to measure a current passing value and a voltage passing value of the corresponding working chip in the detachable connection circuit;
and recording the current passing value and the voltage passing value as response signals.
4. The method for identifying a faulty chip for an intelligent medical device of claim 1, wherein determining fault information of the first chip based on the first comparison result and the second comparison result comprises:
acquiring a first salient difference in the first comparison result, and acquiring a second salient difference in the second comparison result;
analyzing the first prominent difference and the second prominent difference based on a fault analysis model to obtain fault information;
the first salient difference is related to the sequence difference value of the first salient sequence and the phase attribute of the corresponding phase of the first salient sequence;
the second salient differences are related to sequence differences of the second salient sequence and phase attributes of a corresponding phase in which the second salient sequence is located.
5. The method of claim 1, wherein matching a fault identification to the same worker chip based on the fault information comprises:
extracting sub-fault communication information and sub-fault response information in the fault information;
determining the work participation process of the same working chip, splitting the work participation process according to the work flow under the working mode of corresponding equipment to obtain a working phase set, establishing a first mapping relation between the sub-fault communication information and the corresponding working phase set, and establishing a second mapping relation between the sub-fault response information and the corresponding working phase set;
establishing a first mapping vector based on the first mapping relation;
establishing a second mapping vector based on the second mapping relation;
calculating the actual communication value coefficient of the same working chip according to the first comparison result;
calculating the actual response value coefficient of the same working chip according to the second comparison result;
optimizing the first mapping vector based on the actual communication value coefficient to obtain a third mapping vector;
optimizing the second mapping vector based on the actual response value coefficient to obtain a fourth mapping vector;
obtaining a first identifier matched with the third mapping vector and a second identifier matched with the fourth mapping vector from a vector-identifier database;
and based on the first identifier and the second identifier, the fault identifier is used as the fault identifier of the same working chip.
6. The method of claim 5, wherein calculating the actual communication cost factor of the same working chip based on the first comparison comprises:
wherein n1 represents the total number of sequences in the first comparison result;
indicating a current communication value corresponding to the i1 st sequence in the first comparison result;
indicating a standard communication value corresponding to the (i 1) th sequence in the first comparison result;
representing a communication weight corresponding to an i1 st sequence in the first comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
and Y1 represents an actual communication cost coefficient, and represents a sequence difference value of the (i 1) th sequence in the first comparison result.
7. The method of claim 5, wherein calculating an actual response cost factor for the same active chip based on the second comparison comprises:
wherein n2 represents the total number of sequences of the second comparison result;
the current response value of the response index corresponding to the i2 th sequence in the second comparison result is represented;
a standard response value representing a response index corresponding to the i2 th sequence in the second comparison result;
an index weight indicating a response index corresponding to the i 2-th sequence in the second comparison result;
the error coefficient of the calculation is represented, and the value range is (0, 0.02);
a response indicator corresponding to the i2 th sequence in the second comparison result is represented as a response indicator pair analysis value
Y2 represents the actual response cost coefficient.
8. The method for identifying the fault chip of the intelligent medical equipment according to claim 1, wherein matching the fault identifier with the same working chip to obtain a chip identifier diagram of the intelligent medical equipment, and outputting and displaying the chip identifier diagram comprises:
acquiring a chip layout of the intelligent medical equipment;
determining the layout position of the same working chip based on the chip layout;
and setting the corresponding fault mark at the matched layout position to obtain a chip mark diagram, and outputting and displaying the chip mark diagram.
9. An identification system for a faulty chip of an intelligent medical device, comprising:
the relation determining module is used for determining the interconnection relation of each working chip in the intelligent medical equipment based on different equipment working modes;
the signal recording module is used for setting matched detection resistors for corresponding working chips in the intelligent medical equipment based on the equipment working mode and recording response signals;
the fault determining module is used for determining the fault information of the same working chip according to the interconnection relation and the response signal of the same working chip in the same equipment working mode;
the fault identification matching module is used for matching fault identifications to the same working chip based on the fault information so as to obtain a chip identification diagram of the intelligent medical equipment and outputting and displaying the chip identification diagram;
wherein the fault determination module is to:
determining a plurality of sub-processes included in the working participation process of the first chip in the same equipment working mode;
setting a process label to the corresponding sub-process according to the execution attribute of each sub-process and the working attribute of the same equipment working mode;
according to the process label, carrying out stage participation extraction on the corresponding interconnection relation to obtain a corresponding first stage;
acquiring second chips with a communication interaction function with the first chip in the first stage, and acquiring communication interaction contents between the first chip and each second chip;
analyzing a transmission address and a receiving address in the communication interactive content to determine the transmission relation between the first chip and each second chip, and meanwhile determining the communication interactive difference between the first chip and each second chip according to the communication interactive content;
when the transmission relation is one-way transmission and is combined with the communication interaction difference, a first label is arranged on the first chip;
when the transmission relation is bidirectional transmission and is combined with the communication interaction difference, a second label is arranged on the first chip;
when the transmission relation is multidirectional transmission and is combined with the communication interaction difference, a third label is arranged on the second chip;
constructing and obtaining a label sequence corresponding to the first stage according to the label setting result;
determining work conversion content between adjacent stages, and analyzing the influence value of the work conversion content on the right stage;
when the influence value is larger than a preset value, acquiring a plurality of intermediate chips related to the work conversion content, screening a third chip from the plurality of intermediate chips according to the stage attribute of the right stage, and supplementing a tag sequence corresponding to the right stage according to a sequence corresponding to a conventionally set tag of the third chip to obtain an effective sequence;
constructing and obtaining a total interconnection sequence of the first chip based on the uncompensated tag sequence and the supplemented effective sequence;
acquiring the signal difference between the response signal of the first chip in each first stage and the corresponding standard signal in the working participation process corresponding to the first chip, and constructing and obtaining a total signal difference sequence of the first chip;
performing a first comparison between the total interconnection sequence and a first standard sequence, and simultaneously performing a second comparison between the total signal difference sequence and a corresponding second standard signal;
and determining the fault information of the first chip according to the first comparison result and the second comparison result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210985863.3A CN115047322B (en) | 2022-08-17 | 2022-08-17 | Method and system for identifying fault chip of intelligent medical equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210985863.3A CN115047322B (en) | 2022-08-17 | 2022-08-17 | Method and system for identifying fault chip of intelligent medical equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115047322A CN115047322A (en) | 2022-09-13 |
| CN115047322B true CN115047322B (en) | 2022-10-25 |
Family
ID=83168331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210985863.3A Active CN115047322B (en) | 2022-08-17 | 2022-08-17 | Method and system for identifying fault chip of intelligent medical equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115047322B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115576738B (en) * | 2022-12-08 | 2023-03-03 | 中诚华隆计算机技术有限公司 | Method and system for realizing equipment fault determination based on chip analysis |
| CN116256620B (en) * | 2023-05-15 | 2023-07-14 | 中诚华隆计算机技术有限公司 | Chiplet integrated chip detection method and device, electronic equipment and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004178675A (en) * | 2002-11-26 | 2004-06-24 | Kitakyushu Foundation For The Advancement Of Industry Science & Technology | Fault diagnosis apparatus and fault diagnosis method for semiconductor memory, and spectrum calculation apparatus and spectrum calculation method |
| CN112462668A (en) * | 2020-11-30 | 2021-03-09 | 广东春草科技股份有限公司 | Intelligent management system for medical equipment |
| CN113542023A (en) * | 2021-07-08 | 2021-10-22 | 泰安宇杰科技有限公司 | Communication link fault detection method based on artificial intelligence |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009110281A (en) * | 2007-10-30 | 2009-05-21 | Toshiba Corp | Medical equipment failure analyzing device, medical equipment failure analyzing method, and medical equipment failure analyzing system |
| CN104425299B (en) * | 2013-08-27 | 2017-08-11 | 珠海艾派克微电子有限公司 | The method that chip manufacture device and application chip processing unit (plant) carry out chip manufacture |
| CN105207851A (en) * | 2015-09-30 | 2015-12-30 | 小米科技有限责任公司 | Fault detection method, device, system and terminal and intelligent device |
| CN106598790A (en) * | 2015-10-16 | 2017-04-26 | 中兴通讯股份有限公司 | Server hardware failure detection method, apparatus of server, and server |
| CN106211211B (en) * | 2016-07-27 | 2020-01-03 | 西南大学 | Wireless gateway equipment with equipment identification and information identification functions and networking method |
| CN109462512A (en) * | 2018-12-25 | 2019-03-12 | 深圳开立生物医疗科技股份有限公司 | Medical equipment failure processing method and system, cloud server and Internet of things system |
| CN114186524A (en) * | 2020-08-28 | 2022-03-15 | 长鑫存储技术有限公司 | Method for processing wafer probing data and computer readable storage medium |
-
2022
- 2022-08-17 CN CN202210985863.3A patent/CN115047322B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004178675A (en) * | 2002-11-26 | 2004-06-24 | Kitakyushu Foundation For The Advancement Of Industry Science & Technology | Fault diagnosis apparatus and fault diagnosis method for semiconductor memory, and spectrum calculation apparatus and spectrum calculation method |
| CN112462668A (en) * | 2020-11-30 | 2021-03-09 | 广东春草科技股份有限公司 | Intelligent management system for medical equipment |
| CN113542023A (en) * | 2021-07-08 | 2021-10-22 | 泰安宇杰科技有限公司 | Communication link fault detection method based on artificial intelligence |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115047322A (en) | 2022-09-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN115047322B (en) | Method and system for identifying fault chip of intelligent medical equipment | |
| CN109739904A (en) | A kind of labeling method of time series, device, equipment and storage medium | |
| CN107015901B (en) | Log analysis method and device | |
| CN112464995A (en) | Power grid distribution transformer fault diagnosis method and system based on decision tree algorithm | |
| CN111044149A (en) | Method and device for detecting temperature abnormal point of voltage transformer and readable storage medium | |
| JP2021174541A (en) | Production lead time analysis method and production lead time analysis system | |
| CN113516417A (en) | Service evaluation method and device based on intelligent modeling, electronic equipment and medium | |
| CN114460519A (en) | On-site and terminal fusion management system and method based on power transformer inspection | |
| CN103913150A (en) | Consistency detection method for electron components of intelligent ammeter | |
| CN113012097A (en) | Image rechecking method, computer device, and storage medium | |
| CN116612077A (en) | Circuit board detection method and system | |
| CN109592525A (en) | Elevator frequency converter fault diagnosis system and method | |
| CN116125256A (en) | Parameter testing method and system for comparator | |
| CN114666774B (en) | Identification matching system and method of Bluetooth equipment | |
| CN114896096A (en) | Data center equipment fault prediction system and method based on image recognition algorithm | |
| CN111860357B (en) | Attendance rate calculating method and device based on living body identification, terminal and storage medium | |
| CN212693910U (en) | Quick-mounting internet-of-things terminal of electric power detecting instrument | |
| WO2002099756A1 (en) | Unified method for evaluating the efficiency of large-scale systems and automated device for carrying out said method | |
| CN113487092A (en) | Production management system of MiniLED high dynamic printed circuit board | |
| CN113033845A (en) | Construction method and device for power transmission resource co-construction and sharing | |
| CN112016694A (en) | Machine learning data collection system and machine learning data collection method | |
| CN117873007B (en) | Manufacturing flow management method, system, equipment and medium based on industrial Internet of things | |
| CN113591477B (en) | Fault positioning method, device, equipment and storage medium based on associated data | |
| CN108235324A (en) | The test method and server of a kind of message template | |
| CN114141353A (en) | Quality monitoring method and device for medical equipment, storage medium and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |