CN115044873B - Preparation method of coating structure - Google Patents
Preparation method of coating structure Download PDFInfo
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- CN115044873B CN115044873B CN202210742396.1A CN202210742396A CN115044873B CN 115044873 B CN115044873 B CN 115044873B CN 202210742396 A CN202210742396 A CN 202210742396A CN 115044873 B CN115044873 B CN 115044873B
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/24—Vacuum evaporation
- C23C14/32—Vacuum evaporation by explosion; by evaporation and subsequent ionisation of the vapours, e.g. ion-plating
- C23C14/325—Electric arc evaporation
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/0021—Reactive sputtering or evaporation
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/021—Cleaning or etching treatments
- C23C14/022—Cleaning or etching treatments by means of bombardment with energetic particles or radiation
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0641—Nitrides
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- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physical Vapour Deposition (AREA)
Abstract
The invention relates to aA method of preparing a coating structure comprising: starting an arc target, setting a base bias voltage to U 0min ~U 0max Setting the arc current value as A 0min ~A 0max Bombarding the arc target to deposit a first layer of coating on a substrate; depositing at least one coating layer over the first coating layer comprises: starting an arc target, setting a base bias voltage to U n min ~U n max Setting the arc current value as A n min ~A n max Bombarding the arc target to deposit an n+1th layer of coating on the n th layer of coating; n is a positive integer; u (U) n min ≤U 0max And U is n max ≥U 0max And/or U n+1min ≤U n max And U is n+1max ≥U n max ;A n min ≤A 0max And A is n max ≥A 0max And/or A n+1min ≤A n max And A is n+1max ≥A n max . The invention adopts a mode of gradually increasing the substrate bias voltage, improves the hardness, toughness and chemical stability of the coating, enhances the wear resistance and thermal fatigue resistance of the surface of the substrate, is beneficial to reducing deformation, eliminating fatigue failure of the coating, and further greatly prolongs the service life of the substrate.
Description
Technical Field
The invention relates to the technical field of coating material preparation, in particular to a preparation method of a coating structure.
Background
With the development of cutter cutting technology, higher requirements are put on cutter materials and performances. Depositing a hard coating on the tool surface is an important way to improve and enhance the cutting performance of tools.
At present, the coating adopted on the surface of the cutter has low hardness and poor wear resistance, and influences the service life of the cutter.
Disclosure of Invention
Based on the problems, the existing coating has low hardness and poor wear resistance, and a preparation method of the coating structure is needed.
A method of preparing a coating structure comprising:
starting an electric arc target material and setting a substrate biasIs pressed into U 0 min ~U 0 max Setting the arc current value as A 0 min ~A 0 max Bombarding the arc target to deposit a first layer of coating on a substrate;
depositing at least one coating layer over the first coating layer;
wherein said depositing at least one coating layer over said first coating layer comprises:
starting an arc target, setting a base bias voltage to U n min ~U n max Setting the arc current value as A n min ~A n max Bombarding the arc target to deposit an n+1th layer of coating on the n th layer of coating;
n is a positive integer;
U n min ≤U 0 max and U is n max ≥U 0 max And/or U n+1min ≤U n max And U is n+1max ≥U n max ;
A n min ≤A 0 max And A is n max ≥A 0 max And/or A n+1min ≤A n max And A is n+1max ≥A n max 。
In one embodiment, the coating is a CrAlN coating and the arc ion plating technique is used to deposit four layers of CrAlN coating on the substrate.
In one embodiment, the conditions for depositing the first layer of cran coating on the substrate are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 30-80V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 400-800A.
In one embodiment, the conditions for depositing the second cran coating layer on the first cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 60-100V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 600-1000A.
In one embodiment, the conditions for depositing the third cran coating layer on the second cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 80-120V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
In one embodiment, the conditions for depositing the fourth cran coating layer on the third cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 100-200V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
In one embodiment, the thickness of the first CrAlN coating is 0.1-1.0 μm;
the thickness of the second CrAlN coating is 0.4-2.0 mu m;
the thickness of the third CrAlN coating layer is 0.4-2.0 mu m;
the thickness of the fourth CrAlN coating is 0.1-1.0 mu m.
In one embodiment, the starting arc target is provided with a base bias of U 0 min ~U 0 max Setting the arc current value as A 0 min ~A 0 max The arc target is bombarded to deposit a first layer of coating on a substrate, the method further comprising: etching the substrate, wherein the conditions for etching the substrate are specifically as follows:
and (3) carrying out ion etching on the substrate, wherein the bias voltage of the substrate is 100-350V, the flow rate of the introduced argon is 100-300 sccm, and the flow rate of the introduced hydrogen is 100-150 sccm.
In one embodiment, before the etching the substrate, the preparation method further includes: cleaning the substrate, wherein the conditions for cleaning the substrate are specifically as follows:
and (3) carrying out glow cleaning on the substrate, wherein the bias voltage of the substrate is 30-60V, the flow rate of the introduced argon is 150-250 sccm, the flow rate of the introduced hydrogen is 100-150 sccm, and the cleaning time is 50-60 min.
In one embodiment, the method of preparing further comprises, prior to said cleaning the substrate: heating the substrate to 300-600 ℃.
The preparation method of the coating structure comprises depositing multiple layers of coatings on a substrate, wherein when the n+1th layer of coating is deposited on the n-th layer of coating, the minimum value of the substrate bias voltage of the n+1th layer of coating is smaller than or equal to the maximum value of the substrate bias voltage of the n-th layer of coating, and the maximum value of the substrate bias voltage of the n+1th layer of coating is larger than or equal to the maximum value of the substrate bias voltage of the n-th layer of coating, namely U n min ≤U 0 max And U is n max ≥U 0 max And/or U n+1min ≤U n max And U is n+1 max ≥U n max By adopting the mode of gradually increasing the substrate bias voltage, the hardness, toughness and chemical stability of the coating are improved, the wear resistance and thermal fatigue resistance of the surface of the substrate are enhanced, deformation is reduced, fatigue failure of the coating is eliminated, and the service life of the substrate is greatly prolonged.
Detailed Description
The method of preparing the coating structure of the present invention is described in further detail below with reference to specific examples. The present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
In the description of the present invention, it should be understood that the terms "first", "second", "third", etc. are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or quantity or as implicitly indicating the importance or quantity of a technical feature being indicated. Moreover, "first," "second," "third," etc. are for non-exhaustive list description purposes only, and it should be understood that no closed limitation on the number is made.
In the invention, the technical characteristics described in an open mode comprise a closed technical scheme composed of the listed characteristics and also comprise an open technical scheme comprising the listed characteristics.
In the present invention, the numerical ranges are referred to as continuous, and include the minimum and maximum values of the ranges, and each value between the minimum and maximum values, unless otherwise specified. Further, when a range refers to an integer, each integer between the minimum and maximum values of the range is included. Further, when multiple range description features or characteristics are provided, the ranges may be combined. In other words, unless otherwise indicated, all ranges disclosed herein are to be understood to include any and all subranges subsumed therein.
The percentage content referred to in the present invention refers to mass percentage for both solid-liquid mixing and solid-solid mixing and volume percentage for liquid-liquid mixing unless otherwise specified.
The percentage concentrations referred to in the present invention refer to the final concentrations unless otherwise specified. The final concentration refers to the ratio of the additive component in the system after the component is added.
The temperature parameter in the present invention is not particularly limited, and may be a constant temperature treatment or a treatment within a predetermined temperature range. The constant temperature process allows the temperature to fluctuate within the accuracy of the instrument control.
A method of making a coating structure comprising:
starting an arc target, setting a base bias voltage to U 0 min ~U 0 max Setting the arc current value as A 0 min ~A 0 max Bombarding the arc target to deposit a first layer of coating on a substrate; depositing at least one coating layer over the first coating layer; wherein depositing at least one coating layer over the first coating layer comprises: starting an arc target, setting a base bias voltage to U n min ~U n max Setting the arc current value as A n min ~A n max Bombarding the arc target to deposit an n+1th layer of coating on the n th layer of coating; n is a positive integer; u (U) n min ≤U 0 max And U is n max ≥U 0 max And/or U n+1min ≤U n max And U is n+1max ≥U n max ;A n min ≤A 0 max And A is n max ≥A 0 max And/or A n+1min ≤A n max And A is n+1 max ≥A n max 。
It will be appreciated that the range of substrate bias values for depositing the first layer of coating on the substrate is U 0 min ~U 0 max The arc current value is A 0 min ~A 0 max The method comprises the steps of carrying out a first treatment on the surface of the When depositing a second coating layer on the first coating layer, the range of the base bias voltage value is U 1 min ~U 1 max The arc current value is A 1 min ~A 1 max The method comprises the steps of carrying out a first treatment on the surface of the When a third coating layer is deposited on the second coating layer, the range of the base bias voltage value is U 2 min ~U 2 max The arc current value is A 2 min ~A 2 max The method comprises the steps of carrying out a first treatment on the surface of the And so on, when depositing the (n+1) th coating layer on the (n) th coating layer, starting an arc target material, and setting the base body bias voltage as U n min ~U n max Setting the arc current value as A n min ~A n max The arc target is bombarded to deposit an n+1 layer of coating on the n layer of coating. The range of the base bias voltage value of the n+1-th layer coating layer and the range of the base bias voltage value of the n-th layer coating layer are allowed to intersect, and the range of the arc current value of the n+1-th layer coating layer and the range of the arc current value of the n-th layer coating layer are also allowed to intersect, in other words, n is a positive integer, U n min ≤U 0 max And U is n max ≥U 0 max And/or U n+1min ≤U n max And U is n+1max ≥U n max ,A n min ≤A 0 max And A is n max ≥A 0 max And/or A n+1min ≤A n max And A is n+1max ≥A n max 。
The preparation method of the coating structure comprises depositing multiple layers of coatings on a substrate, wherein when the n+1th layer of coating is deposited on the n-th layer of coating, the minimum value of the substrate bias voltage of the n+1th layer of coating is smaller than or equal to the maximum value of the substrate bias voltage of the n-th layer of coating, and the maximum value of the substrate bias voltage of the n+1th layer of coating is larger than or equal to the maximum value of the substrate bias voltage of the n-th layer of coatingU, i.e. U n min ≤U 0 max And U is n max ≥U 0 max And/or U n+1min ≤U n max And U is n+1 max ≥U n max By adopting the mode of gradually increasing the substrate bias voltage, the hardness, toughness and chemical stability of the coating are improved, the wear resistance and thermal fatigue resistance of the surface of the substrate are enhanced, deformation is reduced, fatigue failure of the coating is eliminated, and the service life of the substrate is greatly prolonged.
In some embodiments, the coating is a cran coating and the arc ion plating technique is used to deposit four layers of cran coating on the substrate.
Of course, it is understood that coatings produced using the methods of producing the coating structures of the present invention include, but are not limited to, crAlN coatings, for example, tiCN coatings or other coatings in other embodiments. It will also be appreciated that the coating produced by the method of producing a coating structure of the present invention may be a single coating or a composite coating, e.g., tiC, tiN, tiCN, zrN, crN, moS 2 TiAlN, tiAlCN, tiN-AlN, CN and the like. The coating layer in this embodiment is a cran coating layer, the number of layers is four, in other embodiments, the number of layers may also be other values, and may be set according to actual needs, and is not particularly limited.
In some embodiments, the conditions for depositing the first layer of cran coating on the substrate are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 30-80V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 400-800A.
In some embodiments, the conditions for depositing the second cran coating layer over the first cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 60-100V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 600-1000A.
In some embodiments, the conditions for depositing the third cran coating layer over the second cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 80-120V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
In some embodiments, the conditions for depositing the fourth layer of cran coating on the third layer of cran coating are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 100-200V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
The invention prepares the multilayer CrAlN coating by utilizing the arc ion plating technology, adopts the pulse arc current technology, and has the highest arc current value reaching 400A-1200A, thereby effectively reducing the number of liquid drops and simultaneously keeping high deposition efficiency. The invention adopts a mode of gradually increasing the substrate bias voltage, improves the hardness, toughness and chemical stability of the CrAlN coating, enhances the wear resistance and thermal fatigue resistance of the surface of the substrate, is beneficial to reducing deformation, eliminating fatigue failure of the CrAlN coating, and further greatly prolongs the service life of the substrate.
It should be noted that the multilayer cran coating in the above embodiments is mainly applied to the protection of the surface of the device. The tools include, but are not limited to, cutting tools, dies, mechanical parts, and the like. For example, in a specific embodiment, the multilayer CrAlN coating in the embodiment is applied to the protection of the surface of a drilling tool, and the multilayer CrAlN coating prepared by the preparation method of the coating structure greatly prolongs the service life of the tool under the drilling working condition.
In some embodiments, the first layer of cran coating has a thickness of 0.1 to 1.0 μm; the thickness of the second CrAlN coating is 0.4-2.0 mu m; the thickness of the third CrAlN coating layer is 0.4-2.0 mu m; the thickness of the fourth CrAlN coating is 0.1-1.0 mu m.
In some embodiments, the arc target is turned on, setting the substrate bias to U 0 min ~U 0 max Setting the arc current value as A 0 min ~A 0 max The arc target is bombarded to deposit a first layer of coating on the substrate, and the method further comprises: etching a substrate, wherein the conditions for etching the substrate are as follows:
and (3) carrying out ion etching on the substrate, wherein the bias voltage of the substrate is 100-350V, the flow rate of the introduced argon is 100-300 sccm, and the flow rate of the introduced hydrogen is 100-150 sccm.
It can be appreciated that ion etching of the substrate can clean the surface of the substrate to be plated, and at the same time, improve the surface roughness of the substrate and improve the bonding force between the coating and the substrate.
In some embodiments, prior to etching the substrate, the method of preparing further comprises: the substrate is cleaned, and the conditions for cleaning the substrate are specifically as follows:
and (3) carrying out glow cleaning on the substrate, wherein the bias voltage of the substrate is 30-60V, the flow rate of the introduced argon is 150-250 sccm, the flow rate of the introduced hydrogen is 100-150 sccm, and the cleaning time is 50-60 min.
In some embodiments, prior to cleaning the substrate, the method of making further comprises: heating the substrate to 300-600 ℃.
It can be understood that the substrate is heated to 300-600 ℃ to remove air in the substrate, and prevent the subsequent coating film from falling off and bursting.
In some embodiments, prior to heating the substrate, the method of making further comprises: and (5) cleaning and drying the substrate, and then placing the substrate into coating equipment to keep the substrate to be coated clean. In a specific embodiment, the coating apparatus is an HA800 complex machine coating apparatus.
In some embodiments, after depositing the fourth layer of cran coating on the third layer of cran coating, the method of preparing further comprises: turning off all heating elements in the coating equipment, cooling the substrate to 300-400 ℃ along with the furnace, and introducing N 2 Cooling the substrate to about 200 ℃, introducing air into the coating equipment, opening the furnace, and taking out the substrate.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. A method of preparing a coating structure comprising:
starting an arc target, setting a base bias voltage to U 0min ~U 0max Setting the arc current value as A 0min ~A 0max Bombarding the arc target to deposit a first layer of coating on a substrate;
depositing at least one coating layer over the first coating layer;
wherein said depositing at least one coating layer over said first coating layer comprises:
starting an arc target, setting a base bias voltage to U nmin ~U nmax Setting the arc current value as A nmin ~A nmax Bombarding the arc target to deposit an n+1th layer of coating on the n th layer of coating;
n is a positive integer;
U nmin ≤U 0max and U is nmax ≥U 0max And/or U n+1min ≤U nmax And U is n+1max ≥U nmax ;
A nmin ≤A 0max And A is nmax ≥A 0max And/or A n+1min ≤A nmax And A is n+1max ≥A nmax 。
2. The method of claim 1, wherein the coating is a cran coating and wherein the four layers of cran coating are deposited on the substrate using arc ion plating.
3. The method for producing a coating structure according to claim 2, characterized in that the conditions for depositing the first layer of cran coating on the substrate are in particular:
starting an electric arc CrAl target, wherein the base bias voltage is 30-80V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 400-800A.
4. A method of producing a coating structure according to claim 3, characterized in that the conditions for depositing a second layer of cran coating on the first layer of cran coating are in particular:
starting an electric arc CrAl target, wherein the base bias voltage is 60-100V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 600-1000A.
5. The method for producing a coating structure according to claim 4, wherein the conditions for depositing a third cran coating layer on the second cran coating layer are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 80-120V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
6. The method for producing a coating structure according to claim 5, wherein the conditions for depositing the fourth layer of cran coating on the third layer of cran coating are specifically:
starting an electric arc CrAl target, wherein the base bias voltage is 100-200V, the arc power supply frequency is 300-1000 Hz, the duty ratio is 10-50%, and the arc current value is 800-1200A.
7. The method for producing a coating structure according to claim 2, wherein the thickness of the first layer of cran coating is 0.1-1.0 μm;
the thickness of the second CrAlN coating is 0.4-2.0 mu m;
the thickness of the third CrAlN coating layer is 0.4-2.0 mu m;
the thickness of the fourth CrAlN coating is 0.1-1.0 mu m.
8. The method according to claim 1The preparation method of the coating structure is characterized in that the arc starting target is provided with a base body bias voltage U 0min ~U 0max Setting the arc current value as A 0min ~A 0max The arc target is bombarded to deposit a first layer of coating on a substrate, the method further comprising: etching the substrate, wherein the conditions for etching the substrate are specifically as follows:
and (3) carrying out ion etching on the substrate, wherein the bias voltage of the substrate is 100-350V, the flow rate of the introduced argon is 100-300 sccm, and the flow rate of the introduced hydrogen is 100-150 sccm.
9. The method of claim 8, further comprising, prior to etching the substrate: cleaning the substrate, wherein the conditions for cleaning the substrate are specifically as follows:
and (3) carrying out glow cleaning on the substrate, wherein the bias voltage of the substrate is 30-60V, the flow rate of the introduced argon is 150-250 sccm, the flow rate of the introduced hydrogen is 100-150 sccm, and the cleaning time is 50-60 min.
10. The method of claim 9, wherein prior to said cleaning said substrate, said method further comprises: heating the substrate to 300-600 ℃.
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