CN115037128B

CN115037128B - Control circuit, rectifier circuit, power supply and electronic equipment of bridge rectifier

Info

Publication number: CN115037128B
Application number: CN202210972648.XA
Authority: CN
Inventors: 简旻助
Original assignee: Agco Microelectronics Shenzhen Co ltd
Current assignee: Agco Microelectronics Shenzhen Co ltd
Priority date: 2022-08-15
Filing date: 2022-08-15
Publication date: 2022-11-15
Anticipated expiration: 2042-08-15
Also published as: CN115037128A

Abstract

The utility model provides a control circuit, a rectifying circuit, a power supply and an electronic device of a bridge rectifier, which relate to the technical field of electronic circuits, wherein the bridge rectifier comprises a first transistor, a first electrode of the first transistor is connected to a first input end of the bridge rectifier, and a second electrode of the first transistor is grounded; the control circuit comprises a normally-on second transistor comprising a gate, a first electrode and a second electrode, wherein: the first electrode of the second transistor is configured to be connected to the second input terminal of the bridge rectifier, the second electrode of the second transistor is configured to be connected to the gate of the first transistor, and the output voltage of the second electrode of the second transistor is clamped at a first voltage under the condition that the second transistor is clamped, and the first voltage enables the first transistor to be conducted. In the mode disclosed by the invention, the control circuit with simple internal circuit and low manufacturing cost can be used for controlling the transistor in the bridge rectifier.

Description

Control circuit, rectifier circuit, power supply and electronic equipment of bridge rectifier

Technical Field

The disclosure relates to the technical field of electronic circuits, in particular to a control circuit, a rectification circuit, a power supply and electronic equipment of a bridge rectifier.

Background

In the related art, a bridge rectifier is applied to an alternating current/direct current (AC/DC) system to realize AC/DC conversion. A simple bridge rectifier, comprising four diodes in bridge, can rectify the negative input voltage to a positive output voltage during the AC negative half-cycle.

Disclosure of Invention

According to an aspect of the embodiments of the present disclosure, there is provided a control circuit of a bridge rectifier, the bridge rectifier including a first transistor, a first electrode of the first transistor being connected to a first input terminal of the bridge rectifier, a second electrode of the first transistor being grounded; the control circuit includes a normally-on second transistor including a gate, a first electrode, and a second electrode, wherein: the first electrode of the second transistor is configured to be connected to the second input of the bridge rectifier, the second electrode of the second transistor is configured to be connected to the gate of the first transistor, and the output voltage of the second electrode of the second transistor is clamped at a first voltage with the second transistor clamped, the first voltage causing the first transistor to conduct.

In some embodiments, in a case where the input voltage of the first electrode of the second transistor is negative, the output voltage of the second electrode of the second transistor turns off the first transistor.

In some embodiments, a start time of the second transistor clamp is later than a start time of the first transistor turn-on, and an end time of the second transistor clamp is earlier than an end time of the first transistor turn-on.

In some embodiments, the gate of the second transistor is connected to the second electrode of the second transistor; or the gate of the second transistor is grounded.

In some embodiments, the control circuit further comprises: a first voltage regulator including a first output terminal connected to a gate of the second transistor, the first voltage regulator configured to adjust an output voltage of the first output terminal to adjust the first voltage.

In some embodiments, the first voltage regulator further comprises a third input configured to be connected to the first input or the second input.

In some embodiments, the bridge rectifier further comprises a third transistor, a first electrode of the third transistor being connected to the second input of the bridge rectifier, a second electrode of the third transistor being grounded; the control circuit further comprises a normally-on fourth transistor comprising a gate, a first electrode, and a second electrode, wherein: a first electrode of the fourth transistor is configured to be connected to the first input terminal of the bridge rectifier, a second electrode of the fourth transistor is configured to be connected to the gate of the third transistor, and an output voltage of the second electrode of the fourth transistor is clamped at a second voltage with the fourth transistor clamped, the second voltage causing the third transistor to be turned on.

In some embodiments, in a case where the input voltage of the first electrode of the fourth transistor is negative, the output voltage of the second electrode of the fourth transistor turns off the third transistor.

In some embodiments, the start time of the fourth transistor clamp is later than the start time of the third transistor turn-on, and the end time of the fourth transistor clamp is earlier than the end time of the third transistor turn-on.

In some embodiments, a gate of the fourth transistor is connected to a second electrode of the fourth transistor; or the gate of the fourth transistor is grounded.

In some embodiments, the control circuit further comprises: a second voltage regulator including a second output terminal connected to a gate of the fourth transistor, the second voltage regulator configured to adjust an output voltage of the second output terminal to adjust the second voltage.

In some embodiments, at least one of the second transistor and the fourth transistor is a Junction Field Effect Transistor (JFET) or a depletion mode Metal Oxide Semiconductor Field Effect Transistor (MOSFET).

In some embodiments, the threshold voltage of the first transistor ranges from 2V to 3V, and the first voltage ranges from 10V to 20V; and/or the range of the threshold voltage of the third transistor is 2V-3V, and the range of the second voltage is 10V-20V.

According to another aspect of the embodiments of the present disclosure, there is provided a rectifier circuit including: the control circuit of the bridge rectifier according to any one of the above embodiments; and the bridge rectifier.

According to still another aspect of an embodiment of the present disclosure, there is provided a power supply including: the rectifier circuit according to any one of the above embodiments.

According to still another aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including: the power supply of any of the embodiments above.

According to still another aspect of the embodiments of the present disclosure, there is provided a control method of a bridge rectifier, the bridge rectifier including a first transistor having a first electrode connected to a first input terminal of the bridge rectifier, and a second electrode connected to ground; the method comprises the following steps: and controlling the state of the first transistor by using a normally-on second transistor, wherein the second transistor comprises a grid electrode, a first electrode and a second electrode, the first electrode of the second transistor is connected with the second input end of the bridge rectifier, and the second electrode of the second transistor is connected with the grid electrode of the first transistor, the output voltage of the second electrode of the second transistor is clamped at a first voltage under the condition that the second transistor is clamped, and the first transistor is turned on by the first voltage.

In some embodiments, the bridge rectifier further comprises a third transistor, a first electrode of the third transistor being connected to the second input of the bridge rectifier, a second electrode of the third transistor being grounded; the method further comprises the following steps: controlling a state of the third transistor with a normally-on fourth transistor, the fourth transistor including a gate, a first electrode, and a second electrode, the first electrode of the fourth transistor configured to be connected to the first input of the bridge rectifier, the second electrode of the fourth transistor configured to be connected to the gate of the third transistor, wherein an output voltage of the second electrode of the fourth transistor is clamped at a second voltage with the fourth transistor clamped, the second voltage causing the third transistor to be on.

In some embodiments, a start time of the fourth transistor clamp is later than a start time of the third transistor turn-on, and an end time of the fourth transistor clamp is earlier than an end time of the third transistor turn-on.

In the embodiment of the present disclosure, a first electrode of the second transistor in the control circuit is connected to the second input terminal of the bridge rectifier, a second electrode of the second transistor is connected to a gate of the first transistor in the bridge rectifier, a first electrode of the first transistor is connected to the first input terminal, and a second electrode of the first transistor is grounded. The output voltage of the second electrode of the second transistor is clamped to a first voltage that turns on the first transistor when the second transistor is clamped. In this way, the first transistor can be controlled to be turned on during at least part of the expected period of time by the second transistor connected to the second input terminal of the bridge rectifier, and no additional comparator is required to be arranged in the control circuit. In this way, the control of the conduction of the first transistor in the bridge rectifier can be realized by the control circuit with a simple internal circuit and low manufacturing cost while improving the AC/DC conversion efficiency.

The technical solution of the present disclosure is further described in detail by the accompanying drawings and embodiments.

Drawings

In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative efforts.

FIG. 1A is a schematic diagram of a rectifier circuit, according to some embodiments of the present disclosure;

FIG. 1B is a schematic diagram of a rectifier circuit according to some embodiments of the related art;

FIG. 1C is a schematic diagram of a rectifier circuit according to further embodiments of the related art;

FIG. 2 is a signal waveform diagram according to some embodiments of the present disclosure;

FIG. 3 is a signal waveform diagram according to further embodiments of the present disclosure;

FIG. 4 is a schematic diagram of a rectifier circuit according to further embodiments of the present disclosure;

FIG. 5 is a signal waveform diagram according to still further embodiments of the present disclosure;

FIG. 6 is a signal waveform diagram according to still further embodiments of the present disclosure;

FIG. 7 is a schematic diagram of a rectifier circuit, according to still further embodiments of the present disclosure;

FIG. 8 is a schematic diagram of a rectifier circuit, according to still further embodiments of the present disclosure;

FIG. 9 is a schematic diagram of a rectifier circuit according to further embodiments of the present disclosure;

fig. 10 is a schematic diagram of a rectifier circuit, according to still further embodiments of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.

The relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

This results in a reduction in AC/DC conversion efficiency due to the higher losses of the diodes in the bridge rectifier.

In order to improve the AC/DC conversion efficiency, in the related art, one or more diodes in the bridge rectifier are replaced with one or more Field-Effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs). In this way, a control chip for controlling the FET needs to be added.

However, these control chips require components such as an integrated comparator, and the internal circuit is complicated and the manufacturing cost is high. For example, the comparator may output a signal representing a positive or negative half cycle based on the input voltage of the bridge rectifier, and the control chip may control the FET based on the signal.

In view of this, the present disclosure provides a solution that enables control of the transistors in the bridge rectifier based on a simple control circuit.

Fig. 1A is a schematic diagram of a rectifier circuit, according to some embodiments of the present disclosure.

As shown in fig. 1A, the rectifier circuit includes a bridge rectifier and a control circuit 100 of the bridge rectifier.

The bridge rectifier comprises two input terminals (a first input terminal 201 and a second input terminal 202), an output terminal 203 and a ground terminal 204.

An ac input voltage source may be connected between the first input terminal 201 and the second input terminal 202. A load of the bridge rectifier may be connected between the output terminal 203 and the ground terminal 204. The ground terminal 204 is configured to be grounded.

The bridge rectifier further includes four rectifying

elements

210, 220, 230, and 240.

Two poles of the rectifying element 210 are connected to the first input terminal 201 and the ground terminal 204, respectively, two poles of the rectifying element 220 are connected to the second input terminal 202 and the ground terminal 204, two poles of the rectifying element 230 are connected to the first input terminal 201 and the output terminal 203, respectively, and two poles of the rectifying element 240 are connected to the second input terminal 202 and the output terminal 203, respectively.

Referring to fig. 1B, each of the rectifying

elements

210, 220, 230, and 240 may be, for example, a diode, and both poles of the rectifying

elements

210, 220, 230, and 240 are positive and negative poles of the diode. In such a structure, rectification is achieved by using the characteristic that the diode allows only a single-direction current to pass through. However, the disadvantages of this architecture are: the diode consumes higher electric energy when conducting in forward bias, and the whole conversion efficiency of the bridge rectifier is poorer.

Referring to fig. 1C, each of the rectifying

elements

210, 220, 230, and 240 may be, for example, a FET, and both poles of the rectifying

elements

210, 220, 230, and 240 are sources and drains of the FETs. Under the structure, the state of the FET is controlled by a corresponding control circuit to realize rectification. However, the disadvantages of this architecture are: comparators are required to be arranged in the 4 control circuits, and the bias voltage of the comparators needs to consume electric energy; also, since the 4 control circuits operate independently, an additional control mechanism is required to avoid a short circuit between the first input terminal 201 and the second input terminal 202 due to simultaneous conduction of FETs that should not be conducted simultaneously.

In the embodiment of the present disclosure, referring to fig. 1A, the rectifying element 210 is a first transistor 210, and the first transistor 210 includes a first electrode E1, a second electrode E2, and a gate G. The first electrode E1 of the first transistor 210 is connected to the first input terminal 201, and the second electrode E2 of the first transistor 210 is connected to the ground terminal 204, i.e., the second electrode E2 of the first transistor 210 is grounded.

The first electrode E1 of the first transistor 210 may be one of a source and a drain, and the second electrode E2 may be the other of the source and the drain. The first electrode E1 and the second electrode E2 of other transistors are similar to the first electrode E1 and the second electrode E2 of the first transistor 210, and will not be described again. It is to be understood that the first electrodes E1 of the different transistors may be the same or different types of electrodes, and that the second electrodes E2 of the different transistors may also be the same or different types of electrodes.

The first transistor 210 may be a FET, for example, a Junction FET (JFET) or a MOSFET. Taking a MOSFET as an example, the first transistor 210 may be an N-type MOSFET or a P-type MOSFET.

As shown in fig. 1B, 1C, any one of the rectifying

elements

220, 230, and 240 may be a diode or a FET controlled by a corresponding control circuit. For example, the rectifying

elements

220, 230, and 240 may each be a MOSFET (e.g., an N-type MOSFET or a P-type MOSFET) controlled by a corresponding control circuit.

Taking as an example the case where the voltage difference between the input voltage of the first input terminal 201 and the input voltage of the second input terminal 202 is positive as the positive half cycle of the bridge rectifier and the case where the voltage difference between the input voltage of the first input terminal 201 and the input voltage of the second input terminal 202 is negative as the negative half cycle of the bridge rectifier, the four rectifying

elements

210, 220, 230 and 240 operate in the following manner such that the bridge rectifier rectifies: during the positive half cycle of the bridge rectifier, the rectifying

elements

220 and 230 are on, the first transistor 210 and the rectifying element 240 are off, in which case the current flows through the first input terminal 201, the rectifying element 230, the rectifying element 220, and then back to the second input terminal 202 in sequence; also, during the negative half cycle of the bridge rectifier, the first transistor 210 and the rectifying element 240 are turned on, and the rectifying

elements

220 and 230 are turned off, in which case current flows through the second input terminal 202, the rectifying element 240, the first transistor 210, and then back to the first input terminal 201 in order.

In some embodiments, referring to fig. 1A, the bridge rectifier further comprises a capacitor 205 for filtering, one end of the capacitor 205 is connected to the output terminal 203 and the other end is connected to the ground terminal 204.

As shown in fig. 1A, the control circuit 100 of the bridge rectifier includes a second transistor 110 that is normally on (normally on), i.e., when the gate G of the second transistor 110 as a control terminal is not biased, the conduction channel of the second transistor 110 is already present, and the second transistor 110 is in a conducting state.

For example, if the threshold voltage of the second transistor 110 is negative, the second transistor 110 is turned on. In some embodiments, the second transistor 110 is a normally-on JFET or depletion MOSFET. For example, when the second transistor 110 is a depletion MOSFET, the voltage V of the gate of the second transistor 110 with respect to the source is _gs At 0V, the depletion MOSFET is in conductionStatus.

Referring to fig. 1A, the second transistor 110 includes a gate G, a first electrode E1, and a second electrode E2. The first electrode E1 of the second transistor 110 is configured to be connected to the second input 202 of the bridge rectifier, and the second electrode E2 of the second transistor 110 is configured to be connected to the gate G of the first transistor 210.

Here, the output voltage of the second electrode E2 of the second transistor 110 is clamped at a first voltage which makes the first transistor 210 conductive in a case where the second transistor 110 is clamped off (ping-off).

For ease of understanding, the following description is made in conjunction with fig. 2. Fig. 2 is a signal waveform diagram according to some embodiments of the present disclosure.

Fig. 2 schematically shows the variation trend of 3 signals in one cycle when the first input terminal 201 and the second input terminal 202 are respectively connected with the positive pole and the negative pole of the sinusoidal alternating-current input voltage source. These 3 signals are the input voltage V of the first input terminal 201 _ac1 An input voltage V of the second input terminal 202 _ac2 And the input voltage V of the gate G of the first transistor 210 _g1 。

It will be appreciated that the input voltage to the first electrode E1 of the second transistor 110 is equal to V, ignoring the voltage drop of the conductive line itself _ac2 And, the output voltage of the second electrode E2 of the second transistor 110 is equal to V _g1 。

Based on this assumption, 3 kinds of signals are described below with 1/4 cycle as one unit.

Referring to FIG. 2, in the 1 st 1/4 th cycle, V _ac1 First peak voltage from positive (i.e., V) _peak1 ) Reduced to 0V, V _ac2 Second peak voltage from negative (i.e., V) _peak2 ) Gradually increasing to 0V. For example, V _peak1 =220V，V _peak2 = 220V; also for example, V _peak1 =110V，V _peak2 = 110V; as another example, V _peak1 =120V，V _peak2 =-120V。

At this time, V _ac1 -V _ac2 Greater than 0V, is in the positive half cycle of the bridge rectifier. During this period, the second transistor110 input voltage (i.e., V) of the first electrode E1 _ac2 ) Negative, the second transistor 110 is turned off, and the output voltage (i.e., V) of the second electrode E2 of the second transistor 110 _g1 ) And maintained at 0V.

In the 2 nd 1/4 period, V _ac1 Decrease from 0V to V _peak2 ，V _ac2 Increase from 0V to V _peak1 . At this time, V _ac1 -V _ac2 Less than 0V, belonging to the negative half-cycle of the bridge rectifier. During this period, the input voltage to the first electrode E1 of the second transistor 110 is positive, and the second transistor 110 is turned on.

At V _ac2 In the process of increasing gradually, the second transistor 110 first operates in the amplification region. In this case, a voltage difference between the first electrode E1 and the second electrode E2 of the second transistor 110 is smaller than the pinch-off voltage of the second transistor 110, and the output voltage of the second electrode E2 of the second transistor 110 varies in positive correlation with the variation of the input voltage of the first electrode E1.

Specifically, the output voltage of the second electrode E2 of the second transistor 110 increases in synchronization with the increase of the input voltage of the first electrode E1 until the input voltage of the first electrode E1 increases to a certain voltage (hereinafter, referred to as a specific voltage). The specific voltage makes a voltage difference between the first electrode E1 and the second electrode E2 of the second transistor 110 equal to a pinch-off voltage of the second transistor 110. It should be understood that the specific voltage is less than V _peak1 . In this case, the second transistor 110 is switched from the operation in the amplification region to the operation in the saturation region, the second transistor 110 is clamped, and the output voltage of the second electrode E2 of the second transistor 110 is no longer increased in synchronization with the increase of the input voltage of the first electrode E1, but is clamped at the first voltage V ₁ 。

Thereafter, the input voltage of the first electrode E1 of the second transistor 110 continues to increase, which results in the voltage difference between the first electrode E1 and the second electrode E2 of the second transistor 110 being greater than the clamp voltage of the second transistor 110, but the output voltage of the second electrode E2 of the second transistor 110 is still clamped at the first voltage V ₁ 。

In some embodiments, referring to fig. 2, the pinch-off voltage of the second transistor 110 is equal to 0V. That is, in the case where the voltage difference between the first electrode E1 and the second electrode E2 of the second transistor 110 is greater than 0V, the second transistor 110 is clamped. It should be understood that the pinch-off voltage of the second transistor 110 may also be other values, and the embodiments of the present disclosure are not limited thereto.

During the clamping of the second transistor 110, the input voltage at the first electrode E1 of the second transistor 110 continues to increase, but the output voltage at the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ Up to V _ac2 Increase to V _peak1 And the 2 nd 1/4 th cycle ends.

In the 3 rd 1/4 cycle, V _ac1 V from negative values _peak2 Increasing towards 0V, V _ac2 From positive values of V _peak1 Decreasing towards 0V. At this time, V _ac1 -V _ac2 Less than 0V, still belongs to the negative half cycle of the bridge rectifier.

During this time, the second transistor 110 is turned on, and the state of the second transistor 110 in the 3 rd 1/4 th cycle is changed in the reverse order of the state in the 2 nd 1/4 th cycle.

That is, in the 3 rd 1/4 cycle, the second transistor 110 is first operated in the saturation region, and the output voltage of the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ Until the input voltage of the first electrode E1 of the second transistor 110 decreases to the aforementioned specific voltage, the second transistor 110 changes from operating in the saturation region to operating in the amplification region. Thereafter, the output voltage of the second electrode E2 of the second transistor 110 is changed in positive correlation with the change of the input voltage of the first electrode E1, that is, the output voltage of the second electrode E2 of the second transistor 110 is decreased in synchronization with the decrease of the input voltage of the first electrode E1.

In the 4 th 1/4 cycle, V _ac1 Increase from 0V to V _peak1 ，V _ac2 Decrease from 0V to V _peak2 . At this time, V _ac1 -V _ac2 Greater than 0V, is in the positive half cycle of the bridge rectifier. Similar to the 1 st 1/4 th cycle, the second transistor 110 is turned off during this period, and the output voltage of the second electrode E2 of the second transistor 110 is maintained at 0V. And will not be described in detail herein.

In the second crystalWhen the transistor 110 is clamped, the output voltage of the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ The first voltage V ₁ The first transistor 210 may be kept on. That is, during the negative half-cycle of the bridge rectifier, the output voltage of the first transistor 210 at least at the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ During which it is turned on.

In the above embodiment, the first electrode E1 of the second transistor 110 in the control circuit 100 is connected to the second input terminal 202 of the bridge rectifier, the second electrode E2 is connected to the gate G of the first transistor 210 in the bridge rectifier, the first electrode E1 of the first transistor 210 is connected to the first input terminal 201, and the second electrode E2 is grounded. The output voltage of the second electrode E2 of the second transistor 110 is clamped at the first voltage V that turns on the first transistor 210 when the second transistor 110 is clamped ₁ . In this way, the control circuit 100 can control the first transistor 210 to conduct during at least a part of the expected conduction period through the second transistor 110 connected to the second input terminal 202 of the bridge rectifier, and no additional comparator is required to be arranged inside the control circuit 100. In this way, the control of the conduction of the first transistor 210 in the bridge rectifier can be achieved by the control circuit 100, which has a simple internal circuit and is low in manufacturing cost, while improving the AC/DC conversion efficiency.

In some embodiments, the control circuit 100 includes only the second transistor 110. In this manner, the control of the conduction of the first transistor 210 in the bridge rectifier can be achieved with the control circuit 100 having a simpler internal circuit and a lower manufacturing cost while improving the AC/DC conversion efficiency.

The control circuit 100 of the bridge rectifier shown in fig. 1A is further described below in conjunction with some embodiments.

In some embodiments, in the case where the input voltage of the first electrode E1 of the second transistor 110 is negative, the output voltage of the second electrode E2 of the second transistor 110 turns off the first transistor 210. In this manner, the first transistor 210 is turned off during the positive half cycle of the bridge rectifier.

For example, see the second embodiment shown in FIG. 21/4 period and 4 th 1/4 period, an input voltage V at the first electrode E1 of the second transistor 110 _ac2 In the case of being negative, the output voltage of the second electrode E2 of the second transistor 110 is maintained at 0V. I.e. V _g1 =0V, in which case the first transistor 210 is turned off.

In the above embodiment, when the input voltage to the first electrode E1 of the second transistor 110 is negative, the output voltage of the second electrode E2 of the second transistor 110 in the control circuit 100 also turns off the first transistor 210. In this way, the control circuit 100 can further control the first transistor 210 to be turned off in a period of time desired to be turned off through the second transistor 110, and no additional comparator is required to be arranged inside the control circuit 100. In this way, the control of the turn-off of the first transistor 210 can be further achieved by using the control circuit 100 and the change of the ac input voltage of the bridge rectifier itself.

In some embodiments, the start time of the clamp-off of the second transistor 110 is later than the start time of the turn-on of the first transistor 210, and the end time of the clamp-off of the second transistor 110 is earlier than the end time of the turn-on of the first transistor 210.

This is explained below with reference to fig. 3. Fig. 3 is a signal waveform diagram according to other embodiments of the present disclosure.

In addition to the 3 signals shown in fig. 2, fig. 3 also schematically shows the current I flowing through the first transistor 210 _D1 Trend in the same cycle.

Referring to FIG. 3, during the positive half-cycle (i.e., 1 st 1/4 th cycle and 4 th 1/4 th cycle) of the bridge rectifier, the first transistor 210 is off, I _D1 =0A. During the negative half-cycle (2 nd cycle 1/4 th cycle and 3 rd cycle 1/4 th cycle) of the bridge rectifier, the first transistor 210 is at least at V _g1 =V ₁ Is turned on in the case of (1) _D1 Flows from the second electrode E2 to the first electrode E1 of the first transistor 210.

The start time of the clamp-off of the second transistor 110 is later than the start time of the turn-on of the first transistor 210, and the end time of the clamp-off of the second transistor 110 is earlier than the end time of the turn-on of the first transistor 210. I.e. the first crystal in the same periodThe turn-on period of the transistor 210 includes and is greater than the pinch-off period of the second transistor 110. This indicates that the first transistor 210 is divided by V _g1 =V ₁ Is not only on but also 0 < V _g1 ＜V ₁ Is turned on in some cases.

See FIG. 3, at V _th1 ≤V _g1 ≤V ₁ In the case of (2), the first transistor 210 is turned on. V _th1 Is the threshold voltage at which the first transistor 210 is turned on.

In some embodiments, V _th1 ≤

V ₁ . For example, V _th1 =

V ₁ 、

V ₁ Or

V ₁ . For example, the threshold voltage V of the first transistor 210 _th1 Range of 2V to 3V, and the first voltage V ₁ The range of (A) is 10V to 20V.

It can be understood that V _th1 The smaller the conduction period of the first transistor 210 is in proportion to the negative half-cycle in which the first transistor 210 is expected to conduct, the greater the accuracy of the bridge rectifier rectification.

In the above embodiment, during the time when the second transistor 110 is clamped, the output voltage of the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ And a first voltage V ₁ Is greater than the threshold voltage V of the first transistor 210 _th1 . In this way, the control circuit 100 can further control the first transistor 210 to conduct for a longer period of time when the first transistor 210 is expected to conduct through the second transistor 110, so that the rectification accuracy of the bridge rectifier can be improved.

FIG. 4 is a schematic diagram of a rectifier circuit, according to further embodiments of the present disclosure.

As shown in fig. 4, the rectifying element 220 connected to the second input terminal 202 and the ground terminal 204 in the bridge rectifier is a transistor (hereinafter referred to as a third transistor) similar to the first transistor 210, and the third transistor 220 also includes a first electrode E1, a second electrode E2 and a gate G.

The first electrode E1 of the third transistor 220 is connected to the second input terminal 202, and the second electrode E2 of the third transistor 220 is connected to the ground terminal 204, i.e., the second electrode E2 of the third transistor 220 is grounded.

The third transistor 220 may be a FET, e.g., a JFET or a MOSFET. Taking a MOSFET as an example, the third transistor 220 may be an N-type MOSFET or a P-type MOSFET. In these embodiments, either of

transistors

230 and 240 may be a diode or a FET.

As shown in fig. 1B, 1C, any one of the rectifying

elements

230 and 240 may be a diode or a FET controlled by a corresponding control circuit. For example, the rectifying

elements

230 and 240 may each be a MOSFET (e.g., an N-type MOSFET or a P-type MOSFET) controlled by a corresponding control circuit.

As previously described, the third transistor 220 is desirably turned on during the positive half-cycle of the bridge rectifier and turned off during the negative half-cycle of the bridge rectifier to cause the bridge rectifier to rectify.

In these embodiments, as shown in fig. 4, the control circuit 100 of the bridge rectifier further includes a fourth transistor 120 that is normally on.

For example, if the threshold voltage at which the fourth transistor 120 is turned on is negative, the fourth transistor 120 is always turned on. In some embodiments, the fourth transistor 120 is a normally-on JFET or depletion MOSFET.

Referring to fig. 4, the fourth transistor 120 includes a gate G, a first electrode E1, and a second electrode E2. The first electrode E1 of the fourth transistor 120 is configured to be connected to the first input terminal 201 of the bridge rectifier, and the second electrode E2 of the fourth transistor 120 is configured to be connected to the gate G of the third transistor 220.

Here, with the fourth transistor 120 clamped off, the output voltage of the second electrode E2 of the fourth transistor 120 is clamped at a second voltage, which may keep the third transistor 220 turned on.

For ease of understanding, the following description is made in conjunction with fig. 5. Fig. 5 is a signal waveform diagram according to still other embodiments of the present disclosure.

Except for V as shown in FIG. 2 _ac1 And V _ac2 In addition, fig. 5 also shows the input voltage V of the gate G of the third transistor 220 _g2 Trend in the same cycle.

It should be understood that the input voltage of the first electrode E1 of the fourth transistor 120 is equal to V, neglecting the voltage drop of the conductive line itself _ac1 And the output voltage of the second electrode E2 of the fourth transistor 120 is equal to V _g2 。

The following is based on this assumption for V _g2 The description is given. The description similar to fig. 2 is not repeated here.

Referring to fig. 5, during the 1 st 1/4 th period, the input voltage (i.e., V) of the first electrode E1 of the fourth transistor 120 _ac1 ) Positive, the fourth transistor 120 is turned on.

At V _ac1 In the process of decreasing, the fourth transistor 120 first operates in the saturation region, and the fourth transistor 120 is clamped. In this case, a voltage difference between the first electrode E1 and the second electrode E2 of the fourth transistor 120 is greater than a pinch-off voltage of the fourth transistor 120.

During the pinch-off of the second transistor 110, although the input voltage of the first electrode E1 of the fourth transistor 120 is gradually decreased, the output voltage (i.e., V) of the second electrode E2 of the fourth transistor 120 _g2 ) Clamped at a second voltage V ₂ Up to V _ac1 To a certain voltage. The specific voltage makes a voltage difference between the first electrode E1 and the second electrode E2 of the fourth transistor 120 equal to a pinch-off voltage of the fourth transistor 120. It should be understood that the specific voltage is less than V _peak1 。

Thereafter, the input voltage of the first electrode E1 of the fourth transistor 120 continues to decrease, resulting in a voltage difference between the first electrode E1 and the second electrode E2 of the fourth transistor 120 being less than the pinch-off voltage of the fourth transistor 120. The fourth transistor 120 changes from operating in the saturation region to operating in the amplification region.

During the operation of the fourth transistor 120 in the amplification region, the output voltage of the second electrode E2 of the fourth transistor 120 varies in positive correlation with the variation of the input voltage of the first electrode E1 of the fourth transistor 120, i.e., the output voltage of the second electrode E2 of the fourth transistor 120 decreases in synchronization with the decrease of the input voltage of the first electrode E1 of the fourth transistor 120.

In some embodiments, referring to fig. 5, the pinch-off voltage of the fourth transistor 120 is equal to 0V. That is, in the case where a voltage difference between the first electrode E1 and the second electrode E2 of the fourth transistor 120 is greater than 0V, the fourth transistor 120 is clamped. It should be understood that the pinch-off voltage of the fourth transistor 120 may also be other values, and the embodiments of the present disclosure are not limited thereto.

In the 2 nd 1/4 th period and the 3 rd 1/4 th period, the input voltage of the first electrode E1 of the fourth transistor 120 is negative. In this case, the fourth transistor 120 is turned off, and the output voltage of the second electrode E2 of the fourth transistor 120 is maintained at 0V.

In the 4 th 1/4 period, the fourth transistor 120 is turned on, and the state of the fourth transistor 120 in the 4 th 1/4 period is changed in the reverse order of the state in the 1 st 1/4 period.

That is, the fourth transistor 120 is first operated in the amplification region, and the output voltage of the second electrode E2 of the fourth transistor 120 is changed in positive correlation with the change of the input voltage of the first electrode E1 of the fourth transistor 120 until the input voltage of the first electrode E1 of the fourth transistor 120 is increased to the aforementioned specific voltage. Then, the input voltage of the first electrode E1 of the fourth transistor 120 continues to increase, the fourth transistor 120 changes from operating in the amplification region to operating in the saturation region, and the output voltage of the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V ₂ 。

When the fourth transistor 120 is clamped, the output voltage of the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V ₂ The second voltage V ₂ Causing the third transistor 220 to turn on. I.e. in bridge rectifiersDuring the positive half cycle, the output voltage of the third transistor 220 at least at the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V ₂ During which it is turned on.

In the above embodiment, the first electrode E1 of the fourth transistor 120 in the control circuit 100 is connected to the first input terminal 201 of the bridge rectifier, the second electrode E2 is connected to the gate G of the third transistor 220 in the bridge rectifier, the first electrode E1 of the third transistor 220 is connected to the second input terminal 202, and the second electrode E2 is grounded. The output voltage of the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V that turns on the third transistor 220 when the fourth transistor 120 is clamped off ₂ . In this way, the control circuit 100 can further control the third transistor 220 to be turned on during at least a part of the desired on-period through the fourth transistor 120 connected to the first input terminal 201 of the bridge rectifier, and no additional comparator is required to be arranged inside the control circuit 100. In this way, the control of the conduction of the first transistor 210 and the third transistor 220 in the bridge rectifier can be realized by the control circuit 100 having a simple internal circuit and low manufacturing cost while further improving the AC/DC conversion efficiency.

In some embodiments, the control circuit 100 includes only the second transistor 110 and the fourth transistor 120. In this manner, the control of the conduction of the first transistor 210 and the third transistor 220 in the bridge rectifier can be achieved with the control circuit 100 having a simpler internal circuit and a lower manufacturing cost, while further improving the AC/DC conversion efficiency.

The control circuit 100 of the bridge rectifier shown in fig. 4 is further described below in conjunction with some embodiments.

In some embodiments, in the case where the input voltage of the first electrode E1 of the fourth transistor 120 is negative, the output voltage of the second electrode E2 of the fourth transistor 120 turns off the third transistor 220. In this manner, the third transistor 220 is turned off during the negative half-cycle of the bridge rectifier.

For example, referring to the 2 nd 1/4 th cycle and the 3 rd 1/4 th cycle shown in FIG. 5, in the case where the input voltage of the first electrode E1 of the fourth transistor 120 is negative, the fourth crystalThe output voltage of the second electrode E2 of the tube 120 is maintained at 0V. I.e. V _g2 =0V, in which case the third transistor 220 is turned off.

In the above embodiment, the fourth transistor 120 in the control circuit 100 also turns off the third transistor 220 in the case where the input voltage to the first electrode E1 of the fourth transistor 120 is negative. In this way, the control circuit 100 can further control the third transistor 220 to be turned off in the desired period of turning off through the fourth transistor 120, and no additional comparator needs to be arranged inside the control circuit 100. In this way, the turning off of the third transistor 220 can be further controlled by the control circuit 100 and the change of the ac input voltage of the bridge rectifier.

In some embodiments, the start time of the pinch-off of the fourth transistor 120 is later than the start time of the turn-on of the third transistor 220, and the end time of the pinch-off of the fourth transistor 120 is earlier than the end time of the turn-on of the third transistor 220.

This will be explained with reference to fig. 6. Fig. 6 is a signal waveform diagram in accordance with still other embodiments of the present disclosure.

Fig. 6 schematically shows a current I flowing through the third transistor 220 in addition to the 3 signals shown in fig. 5 _D2 Trend of change in the same period.

Referring to FIG. 6, during the negative half-cycle (i.e., the 2 nd 1/4 th cycle and the 3 rd 1/4 th cycle) of the bridge rectifier, the third transistor 220 is turned off and I _D2 And =0A. During the positive half cycle (1 st 1/4 th cycle and 4 th 1/4 th cycle) of the bridge rectifier, the third transistor 220 is at least at V _g2 =V ₂ Is on when it is turned on, I _D2 From the second electrode E2 to the first electrode E1 of the third transistor 220.

The start time of the clamp of the fourth transistor 120 is later than the start time of the turn-on of the third transistor 220, and the end time of the clamp of the fourth transistor 120 is earlier than the end time of the turn-on of the third transistor 220. That is, in the same cycle, the on period (including T2 and T2 ') of the third transistor 220 includes and is greater than the off period (including T1 and T1') of the fourth transistor 120, which means that the third transistor 220 is divided by V _g2 =V ₂ Is not only on but also 0 < V _g2 ＜V ₂ Is turned on in some cases.

See FIG. 6, at V _th2 ≤V _g2 ≤V ₂ When this occurs, the third transistor 220 is turned on. V _th2 Is the threshold voltage at which the third transistor 220 is turned on.

In some embodiments, V _th2 ≤

V ₂ . For example, V _th2 =

V ₂ 、

V ₂ Or

V ₂ . For example, the threshold voltage V of the third transistor 220 _th2 Is in a range of 2V to 3V, and the second voltage V ₂ The range of (A) is 10V to 20V.

It can be understood that V _th2 The smaller the conduction period of the third transistor 220 is, the greater the proportion of the positive half cycle that the third transistor 220 is expected to conduct, the greater the accuracy of the bridge rectifier rectification.

In the above embodiment, during the clamping period of the fourth transistor 120, the output voltage of the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V ₂ And a second voltage V ₂ Is greater than the threshold voltage V of the third transistor 220 _th2 . In this way, the control circuit 100 can further control the third transistor 220 to conduct for a longer period of time desired to conduct through the fourth transistor 120, so that the rectification accuracy of the bridge rectifier can be improved.

The connection of the gates G of the second transistor 110 and the fourth transistor 120, respectively, is described below in connection with some embodiments.

First, a first connection mode of the gates G of the second transistor 110 and the fourth transistor 120 will be described.

In some embodiments, referring to fig. 7, the control circuit 100 further includes a first voltage regulator 130. For example, the first voltage Regulator 130 may be a Low Dropout Regulator (LDO).

The gate G of the second transistor 110 is connected to the first output terminal 1301 of the first regulator 130. The first regulator 130 is configured to regulate the output voltage of the first output terminal 1301 to regulate the first voltage V at which the second electrode E2 of the second transistor 110 is clamped when the second transistor 110 is clamped ₁ 。

As some implementations, the first voltage regulator 130 may also include a third input 1302. The third input 1302 is configured to be connected to the first input 201 or the second input 202 of the bridge rectifier (schematically shown in fig. 7 connected to the second input 202) to provide the operating voltage of the first voltage regulator 130.

In the above embodiment, the first regulator 130 for applying a voltage to the gate G of the second transistor 110 is provided in the control circuit 100, so as to adjust the first voltage V clamped to be output when the second transistor 110 is clamped by adjusting the output voltage of the first regulator 130 ₁ . In this manner, the control circuit 100 can adjust the first voltage V for the first transistors 210 with different threshold voltages that may be used in the bridge rectifier ₁ To ensure that the first transistor 210 remains on during the pinch-off period of the second transistor 110. Thus, the versatility of the control circuit 100 can be improved.

In other embodiments, referring to fig. 8, the control circuit 100 further includes a second voltage regulator (e.g., LDO) 140.

The gate G of the fourth transistor 120 is connected to the second output terminal 1401 of the second regulator 140. The second voltage regulator 140 is configured to regulate the output voltage of the second output terminal 1401 to regulate the second voltage V at which the second electrode E2 of the fourth transistor 120 is clamped when the fourth transistor 120 is clamped ₂ 。

As some implementations, the second voltage regulator 140 may also include a fourth input 1402. The fourth input 1402 is configured to be connected to the first input 201 or the second input 202 of the bridge rectifier (schematically shown in fig. 8 as being connected to the first input 201) to provide the operating voltage of the second voltage regulator 140.

In the above embodiment, the second regulator 140 for applying a voltage to the gate G of the fourth transistor 120 is provided in the control circuit 100, so as to adjust the second voltage V clamped to be output when the fourth transistor 120 is clamped by adjusting the output voltage of the second regulator 140 ₂ . In this manner, the control circuit 100 can adjust the second voltage V for the third transistor 220 with different threshold voltages that may be used in the bridge rectifier ₂ To ensure that the third transistor 220 can remain on during the pinch-off period of the fourth transistor 120. Thus, the versatility of the control circuit 100 can be improved.

In some embodiments, control circuit 100 includes a first voltage regulator 130 and a second voltage regulator 140. In this way, the versatility of the control circuit 100 can be further improved.

As some implementations, the first regulator 130 and the second regulator 140 are provided independently.

In other implementations, the first regulator 130 and the second regulator 140 are integrally formed. Thus, the versatility of the control circuit 100 can be further improved by providing a single voltage regulator in the control circuit 100.

In some embodiments, the first regulator 130 and the second regulator 140 are integrally provided in the manner shown in FIG. 9.

The second transistor 110 and the fourth transistor 120 are schematically shown as MOSFETs in fig. 9. Fig. 9 also shows an ac input voltage source 300 connected between the first input 201 and the second input 202 of the bridge rectifier and a load 400 of the bridge rectifier connected between the output 203 and the ground 204 of the bridge rectifier.

In some embodiments, referring to fig. 9, a switching circuit 500 is disposed between the output terminal 203 and the load 400. The conversion circuit 500 may include a DC/DC converter, such as a boost converter, a buck converter, and the like.

For example, the conversion circuit 500 includes two input terminals (not shown in fig. 9) respectively connected to the output terminal 203 and the ground terminal 204, and two output terminals (not shown in fig. 9) respectively connected to both ends of the load 400.

As shown in fig. 9, the integrally provided voltage regulator 130/140 includes a first output terminal 1301 connected to the gate G of the second transistor 110 and a second output terminal 1401 connected to the gate G of the fourth transistor 120.

Further, the voltage regulator 130/140 further comprises an input 1302/1402 connected to the first input 201 or the second input 202 (schematically shown in fig. 9 connected to the first output 201). That is, in this manner, the third input terminal 1302 and the fourth input terminal 1402 are integrally provided in the voltage regulator 130/140.

In these embodiments, the input 1302/1402 may be connected to the first input 201 or the second input 202 via a capacitor (not shown in fig. 9). The capacitor may receive and store electrical energy from the ac input voltage source 300. The capacitor may be used as a power source for the voltage regulator 130/140 to ensure that the voltage regulator 130/140 can operate normally, i.e., output a stable voltage at the first output terminal 1301 and the second output terminal 1401.

For example, the input 1302/1402 is connected to the first input 201 via a capacitor. At V _ac1 In the case of positive, V _ac1 May provide an operating voltage to the voltage regulator 130/140 and cause the capacitor to store electrical energy; and at V _ac1 In the negative case, the capacitor may discharge power to provide the operating voltage for the voltage regulator 130/140.

As another example, the input 1302/1402 is connected to the second input 202 via a capacitor. At V _ac2 In the case of positive, V _ac2 May provide an operating voltage to the voltage regulator 130/140 and cause the capacitor to store electrical energy; and at V _ac2 In the negative case, the capacitor may discharge power to provide the operating voltage for the voltage regulator 130/140.

In other embodiments, the first regulator 130 and the second regulator 140 are integrally provided in the manner shown in fig. 10. The second transistor 110 and the fourth transistor 120 are schematically shown as JFETs in fig. 10.

As shown in fig. 10, the integrally provided voltage regulator 130/140 still includes a first output terminal 1301 connected to the gate G of the second transistor 110 and a second output terminal 1401 connected to the gate G of the fourth transistor 120.

Further, the voltage regulator 130/140 further comprises a third input 1302 and a fourth input 1402, the third input 1302 and the fourth input 1402 being connected to one and the other of the first input 201 and the second input 202, respectively.

For example, referring to fig. 10, the third input 1302 is connected to the first input 201 and the fourth input 1402 is connected to the second input 202. For another example, the third input 1302 is connected to the second input 202 and the fourth input 1402 is connected to the first input 201.

That is, in this manner, the third input 1302 and the fourth input 1402 are independently provided in the voltage regulator 130/140.

In these examples, at V _ac1 Is positive, V _ac2 In the case of negative, V _ac1 May provide an operating voltage for voltage regulator 130/140; at V to _ac2 Is positive, V _ac1 In the case of negative, V _ac2 An operating voltage may be provided to the voltage regulator 130/140.

In this way, it is ensured that the first voltage V can be adjusted by adjusting the output voltage of the first output terminal 1301 of the voltage regulator 130/140 without additionally providing a capacitor to which the voltage regulator 130/140 is connected ₁ And adjusts the second voltage V by adjusting the output voltage of the second output terminal 1401 ₂ 。

Next, a second connection mode of the gates G of the second transistor 110 and the fourth transistor 120 will be described.

In some embodiments, the gate G of the second transistor 110 is connected to the second electrode E2 of the second transistor 110. In other embodiments, the gate G of the second transistor 110 is grounded.

In these embodiments, the state of the first transistor 210 can be controlled without additionally providing an element for applying a voltage to the gate G of the second transistor 110 in the control circuit 100. Thus, the structure of the control circuit 100 can be further simplified and the manufacturing cost can be reduced.

In some embodiments, the gate G of the fourth transistor 120 is connected to the second electrode E2 of the fourth transistor 120. In other embodiments, the gate G of the fourth transistor 120 is grounded.

In these embodiments, the state of the third transistor 220 can be controlled without additionally providing an element for applying a voltage to the gate G of the fourth transistor 120 in the control circuit 100. Thus, the control circuit 100 structure can be further simplified and the manufacturing cost can be reduced.

The embodiment of the disclosure also provides a control method of the bridge rectifier. The control method is described below with reference to some embodiments.

In some embodiments, the bridge rectifier includes a first transistor 210. The first electrode E1 of the first transistor 210 is connected to the first input terminal 201 of the bridge rectifier, and the second electrode E2 of the first transistor 210 is grounded.

In these embodiments, the method of controlling a bridge rectifier comprises: the state of the first transistor 210 is controlled by the normally on second transistor 110.

The second transistor 110 includes a gate G, a first electrode E1, and a second electrode E2. The first electrode E1 of the second transistor 110 is connected to the second input 202 of the bridge rectifier and the second electrode E2 is connected to the gate G of the first transistor 210.

Here, when the second transistor 110 is clamped, the output voltage of the second electrode E2 of the second transistor 110 is clamped at the first voltage V ₁ First voltage V ₁ So that the first transistor 210 remains on.

In this manner, the first transistor 210 in the bridge rectifier is controlled to conduct for at least a portion of the desired conduction period simply by the normally-on second transistor 110.

In some embodiments, in the case where the input voltage of the first electrode E1 of the second transistor 110 is negative, the output voltage of the second electrode E2 of the second transistor 110 turns off the first transistor 210. In this manner, the first transistor 210 in the bridge rectifier can be further controlled to turn off during the period of desired turn off simply by using the second transistor 110 and the variation of the ac input voltage of the bridge rectifier itself.

In some embodiments, the start time of the clamp-off of the second transistor 110 is later than the start time of the turn-on of the first transistor 210, and the end time of the clamp-off of the second transistor 110 is earlier than the end time of the turn-on of the first transistor 210. In this way, the first transistor 210 in the bridge rectifier can be further controlled to be turned on for a longer period of time when it is expected to be turned on simply by using the second transistor 110 that is turned on normally, so that the rectification accuracy of the bridge rectifier can be improved.

In other embodiments, the bridge rectifier further includes a third transistor 220. The first electrode E1 of the third transistor 220 is connected to the second input terminal 202 of the bridge rectifier and the second electrode E2 is grounded.

In these embodiments, the method of controlling a bridge rectifier further comprises: the state of the third transistor 220 is controlled by the normally on fourth transistor 120.

The fourth transistor 120 includes a gate G, a first electrode E1, and a second electrode E2. The first electrode E1 of the fourth transistor 120 is configured to be connected to the first input terminal 201 of the bridge rectifier and the second electrode E2 is configured to be connected to the gate G of the third transistor 220.

Here, in the case where the fourth transistor 120 is clamped, the output voltage of the second electrode E2 of the fourth transistor 120 is clamped at the second voltage V ₂ Second voltage V ₂ Causing the third transistor 220 to turn on.

In this manner, the third transistor 220 in the bridge rectifier is controlled to conduct during at least a portion of the desired conduction period simply by the normally-on fourth transistor 120.

In some embodiments, in the case where the input voltage of the first electrode E1 of the fourth transistor 120 is negative, the output voltage of the second electrode E2 of the fourth transistor 120 turns off the third transistor 220. In this manner, the third transistor 220 in the bridge rectifier can be further controlled to turn off during the period of desired turn-off simply by using the fourth transistor 120.

In some embodiments, the start time of the pinch-off of the fourth transistor 120 is later than the start time of the turn-on of the third transistor 220, and the end time of the pinch-off of the fourth transistor 120 is earlier than the end time of the turn-on of the third transistor 220. In this way, the third transistor 220 in the bridge rectifier can be further controlled to conduct for a longer period of time expected to conduct simply by using the normally-conducting fourth transistor 120, so that the rectification accuracy of the bridge rectifier can be improved.

For other embodiments of the control method of the bridge rectifier, reference may be made to the foregoing related embodiments of the control circuit of the bridge rectifier, and details are not repeated here.

Referring to fig. 1A, 4, and 7 to 10, embodiments of the present disclosure further provide a rectifier circuit, which includes the control circuit 100 of the bridge rectifier of any one of the above embodiments and a corresponding bridge rectifier.

The embodiment of the disclosure also provides a power supply, which comprises the rectifying circuit of any one of the embodiments.

An embodiment of the present disclosure further provides an electronic device including the power supply of any one of the above embodiments.

In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts in the embodiments are referred to each other. The control method of the bridge rectifier, the rectifying circuit, the power supply and the electronic device embodiment basically correspond to the control circuit embodiment of the bridge rectifier, so that the description is relatively simple, and relevant points can be referred to part of the description of the control circuit embodiment.

Thus far, various embodiments of the present disclosure have been described in detail. Some details that are well known in the art have not been described in order to avoid obscuring the concepts of the present disclosure. It will be fully apparent to those skilled in the art from the foregoing description how to practice the presently disclosed embodiments.

Although some specific embodiments of the present disclosure have been described in detail by way of example, it should be understood by those skilled in the art that the foregoing examples are for purposes of illustration only and are not intended to limit the scope of the present disclosure. It will be understood by those skilled in the art that various changes may be made in the above embodiments or equivalents may be substituted for elements thereof without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A control circuit of a bridge rectifier, the bridge rectifier comprising a first transistor (210), a third transistor (220), a first rectifying element (230) and a second rectifying element (240), a first electrode (E1) of the first transistor (210) being connected to a first input terminal (201) of the bridge rectifier, a second electrode (E2) of the first transistor (210) being grounded, a first electrode (E1) of the third transistor (220) being connected to a second input terminal (202) of the bridge rectifier, a second electrode (E2) of the third transistor (220) being grounded, two poles of the first rectifying element (230) being connected to the first input terminal (201) and an output terminal (203) of the bridge rectifier, respectively, two poles of the second rectifying element (240) being connected to the second input terminal (202) and the output terminal (203) of the bridge rectifier, respectively;

the control circuit (100) comprises a normally-on second transistor (110) and a normally-on fourth transistor (120), the second transistor (110) comprising a gate (G), a first electrode (E1) and a second electrode (E2), the fourth transistor (120) comprising a gate (G), a first electrode (E1) and a second electrode (E2), wherein:

a first electrode (E1) of the second transistor (110) is configured to be connected with a second input (202) of the bridge rectifier,

the second electrode (E2) of the second transistor (110) is configured to be connected with the gate (G) of the first transistor (210),

a first electrode (E1) of the fourth transistor (120) is configured to be connected to the first input (201),

a second electrode (E2) of the fourth transistor (120) is configured to be connected with a gate (G) of the third transistor (220),

when a voltage difference between the input voltage of the first input terminal (201) and the input voltage of the second input terminal (202) is negative, the output voltage of the second electrode (E2) of the second transistor (110) is clamped at a first voltage that causes the first transistor (210) to be turned on with the second transistor (110) clamped, so that the current of the second input terminal (202) flows to the first input terminal (201) via the second rectifying element (240) and the first transistor (210) in order, and

when the voltage difference between the input voltage of the first input terminal (201) and the input voltage of the second input terminal (202) is positive, the output voltage of the second electrode (E2) of the fourth transistor (120) is clamped at a second voltage with the fourth transistor (120) clamped, the second voltage causing the third transistor (220) to be turned on, so that the current of the first input terminal (201) flows to the second input terminal (202) via the first rectifying element (230) and the third transistor (220) in order.

2. The control circuit according to claim 1, wherein the output voltage of the second electrode (E2) of the second transistor (110) is such that the first transistor (210) is turned off in case the input voltage of the first electrode (E1) of the second transistor (110) is negative.

3. The control circuit of claim 1, wherein a start time of the second transistor (110) pinch-off is later than a start time of the first transistor (210) conduction, and an end time of the second transistor (110) pinch-off is earlier than an end time of the first transistor (210) conduction.

4. The control circuit of claim 1, wherein:

the gate (G) of the second transistor (110) is connected to the second electrode (E2) of the second transistor (110); or

The gate (G) of the second transistor (110) is grounded.

5. The control circuit of claim 1, further comprising:

a first voltage regulator (130) comprising a first output (1301) connected to the gate (G) of the second transistor (110), the first voltage regulator (130) configured to regulate an output voltage of the first output (1301) to regulate the first voltage.

6. The control circuit of claim 5, wherein the first voltage regulator (130) further comprises a third input (1302) configured to be connected to the first input (201) or the second input (202).

7. The control circuit according to any of claims 1-6, wherein each of the first rectifying element (230) and the second rectifying element (240) is a diode or a field effect transistor controlled by a control circuit with an internally arranged comparator.

8. The control circuit according to any of claims 1-6, wherein the output voltage of the second electrode (E2) of the fourth transistor (120) turns off the third transistor (220) in case the input voltage of the first electrode (E1) of the fourth transistor (120) is negative.

9. The control circuit according to any of claims 1-6, wherein the start time of the clamping of the fourth transistor (120) is later than the start time of the conduction of the third transistor (220), and the end time of the clamping of the fourth transistor (120) is earlier than the end time of the conduction of the third transistor (220).

10. The control circuit of any of claims 1-6, wherein:

the gate (G) of the fourth transistor (120) is connected to the second electrode (E2) of the fourth transistor (120); or

The gate (G) of the fourth transistor (120) is grounded.

11. The control circuit of any of claims 1-6, further comprising:

a second regulator (140) comprising a second output (1401) connected to the gate (G) of the fourth transistor (120), the second regulator (140) configured to adjust an output voltage of the second output (1401) to adjust the second voltage.

12. The control circuit of any of claims 1-6,

at least one of the second transistor (110) and the fourth transistor (120) is a Junction Field Effect Transistor (JFET) or a depletion Metal Oxide Semiconductor Field Effect Transistor (MOSFET).

13. The control circuit of any of claims 1-6,

the range of the threshold voltage of the first transistor (210) is 2V-3V, and the range of the first voltage is 10V-20V; and/or

The range of the threshold voltage of the third transistor (220) is 2V-3V, and the range of the second voltage is 10V-20V.

14. A rectifier circuit, comprising:

a control circuit for a bridge rectifier as claimed in any one of claims 1 to 13; and

the bridge rectifier.

15. A power supply, comprising:

the rectifier circuit of claim 14.

16. An electronic device, comprising:

the power supply of claim 15.

17. A control method of a bridge rectifier, the bridge rectifier comprising a first transistor (210), a third transistor (220), a first rectifying element (230) and a second rectifying element (240), a first electrode (E1) of the first transistor (210) being connected to a first input terminal (201) of the bridge rectifier, a second electrode (E2) of the first transistor (210) being grounded, a first electrode (E1) of the third transistor (220) being connected to a second input terminal (202) of the bridge rectifier, a second electrode (E2) of the third transistor (220) being grounded, two poles of the first rectifying element (230) being connected to the first input terminal (201) and an output terminal (203) of the bridge rectifier, respectively, two poles of the second rectifying element (240) being connected to the second input terminal (202) and the output terminal (203) of the bridge rectifier, respectively;

the method comprises the following steps:

controlling the state of the first transistor (210) with a normally-on second transistor (110), the second transistor (110) comprising a gate (G), a first electrode (E1) and a second electrode (E2), the first electrode (E1) of the second transistor (110) being connected to the second input (202) of the bridge rectifier, the second electrode (E2) of the second transistor (110) being connected to the gate (G) of the first transistor (210);

controlling the state of the third transistor (220) with a normally on fourth transistor (120), the fourth transistor (120) comprising a gate (G), a first electrode (E1) and a second electrode (E2), the first electrode (E1) of the fourth transistor (120) being configured to be connected with the first input (201) of the bridge rectifier, the second electrode (E2) of the fourth transistor (120) being configured to be connected with the gate (G) of the third transistor (220),

wherein, when a voltage difference between the input voltage of the first input terminal (201) and the input voltage of the second input terminal (202) is negative, the output voltage of the second electrode (E2) of the second transistor (110) is clamped at a first voltage with the second transistor (110) clamped, the first voltage causes the first transistor (210) to be turned on, so that the current of the second input terminal (202) flows to the first input terminal (201) via the second rectifying element (240) and the first transistor (210) in sequence,

18. The method of claim 17, wherein the output voltage of the second electrode (E2) of the second transistor (110) turns off the first transistor (210) in case the input voltage of the first electrode (E1) of the second transistor (110) is negative.

19. The method of claim 17, wherein a start time of the second transistor (110) pinch-off is later than a start time of the first transistor (210) conduction, and an end time of the second transistor (110) pinch-off is earlier than an end time of the first transistor (210) conduction.

20. The method according to any of claims 17-19, wherein each of the first rectifying element (230) and the second rectifying element (240) is a diode or a field effect transistor controlled by a control circuit with an internally arranged comparator.

21. The method according to any of claims 17-19, wherein in case the input voltage of the first electrode (E1) of the fourth transistor (120) is negative, the output voltage of the second electrode (E2) of the fourth transistor (120) is such that the third transistor (220) is turned off.

22. The method according to any of claims 17-19, wherein a start time of the clamping of the fourth transistor (120) is later than a start time of the switching on of the third transistor (220), and an end time of the clamping of the fourth transistor (120) is earlier than an end time of the switching on of the third transistor (220).