CN115036895B - Power chip nano relay capable of realizing serial-parallel coordination - Google Patents
Power chip nano relay capable of realizing serial-parallel coordination Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
- H02H7/261—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations
- H02H7/263—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations involving transmissions of measured values
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
- G06F15/7817—Specially adapted for signal processing, e.g. Harvard architectures
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0092—Details of emergency protective circuit arrangements concerning the data processing means, e.g. expert systems, neural networks
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/02—Details
- H02H3/027—Details with automatic disconnection after a predetermined time
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/22—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for distribution gear, e.g. bus-bar systems; for switching devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
- H02H7/261—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations
- H02H7/262—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations involving transmissions of switching or blocking orders
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S10/00—Systems supporting electrical power generation, transmission or distribution
- Y04S10/20—Systems supporting electrical power generation, transmission or distribution using protection elements, arrangements or systems
Abstract
The invention relates to a power chip nano relay capable of realizing serial-parallel coordination, which relates to the technical field of relay protection of power systems, and comprises the following components: the device comprises a parallel data processing unit, a serial data processing unit, a front time management unit, a logic comparison unit and a rear time management unit; the method comprises the steps of processing power service data by selecting a parallel data processing unit and/or a serial data processing unit, and setting a first delay according to the processing time of the serial data processing unit and the parallel data processing unit by a lead time management unit; comparing the first processing result and the second processing result with corresponding set thresholds through a logic comparison unit, and judging corresponding actions according to the comparison result; the post-time management unit sets the second delay according to the action judgment result so as to realize the step time limit coordination among different protections.
Description
Technical Field
The invention relates to the technical field of relay protection of power systems, in particular to a power chip nano relay capable of realizing serial-parallel coordination.
Background
Any electrical equipment is not allowed to run in a relay protection-free state, so that the relay protection device plays an indispensable important role in maintaining stable running of a power system, guaranteeing safe operation of primary equipment and the like. Along with the progress and updating of the scientific technology, the relay protection device is also developed into a microcomputer relay protection device from the original electromechanical relay and transistor relay.
The microcomputer relay protection often adopts the design concepts of multiple boards and multiple CPUs, and different boards are communicated through serial buses, so that the microcomputer relay protection has huge calculation and logic analysis capabilities and has a memory function. These features enable microcomputer relay protection to implement various complex algorithms. However, in the serial data processing flow implemented by software, the special integrated chip used by microcomputer relay protection determines the data characteristics of single-step and cyclic processing, and a large amount of processing time is consumed when a more complex algorithm is implemented, which is difficult to meet the relay protection quick action requirement of the novel power system under the future high power electronic permeability.
Disclosure of Invention
The invention aims to provide a power chip nano relay capable of realizing serial-parallel coordination, which can promote the overall speediness of the relay.
In order to achieve the above object, the present invention provides the following solutions:
the invention provides a power chip nano relay capable of realizing serial-parallel coordination, which comprises: the device comprises a parallel data processing unit, a serial data processing unit, a front time management unit, a logic comparison unit and a rear time management unit;
the parallel data processing unit is used for carrying out hardware parallel processing of a complex algorithm on the power service data to obtain a first processing result;
the serial data processing unit is used for carrying out hardware serial processing of a simple algorithm on the power service data to obtain a second processing result;
the front time management unit is respectively connected with the parallel data processing unit and the serial data processing unit, and is used for judging the time required by the serial data processing unit and the parallel data processing unit for processing the power service data and setting a first delay;
the logic comparison unit is respectively connected with the parallel data processing unit, the serial data processing unit and the lead time management unit and is used for simultaneously receiving the first processing result and the second processing result according to the first delay, comparing the first processing result and the second processing result with corresponding set thresholds respectively to obtain comparison results and judging actions according to the comparison results; the threshold value comprises a transmission line protection threshold value, a transformer protection threshold value, a generator protection threshold value and a bus protection threshold value;
the post time management unit is connected with the logic comparison unit and is used for receiving the action judgment result and setting a second delay according to the action judgment result.
Optionally, the parallel data processing unit comprises: the system comprises a first data sampling synchronization module and a complex electrical parameter algorithm module;
the complex electrical parameter algorithm module is used for providing a complex algorithm; the complex electrical parameter algorithm module comprises a power frequency phasor rapid extraction algorithm sub-module, a half-cycle/full-cycle Fourier fundamental algorithm sub-module, a Kalman multiplication filtering algorithm sub-module, a wavelet transformation conversion algorithm sub-module and a VMD algorithm sub-module.
Optionally, the serial data processing unit includes: the second data sampling synchronization module and the simple electrical parameter algorithm module;
the simple electrical parameter algorithm module is used for providing a simple algorithm; the simple electrical parameter algorithm module comprises an addition and subtraction computation sub-module, an index computation sub-module, a simple differential and integral algorithm sub-module and a direct current component computation sub-module.
Optionally, the first data sampling synchronization module and the second data sampling synchronization module each include a sampling and difference processing sub-module, an a/D or D/a conversion sub-module, a data filtering sub-module, a message organization sub-module, and a data sending sub-module, and the first data sampling synchronization module and the second data sampling synchronization module are both used for sampling and preprocessing electric service data.
Optionally, the lead time management unit includes: the system comprises a timing module and a first delay module;
the timing module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for respectively calculating the time required by the serial data processing unit and the parallel data processing unit for processing the power service data;
the first delay module is connected with the timing module and is used for setting the first delay according to the calculation result of the timing module.
Optionally, the logic comparison unit includes a plurality of numerical comparator modules;
the numerical comparator module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for comparing the output results of the serial data processing unit and the parallel data processing unit with a set threshold value to obtain a comparison result; and if the comparison result meets the protection criterion, outputting a corresponding action judgment result.
Optionally, the post-time management unit includes a plurality of second delay modules;
the second delay module is connected with the logic comparison unit and is used for setting a second delay time for different action judgment results after receiving the action judgment results transmitted by the logic comparison unit.
Optionally, the delay set by the first delay module is
The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is the delay size set by the first delay module, T 1 Time, T, required for processing power service data for serial data processing unit 2 The time required for the parallel data processing units to process the power service data.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention provides a power chip nano relay capable of realizing serial-parallel coordination, which comprises: the device comprises a parallel data processing unit, a serial data processing unit, a front time management unit, a logic comparison unit and a rear time management unit; processing the power service data by selecting a parallel data processing unit and/or a serial data processing unit; setting a first delay according to the time required by the serial data processing unit and the parallel data processing unit to process the input data through the front time management unit; the first processing result and the second processing result are respectively compared with corresponding set thresholds through a logic comparison unit, and corresponding action judgment is carried out according to the comparison results; and setting a second delay according to the action judgment result by a post-time management unit so as to realize step time limit coordination among different protections. The invention can promote the whole speediness of the relay.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a power chip nano relay capable of realizing serial-parallel coordination;
FIG. 2 is a block diagram of a power chip nano relay capable of realizing serial-parallel coordination according to the present invention;
fig. 3 is a flowchart of an algorithm for implementing zero-sequence reactive power direction protection of a distribution network ungrounded system according to an embodiment of the present invention.
Symbol description:
the device comprises a parallel data processing unit-1, a serial data processing unit-2, a front time management unit-3, a logic comparison unit-4 and a rear time management unit-5.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention aims to provide a power chip nano relay capable of realizing serial-parallel coordination, which can promote the overall speediness of the relay.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
As shown in fig. 1 and 2, the present invention provides a power chip nano-relay capable of realizing serial-parallel coordination, the power chip nano-relay comprising: a parallel data processing unit 1, a serial data processing unit 2, a lead time management unit 3, a logic comparison unit 4 and a post time management unit 5.
The parallel data processing unit 1 is configured to perform hardware parallel processing of a complex algorithm on the power service data, so as to obtain a first processing result.
The serial data processing unit 2 is configured to perform a hardware serial processing of a simple algorithm on the power service data, so as to obtain a second processing result.
The lead time management unit 3 is respectively connected with the parallel data processing unit 1 and the serial data processing unit 2, and is used for judging the time required by the serial data processing unit 2 and the parallel data processing unit 1 for processing the power service data, and setting a first delay.
The logic comparison unit 4 is respectively connected with the parallel data processing unit 1, the serial data processing unit 2 and the lead time management unit 3, and is used for receiving the first processing result and the second processing result according to the first delay, comparing the first processing result and the second processing result with corresponding set thresholds respectively to obtain comparison results, and performing action judgment according to the comparison results; the threshold value comprises a transmission line protection threshold value, a transformer protection threshold value, a generator protection threshold value and a bus protection threshold value.
The post-time management unit 5 is connected with the logic comparison unit 4 and is used for receiving the action judgment result, and setting a second delay according to the action judgment result so as to realize step time limit coordination among different protections.
Further, the adopted data processing mode is a serial-parallel cooperative processing mode; and the power service data processing algorithm corresponds to the relay protection service of the power system, and processes the input power signal by calling the power data processing algorithm to output power service data. The relay protection service of the power system comprises service scenes such as transmission line protection, transformer protection, generator protection, bus protection and the like. The power data processing algorithm at least comprises one of a power frequency phasor rapid extraction algorithm, a half-cycle/full-cycle Fourier fundamental wave algorithm, a Kalman multiplication filtering algorithm, a wavelet transformation algorithm, a VMD (variation modal decomposition) algorithm and a direct current component calculation algorithm.
Further, the parallel data processing unit 1 includes: the system comprises a first data sampling synchronization module and a complex electrical parameter algorithm module.
The first data sampling synchronization module comprises a sampling and difference processing sub-module, an A/D or D/A conversion sub-module, a data filtering sub-module, a message organization sub-module and a data sending sub-module, and is used for realizing accurate sampling and preprocessing of data, wherein the preprocessing operation is to remove invalid and false data. The power signal may be an analog signal or a digital signal, and the digital signal may be power message data. The sampling and difference processing sub-module is used for sampling and difference processing the acquired analog quantity signals to obtain sampling value messages; and calculating according to the sampling value message to obtain sampling point data with the same sampling time and sending the sampling point data to other nodes.
The complex electrical parameter algorithm module is used for providing a complex algorithm, and is used as a hardware circuit module for realizing a specific algorithm, and comprises a power frequency phasor rapid extraction algorithm sub-module, a half-cycle/full-cycle Fourier fundamental algorithm sub-module, a Kalman multiplication filtering algorithm sub-module, a wavelet transformation conversion algorithm sub-module and a VMD (variable modal decomposition) algorithm sub-module. The method is used for extracting fundamental wave components, direct current components or all integer harmonic components in the periodic electric signals which are acquired and input.
Further, the serial data processing unit 2 includes: a second data sampling synchronization module and a simple electrical parametric algorithm module.
The simple electrical parameter algorithm module is used for providing a simple algorithm and comprises a simple algorithm sub-module commonly used for relay protection of a power system, namely an addition and subtraction calculation sub-module, an exponential calculation sub-module, a simple differential and integral algorithm sub-module and a direct current component calculation sub-module.
Further, the lead time management unit 3 includes: a timing module and a first delay module.
The timing module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for respectively calculating the time required by the serial data processing unit and the parallel data processing unit for processing the power service data.
The first delay module is connected with the timing module and is used for setting the first delay according to the calculation result of the timing module.
Further, the logic comparison unit 4 comprises a plurality of numerical comparator modules.
The numerical comparator module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for comparing the output results of the serial data processing unit and the parallel data processing unit with a set threshold value to obtain a comparison result; and if the comparison result meets the protection criterion, outputting a corresponding action judgment result. The protection criterion is realized in the circuit by designing circuits such as a numerical comparison circuit, a trigger circuit and the like, such as protection algorithm logic of current differential protection, directional current protection, zero sequence current protection, distance protection, pilot protection, high-frequency protection, optical fiber differential protection and negative sequence current protection in relay protection service of a power system. The numerical comparator module contains the required power service thresholds including, but not limited to, transmission line protection thresholds, transformer protection thresholds, generator protection thresholds, and bus protection thresholds.
Further, the post-time management unit 5 includes a plurality of second delay modules.
The second delay module is connected with the logic comparison unit and is used for setting second delay time for different action judgment results after receiving the action judgment results transmitted by the logic comparison unit, so as to realize ladder time limit coordination among different protections.
Further, the delay set by the first delay module is that
The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is the delay size set by the first delay module, T 1 Time, T, required for processing power service data for serial data processing unit 2 The time required for the parallel data processing units to process the power service data.
Specific examples:
the technical scheme of the invention is described in detail in the following by a specific embodiment. For example, for an ungrounded system zero-sequence reactive power direction protection algorithm, when a single-phase ground fault occurs, the sound line zero-sequence current is the local line capacitance-to-ground current, the direction of which leads the line zero-sequence voltage direction by 90 °, the fault line zero-sequence current is the opposite number of the sum of all the ungrounded line capacitance-to-ground currents, the direction of which lags the line zero-sequence voltage direction by 90 °, so that when the magnitude of the zero-sequence reactive power of line k isQ m When the zero-sequence reactive power direction is larger than the set threshold (the zero-sequence reactive power of the fault line is maximum) and the zero-sequence reactive power meeting direction is negative (the direction of the zero-sequence reactive power is set to be positive from the bus to the line), the line k is judged to be the fault line, the protection action is cut off, otherwise, the line is a sound line, and the protection is not performed.
As shown in figure 3, a flow chart of an ungrounded system zero sequence reactive power direction protection algorithm based on a serial-parallel cooperative nano relay is provided, and it is to be noted that the algorithm needs to judge the amplitude and the direction of zero sequence reactive power at the same time, so that a serial-parallel processing mode is adopted, and data are processed at the same time in a serial-parallel mode.
The amplitude acquisition algorithm for the zero sequence current of the outgoing line and the zero sequence voltage of the bus is complex, a parallel data processing mode is adopted, and the parallel data processing module of the nano relay simultaneously calculates the real part and the imaginary part of the zero sequence current of all linesI R 、I I Real and imaginary parts of bus zero sequence voltageU R 、U I The algorithm used uses a full-cycle fourier algorithm sub-module to calculate:
in the method, in the process of the invention,i(n) For the nth current sample data, N is the number of samples in one cycle.
In the method, in the process of the invention,u(n) For the nth voltage sample data, N is the number of samples in one cycle.
On the basis of obtaining real parts and imaginary parts of power frequency components of zero sequence currents and bus zero sequence voltages of all lines, the amplitude values of the zero sequence currents and bus zero sequence voltages of all outgoing lines and the amplitude values of zero sequence reactive power can be obtainedQ k ：
In the method, in the process of the invention,U 0 is the zero sequence voltage amplitude of the bus,I k for the zero sequence current amplitude of line k,Q k is the magnitude of the zero sequence reactive power of line k.
The discrimination algorithm for the zero sequence reactive power direction of the outgoing line is simple, a serial data processing mode is adopted, the serial data processing unit of the nano relay sequentially discriminates the zero sequence reactive power direction of each line, the algorithm only needs to use the integral discrimination of fault component voltage and current, namely the transient energy direction algorithm, and the implementation of the algorithm is realized by adopting a simple micro-and integral algorithm submodule:
in the method, in the process of the invention,i(n) For the nth current sample data,u(n) The data is sampled for the nth voltage,S k transient energy within 1/4 cycle of the installation is protected for the kth feeder.
Further, the time length T used by the serial and parallel data processing modules is respectively obtained through a timing module contained in a front timing unit of the nano relay 1 And T 2 The delay module sets the delay as
The logic comparison unit can be ensured to simultaneously receive the algorithm result output by the serial-parallel data processing module.
Further, the logic comparison unit of the nano relay compares the zero sequence reactive power amplitude value of the line k through a numerical comparator module (the number is 2 times of the number of the lines according to the example situation)Q k And comparing the direction of the zero sequence reactive power of the line k with the threshold value 0 with the set threshold value, and outputting a switching value signal if the protection criterion is met at the same time.
Further, the rear time management unit of the nano relay performs protection action according to the delay time matched with the zero sequence reactive power direction protection through the delay module, and is used for realizing step time limit matching among the protection.
It is worth to say that, if the number of outgoing lines of the distribution network is m, and the nano relay adopts a parallel processing mode, 2m parallel input interfaces are required for realizing a zero-sequence reactive power direction protection algorithm of the ungrounded system, wherein the m input interfaces are used for calculating the amplitude value of the zero-sequence reactive power of the outgoing lines, and the m input interfaces are used for judging the direction of the zero-sequence reactive power of the outgoing lines; the serial-parallel cooperative processing mode is adopted, so that the zero-sequence reactive power direction protection algorithm of the ungrounded system is realized by only m+1 serial and parallel input interfaces, wherein the m input interfaces are used for calculating the amplitude value of the zero-sequence reactive power of the outgoing line in parallel, and the other 1 interface is used for judging the direction of the zero-sequence reactive power of the outgoing line in series in sequence; in fact, because the algorithm complexity of calculating the zero-sequence reactive power amplitude and judging the zero-sequence reactive power direction is different, m+2, m+3 or other serial-parallel input interfaces can be adopted according to the difference of the calculation processing time of the amplitude and the direction in order to accelerate the data processing speed; if the nano relay adopts a serial processing mode, the amplitude and the phase angle of the zero sequence reactive power of each outgoing line are required to be judged in sequence, and compared with the serial-parallel cooperative processing mode, the time limit is greatly prolonged, so that the provided power chip nano relay capable of realizing serial-parallel cooperation is further proved to have the beneficial effects.
The invention has the technical effects that:
(1) Aiming at the problem that the serial processing of the power data by the software is long in time limit of a complex algorithm, a hardware serial and parallel cooperative data processing mode is provided, so that the serial communication time between the boards can be effectively avoided, and the quick action of the existing protection is obviously improved.
(2) Due to the reasonable serial and parallel distribution of data processing, the problems of excessive number of input interfaces and high process manufacturing difficulty caused by pure parallel processing can be effectively avoided.
(3) The nano relay is essentially a logic combination circuit module for carrying out hardware on an internal program of microcomputer relay protection, and then the logic combination circuit module is matched with other modules of a main control chip and peripheral interface circuits, so that the relay protection device can be subjected to chip customization, the volume of the relay protection device is further reduced, the use is more convenient, and the protection reliability is higher.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; also, it is within the scope of the present invention to be modified by those of ordinary skill in the art in light of the present teachings. In view of the foregoing, this description should not be construed as limiting the invention.
Claims (7)
1. The utility model provides a can realize electric power chip nano relay of serial-parallel cooperation which characterized in that, nano relay includes: the device comprises a parallel data processing unit, a serial data processing unit, a front time management unit, a logic comparison unit and a rear time management unit;
the parallel data processing unit is used for carrying out hardware parallel processing of a complex algorithm on the power service data to obtain a first processing result;
the serial data processing unit is used for carrying out hardware serial processing of a simple algorithm on the power service data to obtain a second processing result;
the front time management unit is respectively connected with the parallel data processing unit and the serial data processing unit, and is used for judging the time required by the serial data processing unit and the parallel data processing unit for processing the power service data and setting a first delay; the lead time management unit includes: the system comprises a timing module and a first delay module;
the timing module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for respectively calculating the time required by the serial data processing unit and the parallel data processing unit for processing the power service data;
the first delay module is connected with the timing module and is used for setting a first delay according to the calculation result of the timing module;
the logic comparison unit is respectively connected with the parallel data processing unit, the serial data processing unit and the lead time management unit and is used for simultaneously receiving the first processing result and the second processing result according to the first delay, comparing the first processing result and the second processing result with corresponding set thresholds respectively to obtain comparison results and judging actions according to the comparison results; the threshold value comprises a transmission line protection threshold value, a transformer protection threshold value, a generator protection threshold value and a bus protection threshold value;
the post time management unit is connected with the logic comparison unit and is used for receiving the action judgment result and setting a second delay according to the action judgment result.
2. The power chip nano-relay capable of realizing serial-parallel coordination according to claim 1, wherein the parallel data processing unit comprises: the system comprises a first data sampling synchronization module and a complex electrical parameter algorithm module;
the complex electrical parameter algorithm module is used for providing a complex algorithm; the complex electrical parameter algorithm module comprises a power frequency phasor rapid extraction algorithm sub-module, a half-cycle/full-cycle Fourier fundamental algorithm sub-module, a Kalman multiplication filtering algorithm sub-module, a wavelet transformation conversion algorithm sub-module and a VMD algorithm sub-module.
3. The power chip nano-relay capable of realizing serial-parallel coordination according to claim 2, wherein the serial data processing unit comprises: the second data sampling synchronization module and the simple electrical parameter algorithm module;
the simple electrical parameter algorithm module is used for providing a simple algorithm; the simple electrical parameter algorithm module comprises an addition and subtraction computation sub-module, an index computation sub-module, a simple differential and integral algorithm sub-module and a direct current component computation sub-module.
4. The power chip nano relay capable of realizing serial-parallel coordination according to claim 3, wherein the first data sampling synchronization module and the second data sampling synchronization module comprise a sampling and difference processing sub-module, an A/D or D/A conversion sub-module, a data filtering sub-module, a message organization sub-module and a data sending sub-module, and the first data sampling synchronization module and the second data sampling synchronization module are used for sampling and preprocessing power service data.
5. The power chip nano-relay capable of realizing serial-parallel coordination according to claim 1, wherein the logic comparison unit comprises a plurality of numerical comparator modules;
the numerical comparator module is respectively connected with the serial data processing unit and the parallel data processing unit and is used for comparing the output results of the serial data processing unit and the parallel data processing unit with a set threshold value to obtain a comparison result; and if the comparison result meets the protection criterion, outputting a corresponding action judgment result.
6. The power chip nano-relay capable of realizing serial-parallel coordination according to claim 5, wherein the post-time management unit comprises a plurality of second delay modules;
the second delay module is connected with the logic comparison unit and is used for setting a second delay time for different action judgment results after receiving the action judgment results transmitted by the logic comparison unit.
7. The power chip nano relay capable of realizing serial-parallel coordination according to claim 1, wherein the first delayThe time delay set by the time module is
The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is the delay size set by the first delay module, T 1 Time, T, required for processing power service data for serial data processing unit 2 The time required for the parallel data processing units to process the power service data. />
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