CN115001469B

CN115001469B - Integrated chip, radio frequency switch and electronic equipment

Info

Publication number: CN115001469B
Application number: CN202210624135.XA
Authority: CN
Inventors: 请求不公布姓名
Original assignee: Shenzhen Taigao Technology Co ltd
Current assignee: Shenzhen Taigao Technology Co ltd
Priority date: 2022-06-02
Filing date: 2022-06-02
Publication date: 2023-05-09
Anticipated expiration: 2042-06-02
Also published as: CN115001469A

Abstract

The invention discloses an integrated chip, a radio frequency switch and an electronic device, wherein the integrated chip comprises: the logic control unit is used for outputting a first output voltage and/or a second output voltage; the radio frequency switch unit is connected with the logic control unit, is connected with the first output voltage and/or the second output voltage, and is disconnected when the first output voltage and/or the second output voltage is a first preset range value; when the first output voltage and/or the second output voltage is a second preset range value, the radio frequency switch unit is turned on. Therefore, the integrated chip has flexible and various control logic, wide working frequency band and high switching radio frequency power, and can ensure that the insertion loss is low, the switching time is short, the isolation is high, the noise is low, the peripheral circuit is simpler, the overall power consumption is reduced, the anti-interference capability is stronger, and the overall reliability is higher when the radio frequency switch is controlled.

Description

Integrated chip, radio frequency switch and electronic equipment

Technical Field

The present invention relates to the field of semiconductor chip design, and in particular, to an integrated chip and an electronic device.

Background

At present, in various communication systems, a radio frequency switch is an indispensable key element, and can connect one or more paths of multiple paths of radio frequency signals through control logic to realize switching of different radio frequency signal paths, including switching between receiving and transmitting, switching between different frequency bands, and the like, so as to achieve the purposes of sharing an antenna, reducing terminal cost, and the like. The radio frequency switch can be divided into two major categories, namely an electromechanical relay switch and a solid state switch based on a semiconductor technology, wherein the solid state radio frequency switch is widely applied to various communication systems at present due to the excellent performances of the solid state radio frequency switch in terms of switching time, transmission frequency, size, integration level, efficiency and the like. With the continuous progress of communication system multiple input multiple output (MINO) technology, multi-band wireless devices (5G) and other advanced communication technologies, solid state RF switches are more nearly monopolized in portable and battery powered devices. Because the solid-state rf switch needs to switch the rf signal of GHz or even tens of GHz, its design, manufacture and related technologies are very complex, the solid-state rf switch element is always regarded as a bright bead on the crown of the analog chip, and is an essential element in various communication systems such as radar, mobile phone, interphone, communication base station (2G, 3G, 4G, 5G), satellite, etc., and its importance is self-evident.

The current gallium nitride radio frequency switch is basically a depletion Mode normally open switch, when no gate voltage is applied, the drain (D) and the source (S) of the radio frequency switch are in a low resistance (on) state, and when a negative voltage is applied to the gate of the radio frequency switch, the drain and the source are in a high resistance (off) state. For some existing radio frequency switches, negative voltage of about-18V is needed to be thoroughly turned off, so that the defects of complex peripheral circuit, high insertion loss, long switching time and the like are caused.

Disclosure of Invention

The present invention aims to solve at least one of the technical problems in the related art to some extent. To this end, an object of the invention is to propose an integrated chip comprising:

a logic control unit for outputting the first output voltage and/or the second output voltage;

the radio frequency switch unit is connected with the logic control unit, is connected with the first output voltage and/or the second output voltage, and is disconnected when the first output voltage and/or the second output voltage are/is a first preset range value; when the first output voltage and/or the second output voltage is a second preset range value, the radio frequency switch unit is turned on.

Preferably, the radio frequency switch unit includes:

a substrate layer;

a first transition layer disposed on the substrate layer;

the second transition layer is arranged on the first transition layer;

the migration main body layer is arranged on the second transition layer, the migration main body layer is provided with a source electrode and a drain electrode which are used for externally connecting a circuit, and a connecting channel which can be connected or disconnected is formed between the source electrode and the drain electrode;

the grid electrode is arranged on the migration main body layer and is used for accessing the first output voltage and/or the second output voltage;

when the gate is in an initial state, the connection channel is disconnected to force the source and the drain to be disconnected from each other; when the gate is in an energized state, the connection channel is communicated to force the source and the drain to be conductive to each other.

Preferably, the migration body layer includes:

a first gallium nitride layer overlying the second transition layer;

and the second gallium nitride layer covers the first gallium nitride layer and forms the connecting channel with the first gallium nitride layer.

Preferably, the gate electrode includes a third gallium nitride layer and a first metal layer, the third gallium nitride layer is disposed on the second gallium nitride layer, and the first metal layer is disposed on the third gallium nitride layer.

Preferably, the third gallium nitride layer and the first metal layer have a plurality of layers, and the third gallium nitride layer is a P-type gallium nitride layer for maintaining the connection channel in an initial state.

Preferably, the first transition layer is made of aluminum nitride, and the second transition layer is made of aluminum gallium nitride.

Preferably, the number of the gates is greater than or equal to 2.

Preferably, the substrate layer is formed of any one of silicon, silicon carbide or sapphire.

Preferably, the drain, the source and the gate are configured to be parallel to each other.

Preferably, the device further comprises a grid resistor and an equalizing resistor, wherein the grid resistor is connected with one end of the grid, and the equalizing resistor is connected with the other end of the grid.

Preferably, the gate resistors have a plurality of gate resistors, and the plurality of gate resistors are mutually communicated through the second metal layer.

Preferably, the equalizing resistors are multiple, each equalizing resistor is provided with a filter capacitor, and the equalizing resistors are connected with the filter capacitors through a third metal layer.

Preferably, the device further comprises a fourth metal layer, wherein the fourth metal layer is used for connecting the source electrode with the equalization resistor and the filter capacitor, and connecting the drain electrode with the equalization resistor and the filter capacitor.

Preferably, the connection channel is formed for a two-dimensional electron gas structure.

Preferably, the logic control unit includes:

the first circuit is used for accessing an input voltage and converting and outputting a first control voltage;

a second circuit for accessing the first reference voltage or the second reference voltage to output a logic signal;

the output circuit is respectively connected with the first circuit and the second circuit and is used for accessing the first control voltage and converting the first control voltage according to the logic signal so as to output the first output voltage and/or the second output voltage, and when the first output voltage is the first preset range value, the second output voltage is the second preset range value; and when the first output voltage is the second preset range value, the second output voltage is the first preset range value.

Preferably, the output circuit includes N first output terminals for outputting the first output voltage and N second output terminals for outputting the second output voltage.

Preferably, the first preset range value is 0-1.5V, and the second preset range value is 5-10V.

Preferably, the circuit further comprises an input power supply, wherein the input power supply is respectively connected with the second circuit and the output circuit and is used for outputting a second control voltage to the output circuit according to a logic signal of the second circuit.

Preferably, the second circuit includes N access terminals, where the N access terminals are used to access the first reference voltage or the second reference voltage; when the N access terminals access the first reference voltage, the second circuit outputs a first logic signal; when the N access terminals access the second reference voltage, the second circuit outputs a second logic signal.

Preferably, the first reference voltage is 2.5-5.5V, and the second reference voltage is 0-0.8V.

Preferably, the first input voltage is 2.5-5.5V, and the first control voltage is 5-10V.

A second object of the present invention is to provide a radio frequency switch, including an integrated chip as described above.

A third object of the present invention is to provide an electronic device comprising an integrated chip as described above.

The scheme of the invention at least comprises the following beneficial effects:

The integrated chip provided by the invention outputs the first output voltage and/or the second output voltage through the logic control unit; when the radio frequency switch unit is connected with the first output voltage and/or the second output voltage, the radio frequency switch unit is disconnected when the first output voltage and/or the second output voltage is a first preset range value; when the first output voltage and/or the second output voltage is/are in the second preset range value, the radio frequency switch unit is turned on, so that the integrated chip control logic is flexible and various, the working frequency bandwidth and the switch radio frequency power are high, the insertion loss is low, the switch time is short, the isolation degree is high, the noise is low, the peripheral circuit is simpler, the overall power consumption is reduced, the anti-interference capability is stronger, and the overall reliability is higher when the radio frequency switch is controlled.

Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a circuit configuration diagram of an integrated chip provided in a first embodiment of the present invention;

fig. 2 is a cross-sectional view of a radio frequency switch unit according to a first embodiment of the present invention;

fig. 3 is a circuit configuration diagram of a logic control unit provided in a first embodiment of the present invention;

fig. 4 is a top plan view of a radio frequency switch unit according to a first embodiment of the present invention;

fig. 5 is a plan layout of a radio frequency switch unit according to a first embodiment of the present invention;

fig. 6 is a cross-sectional structural view of a logic control unit provided in the first embodiment of the present invention;

FIG. 7 is a plan layout of a logic control unit provided in a first embodiment of the present invention;

fig. 8 is a circuit diagram of a single pole, four throw integrated chip provided in a second embodiment of the present invention;

fig. 9 is a schematic diagram of a package structure of a single pole, four throw integrated chip according to a second embodiment of the present invention.

Reference numerals illustrate:

10. a logic control unit; 101. a first circuit; 102. a second circuit; 103. an output circuit; 20. a radio frequency switch unit; 201. a substrate layer; 202. a first transition layer; 203. a second transition layer; 204. a drain electrode; 205. a first gallium nitride layer; 206. a third gallium nitride layer; 207. a second gallium nitride layer; 208. a first metal layer; 209. a source electrode; 210. a connection channel; 211. a third metal layer; 212. a second metal layer; 213. a gate resistance; 214. a fourth metal layer; 215. a filter capacitor; 216. equalizing resistance.

The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.

Detailed Description

Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below are exemplary and intended to illustrate the present invention and should not be construed as limiting the invention, and all other embodiments, based on the embodiments of the present invention, which may be obtained by persons of ordinary skill in the art without inventive effort, are within the scope of the present invention.

In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "circumferential", "radial", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplify the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.

In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.

The integrated chip, the radio frequency switch and the electronic device according to the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

First embodiment

As shown in fig. 1, the integrated chip provided in the embodiment of the present invention includes a logic control unit 10 and a radio frequency switch unit 20, where the logic control unit 10 is configured to output a first output voltage and/or a second output voltage; the radio frequency switch unit 20 is connected with the logic control unit 10, and is connected with the first output voltage and/or the second output voltage, and when the first output voltage and/or the second output voltage is a first preset range value, the radio frequency switch unit 20 is disconnected; when the first output voltage and/or the second output voltage is the second preset range value, the rf switch unit 20 is turned on.

The logic control unit 10 may be a CMOS logic control unit 10, and the logic control unit 10 may be connected to the VCC power supply voltage, and output the first output voltage and/or the second output voltage after logic operation, so that the radio frequency switch unit 20 may be turned on and off when connected to the first output voltage and/or the second output voltage, thereby implementing switching of the radio frequency signal without interruption.

The integrated chip provided by the invention outputs the first output voltage and/or the second output voltage through the logic control unit 10; when the rf switch unit 20 is connected to the first output voltage and/or the second output voltage, the rf switch unit 20 is turned off when the first output voltage and/or the second output voltage is a first preset range value; when the first output voltage and/or the second output voltage is/are within the second preset range, the radio frequency switch unit 20 is turned on, so that the integrated chip control logic is flexible and various, the working frequency bandwidth and the switching radio frequency power are high, and the insertion loss is low, the switching time is short, the isolation degree is high, the noise is low, the peripheral circuit is simpler, the overall power consumption is reduced, the anti-interference capability is stronger, and the overall reliability is higher when the radio frequency switch is controlled.

As shown in fig. 2 and 4, the radio frequency switch unit 20 provided in the embodiment of the present invention includes a substrate layer 201; a first transition layer 202, a second transition layer 203, a migration body layer and a gate electrode, the first transition layer 202 being disposed on the substrate layer 201; the second transition layer 203 is disposed on the first transition layer 202; the migration body layer is arranged on the second transition layer 203, the migration body layer is provided with a source electrode 209 and a drain electrode 204 for externally connecting a circuit, and a connecting channel 210 which can be connected or disconnected is constructed between the source electrode 209 and the drain electrode 204; the grid electrode is arranged on the migration main body layer; when the gate is in the initial state, the connection channel 210 is disconnected to force the source 209 and the drain 204 to be disconnected from each other; when the gate is in an energized state, the connecting channel 210 is connected to force the source 209 and drain 204 to conduct with each other.

The initial state may be represented as that the accessed first output voltage and/or the second output voltage is a first preset range value, and the power-on state may be represented as that the accessed first output voltage and/or the second output voltage is a second preset range value; the first preset range value is 0-1.5V, and the second preset range value is 5-10V; the grid electrodes (G1 to Gn in the figure) can be multiple, the grid electrodes are used for connecting the first output voltage and/or the second output voltage, and the connecting channel 210 is formed by two-dimensional electron gas construction; when the first output voltage and/or the second output voltage of the gate access are/is a first preset range value, the source 209 and the drain 204 are in a conducting state, and when the first output voltage and/or the second output voltage of the gate access are/is a first preset range value, the source 209 and the drain 204 are in a disconnecting state, so that radio frequency signals can be transmitted between the source 209 and the drain 204; it will be appreciated that; the first preset range value is a low voltage, the second preset range value is a positive starting voltage, and since the connection channel 210 is formed by a two-dimensional electron gas (2 DEG for short) layer, there is no polarity problem, so that the radio frequency signal can be transmitted in both directions between the source 209 and the drain 204, that is, can be transmitted from the source 209 to the drain 204, and can also be transmitted from the drain 204 to the source 209, so that the radio frequency switch unit can work corresponding to two conditions of receiving and transmitting in a circuit, and of course, the receiving and transmitting cannot be performed simultaneously.

According to the radio frequency switch unit provided by the invention, when the grid is in the initial state, the connecting channel 210 is disconnected and the source electrode 209 and the drain electrode 204 are disconnected from each other, and when the grid is in the power-on state, the connecting channel 210 is communicated and the source electrode 209 and the drain electrode 204 are also mutually conducted, so that the radio frequency signal can be switched without interruption when the radio frequency signal is switched in practical application, the peripheral circuit is simpler, the insertion loss is lower, and the switching time is shorter.

Wherein the migration body layer (not labeled in the figure) includes a first gallium nitride layer 205 and a second gallium nitride layer 207, and the first gallium nitride layer 205 is covered on the second transition layer 203; the second gallium nitride layer 207 covers the first gallium nitride layer 205 and forms a connection channel 210 with the first gallium nitride layer 205. In the present embodiment, the migration body layer is constituted by a high electron mobility transistor (abbreviated as HEMT, high Electron Mobility Transistor) as a body, and therefore, the body portion of the HEMT is constituted by the first gallium nitride layer 205 and the second gallium nitride layer 207 together, and the first gallium nitride layer 205 and the second gallium nitride layer 207 can constitute the above-described connection channel 210, that is, the above-described connection channel 210 is generated because a two-dimensional electron gas layer can be generated by stress generated between the first gallium nitride layer 205 and the second gallium nitride layer 207; it may be appreciated that the gate includes a third gallium nitride layer 206 and a first metal layer 208, where a plurality of third gallium nitride layers 206 are disposed on the second gallium nitride layer 207, and a plurality of first metal layers 208 are disposed on a plurality of third gallium nitride layers 206 respectively, where the third gallium nitride layer 206 is a P-type gallium nitride layer for maintaining the connection channel 210 in an initial state, and the P-type gallium nitride layer is denoted as a gallium nitride layer subjected to P-type doping treatment, so that the third gallium nitride layer 206 is a key part of the gate, and due to the presence of the third gallium nitride layer 206, the migration body layer can be maintained in an initial state, that is, a normally-closed state; when the second output voltage is applied to the gate, the source 209 and the drain 204 of the migration body layer can be turned on, so that the transmission and the reception of the radio frequency signal can be switched without interruption.

It can be understood that the number of the gates of the radio frequency switch units provided in the embodiment of the present invention is greater than or equal to 2, and the radio frequency switch units may be used as a base, and a radio frequency switch unit group may be formed by parallel connection, serial connection or combination, so as to form the integrated chip after being combined with the logic control unit 10.

The first transition layer 202 is made of aluminum nitride, and the second transition layer 203 is made of aluminum gallium nitride. In this embodiment, the first transition layer 202 is made of aluminum nitride (AlN), so that the first transition layer 202 can reduce the difference of thermal expansion coefficients between gallium nitride and the substrate layer 201, thereby reducing the internal stress of the wafer, improving the reliability and insulating capability, and the like; the second transition layer 203 adopts aluminum gallium nitride (AlGaN), and its function is similar to that of the first transition layer 202, and it can reduce the thermal expansion coefficient difference between gallium nitride and the substrate layer 201, reduce the internal stress of the wafer, and improve the reliability and insulation capability.

Further, the substrate layer 201 includes silicon (Si), silicon carbide (SiC), or sapphire (Al ₂ O ₃ One of the above), wherein the substrate layer 201 is capable of functioning as a carrier and providing heat conduction, electrical insulation, etc.; it will be appreciated by those skilled in the art that the substrate layer 201, the first transition layer 202 and the second transition layer 203 may be equivalently replaced by other materials, and may be set by those skilled in the art according to actual requirements while achieving the above effects, and are not limited in this regard.

Further, the drain 204, the source 209, and the gate are configured to be parallel to each other. When the rf switch unit provided by the present invention is designed, a curved structure design may be adopted, or a straight structure design may be adopted, and when the curved structure design is adopted, the drain 204, the source 209 and the gate may be configured to be parallel to each other.

Specifically, the integrated circuit further comprises a gate resistor 213 and an equalizing resistor 216, wherein the gate resistor 213 is connected with one end of the gate, and the equalizing resistor 216 is connected with the other end of the gate. The gate resistors 213 are multiple, and the multiple gate resistors 213 are mutually communicated through the second metal layer 212, each gate resistor 213 is a high-density resistor formed in a two-dimensional electron gas layer through a semiconductor manufacturing process, and the gate resistor 213 can play roles in current limiting, protection, current sharing and the like on the gate, so that the consistency and stability of the operation of each gate can be ensured.

Further, the equalizing resistors 216 are plural, and each equalizing resistor 216 is provided with a filter capacitor 215, and the plural equalizing resistors 216 are connected with the filter capacitor 215 through the third metal layer 211. When n equalizing resistors 216 and filter capacitors 215 are provided, then n-1 third metal layers 211 are provided, and the whole rf switch unit 20 has only one source 209 and one drain 204, but each two equalizing resistors 216 and filter capacitors 215 are connected through the third metal layer 211 due to the existence of each gate between the source 209 and the drain 204, so as to form a virtual common short-circuit point between the source 209 and the drain 204.

Further, a fourth metal layer 214 is further included, and the fourth metal layer 214 is used to connect the source 209 with the equalizing resistor 216 and the filter capacitor 215, and connect the drain 204 with the equalizing resistor 216 and the filter capacitor 215. The fourth metal layer 214 is Gm in the drawing, the fourth metal layer 214 connects all the gate resistors 213, for example, the fourth metal layer 214 may be electrically connected to other circuits by a connection method such as wire bonding, and when an external voltage is connected to the fourth metal layer 214, the external voltage may be uniformly distributed to the gates G1 to Gn through RG1 to RGn.

As shown in fig. 1, the substrate layer 201, the first transition layer 202, and the second transition layer 203 can play roles in supporting, radiating heat, insulating, reducing stress, etc. the migration subject layer, and thus may not be a circuit component of the rf switch unit 20. However, the first gallium nitride layer 205, the second gallium nitride layer 207, the third gallium nitride layer 206, and the like, which are the migration body layers, are all fabricated by a semiconductor process such as etching, deposition, and the like on the basis of these layers. The drain 204, source 209 and other metal layers are all electrically connected to the two-dimensional electron gas layer by etching away portions of the second gallium nitride layer 207 and the first gallium nitride layer 205 to form corresponding contacts, and then depositing metal at these contacts to form ohmic contacts. Because the two-dimensional electron gas layer is a planar layer between the drain 204 and the source 209, each of the short contacts Y1 to Yn-1 can be electrically connected only by point contact or a small contact with the two-dimensional electron gas layer as shown in the figure, and does not need to be as long as the drain 204, the source 209 or Gm.

It will be appreciated that the gate resistor 213 includes RG1 to RGn, the equalizing resistor 216 includes R1 to Rn, and the filter capacitor 215 includes C1 to Cn, which are all formed by changing the crystal structure and material composition of the second gallium nitride layer 207 and the first gallium nitride layer 205 and thus the characteristics of the two-dimensional electron gas layer, using the same gallium nitride semiconductor manufacturing process, and thus may be integrated with the migration body layer and manufactured using the same semiconductor manufacturing process. One ends of all the gate resistors 213 are shorted together to form a common gate Gm of the rf switch unit, and when an external gate voltage is applied to the common gate Gm, the voltage is uniformly applied to all the individual gates G1 to Gn through RG1 to RGn at the same time.

As shown in fig. 3, the logic control unit 10 provided in the embodiment of the present invention includes a first circuit 101, a second circuit 102, and an output circuit 103, where the first circuit 101 is configured to access an input voltage and convert and output a first control voltage; the second circuit 102 is used for accessing the first reference voltage or the second reference voltage to output a logic signal; the output circuit 103 is connected to the first circuit 101 and the second circuit 102, and is used for accessing a first control voltage, converting the first control voltage according to a logic signal to output a first output voltage and/or a second output voltage, and when the first output voltage is a first preset range value, the second output voltage is a second preset range value; when the first output voltage is at the second preset range value, the second output voltage is at the first preset range value.

The input voltage may be input through a VCC power supply, an output end of the power supply may be connected to the first circuit 101, the first circuit 101 may be a DC-DC conversion circuit, and after the first circuit 101 is connected to the input voltage, the input voltage may be converted to generate a first control voltage, where the first control voltage may be a gate control voltage; preferably, the first input voltage is 2.5-5.5V, and the first control voltage is 5-10V; the second circuit 102 is a logic control circuit, and the second circuit 102 can output different logic signals according to the input first reference voltage and second reference voltage; the output circuit 103 may be a driving output circuit 103, which may output a pair of voltages representing a first output voltage and a second output voltage that are simultaneously output according to a logic signal output by the second circuit 102.

Specifically, the logic control unit 10 provided in the embodiment of the present invention is firstly configured to access an input voltage through the first circuit 101 and convert and output a first control voltage, and access a first reference voltage or a second reference voltage through the second circuit 102 to output a logic signal, so that the output circuit 103 can convert the first control voltage according to the logic signal, and further output a first output voltage and/or a second output voltage, and when the first output voltage is a first preset range value, the second output voltage is a second preset range value; when the first output voltage is a second preset range value, the second output voltage is a first preset range value, so that when the on-off of the radio frequency switch unit 20 is controlled, the bypass can be disconnected when the main circuit of the radio frequency switch unit 20 is conducted, and when the main circuit is disconnected, the bypass can be conducted, and therefore the signal distortion degree can be reduced, and the peripheral circuit is simpler and has stronger anti-interference capability.

Specifically, the output circuit 103 includes a first input terminal and a second input terminal, the first input terminal is connected to the output terminal of the first circuit 101, and the second input terminal is connected to the output terminal of the second circuit 102; and, the output circuit 103 includes N first output terminals for outputting the first output voltage and N second output terminals for outputting the second output voltage.

In this embodiment, the first preset range value is 0-1.5V, and the second preset range value is 5-10V; VM1 through VMn in the illustration may be N first output terminals, VS1 through VSn are N second output terminals, and the output ranges of the first output voltage and the second output voltage may be 0-10V; VM1 through VMn may be connected to the main circuit of the RF switch unit 20, VS1 through VSn may be connected to the bypass of the RF switch unit 20, when the first output voltage is 0V, the main circuit of the RF switch unit 20 is turned off, when the first output voltage is 5-10V, the main circuit of the RF switch unit 20 is turned on, and similarly, when the second output voltage is 0V, the bypass of the RF switch unit 20 is turned off, and when the second output voltage is 5-10V, the bypass of the RF switch unit 20 is turned on; thus, when the first output voltage outputs 5-10V, the second output voltage is 0V, whereas when the second output voltage outputs 5-10V, the first output voltage is 0V; it will be appreciated by those skilled in the art that VS1 to VSn are mainly used for the rf switches of the main and bypass configuration, and that VS1 to VSn are not involved in the control when there is only a main path in the rf switch unit 20.

Wherein N represents the number of channels of the RF switch unit, N is an even number, for example, when the RF switch unit is configured as a single-pole four-throw RF switch, it represents that the RF switch has 4 (RF 1 to RF 4) RF channels, and N is 4; therefore, the output circuit 103 may correspondingly set N first output terminals and N second output terminals, and similarly, when the output circuit 103 may output the corresponding first output voltage and second output voltage according to the logic signals, the second circuit 102 may correspondingly set V1 to Vn, and further generate N logic signals to control the output circuit 103 to output the first output voltage and the second output voltage; the first output terminal and the second output terminal may be directly connected to the gate of the rf switch unit 20 to control the rf switch unit 20.

Specifically, the circuit further includes an input power source, which is respectively connected to the second circuit 102 and the output circuit 103, and is configured to output a second control voltage to the output circuit 103 according to a logic signal of the second circuit 102.

In this embodiment, the input power is an external power, the second control voltage is a VEC voltage in the illustration, VEC is an external control voltage, and the voltage range is 5.0V to 10.0V, when the first control voltage generated by the first circuit 101 is not adopted, the VEC voltage may be adopted to access the output circuit 103, so as to control the on-off of the radio frequency switch; when the second circuit 102 detects the VEC voltage, the second circuit 102 may output a second control voltage to the output circuit 103; when the second circuit 102 does not detect the VEC voltage, the second circuit 102 can output the first control voltage to the output circuit 103 according to the logic signal, whereby the distortion degree of the transmission signal can be effectively reduced.

Specifically, the second circuit 102 includes N access terminals, where the N access terminals are used to access the first reference voltage or the second reference voltage; when the N access terminals access the first reference voltage, the second circuit 102 outputs a first logic signal; when the N access terminals access the second reference voltage, the second circuit 102 outputs a second logic signal.

In this embodiment, the first reference voltage is 2.5-5.5V, and the second reference voltage is 0-0.8V; the first logic signal may be "1", and the second logic signal may be "0", and it may be understood that in the digital logic signal, "1" is represented as on, and "0" is represented as off, so that when the second circuit 102 is connected to the first reference voltage, the output first logic signal is on, and when the second circuit 102 is connected to the second reference voltage, the output first logic signal is off; therefore, the combination of different radio frequency switches is more convenient, and the control logic is flexible and various.

As can be seen from the above, referring to fig. 1, fig. 1 is a circuit diagram of an integrated chip provided in this embodiment, and the integrated chip may be combined with a circuit of a logic control unit 10 and a circuit of a radio frequency switch unit 20 to form an integrated chip; in fig. 1, V1 to Vn are logic signals that can be output through the second circuit 102, so that the logic control unit 10 can output the first output voltage and/or the second output voltage; m1 to Mn in the RF switch unit 20 are main parts forming the RF switch unit 20, and can control a main path of the RF channel switch, and S1 to Sn are also parts forming the RF switch unit 20, are bypasses of the RF switch unit 20, and have the function of improving the isolation degree of the RF switch unit 20; RFC (ANT) in the RF switch unit 20 is a public terminal or an antenna terminal, and can transmit or receive RF signals, RF1 to RFn are one end of each RF channel, and the other end is the public terminal RFC (ANT); after the rf switch unit 20 receives the first input voltage and/or the second input voltage, the on/off of each rf channel may be implemented.

Further, fig. 5 is a plan layout view of the packaged rf switch unit 20. Wherein Gm1 to Gmn are gate metal lands of respective M1 to Mn main HEMTs; GS1 to GSn are gate metal lands of respective S1 to Sn bypass HEMTs; RF1 to RFn are metal lands of the respective radio frequency channels; RFC (ANT) is a metal land at the common end of each radio frequency channel, which may be electrically connected to pins or other die of a package by semiconductor package connections, such as wire bonding.

The logic control unit 10 may be manufactured by a silicon-based CMOS technology, fig. 6 is a cross-sectional structure diagram of the logic control unit 10 manufactured by the silicon-based CMOS technology, and the logic control unit 10 may be formed by various PMOS and CMOS structures shown in fig. 6.

As shown in fig. 7, fig. 7 is a top plan view of the logic control unit 10, although the plan layout of the logic control unit 10 may take other forms. Wherein VCC, VEC, V to Vn, VM1 to VMn, VS1 to VSn are metal lands corresponding to the input/output signal terminals, and GND is a ground terminal metal land. These lands may each form electrical connections with pins or other dies of the package through semiconductor package connections, such as wire bonds.

It is understood that the logic control unit 10 of the present invention may be used with the rf switch units 20 having n rf channels, or may be combined with the rf switch units 20 having fewer than n rf channels to form the integrated chip. For example, when the rf switch unit 20 has 8 channels (e.g., single pole 8 throw), the output number n of the logic control unit 10 is 8, so the logic control unit may also control the rf switch units 20 below 8 channels, such as single pole 4 throw, single pole 6 throw, etc.

The gallium nitride adopted in the embodiment of the invention belongs to a wide forbidden band semiconductor material, and compared with the traditional silicon-based semiconductor material, the gallium nitride has the advantages of excellent electrical property, long service life, high reliability, high temperature resistance, self-contained radiation resistance and the like, and has wider application field; according to the various integrated chips provided by the invention, the application range of the integrated chips can cover the communication frequency range from 1MHz to 20GHz, after the integrated chips are applied to a radio frequency switch, the radio frequency power of a single channel switchable of the radio frequency switch can reach more than 200W, the grid control voltage of the radio frequency switch is 0VDC to 20VDC, the control current is microampere level, and the switching time can reach tens to hundreds of nanoseconds level.

The integrated chip of the invention can greatly improve the capability of processing voltage of the chip, and the voltage which can be processed after being combined by n grids can reach n times of that of a single grid. The improvement of the processing voltage capability of the chip can correspondingly improve the power of the chip switch radio frequency signal, and the chip switch radio frequency signal can be manufactured by adopting a mature low-voltage (less than or equal to 200V) semiconductor process with lower cost, so that the product has the advantages of price and market competitiveness.

It can be understood that the rf switch unit 20 provided by the present invention is normally closed, and can switch without interrupting the rf signal when switching the rf signal in practical application, so as to realize "hot" switching. In addition, compared with the prior art, the invention does not need negative voltage (about-18V in general) to turn off, and the turn-on control voltage is only 4.5V to 7V (maximally not more than 20V), thereby being very beneficial to integrating with other control circuits or chips, and greatly simplifying the whole circuit structure without negative voltage power supply; the switch has the advantages of low insertion loss, short switching time, high isolation of other radio frequency switches, low noise and the like, is equivalent to a PIN diode, has high switch radio frequency power, simple peripheral circuit, flexible switch combination, wide working frequency band and high reliability, and can be applied to various communication equipment.

Second embodiment

Fig. 8 is an internal circuit diagram of a single pole, four throw integrated chip provided in an embodiment of the present invention. The logic control unit 10 inputs logic signals in 4 ways (V1 to V4), and the radio frequency channels of the radio frequency switching unit 20 are in 4 ways (RF 1-RFC (ANT), RF2-RFC (ANT), RF3-RFC (ANT), and RF4-RFC (ANT)). The inside of the radio frequency switch unit 20 adopts a topology circuit with a main circuit and a bypass circuit, and M1 to M4 are respectively the main circuits of 4 radio frequency channels; s1 to S4 are the respective bypasses. The outputs VM1 to VM4 and VS1 to VS4 of the logic control unit 10 are connected to the gates of M1 to M4 and S1 to S4, respectively.

Fig. 9 is a schematic diagram of a quad flat no-lead (QFN) package internal design of the single-pole, four-throw integrated chip described above. The figure shows that the electrical connection between two wafers and between the wafers and the package pins is realized through gold wires, copper wires or aluminum wires and the like in a wire bonding mode, and of course, other semiconductor packaging modes can be adopted to package the integrated chip.

And the control logic of the single-pole four-throw integrated chip is shown in a first table, and the control logic of each radio frequency channel is shown in a second table.

Table one: FIG. 8 shows single pole four throw integrated chip internal control logic

And (II) table: control logic for each radio frequency channel in the single pole four throw integrated chip shown in figure 8

V1	V2	V3	V4	RF1-RFC(ANT)	RF2-RFC(ANT)	RF3-RFC(ANT)	RF4-RFC(ANT)
								0	0	0	0	OFF	OFF	OFF	OFF
0	0	0	1	OFF	OFF	OFF	ON
								0	0	1	0	OFF	OFF	ON	OFF
0	0	1	1	OFF	OFF	ON	ON
								0	1	0	0	OFF	ON	OFF	OFF
0	1	0	1	OFF	ON	OFF	ON
								0	1	1	0	OFF	ON	ON	OFF
0	1	1	1	OFF	ON	ON	ON
								1	0	0	0	ON	OFF	OFF	OFF
1	0	0	1	ON	OFF	OFF	ON
								1	0	1	0	ON	OFF	ON	OFF
1	0	1	1	ON	OFF	ON	ON
								1	1	0	0	ON	ON	OFF	OFF
1	1	0	1	ON	ON	OFF	ON
								1	1	1	0	ON	ON	ON	OFF
1	1	1	1	ON	ON	ON	ON

Third embodiment

In this embodiment, different radio frequency switches can be formed by the integrated chip, so that the cost and the power consumption in use of the different radio frequency switches can be greatly reduced in application, and the circuit combination is flexible, the logic control is convenient, and the requirements of most control systems can be met; and because the power supply and control voltage are low, the whole system circuit structure can be greatly simplified, and the system integration with other elements is very facilitated.

Fourth embodiment

An embodiment of the present invention provides an electronic device including an integrated chip as described above. The integrated chip can be applied to various electronic devices, such as a communication system, and the applicable field of the integrated chip includes but is not limited to: mobile wireless communications devices, cellular infrastructure, radar, digital communications links, LTE repeaters, various large, medium and small sized 3G/4G/5G communications base stations (including micro base stations, pico base stations, etc.), TDD micro base stations, PMR/LMR high power radios, antenna tuning switches, multimode-multiband switching systems, rx diversity band switching systems, highly linear general purpose applications, various communications terminals, transceivers, RF and microwave testing equipment, and numerous other applications.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structural changes made by the description of the present invention and the accompanying drawings or direct/indirect application in other related technical fields are included in the scope of the invention.

Claims

1. An integrated chip, comprising:

the radio frequency switch unit is connected with the logic control unit, is connected with the first output voltage and/or the second output voltage, and is disconnected when the first output voltage and/or the second output voltage are/is a first preset range value; when the first output voltage and/or the second output voltage is a second preset range value, the radio frequency switch unit is turned on;

the radio frequency switch unit includes:

a substrate layer;

a first transition layer disposed on the substrate layer;

the second transition layer is arranged on the first transition layer;

2. The integrated chip of claim 1, wherein the migration body layer comprises:

a first gallium nitride layer overlying the second transition layer;

3. The integrated chip of claim 2, wherein the gate electrode comprises a third gallium nitride layer disposed on the second gallium nitride layer and a first metal layer disposed on the third gallium nitride layer.

4. The integrated chip of claim 3, wherein the third gallium nitride layer and the first metal layer have a plurality, and the third gallium nitride layer is a P-type gallium nitride layer for maintaining the connection channel in an initial state.

5. The integrated chip of claim 1, wherein the first transition layer is made of aluminum nitride and the second transition layer is made of aluminum gallium nitride.

6. The integrated chip of claim 1, wherein the number of gates is 2 or more.

7. The integrated chip of claim 1, wherein the substrate layer comprises any one of silicon, silicon carbide, or sapphire.

8. The integrated chip of claim 1, wherein the drain, source and gate are configured to be parallel to each other.

9. The integrated chip of claim 1, further comprising a gate resistor connected to one end of the gate and an equalization resistor connected to the other end of the gate.

10. The integrated chip of claim 9, wherein the gate resistors have a plurality of gate resistors, and wherein the plurality of gate resistors are interconnected by a second metal layer.

11. The integrated chip of claim 10, wherein a plurality of equalizing resistors are provided, each equalizing resistor is provided with a filter capacitor, and the equalizing resistors and the filter capacitors are connected through a third metal layer.

12. The integrated chip of claim 11, further comprising a fourth metal layer for connecting the source with the equalization resistor and the filter capacitor, and connecting the drain with the equalization resistor and the filter capacitor.

13. The integrated chip of claim 1, wherein the connection channels are formed for a two-dimensional electron gas configuration.

14. The integrated chip of claim 1, wherein the logic control unit comprises:

15. The integrated chip of claim 14, wherein the output circuit comprises N first output terminals for outputting the first output voltage and N second output terminals for outputting the second output voltage.

16. The integrated chip of claim 1 or 14, wherein the first predetermined range value is 0-1.5V and the second predetermined range value is 5-10V.

17. The integrated chip of claim 14, further comprising an input power supply coupled to the second circuit and the output circuit, respectively, for outputting a second control voltage to the output circuit based on a logic signal of the second circuit.

18. The integrated chip of claim 14, wherein the second circuit comprises N access terminals for accessing the first reference voltage or the second reference voltage; when the N access terminals access the first reference voltage, the second circuit outputs a first logic signal; when the N access terminals access the second reference voltage, the second circuit outputs a second logic signal.

19. The integrated chip of claim 14 or 18, wherein the first reference voltage is 2.5-5.5V and the second reference voltage is 0-0.8V.

20. The integrated chip of claim 14, wherein the input voltage is 2.5-5.5V and the first control voltage is 5-10V.

21. A radio frequency switch comprising an integrated chip as claimed in any one of claims 1 to 20.

22. An electronic device comprising an integrated chip as claimed in any one of claims 1 to 20.