CN115000268A - LED chip and preparation method thereof - Google Patents
LED chip and preparation method thereof Download PDFInfo
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- CN115000268A CN115000268A CN202210623876.6A CN202210623876A CN115000268A CN 115000268 A CN115000268 A CN 115000268A CN 202210623876 A CN202210623876 A CN 202210623876A CN 115000268 A CN115000268 A CN 115000268A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 62
- 239000002184 metal Substances 0.000 claims abstract description 62
- 238000003475 lamination Methods 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims description 54
- 229920002120 photoresistant polymer Polymers 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 27
- 239000004065 semiconductor Substances 0.000 claims description 27
- 238000009413 insulation Methods 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 22
- 230000008569 process Effects 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 19
- 238000003892 spreading Methods 0.000 claims description 18
- 230000007480 spreading Effects 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 10
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 238000001259 photo etching Methods 0.000 claims description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052804 chromium Inorganic materials 0.000 claims description 5
- 239000011651 chromium Substances 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052763 palladium Inorganic materials 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
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- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 239000010936 titanium Substances 0.000 claims description 5
- 238000000206 photolithography Methods 0.000 claims description 4
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 3
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 claims description 2
- 238000009826 distribution Methods 0.000 abstract description 6
- 238000004220 aggregation Methods 0.000 abstract 1
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- 229910002601 GaN Inorganic materials 0.000 description 2
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- 238000010586 diagram Methods 0.000 description 2
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- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
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- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910000599 Cr alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- 229910001260 Pt alloy Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 229910052594 sapphire Inorganic materials 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention provides an LED chip and a preparation method thereof.A surface of an epitaxial lamination layer is provided with an insulating reflecting layer, and the insulating reflecting layer is provided with through holes respectively corresponding to a groove exposed part and a table top exposed part; meanwhile, metal filling layers are respectively arranged in the through holes; the first electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the groove through the through hole and extends upwards to the surface of the insulating reflecting layer; and the second electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer. Therefore, the filling of the open hole of the insulating reflecting layer can be realized through the arrangement of the hole filling metal layer, the surface height difference caused by the open hole of the insulating reflecting layer and the cavity generated by the surface height difference are reduced, and the technical problems of stress mismatch, heat aggregation and uneven current distribution caused by the open hole of the insulating reflecting layer are solved.
Description
Technical Field
The invention relates to the field of light emitting diodes, in particular to an LED chip and a preparation method thereof.
Background
With the rapid development of the LED technology and the gradual improvement of the LED lighting effect, the application of the LED is more and more extensive, and people pay more attention to the development prospect of the LED on the display screen. The LED chip is used as a core component of the LED lamp, has the function of converting electric energy into light energy, and specifically comprises an epitaxial wafer and an N-type electrode and a P-type electrode which are respectively arranged on the epitaxial wafer. When current passes through the LED chip, holes in the P type semiconductor and electrons in the N type semiconductor move to the active layer and are combined in the active layer, so that the LED chip emits light.
The inventor finds out in the product test process that: in the main-stream Mini LED chip in the current market, a plurality of steps are formed due to height differences in the process of manufacturing structures such as an extended electrode and a reflector, as shown in fig. 1; therefore, the electrode surface of the whole chip is uneven, and a cavity is easily generated on the interface when the crystal is fixed by welding. These voids can easily lead to stress mismatch, heat build-up and uneven current distribution, which in turn can lead to failure of the functional layer and the entire chip.
In view of the above, in order to overcome the above-mentioned defects of the LED chip in the prior art, the present inventors have specially designed an LED chip and a method for manufacturing the same.
Disclosure of Invention
The invention aims to provide an LED chip and a preparation method thereof, and aims to solve the problem that an LED chip is too large in flip-chip welding cavity.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
an LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate and at least comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and a local region of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a groove and a table top; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
the insulation reflecting layer is arranged on the surface of the epitaxial lamination layer and is respectively provided with through holes which expose the grooves and partial surfaces of the table-board; meanwhile, metal filling layers are respectively arranged in the through holes;
the first electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the groove through the through hole and extends upwards to the surface of the insulating reflecting layer;
and the second electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer.
Preferably, the insulating reflective layer and the metal filling layer are obtained by a photolithography process, which specifically includes:
depositing the insulation reflecting layer on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulation reflecting layer, and respectively etching through holes on the exposed part of the groove and the exposed part of the table top corresponding to the insulation reflecting layer by taking the photoresist pattern as a mask to form through holes, and then retaining the photoresist on the surface of the insulation reflecting layer;
and after depositing a metal layer on the surface of the insulating reflecting layer, stripping the metal layer at the non-through hole by using a photoresist stripping process, so that the metal filling layer is formed in the through hole.
Preferably, an insulating layer is further disposed between the epitaxial stack layer and the insulating reflective layer, and the insulating layer includes a first insulating layer and a second insulating layer that are formed independently and mutually supported, and specifically includes:
the first insulating layer is arranged on the side wall of the groove;
the second insulating layer covers the epitaxial lamination, a through hole penetrates through the insulating reflecting layer, the second insulating layer and the first insulating layer to form the groove exposed part, and the other through hole penetrates through the insulating reflecting layer and the second insulating layer which are positioned on the table top to form the table top exposed part.
Preferably, the thickness of the metal filling layer is equal to that of the insulating reflective layer.
Preferably, an extension electrode is arranged on the mesa and/or the bottom surface of the groove, and the extension electrode comprises one or more of chromium, nickel, aluminum, titanium, platinum, gold, palladium and silver.
Preferably, a current spreading layer is arranged on the mesa, and the metal filling layer is in contact with the current spreading layer.
Preferably, a current spreading layer is provided on the mesa, and the spreading electrode is laminated on a surface of the current spreading layer.
Preferably, the current spreading layer comprises one or more of ITO, IZO, IGO, ZnO.
Preferably, the insulating reflective layer includes a DBR reflective layer.
Preferably, the first electrode and the second electrode each comprise one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, gold-tin alloy.
Preferably, the epitaxial stack has at least one exposed substrate portion, and the insulating layer is stacked on the substrate so as to be held on the exposed substrate portion.
Preferably, the exposed part of the substrate surrounds the periphery of the epitaxial lamination; the insulating layer is laminated on the substrate in a manner of being kept at the exposed part of the substrate, and surrounds the periphery of the epitaxial lamination.
The invention also provides a preparation method of the LED chip, which comprises the following steps:
step S01, providing a substrate; growing an epitaxial lamination on the surface of the substrate, wherein the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the first direction is vertical to the substrate and points to the epitaxial lamination from the substrate;
step S02, etching a local region of the epitaxial stack to a portion of the first type semiconductor layer to form a recess and a mesa;
step S03, depositing to form a first insulating layer, wherein the first insulating layer fills the groove;
step S04, deep etching is carried out on the edge of the epitaxial lamination layer to form a substrate exposed part;
step S05, manufacturing a current expansion layer on the surface of the table board;
step S06, depositing a second insulating layer which coats the epitaxial lamination layer in a mode of being kept at the exposed part of the substrate; etching the second insulating layer and the first insulating layer by a photoetching process to expose the bottom surface of the groove and part of the surface of the current expansion layer;
step S07, respectively manufacturing an extended electrode on the exposed part of the groove and the exposed part of the current extended layer;
step S08, depositing and forming the insulation reflection layer on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulation reflection layer, and retaining the photoresist on the surface of the insulation reflection layer after respectively etching through holes on the exposed part of the groove and the exposed part of the table top corresponding to the insulation reflection layer by taking the photoresist pattern as a mask;
step S09, after depositing a metal layer on the surface of the insulating reflecting layer, stripping the metal layer at the non-through hole by using a photoresist stripping process to form a metal filling layer in the through hole;
step S10, manufacturing a first electrode and a second electrode, wherein the first electrode is laminated on the exposed part of the groove through a through hole and extends upwards to the surface of the insulating reflecting layer; the second electrode is stacked on the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer.
Preferably, the thickness of the metal filling layer is equal to that of the insulating reflective layer.
According to the technical scheme, the LED chip and the preparation method thereof provided by the invention have the advantages that the insulating reflecting layer is arranged on the surface of the epitaxial laminated layer, and the insulating reflecting layer is provided with the through holes respectively corresponding to the exposed part of the groove and the exposed part of the table top; meanwhile, metal filling layers are respectively arranged in the through holes; the first electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the groove through the through hole and extends upwards to the surface of the insulating reflecting layer; and the second electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer. Therefore, the filling of the open hole of the insulating reflecting layer can be realized through the arrangement of the hole filling metal layer, the surface height difference caused by the open hole of the insulating reflecting layer and the cavity generated by the surface height difference are reduced, and the technical problems of stress mismatch, heat accumulation and nonuniform current distribution caused by the open hole of the insulating reflecting layer are solved.
Secondly, the insulating reflecting layer and the metal filling layer are obtained through a photoetching process, and the method specifically comprises the following steps: depositing the insulation reflecting layer on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulation reflecting layer, and retaining the photoresist on the surface of the insulation reflecting layer after respectively etching the exposed part of the groove and the exposed part of the table top corresponding to the insulation reflecting layer by taking the photoresist pattern as a mask to form through holes; and after depositing a metal layer on the surface of the insulating reflecting layer, stripping the metal layer at the non-through hole by using a photoresist stripping process, so that the metal filling layer is formed in the through hole. Therefore, redundant photoetching procedures are not needed to be added, the metal filling layer is manufactured on the through hole by using the residual photoresist after etching, the process is simple, and the large-scale mass production is high.
Then, still be equipped with the insulating layer between epitaxial lamination with insulating reflecting layer, the insulating layer includes independent formation and the first insulating layer and the second insulating layer of mutual support, specifically includes: the first insulating layer is arranged on the side wall of the groove; the second insulating layer covers the epitaxial lamination, a through hole penetrates through the insulating reflecting layer, the second insulating layer and the first insulating layer to form the groove exposed part, and the other through hole penetrates through the insulating reflecting layer and the second insulating layer which are positioned on the table top to form the table top exposed part. Therefore, the grooves can be filled and leveled through the arrangement of the first insulating layer, the extension electrodes can be covered through the arrangement of the second insulating layer, and the height difference caused by the extension electrodes is reduced. Therefore, the technical problems of stress mismatch, heat accumulation and uneven current distribution are better avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic top view of a Mini LED chip in the prior art;
fig. 2 is a schematic structural diagram of an LED chip according to an embodiment of the present invention;
fig. 3.1A to fig. 3.10A are schematic structural diagrams corresponding to steps of a method for manufacturing an LED chip according to an embodiment of the present invention;
fig. 3.1B to fig. 3.10B are schematic top views corresponding to steps of a method for manufacturing an LED chip according to an embodiment of the present invention;
the symbols in the drawings illustrate that: 1. the semiconductor device comprises a substrate, 1.1, a substrate exposed part, 2, a first type semiconductor layer, 3, an active region, 4, a second type semiconductor layer, 5, a table board, 6, a groove, 7, a first insulating layer, 8, a current expansion layer, 9, a second insulating layer, 10, an expansion electrode, 11, an insulating reflecting layer, 11.1, a through hole, 12, photoresist, 13, a metal filling layer, 14, a first electrode, 15 and a second electrode.
Detailed Description
In order to make the content of the present invention clearer, the content of the present invention is further explained below with reference to the attached drawings. The invention is not limited to this specific embodiment. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 2, an LED chip includes:
a substrate 1;
the epitaxial lamination is arranged on the surface of the substrate 1 and at least comprises a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 which are sequentially stacked along a first direction, and a local region of the epitaxial lamination is etched to a part of the first type semiconductor layer 2 to form a groove 6 and a table top 5; the first direction is perpendicular to the substrate 1 and is directed to the epitaxial stack by the substrate 1;
an insulating reflective layer 11 disposed on the surface of the epitaxial stack and having through holes 11.1 respectively exposing the grooves 6 and partial surfaces of the mesas 5; meanwhile, metal filling layers 13 are respectively arranged in the through holes 11.1;
a first electrode 14, which is laminated on the surface of the metal filling layer 13 corresponding to the exposed part of the groove 6 through the through hole 11.1 and extends upwards to the surface of the insulating reflection layer 11;
and the second electrode 15 is laminated on the surface of the metal filling layer 13 corresponding to the exposed part of the mesa 5 through the through hole 11.1 and extends upwards to the surface of the insulating and reflecting layer 11.
It is worth mentioning that the type of the substrate 1 is not limited in the LED chip of the present embodiment, for example, the substrate 1 may be, but is not limited to, a sapphire substrate 1, a silicon substrate 1, or the like. In addition, the types of the first-type semiconductor layer 2, the active region 3 and the second-type semiconductor layer 4 of the epitaxial stack may also be not limited in the LED chip of the present embodiment, for example, the first-type semiconductor layer 2 may be, but is not limited to, a gallium nitride layer, and correspondingly, the second-type semiconductor layer 4 may be, but is not limited to, a gallium nitride layer;
in an embodiment of the present invention, the insulating reflective layer 11 and the metal filling layer 13 are obtained by a photolithography process, which specifically includes:
depositing and forming the insulating reflecting layer 11 on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulating reflecting layer 11, and retaining the photoresist 12 on the surface of the insulating reflecting layer 11 after respectively etching and forming through holes 11.1 on the exposed part of the groove 6 and the exposed part of the table top 5 corresponding to the insulating reflecting layer 11 by taking the photoresist pattern as a mask;
after depositing a metal layer on the surface of the insulating reflective layer 11, stripping the metal layer at the non-through hole 11.1 by using a photoresist stripping process, so that the metal filling layer 13 is formed in the through hole 11.1.
In the embodiment of the present invention, an insulating layer is further disposed between the epitaxial stack and the insulating reflective layer 11, and the insulating layer includes a first insulating layer 7 and a second insulating layer 9 that are formed independently and are connected to each other, and specifically includes:
the first insulating layer 7 is arranged on the side wall of the groove 6;
the second insulating layer 9 covers the epitaxial lamination, and a through hole penetrates through the insulating reflective layer 11, the second insulating layer 9 and the first insulating layer 7 to form the groove exposed portion, and the other through hole penetrates through the insulating reflective layer 11 positioned on the table top and the second insulating layer 9 to form the table top exposed portion.
It is worth mentioning that the material of the insulating layer may be, but is not limited to, SiO2 (silicon dioxide).
In the embodiment of the present invention, the thickness of the metal filling layer 13 is equal to the thickness of the insulating reflective layer 11.
In the embodiment of the present invention, an extension electrode 10 is disposed on the bottom surface of the mesa 5 and/or the groove 6, and the extension electrode 10 includes one or more of chromium, nickel, aluminum, titanium, platinum, gold, palladium, and silver.
In the embodiment of the present invention, the mesa 5 is provided with a current spreading layer 8, and the metal filling layer 13 is in contact with the current spreading layer 8.
In the embodiment of the present invention, the mesa 5 is provided with a current spreading layer 8, and the spreading electrode 10 is laminated on the surface of the current spreading layer 8.
In the embodiment of the present invention, the current spreading layer 8 includes one or more of ITO, IZO, IGO, and ZnO.
In the embodiment of the present invention, the insulating reflective layer 11 includes a DBR reflective layer.
In the embodiment of the present invention, the first electrode 14 and the second electrode 15 respectively include one or more stacks of cr, ni, al, ti, pt, au, pd, ag, and sn alloy.
In the embodiment of the present invention, the epitaxial stack has at least one substrate exposed portion 1.1, wherein the insulating layer is stacked on the substrate 1 in a manner of being held on the substrate exposed portion 1.1.
In the embodiment of the invention, the substrate exposed part 1.1 surrounds the periphery of the epitaxial lamination; the insulating layer is laminated on the substrate 1 so as to be held on the substrate exposed portion 1.1, and surrounds the periphery of the epitaxial laminate.
The embodiment of the invention also provides a preparation method of the LED chip, which comprises the following steps:
step S01, as shown in fig. 3.1A and 3.1B: providing a substrate 1; growing an epitaxial lamination on the surface of the substrate 1, wherein the epitaxial lamination comprises a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 which are sequentially stacked along a first direction, and the first direction is vertical to the substrate 1 and points to the epitaxial lamination from the substrate 1;
step S02, as shown in fig. 3.2A and 3.2B: etching a local area of the epitaxial lamination layer to a part of the first type semiconductor layer 2 to form a groove 6 and a table-board 5;
step S03, as shown in fig. 3.3A and 3.3B: depositing to form a first insulating layer 7, wherein the first insulating layer 7 fills the groove 6;
step S04, as shown in fig. 3.4A and 3.4B: deep etching is carried out on the edge of the epitaxial lamination layer to form a substrate exposed part 1.1;
step S05, as shown in fig. 3.5A and 3.5B: manufacturing a current expansion layer 8 on the surface of the mesa 5;
step S06, as shown in fig. 3.6A and 3.6B: depositing a second insulating layer 9, wherein the second insulating layer 9 covers the epitaxial lamination layer in a mode of being kept at the substrate exposed part 1.1; etching the second insulating layer 9 and the first insulating layer 7 by a photoetching process to expose the bottom surface of the groove 6 and part of the surface of the current expansion layer 8;
step S07, as shown in fig. 3.7A and 3.7B: respectively manufacturing an extended electrode 10 on the exposed part of the groove 6 and the exposed part of the current extended layer 8;
step S08, as shown in fig. 3.8A and 3.8B: depositing and forming the insulating reflecting layer 11 on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulating reflecting layer 11, and retaining the photoresist 12 on the surface of the insulating reflecting layer 11 after respectively etching and forming through holes 11.1 on the exposed part of the groove 6 and the exposed part of the table top 5 corresponding to the insulating reflecting layer 11 by taking the photoresist pattern as a mask;
step S09, as shown in fig. 3.9A and 3.9B: after depositing a metal layer on the surface of the insulating reflecting layer 11, stripping the metal layer at the non-through hole 11.1 by using a photoresist stripping process, so that a metal filling layer 13 is formed in the through hole 11.1;
step S10, as shown in fig. 3.10A and 3.10B: manufacturing a first electrode 14 and a second electrode 15, wherein the first electrode 14 is laminated on the exposed part of the groove 6 through a through hole 11.1 and extends upwards to the surface of the insulating reflecting layer 11; the second electrode 15 is laminated on the exposed part of the mesa 5 through a through hole 11.1 and extends up to the surface of the insulating reflective layer 11.
In the embodiment of the present invention, the thickness of the metal filling layer 13 is equal to the thickness of the insulating reflective layer 11.
According to the technical scheme, the LED chip and the preparation method thereof provided by the invention have the advantages that the insulation reflecting layer 11 is arranged on the surface of the epitaxial laminated layer, and the insulation reflecting layer 11 is provided with the through holes 11.1 which respectively correspond to the exposed part of the groove 6 and the exposed part of the table top 5; meanwhile, metal filling layers 13 are respectively arranged in the through holes 11.1; a first electrode 14, which is laminated on the surface of the metal filling layer 13 corresponding to the exposed part of the groove 6 through the through hole 11.1 and extends upwards to the surface of the insulating reflection layer 11; and a second electrode 15 laminated on the surface of the metal filling layer 13 corresponding to the exposed part of the mesa 5 through the through hole 11.1 and extending upward to the surface of the insulating reflection layer 11. Therefore, the filling of the holes of the insulating reflecting layer 11 can be realized through the arrangement of the hole filling metal layer, the surface height difference caused by the holes of the insulating reflecting layer 11 and the generated holes are reduced, and the technical problems of stress mismatch, heat accumulation and uneven current distribution caused by the holes are further solved.
Secondly, the insulating reflective layer 11 and the metal filling layer 13 are obtained by a photolithography process, which specifically includes: depositing and forming the insulating reflecting layer 11 on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulating reflecting layer 11, and retaining the photoresist 12 on the surface of the insulating reflecting layer 11 after respectively etching and forming through holes 11.1 on the exposed part of the groove 6 and the exposed part of the table top 5 corresponding to the insulating reflecting layer 11 by taking the photoresist pattern as a mask; after depositing a metal layer on the surface of the insulating reflective layer 11, stripping the metal layer at the non-through hole 11.1 by using a photoresist stripping process, so that the metal filling layer 13 is formed in the through hole 11.1. Thus, the metal filling layer 13 is manufactured in the through hole 11.1 by using the residual photoresist 12 after etching without adding extra photoetching process, the process is simple, and the large-scale mass production is high.
Then, an insulating layer is further disposed between the epitaxial stack and the insulating reflective layer 11, and the insulating layer includes a first insulating layer 7 and a second insulating layer 9 that are formed independently and are mutually supported, and specifically includes: the first insulating layer 7 is arranged on the side wall of the groove 6; the second insulating layer 9 covers the epitaxial lamination, and a through hole penetrates through the insulating reflective layer 11, the second insulating layer 9 and the first insulating layer 7 to form the groove exposed portion, and the other through hole penetrates through the insulating reflective layer 11 positioned on the table top and the second insulating layer 9 to form the table top exposed portion. Therefore, the groove 6 can be filled and leveled by arranging the first insulating layer 7, and the extension electrode 10 can be covered by arranging the second insulating layer 9, so that the height difference caused by the extension electrode can be reduced. Therefore, the technical problems of stress mismatch, heat accumulation and uneven current distribution are better avoided.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (14)
1. An LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate and at least comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and a local region of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a groove and a table top; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
the insulation reflecting layer is arranged on the surface of the epitaxial lamination layer and is respectively provided with through holes which expose the grooves and partial surfaces of the table-board; meanwhile, metal filling layers are respectively arranged in the through holes;
the first electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the groove through the through hole and extends upwards to the surface of the insulating reflecting layer;
and the second electrode is laminated on the surface of the metal filling layer corresponding to the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer.
2. The LED chip of claim 1, wherein the insulating reflective layer and the metal filling layer are obtained by a photolithography process, comprising:
depositing the insulation reflecting layer on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulation reflecting layer, and retaining the photoresist on the surface of the insulation reflecting layer after respectively etching the exposed part of the groove and the exposed part of the table top corresponding to the insulation reflecting layer by taking the photoresist pattern as a mask to form through holes;
and after depositing a metal layer on the surface of the insulating reflecting layer, stripping the metal layer at the non-through hole by using a photoresist stripping process, so that the metal filling layer is formed in the through hole.
3. The LED chip of claim 1, wherein an insulating layer is further disposed between the epitaxial stack and the insulating reflective layer, and the insulating layer comprises a first insulating layer and a second insulating layer formed independently and received each other, and specifically comprises:
the first insulating layer is arranged on the side wall of the groove;
the second insulating layer covers the epitaxial lamination, a through hole penetrates through the insulating reflecting layer, the second insulating layer and the first insulating layer to form the groove exposed part, and the other through hole penetrates through the insulating reflecting layer and the second insulating layer which are positioned on the table top to form the table top exposed part.
4. The LED chip of claim 2, wherein the thickness of said metal fill layer is the same as the thickness of said insulating reflective layer.
5. The LED chip of claim 3, wherein an extension electrode is disposed on the mesa and/or the trench floor, the extension electrode comprising one or more of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver.
6. The LED chip of claim 2, wherein a current spreading layer is disposed on said mesa and said metal fill layer is in contact with said current spreading layer.
7. The LED chip according to claim 5, wherein a current spreading layer is provided on the mesa, and the spreading electrode is laminated on a surface of the current spreading layer.
8. The LED chip of claim 6 or 7, wherein the current spreading layer comprises one or more of ITO, IZO, IGO, ZnO.
9. The LED chip of claim 1, wherein said insulating reflective layer comprises a DBR reflective layer.
10. The LED chip of claim 1, wherein said first and second electrodes each comprise one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, gold-tin alloy.
11. The LED chip of claim 1, wherein said epitaxial stack has at least one substrate exposure, wherein said insulating layer is stacked on said substrate in such a way as to be maintained on said substrate exposure.
12. The LED chip of claim 11, wherein said substrate bare portion surrounds a perimeter of said epitaxial stack; the insulating layer is laminated on the substrate in a manner of being kept at the exposed part of the substrate, and surrounds the periphery of the epitaxial lamination.
13. A preparation method of an LED chip is characterized by comprising the following steps:
step S01, providing a substrate; growing an epitaxial lamination on the surface of the substrate, wherein the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the first direction is vertical to the substrate and points to the epitaxial lamination from the substrate;
step S02, etching a local region of the epitaxial stack to a portion of the first type semiconductor layer to form a recess and a mesa;
step S03, depositing to form a first insulating layer, wherein the first insulating layer fills the groove;
step S04, deep etching is carried out on the edge of the epitaxial lamination layer to form a substrate exposed part;
step S05, manufacturing a current expansion layer on the surface of the table board;
step S06, depositing a second insulating layer which coats the epitaxial lamination layer in a mode of being kept at the exposed part of the substrate; etching the second insulating layer and the first insulating layer by a photoetching process to expose the bottom surface of the groove and part of the surface of the current expansion layer;
step S07, respectively manufacturing an extended electrode on the exposed part of the groove and the exposed part of the current extended layer;
step S08, depositing and forming the insulation reflection layer on the surface of the epitaxial lamination layer, forming a photoresist pattern on the surface of the insulation reflection layer, and retaining the photoresist on the surface of the insulation reflection layer after respectively etching through holes on the exposed part of the groove and the exposed part of the table top corresponding to the insulation reflection layer by taking the photoresist pattern as a mask;
step S09, after depositing a metal layer on the surface of the insulating reflecting layer, stripping the metal layer at the non-through hole by using a photoresist stripping process to form a metal filling layer in the through hole;
step S10, manufacturing a first electrode and a second electrode, wherein the first electrode is laminated on the exposed part of the groove through a through hole and extends upwards to the surface of the insulating reflecting layer; the second electrode is stacked on the exposed part of the table board through the through hole and extends upwards to the surface of the insulating reflecting layer.
14. The method of claim 13, wherein the metal filling layer has a thickness equal to the thickness of the insulating reflective layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210623876.6A CN115000268A (en) | 2022-06-02 | 2022-06-02 | LED chip and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210623876.6A CN115000268A (en) | 2022-06-02 | 2022-06-02 | LED chip and preparation method thereof |
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| CN115000268A true CN115000268A (en) | 2022-09-02 |
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